@typecad/framework-zephyr 1.0.0-alpha.14 → 1.0.0-alpha.15

package/dist/chips/soc/.js

@@ -0,0 +1,129 @@
+// GENERATED by scripts/gen-soc-descriptors.mjs — consolidated from the
+// board-xiao-nrf52840 + mcu-nrf52840 package data (the exact flatten+reconstruct the build
+// performed). Curated additions: tier/pinNaming/excludedPins. Regenerate
+// only alongside a descriptor-type change; hand-edit the curated table in
+// the script, not this file.
+export const _SOC = {
+    "id": "xiao_ble/nrf52840",
+    "soc": "",
+    "gpioController": "gpio0",
+    "gpioControllers": [
+        {
+            "nodelabel": "gpio0",
+            "minPin": 0,
+            "maxPin": 31
+        },
+        {
+            "nodelabel": "gpio1",
+            "minPin": 32,
+            "maxPin": 47
+        }
+    ],
+    "gpio": {
+        "dtSpecs": [
+            {
+                "pin": 26,
+                "dtSpec": "led0"
+            },
+            {
+                "pin": 30,
+                "dtSpec": "led1"
+            },
+            {
+                "pin": 6,
+                "dtSpec": "led2"
+            }
+        ]
+    },
+    "i2c": {
+        "controllers": [
+            {
+                "nodeLabel": "i2c1"
+            }
+        ]
+    },
+    "spi": {
+        "controllers": [
+            {
+                "nodeLabel": "spi2"
+            }
+        ]
+    },
+    "uart": {
+        "controllers": [
+            {
+                "nodeLabel": "uart0"
+            }
+        ]
+    },
+    "pwm": {
+        "specs": [
+            {
+                "pin": 17,
+                "dtSpec": "pwm-led0"
+            }
+        ],
+        "maxFrequencyHz": 2000000,
+        "resolutionBits": 16
+    },
+    "adc": {
+        "nodeLabel": "adc",
+        "resolution": 12,
+        "vrefMv": 3000,
+        "channels": [
+            {
+                "pin": 2,
+                "channel": 0
+            },
+            {
+                "pin": 3,
+                "channel": 1
+            },
+            {
+                "pin": 28,
+                "channel": 2
+            },
+            {
+                "pin": 29,
+                "channel": 3
+            }
+        ]
+    },
+    "wdt": {
+        "nodeLabel": "wdt0"
+    },
+    "usb": {
+        "controller": "zephyr_udc0",
+        "cdcInstances": 1,
+        "vid": "0x2FE3",
+        "pid": "0x0003"
+    },
+    "probeMethods": [
+        {
+            "id": "jlink",
+            "runner": "jlink",
+            "description": "J-Link probe (SWD)",
+            "debug": true,
+            "debugInterface": "swd",
+            "debugDevice": "nRF52840_xxAA"
+        },
+        {
+            "id": "openocd",
+            "runner": "openocd",
+            "description": "Any SWD probe openocd supports (CMSIS-DAP, cheap clones)",
+            "debug": true,
+            "debugInterface": "swd",
+            "debugCfgSource": [
+                "interface/stlink.cfg",
+                "target/nrf52.cfg"
+            ]
+        },
+        {
+            "id": "uf2",
+            "runner": "uf2",
+            "description": "Bootloader UF2 drag-and-drop: double-tap reset",
+            "debug": false
+        }
+    ],
+    "tier": "validated"
+};

package/dist/chips/soc/esp32.d.ts

@@ -0,0 +1,2 @@
+import type { ZephyrChipDescriptor } from '../types.js';
+export declare const ESP32_SOC: ZephyrChipDescriptor;

package/dist/chips/soc/esp32.js

@@ -0,0 +1,120 @@
+// Hand-maintained descriptor table — mechanically migrated from the
+// board-esp32-devkit + mcu-esp32 package data (the exact flatten+reconstruct the build
+// performed). Curated additions: tier/pinNaming/excludedPins. Regenerate
+// only alongside a descriptor-type change (edit this file; the original
+// migration script was never committed).
+export const ESP32_SOC = {
+    "id": "esp32_devkitc/esp32/procpu",
+    "soc": "esp32",
+    "gpioController": "gpio0",
+    "gpioControllers": [
+        {
+            "nodelabel": "gpio0",
+            "minPin": 0,
+            "maxPin": 31
+        },
+        {
+            "nodelabel": "gpio1",
+            "minPin": 32,
+            "maxPin": 39
+        }
+    ],
+    "gpio": {
+        "dtSpecs": [
+            {
+                "pin": 0,
+                "dtSpec": "sw0"
+            }
+        ],
+        "interruptPins": [
+            {
+                "pin": 0,
+                "dtSpec": "sw0"
+            }
+        ]
+    },
+    "i2c": {
+        "controllers": [
+            {
+                "nodeLabel": "i2c0"
+            }
+        ]
+    },
+    "spi": {
+        "controllers": [
+            {
+                "nodeLabel": "spi2"
+            },
+            {
+                "nodeLabel": "spi3"
+            }
+        ]
+    },
+    "uart": {
+        "controllers": [
+            {
+                "nodeLabel": "uart1"
+            },
+            {
+                "nodeLabel": "uart2"
+            }
+        ]
+    },
+    "adc": {
+        "nodeLabel": "adc0",
+        "resolution": 12,
+        "vrefMv": 1100,
+        "channels": [
+            {
+                "pin": 36,
+                "channel": 0
+            },
+            {
+                "pin": 37,
+                "channel": 1
+            },
+            {
+                "pin": 38,
+                "channel": 2
+            },
+            {
+                "pin": 39,
+                "channel": 3
+            },
+            {
+                "pin": 32,
+                "channel": 4
+            },
+            {
+                "pin": 33,
+                "channel": 5
+            },
+            {
+                "pin": 34,
+                "channel": 6
+            },
+            {
+                "pin": 35,
+                "channel": 7
+            }
+        ]
+    },
+    "wdt": {
+        "nodeLabel": "wdt0"
+    },
+    "wifi": {
+        "supported": true
+    },
+    "tier": "validated",
+    "pinNaming": "esp32-gpio",
+    "excludedPins": [
+        6,
+        7,
+        8,
+        9,
+        10,
+        11,
+        16,
+        17
+    ]
+};

package/dist/chips/soc/esp32c3.d.ts

@@ -0,0 +1,2 @@
+import type { ZephyrChipDescriptor } from '../types.js';
+export declare const ESP32C3_SOC: ZephyrChipDescriptor;

package/dist/chips/soc/esp32c3.js

@@ -0,0 +1,90 @@
+// Hand-maintained descriptor table — mechanically migrated from the
+// board-esp32c3 + mcu-esp32c3 package data (the exact flatten+reconstruct the build
+// performed). Curated additions: tier/pinNaming/excludedPins. Regenerate
+// only alongside a descriptor-type change (edit this file; the original
+// migration script was never committed).
+export const ESP32C3_SOC = {
+    "id": "esp32c3_devkitm/esp32c3",
+    "soc": "esp32c3",
+    "gpioController": "gpio0",
+    "gpio": {
+        "dtSpecs": [
+            {
+                "pin": 9,
+                "dtSpec": "sw0"
+            }
+        ],
+        "interruptPins": [
+            {
+                "pin": 9,
+                "dtSpec": "sw0"
+            }
+        ]
+    },
+    "i2c": {
+        "controllers": [
+            {
+                "nodeLabel": "i2c0"
+            }
+        ]
+    },
+    "spi": {
+        "controllers": [
+            {
+                "nodeLabel": "spi2"
+            }
+        ]
+    },
+    "uart": {
+        "controllers": [
+            {
+                "nodeLabel": "uart0"
+            }
+        ]
+    },
+    "adc": {
+        "nodeLabel": "adc0",
+        "resolution": 12,
+        "vrefMv": 1100,
+        "channels": [
+            {
+                "pin": 0,
+                "channel": 0
+            },
+            {
+                "pin": 1,
+                "channel": 1
+            },
+            {
+                "pin": 2,
+                "channel": 2
+            },
+            {
+                "pin": 3,
+                "channel": 3
+            },
+            {
+                "pin": 4,
+                "channel": 4
+            }
+        ]
+    },
+    "wdt": {
+        "nodeLabel": "wdt0"
+    },
+    "wifi": {
+        "supported": true
+    },
+    "tier": "validated",
+    "pinNaming": "esp32-gpio",
+    "excludedPins": [
+        11,
+        12,
+        13,
+        14,
+        15,
+        16,
+        17,
+        18
+    ]
+};

package/dist/chips/soc/esp32c6.d.ts

@@ -0,0 +1,2 @@
+import type { ZephyrChipDescriptor } from '../types.js';
+export declare const ESP32C6_SOC: ZephyrChipDescriptor;

package/dist/chips/soc/esp32c6.js

@@ -0,0 +1,109 @@
+// Hand-maintained descriptor table — mechanically migrated from the
+// board-esp32c6 + mcu-esp32c6 package data (the exact flatten+reconstruct the build
+// performed). Curated additions: tier/pinNaming/excludedPins. Regenerate
+// only alongside a descriptor-type change (edit this file; the original
+// migration script was never committed).
+export const ESP32C6_SOC = {
+    "id": "esp32c6_devkitc/esp32c6/hpcore",
+    "soc": "esp32c6",
+    "gpioController": "gpio0",
+    "gpio": {
+        "dtSpecs": [
+            {
+                "pin": 9,
+                "dtSpec": "sw0"
+            }
+        ],
+        "interruptPins": [
+            {
+                "pin": 9,
+                "dtSpec": "sw0"
+            }
+        ]
+    },
+    "i2c": {
+        "controllers": [
+            {
+                "nodeLabel": "i2c0"
+            }
+        ]
+    },
+    "spi": {
+        "controllers": [
+            {
+                "nodeLabel": "spi2"
+            }
+        ]
+    },
+    "uart": {
+        "controllers": [
+            {
+                "nodeLabel": "uart0"
+            }
+        ]
+    },
+    "adc": {
+        "nodeLabel": "adc0",
+        "resolution": 12,
+        "vrefMv": 1100,
+        "channels": [
+            {
+                "pin": 0,
+                "channel": 0
+            },
+            {
+                "pin": 1,
+                "channel": 1
+            },
+            {
+                "pin": 2,
+                "channel": 2
+            },
+            {
+                "pin": 3,
+                "channel": 3
+            },
+            {
+                "pin": 4,
+                "channel": 4
+            },
+            {
+                "pin": 5,
+                "channel": 5
+            },
+            {
+                "pin": 6,
+                "channel": 6
+            }
+        ]
+    },
+    "wdt": {
+        "nodeLabel": "wdt0"
+    },
+    "wifi": {
+        "supported": true
+    },
+    "tier": "validated",
+    "pinNaming": "esp32-gpio",
+    "excludedPins": [
+        12,
+        13,
+        14,
+        15,
+        16,
+        17,
+        18,
+        19,
+        20,
+        21,
+        22,
+        23,
+        24,
+        25,
+        26,
+        27,
+        28,
+        29,
+        30
+    ]
+};

package/dist/chips/soc/esp32s3.d.ts

@@ -0,0 +1,2 @@
+import type { ZephyrChipDescriptor } from '../types.js';
+export declare const ESP32S3_SOC: ZephyrChipDescriptor;

package/dist/chips/soc/esp32s3.js

@@ -0,0 +1,189 @@
+// Hand-maintained descriptor table — mechanically migrated from the
+// board-esp32s3 + mcu-esp32s3 package data (the exact flatten+reconstruct the build
+// performed). Curated additions: tier/pinNaming/excludedPins. Regenerate
+// only alongside a descriptor-type change (edit this file; the original
+// migration script was never committed).
+export const ESP32S3_SOC = {
+    "id": "esp32s3_devkitc/esp32s3/procpu",
+    "soc": "esp32s3",
+    "gpioController": "gpio0",
+    "gpioControllers": [
+        {
+            "nodelabel": "gpio0",
+            "minPin": 0,
+            "maxPin": 31
+        },
+        {
+            "nodelabel": "gpio1",
+            "minPin": 32,
+            "maxPin": 48
+        }
+    ],
+    "gpio": {
+        "dtSpecs": [
+            {
+                "pin": 0,
+                "dtSpec": "sw0"
+            }
+        ],
+        "interruptPins": [
+            {
+                "pin": 0,
+                "dtSpec": "sw0"
+            }
+        ]
+    },
+    "i2c": {
+        "controllers": [
+            {
+                "nodeLabel": "i2c0"
+            }
+        ]
+    },
+    "spi": {
+        "controllers": [
+            {
+                "nodeLabel": "spi2"
+            },
+            {
+                "nodeLabel": "spi3"
+            }
+        ]
+    },
+    "uart": {
+        "controllers": [
+            {
+                "nodeLabel": "uart1",
+                "pinctrlRef": "uart1_default",
+                "props": [
+                    "current-speed = <115200>;"
+                ]
+            }
+        ]
+    },
+    "pwm": {
+        "specs": [],
+        "matrix": {
+            "controller": "ledc0",
+            "channelCount": 8,
+            "pins": [
+                1,
+                2,
+                3,
+                4,
+                5,
+                6,
+                7,
+                8,
+                9,
+                10,
+                11,
+                12,
+                13,
+                14,
+                15,
+                16,
+                17,
+                18,
+                21,
+                38,
+                39,
+                40,
+                41,
+                42,
+                45,
+                46,
+                47,
+                48
+            ]
+        },
+        "maxFrequencyHz": 40000000,
+        "resolutionBits": 20
+    },
+    "adc": {
+        "nodeLabel": "adc0",
+        "resolution": 12,
+        "vrefMv": 1100,
+        "channels": [
+            {
+                "pin": 1,
+                "channel": 0
+            },
+            {
+                "pin": 2,
+                "channel": 1
+            },
+            {
+                "pin": 3,
+                "channel": 2
+            },
+            {
+                "pin": 4,
+                "channel": 3
+            },
+            {
+                "pin": 5,
+                "channel": 4
+            },
+            {
+                "pin": 6,
+                "channel": 5
+            },
+            {
+                "pin": 7,
+                "channel": 6
+            },
+            {
+                "pin": 8,
+                "channel": 7
+            },
+            {
+                "pin": 9,
+                "channel": 8
+            },
+            {
+                "pin": 10,
+                "channel": 9
+            }
+        ]
+    },
+    "wdt": {
+        "nodeLabel": "wdt0"
+    },
+    "usb": {
+        "controller": "zephyr_udc0",
+        "cdcInstances": 1,
+        "vid": "0x2FE3",
+        "pid": "0x0006"
+    },
+    "wifi": {
+        "supported": true
+    },
+    "tier": "validated",
+    "pinNaming": "esp32-gpio",
+    "excludedPins": [
+        0,
+        19,
+        20,
+        22,
+        23,
+        24,
+        25,
+        26,
+        27,
+        28,
+        29,
+        30,
+        31,
+        32,
+        33,
+        34,
+        35,
+        36,
+        37,
+        43,
+        44,
+        45,
+        46
+    ]
+};

package/dist/chips/soc/index.d.ts

@@ -0,0 +1,2 @@
+import type { ZephyrChipDescriptor } from '../types.js';
+export declare const SOC_CHIPS: Readonly<Record<string, ZephyrChipDescriptor>>;

package/dist/chips/soc/index.js

@@ -0,0 +1,23 @@
+// Hand-maintained soc-keyed chip registry — mechanically migrated from the
+// registry. chipForSoc() resolves a consolidated descriptor by the SoC name
+// (the second segment of a Zephyr board target, or the config's soc: field).
+import { ESP32_SOC } from './esp32.js';
+import { ESP32C3_SOC } from './esp32c3.js';
+import { ESP32C6_SOC } from './esp32c6.js';
+import { ESP32S3_SOC } from './esp32s3.js';
+import { SAMD21G18A_SOC } from './samd21g18a.js';
+import { RP2040_SOC } from './rp2040.js';
+import { RP2350A_SOC } from './rp2350a.js';
+import { NRF52840_SOC } from './nrf52840.js';
+import { STM32F411XE_SOC } from './stm32f411xe.js';
+export const SOC_CHIPS = {
+    "esp32": ESP32_SOC,
+    "esp32c3": ESP32C3_SOC,
+    "esp32c6": ESP32C6_SOC,
+    "esp32s3": ESP32S3_SOC,
+    "samd21g18a": SAMD21G18A_SOC,
+    "rp2040": RP2040_SOC,
+    "rp2350a": RP2350A_SOC,
+    "nrf52840": NRF52840_SOC,
+    "stm32f411xe": STM32F411XE_SOC,
+};

package/dist/chips/soc/nrf52840.d.ts

@@ -0,0 +1,2 @@
+import type { ZephyrChipDescriptor } from '../types.js';
+export declare const NRF52840_SOC: ZephyrChipDescriptor;