@tscircuit/schematic-trace-solver 0.0.192 → 0.0.194

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (29) hide show
  1. package/dist/index.js +15 -5
  2. package/lib/solvers/UnroutedTraceRecoverySolver/UnroutedTraceRecoverySolver.ts +14 -3
  3. package/package.json +1 -1
  4. package/site/SchematicTracePipelineSolver/repro-core-vertical-passive-ground-label-overlap.page.tsx +4 -0
  5. package/site/SchematicTracePipelineSolver/repro173-boost-drv8711-ground-label-overlap.page.tsx +7 -0
  6. package/tests/bug-reports/bug-report-20260707T092615Z/__snapshots__/bug-report-20260707T092615Z.snap.svg +2 -2
  7. package/tests/bug-reports/bug-report-20260724T175257Z/__snapshots__/bug-report-20260724T175257Z.snap.svg +35 -35
  8. package/tests/examples/__snapshots__/example08.snap.svg +29 -29
  9. package/tests/examples/__snapshots__/example32.snap.svg +2 -2
  10. package/tests/examples/__snapshots__/example46.snap.svg +12 -21
  11. package/tests/repros/__snapshots__/board-1273-trace-overlap-cycle.snap.svg +2 -2
  12. package/tests/repros/__snapshots__/repro-core-vertical-passive-ground-label-overlap.snap.svg +135 -0
  13. package/tests/repros/__snapshots__/repro-esp12f-section.snap.svg +2 -2
  14. package/tests/repros/__snapshots__/repro-ina237-current-monitor.snap.svg +17 -17
  15. package/tests/repros/__snapshots__/repro-manual-placement-detour.snap.svg +249 -0
  16. package/tests/repros/__snapshots__/repro-netlabel-overlap-trace.snap.svg +2 -2
  17. package/tests/repros/__snapshots__/repro-pmp11282-isolated-dcdc.snap.svg +89 -98
  18. package/tests/repros/__snapshots__/repro173-boost-drv8711-ground-label-overlap.snap.svg +307 -0
  19. package/tests/repros/__snapshots__/rtc-imu-microsd-section.snap.svg +286 -0
  20. package/tests/repros/assets/repro-core-vertical-passive-ground-label-overlap.input.json +353 -0
  21. package/tests/repros/assets/repro173-boost-drv8711-ground-label-overlap.input.json +865 -0
  22. package/tests/repros/assets/rtc-imu-microsd-section.input.json +894 -0
  23. package/tests/repros/repro-core-vertical-passive-ground-label-overlap.test.ts +39 -0
  24. package/tests/repros/repro-manual-placement-detour.input.json +853 -0
  25. package/tests/repros/repro-manual-placement-detour.test.ts +39 -0
  26. package/tests/repros/repro-pmp11282-isolated-dcdc.test.ts +10 -3
  27. package/tests/repros/repro173-boost-drv8711-ground-label-overlap.test.ts +41 -0
  28. package/tests/repros/rtc-imu-microsd-section.test.ts +28 -0
  29. package/tests/solvers/UnroutedTraceRecoverySolver/local-elbow-obstacles.test.ts +1 -1
@@ -0,0 +1,353 @@
1
+ {
2
+ "chips": [
3
+ {
4
+ "chipId": "schematic_component_0",
5
+ "center": {
6
+ "x": 3.5699999999999994,
7
+ "y": 0.52
8
+ },
9
+ "width": 1.1650000000000005,
10
+ "height": 0.7600000000000001,
11
+ "symbolName": "capacitor_down",
12
+ "pins": [
13
+ {
14
+ "pinId": "schematic_port_0",
15
+ "displayName": "1",
16
+ "x": 3.4374999999999996,
17
+ "y": 0.9000000000000001,
18
+ "_facingDirection": "y+"
19
+ },
20
+ {
21
+ "pinId": "schematic_port_1",
22
+ "displayName": "2",
23
+ "x": 3.4374999999999996,
24
+ "y": 0.13999999999999996,
25
+ "_facingDirection": "y-"
26
+ }
27
+ ]
28
+ },
29
+ {
30
+ "chipId": "schematic_component_1",
31
+ "center": {
32
+ "x": -2.349166666666667,
33
+ "y": 2.4799999999999995
34
+ },
35
+ "width": 0.9250000000000003,
36
+ "height": 0.7600000000000007,
37
+ "symbolName": "capacitor_down",
38
+ "pins": [
39
+ {
40
+ "pinId": "schematic_port_2",
41
+ "displayName": "1",
42
+ "x": -2.361666666666667,
43
+ "y": 2.86,
44
+ "_facingDirection": "y+"
45
+ },
46
+ {
47
+ "pinId": "schematic_port_3",
48
+ "displayName": "2",
49
+ "x": -2.361666666666667,
50
+ "y": 2.099999999999999,
51
+ "_facingDirection": "y-"
52
+ }
53
+ ]
54
+ },
55
+ {
56
+ "chipId": "schematic_component_2",
57
+ "center": {
58
+ "x": 3.6149999999999993,
59
+ "y": -1.3650000000000004
60
+ },
61
+ "width": 1.2100000000000004,
62
+ "height": 0.6000000000000001,
63
+ "symbolName": "boxresistor_down",
64
+ "pins": [
65
+ {
66
+ "pinId": "schematic_port_4",
67
+ "displayName": "anode",
68
+ "x": 3.4599999999999995,
69
+ "y": -1.0650000000000004,
70
+ "_facingDirection": "y+"
71
+ },
72
+ {
73
+ "pinId": "schematic_port_5",
74
+ "displayName": "cathode",
75
+ "x": 3.4599999999999995,
76
+ "y": -1.6650000000000005,
77
+ "_facingDirection": "y-"
78
+ }
79
+ ]
80
+ },
81
+ {
82
+ "chipId": "schematic_component_3",
83
+ "center": {
84
+ "x": 1.2049999999999992,
85
+ "y": -2.405
86
+ },
87
+ "width": 1.2099999999999997,
88
+ "height": 0.5999999999999996,
89
+ "symbolName": "boxresistor_down",
90
+ "pins": [
91
+ {
92
+ "pinId": "schematic_port_6",
93
+ "displayName": "anode",
94
+ "x": 1.0499999999999994,
95
+ "y": -2.105,
96
+ "_facingDirection": "y+"
97
+ },
98
+ {
99
+ "pinId": "schematic_port_7",
100
+ "displayName": "cathode",
101
+ "x": 1.0499999999999994,
102
+ "y": -2.7049999999999996,
103
+ "_facingDirection": "y-"
104
+ }
105
+ ]
106
+ },
107
+ {
108
+ "chipId": "schematic_component_4",
109
+ "center": {
110
+ "x": 1.097023809523809,
111
+ "y": -4.29
112
+ },
113
+ "width": 0.925,
114
+ "height": 0.7600000000000002,
115
+ "symbolName": "capacitor_down",
116
+ "pins": [
117
+ {
118
+ "pinId": "schematic_port_8",
119
+ "displayName": "1",
120
+ "x": 1.0845238095238088,
121
+ "y": -3.91,
122
+ "_facingDirection": "y+"
123
+ },
124
+ {
125
+ "pinId": "schematic_port_9",
126
+ "displayName": "2",
127
+ "x": 1.0845238095238088,
128
+ "y": -4.67,
129
+ "_facingDirection": "y-"
130
+ }
131
+ ]
132
+ },
133
+ {
134
+ "chipId": "schematic_component_5",
135
+ "center": {
136
+ "x": 0.5558333333333332,
137
+ "y": 2.9799999999999995
138
+ },
139
+ "width": 2.5,
140
+ "height": 0.40000000000000036,
141
+ "pins": [
142
+ {
143
+ "pinId": "schematic_port_10",
144
+ "displayName": "VDD",
145
+ "x": -0.6941666666666668,
146
+ "y": 3.0799999999999996
147
+ },
148
+ {
149
+ "pinId": "schematic_port_11",
150
+ "displayName": "OUT",
151
+ "x": 1.8058333333333332,
152
+ "y": 2.9799999999999995
153
+ },
154
+ {
155
+ "pinId": "schematic_port_12",
156
+ "displayName": "GND",
157
+ "x": -0.6941666666666668,
158
+ "y": 2.8799999999999994
159
+ }
160
+ ]
161
+ },
162
+ {
163
+ "chipId": "schematic_component_6",
164
+ "center": {
165
+ "x": 3.1708333333333334,
166
+ "y": 2.4799999999999995
167
+ },
168
+ "width": 1.1650000000000005,
169
+ "height": 0.7600000000000007,
170
+ "symbolName": "capacitor_down",
171
+ "pins": [
172
+ {
173
+ "pinId": "schematic_port_13",
174
+ "displayName": "1",
175
+ "x": 3.038333333333333,
176
+ "y": 2.86,
177
+ "_facingDirection": "y+"
178
+ },
179
+ {
180
+ "pinId": "schematic_port_14",
181
+ "displayName": "2",
182
+ "x": 3.038333333333333,
183
+ "y": 2.099999999999999,
184
+ "_facingDirection": "y-"
185
+ }
186
+ ]
187
+ },
188
+ {
189
+ "chipId": "schematic_component_7",
190
+ "center": {
191
+ "x": 0,
192
+ "y": 0
193
+ },
194
+ "width": 3.3,
195
+ "height": 1,
196
+ "pins": [
197
+ {
198
+ "pinId": "schematic_port_15",
199
+ "displayName": "OUTA",
200
+ "x": 1.65,
201
+ "y": 0.09999999999999998
202
+ },
203
+ {
204
+ "pinId": "schematic_port_16",
205
+ "displayName": "INA_NEG",
206
+ "x": -1.65,
207
+ "y": 0.10000000000000003
208
+ },
209
+ {
210
+ "pinId": "schematic_port_17",
211
+ "displayName": "INA_POS",
212
+ "x": -1.65,
213
+ "y": 0.30000000000000004
214
+ },
215
+ {
216
+ "pinId": "schematic_port_18",
217
+ "displayName": "VSS_NEG",
218
+ "x": 1.65,
219
+ "y": -0.30000000000000004
220
+ },
221
+ {
222
+ "pinId": "schematic_port_19",
223
+ "displayName": "INB_POS",
224
+ "x": -1.65,
225
+ "y": -0.09999999999999998
226
+ },
227
+ {
228
+ "pinId": "schematic_port_20",
229
+ "displayName": "INB_NEG",
230
+ "x": -1.65,
231
+ "y": -0.30000000000000004
232
+ },
233
+ {
234
+ "pinId": "schematic_port_21",
235
+ "displayName": "OUTB",
236
+ "x": 1.65,
237
+ "y": -0.10000000000000003
238
+ },
239
+ {
240
+ "pinId": "schematic_port_22",
241
+ "displayName": "VCC",
242
+ "x": 1.65,
243
+ "y": 0.30000000000000004
244
+ }
245
+ ]
246
+ }
247
+ ],
248
+ "directConnections": [
249
+ {
250
+ "netId": "MK1.OUT to C5.pin1",
251
+ "pinIds": [
252
+ "schematic_port_11",
253
+ "schematic_port_13"
254
+ ]
255
+ }
256
+ ],
257
+ "netConnections": [
258
+ {
259
+ "netId": "VCC",
260
+ "netLabelText": "VCC",
261
+ "isGround": false,
262
+ "netLabelWidth": 0.42,
263
+ "netLabelHeight": 0.48,
264
+ "pinIds": [
265
+ "schematic_port_0",
266
+ "schematic_port_2",
267
+ "schematic_port_4",
268
+ "schematic_port_10",
269
+ "schematic_port_22"
270
+ ]
271
+ },
272
+ {
273
+ "netId": "GND",
274
+ "netLabelText": "GND",
275
+ "isGround": true,
276
+ "netLabelWidth": 0.42,
277
+ "netLabelHeight": 0.48,
278
+ "pinIds": [
279
+ "schematic_port_1",
280
+ "schematic_port_3",
281
+ "schematic_port_7",
282
+ "schematic_port_9",
283
+ "schematic_port_12",
284
+ "schematic_port_18"
285
+ ]
286
+ },
287
+ {
288
+ "netId": "VREF",
289
+ "netLabelText": "VREF",
290
+ "isGround": false,
291
+ "netLabelWidth": 0.42,
292
+ "netLabelHeight": 0.6,
293
+ "pinIds": [
294
+ "schematic_port_5",
295
+ "schematic_port_6",
296
+ "schematic_port_8"
297
+ ]
298
+ },
299
+ {
300
+ "netId": "MIC_AC",
301
+ "netLabelText": "MIC_AC",
302
+ "isGround": false,
303
+ "netLabelWidth": 0.84,
304
+ "anchoredNetLabelWidth": 0.84,
305
+ "allowInlineNetLabel": true,
306
+ "inlineNetLabelHeight": 0.12,
307
+ "inlineNetLabelWidth": 0.56,
308
+ "pinIds": [
309
+ "schematic_port_14",
310
+ "schematic_port_17"
311
+ ]
312
+ }
313
+ ],
314
+ "textBoxes": [
315
+ {
316
+ "chipId": "schematic_component_5",
317
+ "center": {
318
+ "x": -0.1141666666666668,
319
+ "y": 3.295
320
+ },
321
+ "width": 0.48,
322
+ "height": 0.24999999999999956,
323
+ "text": "MK1"
324
+ },
325
+ {
326
+ "chipId": "schematic_component_7",
327
+ "center": {
328
+ "x": -1.13,
329
+ "y": 0.615
330
+ },
331
+ "width": 0.3600000000000001,
332
+ "height": 0.25,
333
+ "text": "U1"
334
+ }
335
+ ],
336
+ "availableNetLabelOrientations": {
337
+ "VCC": [
338
+ "y+"
339
+ ],
340
+ "GND": [
341
+ "y-"
342
+ ],
343
+ "VREF": [
344
+ "y+"
345
+ ],
346
+ "MIC_AC": [
347
+ "x-",
348
+ "x+"
349
+ ]
350
+ },
351
+ "maxMspPairDistance": 2.4,
352
+ "_hideRatsNet": false
353
+ }