@tobisk/pcbs 1.0.0

package/dist/src/tests/migration.test.js

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+"use strict";
+Object.defineProperty(exports, "__esModule", { value: true });
+const vitest_1 = require("vitest");
+const Max3485_1 = require("../../src/lib/Max3485");
+const BuckConverter_1 = require("../../src/lib/BuckConverter");
+const Registry_1 = require("../synth/Registry");
+(0, vitest_1.describe)("Component Migration Verification", () => {
+    (0, vitest_1.it)("should correctly instantiate Max3485", () => {
+        Registry_1.registry.start();
+        const transceiver = new Max3485_1.Max3485({ ref: "U1" });
+        (0, vitest_1.expect)(transceiver.ref).toBe("U1");
+        (0, vitest_1.expect)(transceiver.symbol).toBe("Interface_UART:MAX3485");
+        (0, vitest_1.expect)(transceiver.footprint).toBe("Package_SO:SOIC-8_3.9x4.9mm_P1.27mm");
+        (0, vitest_1.expect)(transceiver.partNo).toBe("C18148");
+        // Check pins
+        (0, vitest_1.expect)(transceiver.pins.RO.name).toBe("1");
+        (0, vitest_1.expect)(transceiver.pins.VCC.name).toBe("8");
+        (0, vitest_1.expect)(transceiver.pins.GND.name).toBe("5");
+    });
+    (0, vitest_1.it)("should correctly instantiate BuckConverter with 5V target", () => {
+        Registry_1.registry.start();
+        const buck = new BuckConverter_1.BuckConverter({ ref: "U2", targetVoltage: 5.0 });
+        (0, vitest_1.expect)(buck.ref).toBe("U2");
+        // Internal components check
+        const vinPin = buck.pins.VIN;
+        const vinNet = vinPin.net;
+        (0, vitest_1.expect)(vinNet).toBeDefined();
+        (0, vitest_1.expect)(vinNet?.name).toBe("U2_VIN");
+        // Check feedback resistors for 5V
+        // R1 = 3000, R2 = 1000
+        const components = Array.from(Registry_1.registry.getComponents());
+        const r1 = components.find(c => c.ref === "R_FB1_U2");
+        const r2 = components.find(c => c.ref === "R_FB2_U2");
+        (0, vitest_1.expect)(r1?.value).toBe("3k");
+        (0, vitest_1.expect)(r1?.partNo).toBe("C22965");
+        (0, vitest_1.expect)(r2?.value).toBe("1k");
+        (0, vitest_1.expect)(r2?.partNo).toBe("C21190");
+    });
+    (0, vitest_1.it)("should correctly instantiate BuckConverter with 12V target", () => {
+        Registry_1.registry.start();
+        new BuckConverter_1.BuckConverter({ ref: "U3", targetVoltage: 12.0 });
+        const components = Array.from(Registry_1.registry.getComponents());
+        const r1 = components.find(c => c.ref === "R_FB1_U3");
+        const r2 = components.find(c => c.ref === "R_FB2_U3");
+        (0, vitest_1.expect)(r1?.value).toBe("13k");
+        (0, vitest_1.expect)(r1?.partNo).toBe("C24857");
+        (0, vitest_1.expect)(r2?.value).toBe("1.50k");
+        (0, vitest_1.expect)(r2?.partNo).toBe("C22843");
+    });
+    (0, vitest_1.it)("should work with test points in BuckConverter", () => {
+        Registry_1.registry.start();
+        new BuckConverter_1.BuckConverter({ ref: "U4", addTestPoints: true });
+        const components = Array.from(Registry_1.registry.getComponents());
+        (0, vitest_1.expect)(components.some(c => c.ref === "TP_VOUT_U4")).toBe(true);
+        (0, vitest_1.expect)(components.some(c => c.ref === "TP_FB_U4")).toBe(true);
+    });
+});
+//# sourceMappingURL=migration.test.js.map

package/dist/src/tests/migration.test.js.map

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package/dist/src/tests/net_merging.test.d.ts

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+export {};

package/dist/src/tests/net_merging.test.js

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+"use strict";
+Object.defineProperty(exports, "__esModule", { value: true });
+const vitest_1 = require("vitest");
+const synth_1 = require("../synth");
+const Registry_1 = require("../synth/Registry");
+(0, vitest_1.describe)("Net Merging", () => {
+    (0, vitest_1.beforeEach)(() => {
+        Registry_1.registry.start();
+    });
+    (0, vitest_1.it)("should merge two nets when a pin is tied to another net", () => {
+        const netA = new synth_1.Net({ name: "NetA" });
+        const netB = new synth_1.Net({ name: "NetB" });
+        const r1 = new synth_1.Component({
+            symbol: "Device:R",
+            ref: "R1",
+            footprint: "Resistor_SMD:R_0603_1608Metric",
+        });
+        // Pin 1 starts in NetA
+        netA.tie(r1.pins[1]);
+        (0, vitest_1.expect)(r1.pins[1].net).toBe(netA);
+        (0, vitest_1.expect)(netA.pins).toContain(r1.pins[1]);
+        // Now tie Pin 1 to NetB - this should merge NetA into NetB
+        netB.tie(r1.pins[1]);
+        (0, vitest_1.expect)(r1.pins[1].net).toBe(netB);
+        (0, vitest_1.expect)(netB.pins).toContain(r1.pins[1]);
+        (0, vitest_1.expect)(Registry_1.registry.getNets()).toContain(netB);
+        (0, vitest_1.expect)(Registry_1.registry.getNets()).not.toContain(netA);
+    });
+    (0, vitest_1.it)("should merge all pins from the old net into the new net", () => {
+        const netA = new synth_1.Net({ name: "NetA" });
+        const netB = new synth_1.Net({ name: "NetB" });
+        const r1 = new synth_1.Component({ symbol: "Device:R", ref: "R1", footprint: "Resistor_SMD:R_0603_1608Metric" });
+        const r2 = new synth_1.Component({ symbol: "Device:R", ref: "R2", footprint: "Resistor_SMD:R_0603_1608Metric" });
+        netA.tie(r1.pins[1]);
+        netA.tie(r1.pins[2]);
+        netB.tie(r2.pins[1]);
+        // Merge NetA into NetB
+        netB.tie(r1.pins[1]);
+        (0, vitest_1.expect)(r1.pins[1].net).toBe(netB);
+        (0, vitest_1.expect)(r1.pins[2].net).toBe(netB);
+        (0, vitest_1.expect)(r2.pins[1].net).toBe(netB);
+        (0, vitest_1.expect)(netB.pins.length).toBe(3);
+        (0, vitest_1.expect)(Registry_1.registry.getNets().length).toBe(1);
+    });
+    (0, vitest_1.it)("should handle implicit merging via pin assignment", () => {
+        const netA = new synth_1.Net({ name: "NetA" });
+        const netB = new synth_1.Net({ name: "NetB" });
+        const r1 = new synth_1.Component({ symbol: "Device:R", ref: "R1", footprint: "Resistor_SMD:R_0603_1608Metric" });
+        const r2 = new synth_1.Component({ symbol: "Device:R", ref: "R2", footprint: "Resistor_SMD:R_0603_1608Metric" });
+        r1.pins[1] = netA;
+        r2.pins[1] = netB;
+        // This assignment should trigger a merge because both pins have nets
+        r1.pins[1] = r2.pins[1];
+        // Note: createPinProxy logic for pin=pin assignment:
+        // if (otherPin.net) { otherPin.net.tie(pin); }
+        // So netB.tie(r1.pins[1]) happens, which merges netA into netB (since netB is "newer" in the assignment target sense? no, netB is otherPin.net)
+        (0, vitest_1.expect)(r1.pins[1].net).toBe(netB);
+        (0, vitest_1.expect)(r2.pins[1].net).toBe(netB);
+        (0, vitest_1.expect)(Registry_1.registry.getNets()).toContain(netB);
+        (0, vitest_1.expect)(Registry_1.registry.getNets()).not.toContain(netA);
+    });
+    (0, vitest_1.it)("should respect DNC rules during merge", () => {
+        const netA = new synth_1.Net({ name: "NetA" });
+        const r1 = new synth_1.Component({ symbol: "Device:R", ref: "R1", footprint: "Resistor_SMD:R_0603_1608Metric" });
+        netA.tie(r1.pins[1]);
+        netA.tie(r1.pins[2]); // NetA has 2 functional pins
+        const netDnc = new synth_1.Net({ name: "DNC_NET" });
+        const dnc = new synth_1.Component({ symbol: "Device:DNC", ref: "D1", footprint: "DNC" });
+        netDnc.tie(dnc.pins[1]);
+        // Merging a DNC net with a net that have >1 functional pins should fail
+        (0, vitest_1.expect)(() => netDnc.tie(r1.pins[1])).toThrow(/Cannot merge nets/);
+    });
+    (0, vitest_1.it)("should merge correctly in a Composable-like structure (repro user report)", () => {
+        // Mimic DmxNode setup
+        const vccVin = new synth_1.Net({ name: "+VIN" });
+        // Mimic BuckConverter internal setup
+        const buckRef = "U4";
+        const internalVinNet = new synth_1.Net({ name: `${buckRef}_VIN` });
+        const uBuck = new synth_1.Component({ symbol: "Device:L_Small", ref: buckRef, footprint: "Inductor_SMD:L_0603_1608Metric" });
+        const cIn = new synth_1.Component({ symbol: "Device:C_Small", ref: `C_IN_${buckRef}`, footprint: "Capacitor_SMD:C_0603_1608Metric" });
+        internalVinNet.tie(uBuck.pins[1]);
+        internalVinNet.tie(cIn.pins[1]);
+        // Mimic barrel jack
+        const barrelJack = new synth_1.Component({ symbol: "Connector:Barrel_Jack", ref: "J1", footprint: "Connector_BarrelJack:BarrelJack_Horizontal" });
+        barrelJack.pins[1] = vccVin;
+        // The "buck.pins.VIN = vccVin" assignment
+        const buckVinPin = uBuck.pins[1];
+        vccVin.tie(buckVinPin);
+        // Assertions
+        (0, vitest_1.expect)(uBuck.pins[1].net).toBe(vccVin);
+        (0, vitest_1.expect)(cIn.pins[1].net).toBe(vccVin);
+        (0, vitest_1.expect)(barrelJack.pins[1].net).toBe(vccVin);
+        (0, vitest_1.expect)(Registry_1.registry.getNets().map(n => n.name)).toContain("+VIN");
+        (0, vitest_1.expect)(Registry_1.registry.getNets().map(n => n.name)).not.toContain("U4_VIN");
+    });
+});
+//# sourceMappingURL=net_merging.test.js.map

package/dist/src/tests/net_merging.test.js.map

@@ -0,0 +1 @@
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package/dist/src/tests/occ-minimal.test.d.ts

@@ -0,0 +1 @@
+export {};

package/dist/src/tests/occ-minimal.test.js

@@ -0,0 +1,14 @@
+"use strict";
+Object.defineProperty(exports, "__esModule", { value: true });
+const vitest_1 = require("vitest");
+const occ_1 = require("../synth/3d/occ");
+(0, vitest_1.describe)('OpenCascade Minimal', () => {
+    (0, vitest_1.it)('should initialize OpenCascade', async () => {
+        console.log('Test: Calling initOCC...');
+        const OC = await (0, occ_1.initOCC)();
+        console.log('Test: initOCC finished');
+        (0, vitest_1.expect)(OC).toBeDefined();
+        (0, vitest_1.expect)(OC.gp_Pnt).toBeDefined();
+    }, 30000);
+});
+//# sourceMappingURL=occ-minimal.test.js.map

package/dist/src/tests/occ-minimal.test.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"occ-minimal.test.js","sourceRoot":"","sources":["../../../src/tests/occ-minimal.test.ts"],"names":[],"mappings":";;AACA,mCAA8C;AAC9C,yCAA0C;AAE1C,IAAA,iBAAQ,EAAC,qBAAqB,EAAE,GAAG,EAAE;IACjC,IAAA,WAAE,EAAC,+BAA+B,EAAE,KAAK,IAAI,EAAE;QAC3C,OAAO,CAAC,GAAG,CAAC,0BAA0B,CAAC,CAAC;QACxC,MAAM,EAAE,GAAG,MAAM,IAAA,aAAO,GAAE,CAAC;QAC3B,OAAO,CAAC,GAAG,CAAC,wBAAwB,CAAC,CAAC;QACtC,IAAA,eAAM,EAAC,EAAE,CAAC,CAAC,WAAW,EAAE,CAAC;QACzB,IAAA,eAAM,EAAC,EAAE,CAAC,MAAM,CAAC,CAAC,WAAW,EAAE,CAAC;IACpC,CAAC,EAAE,KAAK,CAAC,CAAC;AACd,CAAC,CAAC,CAAC"}

package/dist/src/tests/placement.test.d.ts

@@ -0,0 +1 @@
+export {};

package/dist/src/tests/placement.test.js

@@ -0,0 +1,130 @@
+"use strict";
+Object.defineProperty(exports, "__esModule", { value: true });
+const vitest_1 = require("vitest");
+const synth_1 = require("../synth");
+(0, vitest_1.describe)("Component and Composable Placement", () => {
+    (0, vitest_1.it)("calculates absolute schematic position for a single component", () => {
+        const c1 = new synth_1.Component({
+            ref: "C1",
+            symbol: "Device:C",
+            footprint: "Capacitor_SMD:C_0603_1608Metric",
+            schematicPosition: { x: 10, y: 20, rotation: 90 },
+        });
+        const pos = c1.absoluteSchematicPosition;
+        (0, vitest_1.expect)(pos.x).toBe(10);
+        (0, vitest_1.expect)(pos.y).toBe(20);
+        (0, vitest_1.expect)(pos.rotation).toBe(90);
+    });
+    (0, vitest_1.it)("calculates absolute pcb position for a single component", () => {
+        const c1 = new synth_1.Component({
+            ref: "C1",
+            symbol: "Device:C",
+            footprint: "Capacitor_SMD:C_0603_1608Metric",
+            pcbPosition: { x: 50, y: 60, rotation: 180, side: "back" },
+        });
+        const pos = c1.absolutePcbPosition;
+        (0, vitest_1.expect)(pos.x).toBe(50);
+        (0, vitest_1.expect)(pos.y).toBe(60);
+        (0, vitest_1.expect)(pos.rotation).toBe(180);
+        (0, vitest_1.expect)(pos.side).toBe("back");
+    });
+    (0, vitest_1.it)("offsets component position within a Composable", () => {
+        class MyComposable extends synth_1.Composable {
+            constructor() {
+                super({
+                    ref: "MY",
+                    schematicPosition: { x: 100, y: 100 },
+                    pcbPosition: { x: 200, y: 200, side: "back" },
+                });
+            }
+            defineInterface() {
+                this.comp = new synth_1.Component({
+                    ref: "R1",
+                    symbol: "Device:R",
+                    footprint: "Resistor_SMD:R_0603_1608Metric",
+                    schematicPosition: { x: 10, y: 20, rotation: 45 },
+                    pcbPosition: { x: 5, y: 5 },
+                });
+                return {};
+            }
+        }
+        const my = new MyComposable();
+        // Trigger lazy initialization
+        my.pins;
+        const sPos = my.comp.absoluteSchematicPosition;
+        (0, vitest_1.expect)(sPos.x).toBe(110);
+        (0, vitest_1.expect)(sPos.y).toBe(120);
+        (0, vitest_1.expect)(sPos.rotation).toBe(45);
+        const pPos = my.comp.absolutePcbPosition;
+        (0, vitest_1.expect)(pPos.x).toBe(205);
+        (0, vitest_1.expect)(pPos.y).toBe(205);
+        (0, vitest_1.expect)(pPos.side).toBe("back"); // Inherited from parent
+    });
+    (0, vitest_1.it)("handles nested Composables with recursive offsetting", () => {
+        class Inner extends synth_1.Composable {
+            constructor() {
+                super({
+                    ref: "INNER",
+                    schematicPosition: { x: 10, y: 10 },
+                    pcbPosition: { x: 5, y: 5 },
+                });
+            }
+            defineInterface() {
+                this.comp = new synth_1.Component({
+                    ref: "C1",
+                    symbol: "Device:C",
+                    footprint: "Capacitor_SMD:C_0603_1608Metric",
+                    schematicPosition: { x: 1, y: 1 },
+                    pcbPosition: { x: 2, y: 2 },
+                });
+                return {};
+            }
+        }
+        class Outer extends synth_1.Composable {
+            constructor() {
+                super({
+                    ref: "OUTER",
+                    schematicPosition: { x: 100, y: 100 },
+                    pcbPosition: { x: 200, y: 200, side: "back" },
+                });
+            }
+            defineInterface() {
+                this.inner = new Inner();
+                // Trigger inner initialization
+                this.inner.pins;
+                return {};
+            }
+        }
+        const outer = new Outer();
+        outer.pins;
+        const sPos = outer.inner.comp.absoluteSchematicPosition;
+        (0, vitest_1.expect)(sPos.x).toBe(111); // 100 (outer) + 10 (inner) + 1 (comp)
+        (0, vitest_1.expect)(sPos.y).toBe(111);
+        const pPos = outer.inner.comp.absolutePcbPosition;
+        (0, vitest_1.expect)(pPos.x).toBe(207); // 200 + 5 + 2
+        (0, vitest_1.expect)(pPos.side).toBe("back"); // Inherited from outer
+    });
+    (0, vitest_1.it)("allows overriding inherited PCB side", () => {
+        class MyComposable extends synth_1.Composable {
+            constructor() {
+                super({
+                    ref: "MY",
+                    pcbPosition: { x: 0, y: 0, side: "back" },
+                });
+            }
+            defineInterface() {
+                this.comp = new synth_1.Component({
+                    ref: "R1",
+                    symbol: "Device:R",
+                    footprint: "Resistor_SMD:R_0603_1608Metric",
+                    pcbPosition: { x: 10, y: 10, side: "front" },
+                });
+                return {};
+            }
+        }
+        const my = new MyComposable();
+        my.pins;
+        (0, vitest_1.expect)(my.comp.absolutePcbPosition.side).toBe("front");
+    });
+});
+//# sourceMappingURL=placement.test.js.map

package/dist/src/tests/placement.test.js.map

@@ -0,0 +1 @@
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package/dist/src/tests/synthesis.test.d.ts

@@ -0,0 +1 @@
+export {};

package/dist/src/tests/synthesis.test.js

@@ -0,0 +1,88 @@
+"use strict";
+var __createBinding = (this && this.__createBinding) || (Object.create ? (function(o, m, k, k2) {
+    if (k2 === undefined) k2 = k;
+    var desc = Object.getOwnPropertyDescriptor(m, k);
+    if (!desc || ("get" in desc ? !m.__esModule : desc.writable || desc.configurable)) {
+      desc = { enumerable: true, get: function() { return m[k]; } };
+    }
+    Object.defineProperty(o, k2, desc);
+}) : (function(o, m, k, k2) {
+    if (k2 === undefined) k2 = k;
+    o[k2] = m[k];
+}));
+var __setModuleDefault = (this && this.__setModuleDefault) || (Object.create ? (function(o, v) {
+    Object.defineProperty(o, "default", { enumerable: true, value: v });
+}) : function(o, v) {
+    o["default"] = v;
+});
+var __importStar = (this && this.__importStar) || (function () {
+    var ownKeys = function(o) {
+        ownKeys = Object.getOwnPropertyNames || function (o) {
+            var ar = [];
+            for (var k in o) if (Object.prototype.hasOwnProperty.call(o, k)) ar[ar.length] = k;
+            return ar;
+        };
+        return ownKeys(o);
+    };
+    return function (mod) {
+        if (mod && mod.__esModule) return mod;
+        var result = {};
+        if (mod != null) for (var k = ownKeys(mod), i = 0; i < k.length; i++) if (k[i] !== "default") __createBinding(result, mod, k[i]);
+        __setModuleDefault(result, mod);
+        return result;
+    };
+})();
+Object.defineProperty(exports, "__esModule", { value: true });
+const vitest_1 = require("vitest");
+const fs = __importStar(require("fs"));
+const path = __importStar(require("path"));
+const synth_1 = require("../synth");
+const synthesis_1 = require("../cli/synthesis");
+const env_1 = require("../cli/env");
+(0, vitest_1.describe)("Synthesis Integration", () => {
+    const TEST_DIR = path.join(__dirname, "temp_synthesis_test");
+    (0, vitest_1.beforeAll)(() => {
+        (0, env_1.ensurePythonEnv)();
+        if (!fs.existsSync(TEST_DIR)) {
+            fs.mkdirSync(TEST_DIR, { recursive: true });
+        }
+    }, 60000);
+    (0, vitest_1.afterAll)(() => {
+        if (fs.existsSync(TEST_DIR)) {
+            fs.rmSync(TEST_DIR, { recursive: true, force: true });
+        }
+    });
+    (0, vitest_1.it)("successfully generates KiCad files from a schematic", () => {
+        class SimpleTestBoard extends synth_1.Schematic {
+            constructor() {
+                super({ name: "IntegrationTestBoard" });
+            }
+            generate() {
+                const vcc = new synth_1.Net({ name: "VCC", class: "Power" });
+                const gnd = new synth_1.Net({ name: "GND", class: "Power" });
+                const r1 = new synth_1.Component({
+                    symbol: "Device:R",
+                    ref: "R1",
+                    footprint: "Resistor_SMD:R_0603_1608Metric",
+                    value: "10k",
+                });
+                r1.pins[1] = vcc;
+                r1.pins[2] = gnd;
+            }
+        }
+        const board = new SimpleTestBoard();
+        const snapshot = board._generateWithCapture();
+        // Run synthesis
+        const result = (0, synthesis_1.runSynthesis)(snapshot, TEST_DIR);
+        if (!result.success) {
+            console.error("Synthesis output:", result.output);
+        }
+        (0, vitest_1.expect)(result.success).toBe(true);
+        // Verify KiCad files
+        // circuit-synth generates IntegrationTestBoard_circuit.kicad_sch or similar
+        const files = fs.readdirSync(TEST_DIR);
+        (0, vitest_1.expect)(files.some(f => f.endsWith(".kicad_sch"))).toBe(true);
+        (0, vitest_1.expect)(files.some(f => f.endsWith(".kicad_pro"))).toBe(true);
+    });
+});
+//# sourceMappingURL=synthesis.test.js.map

package/dist/src/tests/synthesis.test.js.map

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