@tobisk/pcbs 1.0.0

package/LICENSE.md

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+MIT License
+
+Copyright (c) 2026 Tobias Keller
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.

package/README.md

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+# @tobisk/pcbs
+
+A strict, type-safe TypeScript framework for designing PCBs, powered by [circuit-synth](https://github.com/circuit-synth/circuit-synth).
+
+This is a framework I have built around circuit-synth to better suit my workflow.
+
+The problem to solve here is that while circuit-synth is awesome, it only manages circuits and since it's python it's not type safe.
+
+I needed a way to also manage custom footprints and ideally generate them by uploading a picture or describing them to the AI.
+
+On top of circuit-synth, we have added:
+- Directly export zip files to upload to JLCPCB including the Pick'n'Place csv files
+- add a simple command to let an ai agent search for JLC parts (WIP)
+- Manage Footprints, Symbols
+- Manage 3d visualisations of the footprints
+- Type Safety
+
+## Features
+
+- **Type-Safe Design**: leveraging TypeScript to ensure correct connectivity and component logic.
+- **Circuit-Synth Integration**: Uses `circuit-synth` internally for the heavy lifting of netlisting and PCB generation.
+- **Programmatic Layout**: Define schematic and PCB positions in code.
+- **Modular Components**: Reusable `Composable` blocks (e.g., Buck Converters, LED Indicators).
+
+## Usage
+
+```bash
+npm install @tobisk/pcbs
+```
+
+### CLI
+
+```bash
+npx @tobisk/pcbs synth <schematic-name>
+npx @tobisk/pcbs export <schematic-name>
+npx @tobisk/pcbs lib <schematic-name>
+```
+
+Once you have `synth`-ethized your schematic, you can open the kicad schematic file and generate a PCB from it. Every time we synth, we update the schematic and the netlist.
+
+It could be that the internal IDs of the kicad symbols drift, so when loading a new netlist in the PCB editor and the positions change, undo the loading and select the "Match by Reference" and re-import the net.
+
+## Project Structure
+
+A typical project using `@tobisk/pcbs` is structured into three main directories:
+
+- `src/lib/`: Reusable, technology-independent building blocks (`Composable`).
+- `src/module/`: Physical components or sub-assemblies with specific footprints (`Module`).
+- `src/schematics/`: The top-level design that wires everything together (`Schematic`).
+
+```text
+my-pcb-project/
+├── src/
+│   ├── lib/            # Reusable Composable blocks
+│   │   └── LedIndicator.ts
+│   ├── module/         # Physical Modules (Symbols + Footprints)
+│   │   └── UsbPowerModule.ts
+│   └── schematics/      # Project Schematics
+│       └── MyProject.ts
+├── package.json
+└── tsconfig.json
+```
+
+## Examples
+
+### 1. Composable (Logic Block)
+`Composable` blocks are reusable circuits that define logic and connectivity without being tied to a single physical package.
+
+```typescript
+import { Composable, Net, Component, PinAssignable } from "@tobisk/pcbs";
+
+export class LedIndicator extends Composable<"SIGNAL" | "GND"> {
+  constructor(options: { ref: string; color?: string }) {
+    super({ ref: options.ref });
+    
+    const resistor = new Component({
+      symbol: "Device:R",
+      footprint: "Resistor_SMD:R_0603_1608Metric",
+      value: "330",
+    });
+  
+    const led = new Component({
+      symbol: "Device:LED",
+      footprint: "LED_SMD:LED_0603_1608Metric",
+      value: options.color ?? "Green",
+    });
+  
+    const internal = new Net();
+    internal.tie(resistor.pins[2]);
+    internal.tie(led.pins[1]);
+
+    this.resistor = resistor; // Store for defineInterface
+    this.led = led;
+  }
+
+  protected defineInterface(): Record<string, PinAssignable> {
+    return {
+      SIGNAL: this.resistor.pins[1],
+      GND: this.led.pins[2],
+    };
+  }
+}
+```
+
+### 2. Module (Physical Component)
+`Module` represents a physical component with a specific KiCad symbol and footprint. It can also define a parametric 3D model.
+
+```typescript
+import { KicadFootprint, KicadSymbol, Module, Kicad3DModel } from "@tobisk/pcbs";
+
+export class UsbPowerModule extends Module<"VBUS" | "GND"> {
+  constructor(options: { ref?: string }) {
+    super({
+      symbol: "Project_Symbols:USB_Power_Module",
+      footprint: "Project_Footprints:USB_Power_Module",
+      ref: options.ref ?? "J_PWR",
+      pins: (pin) => ({
+        GND: pin(1),
+        VBUS: pin(2),
+      }),
+    });
+  }
+
+  public static makeFootprint(): KicadFootprint {
+     const fp = new KicadFootprint({ name: "USB_Power_Module" });
+     // ... define pads and graphics ...
+     return fp;
+  }
+
+  public static makeSymbol(): KicadSymbol {
+     const sym = new KicadSymbol({ name: "USB_Power_Module", reference: "J" });
+     // ... define pins and shapes ...
+     return sym;
+  }
+
+  public static async make3DModel(): Promise<Kicad3DModel> {
+    const model = new Kicad3DModel({ unit: "mm" });
+    await model.init();
+
+    // Box for the connector body
+    model.box({ x: 10, y: 15, z: 5, center: true })
+      .color("#c0c0c0") // Silver
+      .name("body");
+
+    // Cylindrical pins
+    model.cylinder({ r: 0.5, h: 4 })
+      .translate({ x: -3, y: 0, z: -2 })
+      .color("#ffd700") // Gold
+      .name("pin1");
+
+    return model;
+  }
+}
+```
+
+### 3. Schematic (Top-level Project)
+`Schematic` is where you instantiate modules and composables and wire them together.
+
+```typescript
+import { Schematic, Net } from "@tobisk/pcbs";
+import { LedIndicator } from "../lib/LedIndicator";
+import { UsbPowerModule } from "../module/UsbPowerModule";
+
+export class MyProject extends Schematic {
+  constructor() {
+    super({ name: "My_Cool_PCB" });
+  }
+
+  generate() {
+    const gnd = new Net({ name: "GND" });
+    const vcc = new Net({ name: "+5V" });
+
+    const pwr = new UsbPowerModule();
+    const statusLed = new LedIndicator({ ref: "STATUS" });
+
+    // Wiring
+    pwr.pins.VBUS = vcc;
+    pwr.pins.GND = gnd;
+
+    statusLed.pins.SIGNAL = vcc;
+    statusLed.pins.GND = gnd;
+  }
+}
+
+export default new MyProject();
+```

package/dist/src/cli/cli.d.ts

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+#!/usr/bin/env node
+/**
+ * PCB Framework CLI
+ */
+import "ts-node/register";
+import "tsconfig-paths/register";

package/dist/src/cli/cli.js

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+#!/usr/bin/env node
+"use strict";
+/**
+ * PCB Framework CLI
+ */
+Object.defineProperty(exports, "__esModule", { value: true });
+require("ts-node/register");
+require("tsconfig-paths/register");
+const env_1 = require("./env");
+const synth_1 = require("./commands/synth");
+const export_1 = require("./commands/export");
+const parts_1 = require("./commands/parts");
+const lib_1 = require("./commands/lib");
+const types_1 = require("./commands/types");
+const setup_1 = require("./commands/setup");
+// Parse args for --root early to configure environment
+for (let i = 0; i < process.argv.length; i++) {
+    if (process.argv[i] === "--root" && process.argv[i + 1]) {
+        process.env.SCHEMATICS_ROOT = process.argv[i + 1];
+        break;
+    }
+}
+function printHelp() {
+    console.log(`
+PCB Framework CLI
+
+Usage:
+  npx @tobisk/pcbs <command> [options]
+
+Commands:
+  synth [entry]                  Synthesize a schematic to KiCad project
+  export [entry]                 Export gerber, BOM, and placement files
+  parts [--footprint <fp>] [--value <val>]
+                                 Search JLC Parts for components
+  lib [module ...]               Generate/update KiCad library from TS modules
+  types                          Sync KiCad library symbols and footprints to TS types
+  setup                          Configure project tsconfig.json for KiCad types
+
+Schematic Selection:
+  If no entry is provided for synth/export, an interactive list of
+  available schematics from src/schematics/ is shown.
+
+Examples:
+  npx @tobisk/pcbs synth my_board
+  npx @tobisk/pcbs synth ./src/schematics/my_board/index.ts
+  npx @tobisk/pcbs export my_board
+  npx @tobisk/pcbs parts --footprint 0603 --value 10k
+  npx @tobisk/pcbs parts
+`);
+}
+async function main() {
+    // Ensure dependencies are met before doing anything else
+    (0, env_1.ensurePythonEnv)();
+    const args = process.argv.slice(2);
+    const command = args[0];
+    const commandArgs = args.slice(1);
+    switch (command) {
+        case "synth":
+            return (0, synth_1.cmdSynth)(commandArgs);
+        case "export":
+            return (0, export_1.cmdExport)(commandArgs);
+        case "parts":
+            return (0, parts_1.cmdParts)(commandArgs);
+        case "lib":
+            return (0, lib_1.cmdLib)(commandArgs);
+        case "types":
+            return (0, types_1.cmdTypes)(commandArgs);
+        case "setup":
+            return (0, setup_1.cmdSetup)(commandArgs);
+        case "--help":
+        case "-h":
+        case "help":
+            printHelp();
+            break;
+        default:
+            if (command) {
+                console.error(`Unknown command: ${command}\n`);
+            }
+            printHelp();
+            process.exit(command ? 1 : 0);
+    }
+}
+main().catch((err) => {
+    console.error(err);
+    process.exit(1);
+});
+//# sourceMappingURL=cli.js.map

package/dist/src/cli/cli.js.map

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package/dist/src/cli/codegen.d.ts

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+import { Net } from "../synth/Net";
+import { Component } from "../synth/Component";
+/** A snapshot of the circuit state needed for codegen. */
+export interface CircuitSnapshot {
+    name: string;
+    components: Component<any>[];
+    nets: Net[];
+    placementAlgorithm?: import("../synth/types").PlacementAlgorithm;
+}
+/**
+ * Generate circuit-synth Python source code from a CircuitSnapshot.
+ *
+ * The output follows the pattern used in existing projects:
+ * ```python
+ * from circuit_synth import Component, Net, circuit
+ *
+ * @circuit(name="BoardName")
+ * def board_name():
+ *     gnd = Net('GND', net_class="Power")
+ *     r1 = Component(symbol="Device:R", ref="R1", ...)
+ *     r1[1] += gnd
+ *     return locals()
+ * ```
+ */
+export declare function generatePython(snapshot: CircuitSnapshot): string;

package/dist/src/cli/codegen.js

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+"use strict";
+Object.defineProperty(exports, "__esModule", { value: true });
+exports.generatePython = generatePython;
+/**
+ * Collect all unique Nets referenced by the given components.
+ * Also includes any explicitly provided nets (e.g., floating nets).
+ */
+function collectNets(components, extraNets = []) {
+    const seen = new Set();
+    for (const net of extraNets) {
+        seen.add(net);
+    }
+    for (const comp of components) {
+        for (const [, pin] of comp.allPins) {
+            if (pin.net) {
+                seen.add(pin.net);
+            }
+        }
+    }
+    return Array.from(seen);
+}
+/** Convert a ref like "R1" to a valid Python variable name "r1". */
+function refToVar(ref) {
+    return ref.toLowerCase().replace(/[^a-z0-9_]/g, "_");
+}
+/** Convert a net name like "VCC_3V3" to a valid Python variable name. */
+function netToVar(name) {
+    // Strip leading non-alphanumeric chars (e.g. "+5V" → "5V")
+    // then replace remaining special chars with underscores
+    let cleaned = name
+        .replace(/^[^a-zA-Z0-9]+/, "")
+        .replace(/[^a-zA-Z0-9_]/g, "_")
+        .toLowerCase();
+    // Python identifiers can't start with a digit, but we prefix with 'net_' anyway
+    return cleaned ? `net_${cleaned}` : "net_unnamed";
+}
+/** Escape a Python string value. */
+function pyStr(s) {
+    return `"${s.replace(/\\/g, "\\\\").replace(/"/g, '\\"')}"`;
+}
+/**
+ * Generate circuit-synth Python source code from a CircuitSnapshot.
+ *
+ * The output follows the pattern used in existing projects:
+ * ```python
+ * from circuit_synth import Component, Net, circuit
+ *
+ * @circuit(name="BoardName")
+ * def board_name():
+ *     gnd = Net('GND', net_class="Power")
+ *     r1 = Component(symbol="Device:R", ref="R1", ...)
+ *     r1[1] += gnd
+ *     return locals()
+ * ```
+ */
+function generatePython(snapshot) {
+    const { name, components } = snapshot;
+    // Collect all nets (from component pins + explicit list)
+    const nets = collectNets(components, snapshot.nets);
+    const lines = [];
+    // ── Imports ──
+    lines.push(`from circuit_synth import Component, Net, circuit`);
+    lines.push(``);
+    // ── Function decorator + signature ──
+    const funcName = name.toLowerCase().replace(/[^a-z0-9_]/g, "_");
+    lines.push(`@circuit(name=${pyStr(name)})`);
+    lines.push(`def ${funcName}():`);
+    // ── Nets ──
+    if (nets.length > 0) {
+        lines.push(`    # Nets`);
+        for (const net of nets) {
+            const varName = netToVar(net.name);
+            const classArg = net.class !== "Signal" ? `, net_class=${pyStr(net.class)}` : "";
+            lines.push(`    ${varName} = Net(${pyStr(net.name)}${classArg})`);
+        }
+        lines.push(``);
+    }
+    // ── Components ──
+    if (components.length > 0) {
+        lines.push(`    # Components`);
+        for (const comp of components) {
+            if (comp.symbol === "Device:DNC")
+                continue; // Skip marker components
+            const varName = refToVar(comp.ref);
+            const args = [];
+            args.push(`symbol=${pyStr(comp.symbol)}`);
+            args.push(`ref=${pyStr(comp.ref)}`);
+            args.push(`footprint=${pyStr(comp.footprint)}`);
+            if (comp.value) {
+                args.push(`value=${pyStr(comp.value)}`);
+            }
+            if (comp.description) {
+                args.push(`description=${pyStr(comp.description)}`);
+            }
+            if (comp.partNo) {
+                args.push(`LCSC_Number=${pyStr(comp.partNo)}`);
+            }
+            // ── Placement ──
+            const sPos = comp.absoluteSchematicPosition;
+            if (sPos.x !== 0 || sPos.y !== 0 || (sPos.rotation || 0) !== 0) {
+                args.push(`at=(${sPos.x}, ${sPos.y}, ${sPos.rotation || 0})`);
+            }
+            const pPos = comp.absolutePcbPosition;
+            if (pPos.x !== 0 || pPos.y !== 0 || (pPos.rotation || 0) !== 0 || pPos.side !== "front") {
+                args.push(`pcb_at=(${pPos.x}, ${pPos.y}, ${pPos.rotation || 0})`);
+                args.push(`pcb_side=${pyStr(pPos.side || "front")}`);
+            }
+            if (args.length <= 3) {
+                lines.push(`    ${varName} = Component(${args.join(", ")})`);
+            }
+            else {
+                lines.push(`    ${varName} = Component(`);
+                for (let i = 0; i < args.length; i++) {
+                    const comma = i < args.length - 1 ? "," : "";
+                    lines.push(`        ${args[i]}${comma}`);
+                }
+                lines.push(`    )`);
+            }
+        }
+        lines.push(``);
+    }
+    // ── Connections ──
+    const connectionLines = [];
+    for (const comp of components) {
+        if (comp.symbol === "Device:DNC")
+            continue; // Skip marker components
+        const compVar = refToVar(comp.ref);
+        for (const [pinKey, pin] of comp.allPins) {
+            const pinObj = pin;
+            if (!pinObj.net)
+                continue;
+            // Skip named aliases that point to the same pin as a numeric key.
+            const numericKey = parseInt(pinKey, 10);
+            if (isNaN(numericKey)) {
+                let hasNumericAlias = false;
+                for (const [otherKey, otherPin] of comp.allPins) {
+                    if (otherKey !== pinKey && otherPin === pin && !isNaN(parseInt(otherKey, 10))) {
+                        hasNumericAlias = true;
+                        break;
+                    }
+                }
+                if (hasNumericAlias)
+                    continue;
+            }
+            const netVar = netToVar(pinObj.net.name);
+            // Check if this net contains a DNC component
+            const isDncNet = pinObj.net.pins.some(p => p.component.symbol === "Device:DNC");
+            if (isDncNet) {
+                // Find the DNC component to use its ref for the NC net name if possible, 
+                // but circuit-synth pattern usually uses NC_<Ref>_<Pin>
+                const pinAccessor = !isNaN(numericKey) ? `[${numericKey}]` : `[${pyStr(pinKey)}]`;
+                connectionLines.push(`    ${compVar}${pinAccessor} += Net(${pyStr(`NC_${comp.ref}_${pinKey}`)})`);
+            }
+            else {
+                const pinAccessor = !isNaN(numericKey) ? `[${numericKey}]` : `[${pyStr(pinKey)}]`;
+                connectionLines.push(`    ${compVar}${pinAccessor} += ${netVar}`);
+            }
+        }
+    }
+    if (connectionLines.length > 0) {
+        lines.push(`    # Connections`);
+        lines.push(...connectionLines);
+        lines.push(``);
+    }
+    // ── Return ──
+    lines.push(`    return locals()`);
+    lines.push(``);
+    return lines.join("\n");
+}
+//# sourceMappingURL=codegen.js.map

package/dist/src/cli/codegen.js.map

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package/dist/src/cli/commands/export.d.ts

@@ -0,0 +1,13 @@
+/**
+ * export: Export manufacturing files (Gerber, Drill, BOM, CPL) for JLCPCB.
+ *
+ * Generates:
+ * - Gerber files (all copper, paste, silkscreen, mask layers + edge cuts)
+ * - Drill files (Excellon format)
+ * - Drill map files (Gerber X2 format)
+ * - BOM CSV (JLCPCB format with LCSC Part #)
+ * - CPL CSV (JLCPCB pick & place format)
+ *
+ * All files are zipped into a single archive.
+ */
+export declare function cmdExport(args: string[]): Promise<void>;