@tachikomagundam/abathur 0.2.7 → 0.2.8
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/dist/core/evolve/run-bench.js +7 -1
- package/dist/core/stats.js +7 -0
- package/dist/test/stats.test.js +17 -0
- package/docs/AGENTISM.md +58 -0
- package/docs/release/README.md +9 -0
- package/docs/release/TEMPLATE.md +10 -0
- package/docs/release/v0.2.7.md +7 -0
- package/docs/release/v0.2.8.md +8 -0
- package/graders/pcb-agent/bench-approver.py +77 -0
- package/graders/pcb-agent/grader.mjs +130 -0
- package/graders/pcb-agent/mutate.sh +165 -0
- package/graders/pcb-agent/r20-bench.sh +27 -0
- package/graders/pcb-agent/reset-sandbox.sh +7 -0
- package/graders/pcb-agent/run-scenario-r20.sh +77 -0
- package/graders/pcb-agent/run-scenario.sh +94 -0
- package/graders/pcb-agent/seed/esp32s3-r12-BRIEF.txt +51 -0
- package/graders/pcb-agent/seed/spec.json +129 -0
- package/graders/pcb-agent/seed/tools/board_author_pcb.py +237 -0
- package/graders/pcb-agent/seed/tools/board_author_sch.py +118 -0
- package/graders/pcb-agent/seed/tools/board_finalize.sh +23 -0
- package/graders/pcb-agent/seed/tools/board_gate.py +69 -0
- package/graders/pcb-agent/seed/tools/board_gate_pcb.py +23 -0
- package/graders/pcb-agent/seed/tools/board_route.py +324 -0
- package/graders/pcb-agent/seed/tools/board_zone_pour.py +312 -0
- package/graders/pcb-agent/seed/tools/claims_lint.py +417 -0
- package/graders/pcb-agent/seed-r20-arena.sh +54 -0
- package/graders/pcb-agent/seed-sandbox.sh +13 -0
- package/package.json +1 -1
- package/plugin/abathur.ts +2 -2
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#!/usr/bin/env python3
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"""r17 GND pour: strip greedy GND tracks, paint GND pads, raster-erode foreign
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items, emit dual-layer (F.Cu+B.Cu) zone with scanline-exact boundary rings plus
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stitching vias. Deterministic 0.2mm raster. Usage: board_zone_pour.py in out"""
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import json, os, re, sys
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from collections import defaultdict
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CELL = 0.2
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EDGE_INSET = 0.3
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OBS_CLEAR = 0.25
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HOLE_CLEAR = 0.30
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def sub_blocks(s, start):
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out = []; i = start; n = len(s)
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while i < n:
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while i < n and s[i] != "(":
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i += 1
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if i >= n:
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break
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depth = 0; j = i; instr = False; esc = False
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while j < n:
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ch = s[j]
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if esc: esc = False
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elif ch == "\\": esc = True
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elif ch == '"': instr = not instr
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elif not instr:
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if ch == "(": depth += 1
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elif ch == ")":
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depth -= 1
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if depth == 0: break
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j += 1
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out.append(s[i + 1:j]); i = j + 1
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p2 = i
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while p2 < n and s[p2] in " \t\n\r":
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p2 += 1
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if p2 < n and s[p2] == ")":
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break
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return out
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def parse_pads(txt):
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pads = []
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for b in sub_blocks(sub_blocks(txt, txt.index("(kicad_pcb"))[0], 0):
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if not b.startswith("footprint"):
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continue
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m0 = re.search(r'\(at ([-\d.]+) ([-\d.]+)\)', b[:b.find("(property") if "(property" in b else 200])
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ax, ay = float(m0.group(1)), float(m0.group(2))
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mr = re.search(r'\(rotate (\d+\.?\d*)\)', b[:b.find("(layer")])
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rot = __import__("math").radians(float(mr.group(1))) if mr else 0.0
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mref = re.search(r'\(property "Reference" "([^"]+)"', b)
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ref = mref.group(1) if mref else ""
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i = 0
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while True:
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i = b.find("(pad ", i)
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if i < 0: break
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d = 0; j = i; instr = False
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while j < len(b):
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c = b[j]
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if c == '"': instr = not instr
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elif not instr:
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if c == "(": d += 1
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elif c == ")":
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d -= 1
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if d == 0: break
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j += 1
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pb = b[i + 1:j]; i = j + 1
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pnum = re.match(r'pad "([^"]*)"', pb).group(1)
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sm = re.search(r'\(at ([-\d.]+) ([-\d.]+)(?: ([-\d.]+))?\)', pb)
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ox, oy = float(sm.group(1)), float(sm.group(2))
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ca, sa = __import__("math").cos(rot), __import__("math").sin(rot)
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wx, wy = ax + ox * ca - oy * sa, ay + ox * sa + oy * ca
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sz = re.search(r'\(size ([-\d.]+) ([-\d.]+)\)', pb)
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w, h = float(sz.group(1)), float(sz.group(2))
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shape = "circle" if "(shape circle)" in pb or '"circle"' in pb else "rect"
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drl = re.search(r'\(drill(?: oval)? ([\d.]+)(?: ([\d.]+))?\)', pb)
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pads.append(dict(ref=ref, num=pnum, x=wx, y=wy, w=w, h=h, shape=shape,
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drill=(float(drl.group(1)), float(drl.group(2) or drl.group(1))) if drl else None,
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bnet=(re.search(r'\(net \d+ "([^"]*)"\)', pb) or [None, None])[1]))
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return pads
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def rings_from_rects(rects, x0, y0):
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segs = set()
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for (xa, ya, xb, yb) in rects:
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ax, ay = x0 + (xa - 1) * CELL, y0 + (ya - 1) * CELL
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bx, by = x0 + (xb - 1) * CELL, y0 + (yb - 1) * CELL
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segs.add(((ax, ay), (bx, ay)))
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segs.add(((bx, ay), (bx, by)))
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segs.add(((bx, by), (ax, by)))
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segs.add(((ax, by), (ax, ay)))
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kill = set()
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for a, b in segs:
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if (b, a) in segs:
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kill.add((a, b)); kill.add((b, a))
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eout = defaultdict(list)
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for a, b in segs - kill:
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eout[a].append(b)
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rings = []
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for st in list(eout.keys()):
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while eout[st]:
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stack = [st]; trail = []
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cur = st
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while True:
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outs = eout[cur]
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if not outs:
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break
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nxt = outs.pop()
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stack.append(nxt)
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cur = nxt
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if cur == st:
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break
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if cur == st and len(stack) >= 5:
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rings.append(stack[:-1])
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elif cur != st:
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for q in reversed(stack[stack.index(st) + 1:]):
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eout.setdefault(stack[stack.index(q)][0], [])
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def area(r):
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return sum(r[k][0] * r[k + 1][1] - r[k + 1][0] * r[k][1] for k in range(len(r) - 1)) / 2.0
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out = []
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for r in rings:
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rr = []
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for q in r:
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if not rr or rr[-1] != q:
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rr.append(q)
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if len(rr) >= 5 and rr[0] == rr[-1]:
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rr = rr[:-1]
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if len(rr) >= 4 and abs(area(rr)) > 0.5:
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out.append(rr)
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return out
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def main(inp, outp):
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txt = open(inp).read()
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nm = dict((m.group(2).strip('"'), int(m.group(1))) for m in
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re.finditer(r'\(net (\d+) "([^"]+)"\)', txt))
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gnd_code = nm.get("GND")
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assert gnd_code is not None, "no GND net"
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POW = [x for x in (os.environ.get("PCB_POWER_ZONE_NETS", "5V_SERVO,5V_LOGIC,3V3,VBUS")).split(",") if x]
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pcode = {n: nm[n] for n in POW if n in nm}
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padby = defaultdict(list)
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prect = {}
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pwr_codes = set(pcode.values())
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root_children = sub_blocks(sub_blocks(txt, txt.index("(kicad_pcb"))[0], 0)
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xs, ys = [], []
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for b in root_children:
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if b.startswith("gr_line") and "Edge.Cuts" in b:
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for mm in re.finditer(r'\((?:start|end) ([-\d.]+) ([-\d.]+)\)', b):
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xs.append(float(mm.group(1))); ys.append(float(mm.group(2)))
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x0, x1, y0, y1 = min(xs), max(xs), min(ys), max(ys)
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spec = "/home/lab/workspace/pcb-local-repro/solar_ray_v2/circuit/netlist.json"
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pad_net = {}
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for c in json.load(open(spec))["components"]:
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for pin, net in c["pins"].items():
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pad_net[(c["ref"], pin)] = net
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pads = parse_pads(txt)
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for pd_ in pads:
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pd_["net"] = pd_["bnet"] or pad_net.get((pd_["ref"], pd_["num"]), "?")
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padby[pd_["net"]].append(pd_)
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for n_, ps in padby.items():
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if n_ in pcode:
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xs_ = [pd_["x"] - pd_["w"] / 2 for pd_ in ps] + [pd_["x"] + pd_["w"] / 2 for pd_ in ps]
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ys_ = [pd_["y"] - pd_["h"] / 2 for pd_ in ps] + [pd_["y"] + pd_["h"] / 2 for pd_ in ps]
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prect[n_] = (min(xs_) - 0.8, min(ys_) - 0.8, max(xs_) + 0.8, max(ys_) + 0.8)
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gnd_name = "GND"
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keep = []
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nstrip = 0
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fp_i = next(i for i, b in enumerate(root_children) if b.startswith("footprint"))
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for b in root_children[fp_i:]:
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if b.startswith("segment") or b.startswith("via"):
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mn = re.search(r'\(net (\d+)\)', b)
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if mn and int(mn.group(1)) in ({gnd_code} | pwr_codes):
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nstrip += 1
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continue
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keep.append("(" + b + ")")
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W = int((x1 - x0) / CELL) + 2
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H = int((y1 - y0) / CELL) + 2
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occ = bytearray(W * H)
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rawpad = bytearray(W * H)
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def cx(v): return int((v - x0) / CELL) + 1
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def cy(v): return int((v - y0) / CELL) + 1
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def mark_rect(xa, ya, xb, yb, r, arr):
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gx0, gx1 = sorted((cx(xa), cx(xb)))
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gy0, gy1 = sorted((cy(ya), cy(yb)))
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pad = int(r / CELL) + 1
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for gy in range(max(0, gy0 - pad), min(H, gy1 + pad + 1)):
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for gx in range(max(0, gx0 - pad), min(W, gx1 + pad + 1)):
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arr[gy * W + gx] = 1
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for blk in keep:
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if blk.startswith("(segment"):
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m1 = re.search(r'\(start ([-\d.]+) ([-\d.]+)\) \(end ([-\d.]+) ([-\d.]+)\)', blk)
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if m1:
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xa, ya, xb, yb = (float(m1.group(i)) for i in (1, 2, 3, 4))
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n_ = int(max(abs(xb - xa), abs(yb - ya)) / (CELL / 2)) + 1
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for k in range(n_ + 1):
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t = k / n_
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mark_rect(xa + (xb - xa) * t - CELL, ya + (yb - ya) * t - CELL,
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xa + (xb - xa) * t + CELL, ya + (yb - ya) * t + CELL, 0.15, occ)
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elif blk.startswith("(via"):
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m2 = re.search(r'\(via \(at ([-\d.]+) ([-\d.]+)\)', blk)
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if m2:
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mark_rect(float(m2.group(1)), float(m2.group(2)),
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float(m2.group(1)), float(m2.group(2)), 0.55, occ)
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for p_ in pads:
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mark_rect(p_["x"] - p_["w"] / 2, p_["y"] - p_["h"] / 2,
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p_["x"] + p_["w"] / 2, p_["y"] + p_["h"] / 2, 0.5, rawpad)
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if p_["net"] != gnd_name:
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if p_["drill"]:
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mark_rect(p_["x"] - p_["w"] / 2, p_["y"] - p_["h"] / 2,
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p_["x"] + p_["w"] / 2, p_["y"] + p_["h"] / 2, 0.5, occ)
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else:
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mark_rect(p_["x"] - p_["w"] / 2, p_["y"] - p_["h"] / 2,
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p_["x"] + p_["w"] / 2, p_["y"] + p_["h"] / 2, 0.5, occ)
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for blk in keep:
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if blk.startswith("(segment"):
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m1 = re.search(r'\(start ([-\d.]+) ([-\d.]+)\) \(end ([-\d.]+) ([-\d.]+)\)', blk)
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if m1:
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xa, ya, xb, yb = (float(m1.group(i)) for i in (1, 2, 3, 4))
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nseg = int(max(abs(xb - xa), abs(yb - ya)) / (CELL / 2)) + 1
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for k in range(nseg + 1):
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t = k / nseg
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px_, py_ = xa + (xb - xa) * t, ya + (yb - ya) * t
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mark_rect(px_ - CELL, py_ - CELL, px_ + CELL, py_ + CELL, 0.1, occ)
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bx0, by0, bx1, by1 = x0 + EDGE_INSET, y0 + EDGE_INSET, x1 - EDGE_INSET, y1 - EDGE_INSET
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outline_pts = f"(xy {bx0:.4f} {by0:.4f}) (xy {bx1:.4f} {by0:.4f}) (xy {bx1:.4f} {by1:.4f}) (xy {bx0:.4f} {by1:.4f}) (xy {bx0:.4f} {by0:.4f})"
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# fine-pitch connector keepout: no pour under USB-C-class parts (0.85mm rows)
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kx = [pd_ for pd_ in pads if pd_["ref"] in {"J1"}]
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KEEPOUT_RECT = None
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if kx:
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hx0 = min(p_["x"] - p_["w"] / 2 for p_ in kx) - 0.3
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hy0 = min(p_["y"] - p_["h"] / 2 for p_ in kx) - 0.3
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hx1 = max(p_["x"] + p_["w"] / 2 for p_ in kx) + 0.3
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+
hy1 = max(p_["y"] + p_["h"] / 2 for p_ in kx) + 0.3
|
|
237
|
+
KEEPOUT_RECT = (hx0, hy0, hx1, hy1)
|
|
238
|
+
_ = KEEPOUT_RECT
|
|
239
|
+
outline = outline_pts
|
|
240
|
+
z = []
|
|
241
|
+
for LI, LAY in enumerate(["F.Cu", "B.Cu"]):
|
|
242
|
+
z += [f'(zone (net {gnd_code}) (net_name "GND") (layer "{LAY}") (uuid "5a000000-0000-0000-0000-00000000cafe{LI}")',
|
|
243
|
+
' (hatch edge 0.508)',
|
|
244
|
+
' (connect_pads (clearance 0))',
|
|
245
|
+
' (min_thickness 0.2)',
|
|
246
|
+
' (filled_areas_thickness no)',
|
|
247
|
+
' (fill yes (thermal_gap 0.4) (thermal_bridge_width 0.5))',
|
|
248
|
+
f' (polygon (pts {outline}))',
|
|
249
|
+
')']
|
|
250
|
+
def rectpts(xa, ya, xb, yb):
|
|
251
|
+
return f"(xy {xa:.4f} {ya:.4f}) (xy {xb:.4f} {ya:.4f}) (xy {xb:.4f} {yb:.4f}) (xy {xa:.4f} {yb:.4f}) (xy {xa:.4f} {ya:.4f})"
|
|
252
|
+
for zi, (n_, rc) in enumerate(sorted(prect.items())):
|
|
253
|
+
for LI, LAY in enumerate(["F.Cu", "B.Cu"]):
|
|
254
|
+
holes = []
|
|
255
|
+
# explicit holes ONLY for GND pads (protects GND fill corridors at the
|
|
256
|
+
# zone rim); power-vs-power carve stays native so a neighboring
|
|
257
|
+
# foreign rect never punches away a power pad's own connect island.
|
|
258
|
+
for pd_ in pads:
|
|
259
|
+
if pd_["net"] != "GND":
|
|
260
|
+
continue
|
|
261
|
+
hx0, hy0 = pd_["x"] - pd_["w"] / 2 - 0.30, pd_["y"] - pd_["h"] / 2 - 0.30
|
|
262
|
+
hx1, hy1 = pd_["x"] + pd_["w"] / 2 + 0.30, pd_["y"] + pd_["h"] / 2 + 0.30
|
|
263
|
+
if hx1 < rc[0] or hx0 > rc[2] or hy1 < rc[1] or hy0 > rc[3]:
|
|
264
|
+
continue
|
|
265
|
+
holes.append(rectpts(hx0, hy0, hx1, hy1))
|
|
266
|
+
pts = f"(pts {rectpts(*rc)}" + ("".join(" " + h for h in holes)) + ")"
|
|
267
|
+
z += [f'(zone (net {pcode[n_]}) (net_name "{n_}") (layer "{LAY}") (priority 2) (uuid "5a000000-0000-0000-0000-00000000cbfe{zi}{LI}")',
|
|
268
|
+
' (hatch edge 0.508)',
|
|
269
|
+
' (connect_pads (clearance 0))',
|
|
270
|
+
' (min_thickness 0.2)',
|
|
271
|
+
' (fill yes (thermal_gap 0.4) (thermal_bridge_width 0.5))',
|
|
272
|
+
f' (polygon {pts})',
|
|
273
|
+
')']
|
|
274
|
+
if KEEPOUT_RECT:
|
|
275
|
+
for LI, LAY in enumerate(["F.Cu", "B.Cu"]):
|
|
276
|
+
k = KEEPOUT_RECT
|
|
277
|
+
z += [f'(zone (net -1) (net_name "") (layer "{LAY}") (uuid "5a000000-0000-0000-0000-00000000cdfe{LI}")',
|
|
278
|
+
' (hatch edge 0.508)',
|
|
279
|
+
' (priority 15)',
|
|
280
|
+
f' (polygon (pts (xy {k[0]:.4f} {k[1]:.4f}) (xy {k[2]:.4f} {k[1]:.4f}) (xy {k[2]:.4f} {k[3]:.4f}) (xy {k[0]:.4f} {k[3]:.4f}) (xy {k[0]:.4f} {k[1]:.4f})))',
|
|
281
|
+
')']
|
|
282
|
+
stitch = 0
|
|
283
|
+
step = max(1, int(4.0 / CELL))
|
|
284
|
+
for gy in range(1, H - 1, step):
|
|
285
|
+
for gx in range(1, W - 1, step):
|
|
286
|
+
rr = int(0.55 / CELL)
|
|
287
|
+
vxc, vyc = x0 + (gx - 1) * CELL, y0 + (gy - 1) * CELL
|
|
288
|
+
if not (x0 + 1.0 < vxc < x1 - 1.0 and y0 + 1.0 < vyc < y1 - 1.0):
|
|
289
|
+
continue # board-edge via guard: copper_edge_clearance class
|
|
290
|
+
if any(rc[0] + 0.3 < vxc < rc[2] - 0.3 and rc[1] + 0.3 < vyc < rc[3] - 0.3 for rc in prect.values()):
|
|
291
|
+
continue # GND via must not land inside a power zone
|
|
292
|
+
if KEEPOUT_RECT and KEEPOUT_RECT[0] - 0.2 < vxc < KEEPOUT_RECT[2] + 0.2 and KEEPOUT_RECT[1] - 0.2 < vyc < KEEPOUT_RECT[3] + 0.2:
|
|
293
|
+
continue # fine-pitch connector keepout
|
|
294
|
+
if any(occ[max(0, min(H - 1, gy + dy2)) * W + max(0, min(W - 1, gx + dx2))] or
|
|
295
|
+
rawpad[max(0, min(H - 1, gy + dy2)) * W + max(0, min(W - 1, gx + dx2))]
|
|
296
|
+
for dx2 in range(-rr, rr + 1) for dy2 in range(-rr, rr + 1)):
|
|
297
|
+
continue
|
|
298
|
+
stitch += 1
|
|
299
|
+
z.append(f'(via (at {x0 + (gx - 1) * CELL:.4f} {y0 + (gy - 1) * CELL:.4f}) (size 0.6) (drill 0.3)'
|
|
300
|
+
f' (layers "F.Cu" "B.Cu") (net {gnd_code}) (uuid "00000000-0000-0000-0000-{stitch:012d}cafe0"))')
|
|
301
|
+
print(f"stripped={nstrip} pads={len(pads)} stitch-vias={stitch} zones={2 + 2 * len(prect)} (GND x2 + power x{2 * len(prect)}, native refill)")
|
|
302
|
+
# GND net-class -> solid pad connection (kills starved_thermal at pour rims)
|
|
303
|
+
head = re.sub(r'(\(net_class "GND"[^\n]*?)(\s*\)\s*)$',
|
|
304
|
+
r'\1 (pad_connection "solid")\2',
|
|
305
|
+
txt[:txt.index("(footprint")].rstrip("\n"))
|
|
306
|
+
body = "\n".join(keep if keep else [])
|
|
307
|
+
tail = "\n".join(z)
|
|
308
|
+
open(outp, "w").write(head + "\n" + body + "\n" + tail + "\n)\n")
|
|
309
|
+
|
|
310
|
+
|
|
311
|
+
if __name__ == "__main__":
|
|
312
|
+
main(sys.argv[1], sys.argv[2])
|