@scrypted/libav 1.0.181 → 1.0.182

package/openh264/codec/common/arm64/arm_aarch64_common.h

@@ -1,85 +0,0 @@
-/*!
- *@page License
- *
- * \copy
- *     Copyright (c)  2024, ARM Ltd.
- *     All rights reserved.
- *
- *     Redistribution and use in source and binary forms, with or without
- *     modification, are permitted provided that the following conditions
- *     are met:
- *
- *        * Redistributions of source code must retain the above copyright
- *          notice, this list of conditions and the following disclaimer.
- *
- *        * Redistributions in binary form must reproduce the above copyright
- *          notice, this list of conditions and the following disclaimer in
- *          the documentation and/or other materials provided with the
- *          distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *     "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *     LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- *     FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- *     COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- *     BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- *     CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- *     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- *     ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- *     POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef CODEC_COMMON_ARM64_ARM_AARCH64_COMMON_H_
-#define CODEC_COMMON_ARM64_ARM_AARCH64_COMMON_H_
-
-/*
- ; Support macros for
- ;   - Armv8.3-A Pointer Authentication and
- ;   - Armv8.5-A Branch Target Identification
- ; Further documentation can be found at:
- ;  - https://developer.arm.com/documentation/101028/0012/5--Feature-test-macros
- ;
- ; Since openh264 aarch64 assembly code provides functions with no storage of the
- ; LR(x30) on the stack, PAC is not needed as modification of the LR value would
- ; require modification of x30 and not memory. Additionally, no indirect control
- ; flow changes are performed, so bti j instructions are not needed. Thus, just
- ; mark the entry points with bti c landing pads and the ELF files as supporting
- ; BTI and PAC.
- */
-#if defined(__ARM_FEATURE_BTI_DEFAULT) && __ARM_FEATURE_BTI_DEFAULT == 1
-  /* BTI is enabled */
-  #define BTI_C hint 34
-  #define GNU_PROPERTY_AARCH64_BTI 0x1 /* Property for notes section in ELF */
-#else
-  /* BTI is NOT enabled */
-  #define BTI_C
-  #define GNU_PROPERTY_AARCH64_BTI 0
-#endif
-
-#if defined(__ARM_FEATURE_PAC_DEFAULT)
-  /* PAC is enabled */
-  #define GNU_PROPERTY_AARCH64_POINTER_AUTH 0x2 /* Property for notes section in ELF */
-#else
-  /* PAC is not enabled */
-  #define GNU_PROPERTY_AARCH64_POINTER_AUTH 0
-#endif
-
-/* Add the notes section to ELF only */
-#if defined(__ELF__)
-  .pushsection .note.gnu.property, "a";
-  .balign 8;
-  .long 4;
-  .long 0x10;
-  .long 0x5;
-  .asciz "GNU";
-  .long 0xc0000000; /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */
-  .long 4;
-  .long(GNU_PROPERTY_AARCH64_POINTER_AUTH | GNU_PROPERTY_AARCH64_BTI);
-  .long 0;
-  .popsection;
-#endif
-
-#endif /* CODEC_COMMON_ARM64_ARM_AARCH64_COMMON_H_ */

package/openh264/codec/common/arm64/arm_arch64_common_macro.S

@@ -1,79 +0,0 @@
-/*!
- * \copy
- *     Copyright (c)  2013, Cisco Systems
- *     All rights reserved.
- *
- *     Redistribution and use in source and binary forms, with or without
- *     modification, are permitted provided that the following conditions
- *     are met:
- *
- *        * Redistributions of source code must retain the above copyright
- *          notice, this list of conditions and the following disclaimer.
- *
- *        * Redistributions in binary form must reproduce the above copyright
- *          notice, this list of conditions and the following disclaimer in
- *          the documentation and/or other materials provided with the
- *          distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *     "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *     LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- *     FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- *     COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- *     BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- *     CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- *     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- *     ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- *     POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#include "arm_aarch64_common.h"
-
-#ifdef __APPLE__
-
-.text
-
-.macro WELS_ASM_AARCH64_FUNC_BEGIN
-.align 2
-.globl _$0
-_$0:
-.endm
-
-.macro WELS_ASM_AARCH64_FUNC_END
-ret
-.endm
-#else
-
-#ifdef __ELF__
-.section .note.GNU-stack,"",%progbits // Mark stack as non-executable
-#endif
-.text
-
-.macro WELS_ASM_AARCH64_FUNC_BEGIN funcName
-.align 2
-.global \funcName
-#ifdef __ELF__
-.type \funcName, %function
-#endif
-#ifndef __clang__
-.func \funcName
-#endif
-\funcName:
-    BTI_C
-.endm
-
-.macro WELS_ASM_AARCH64_FUNC_END
-ret
-#ifndef __clang__
-.endfunc
-#endif
-.endm
-
-#endif
-
-.macro SIGN_EXTENSION arg0, arg1
-  sxtw \arg0, \arg1
-.endm

package/openh264/codec/common/arm64/copy_mb_aarch64_neon.S

@@ -1,202 +0,0 @@
-/*!
- * \copy
- *     Copyright (c)  2013, Cisco Systems
- *     All rights reserved.
- *
- *     Redistribution and use in source and binary forms, with or without
- *     modification, are permitted provided that the following conditions
- *     are met:
- *
- *        * Redistributions of source code must retain the above copyright
- *          notice, this list of conditions and the following disclaimer.
- *
- *        * Redistributions in binary form must reproduce the above copyright
- *          notice, this list of conditions and the following disclaimer in
- *          the documentation and/or other materials provided with the
- *          distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *     "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *     LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- *     FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- *     COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- *     BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- *     CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- *     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- *     ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- *     POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifdef HAVE_NEON_AARCH64
-#include "arm_arch64_common_macro.S"
-
-.macro LOAD_ALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
-//  {   //  input: $0~$3, src*, src_stride
-    ld1 {\arg0\().d}[0], [\arg4], \arg5
-    ld1 {\arg1\().d}[0], [\arg4], \arg5
-    ld1 {\arg2\().d}[0], [\arg4], \arg5
-    ld1 {\arg3\().d}[0], [\arg4], \arg5
-//  }
-.endm
-
-.macro STORE_ALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
-//  {   //  input: $0~$3, dst*, dst_stride
-    st1 {\arg0\().d}[0], [\arg4], \arg5
-    st1 {\arg1\().d}[0], [\arg4], \arg5
-    st1 {\arg2\().d}[0], [\arg4], \arg5
-    st1 {\arg3\().d}[0], [\arg4], \arg5
-//  }
-.endm
-
-.macro LOAD_UNALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
-//  {   //  input: $0~$3, src*, src_stride
-    ld1 {\arg0\().8b}, [\arg4], \arg5
-    ld1 {\arg1\().8b}, [\arg4], \arg5
-    ld1 {\arg2\().8b}, [\arg4], \arg5
-    ld1 {\arg3\().8b}, [\arg4], \arg5
-//  }
-.endm
-
-.macro STORE_UNALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
-//  {   //  input: $0~$3, dst*, dst_stride
-    st1 {\arg0\().8b}, [\arg4], \arg5
-    st1 {\arg1\().8b}, [\arg4], \arg5
-    st1 {\arg2\().8b}, [\arg4], \arg5
-    st1 {\arg3\().8b}, [\arg4], \arg5
-//  }
-.endm
-
-.macro LOAD16_ALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
-//  {   //  input: $0~$3, src*, src_stride
-    ld1 {\arg0\().2d}, [\arg4], \arg5
-    ld1 {\arg1\().2d}, [\arg4], \arg5
-    ld1 {\arg2\().2d}, [\arg4], \arg5
-    ld1 {\arg3\().2d}, [\arg4], \arg5
-//  }
-.endm
-
-.macro STORE16_ALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
-//  {   //  input: $0~$3, dst*, dst_stride
-    st1 {\arg0\().2d}, [\arg4], \arg5
-    st1 {\arg1\().2d}, [\arg4], \arg5
-    st1 {\arg2\().2d}, [\arg4], \arg5
-    st1 {\arg3\().2d}, [\arg4], \arg5
-//  }
-.endm
-
-.macro LOAD16_UNALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
-//  {   //  input: $0~$3, src*, src_stride
-    ld1 {\arg0\().16b}, [\arg4], \arg5
-    ld1 {\arg1\().16b}, [\arg4], \arg5
-    ld1 {\arg2\().16b}, [\arg4], \arg5
-    ld1 {\arg3\().16b}, [\arg4], \arg5
-//  }
-.endm
-
-.macro STORE16_UNALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
-//  {   //  input: $0~$3, dst*, dst_stride
-    st1 {\arg0\().16b}, [\arg4], \arg5
-    st1 {\arg1\().16b}, [\arg4], \arg5
-    st1 {\arg2\().16b}, [\arg4], \arg5
-    st1 {\arg3\().16b}, [\arg4], \arg5
-//  }
-.endm
-
-//void WelsCopy8x8_AArch64_neon (uint8_t* pDst, int32_t iStrideD, uint8_t* pSrc, int32_t iStrideS);
-WELS_ASM_AARCH64_FUNC_BEGIN WelsCopy8x8_AArch64_neon
-    SIGN_EXTENSION x1,w1
-    SIGN_EXTENSION x3,w3
-    LOAD_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x2, x3
-
-    STORE_UNALIGNED_DATA_WITH_STRIDE    v0, v1, v2, v3, x0, x1
-
-    LOAD_UNALIGNED_DATA_WITH_STRIDE v4, v5, v6, v7, x2, x3
-
-    STORE_UNALIGNED_DATA_WITH_STRIDE    v4, v5, v6, v7, x0, x1
-
-WELS_ASM_AARCH64_FUNC_END
-
-
-WELS_ASM_AARCH64_FUNC_BEGIN WelsCopy16x16_AArch64_neon
-    SIGN_EXTENSION x1,w1
-    SIGN_EXTENSION x3,w3
-    LOAD16_ALIGNED_DATA_WITH_STRIDE   v0, v1, v2, v3, x2, x3
-
-    STORE16_ALIGNED_DATA_WITH_STRIDE  v0, v1, v2, v3, x0, x1
-
-    LOAD16_ALIGNED_DATA_WITH_STRIDE   v16, v17, v18, v19, x2, x3
-
-    STORE16_ALIGNED_DATA_WITH_STRIDE  v16, v17, v18, v19, x0, x1
-
-    LOAD16_ALIGNED_DATA_WITH_STRIDE   v0, v1, v2, v3, x2, x3
-
-    STORE16_ALIGNED_DATA_WITH_STRIDE  v0, v1, v2, v3, x0, x1
-
-    LOAD16_ALIGNED_DATA_WITH_STRIDE   v16, v17, v18, v19, x2, x3
-
-    STORE16_ALIGNED_DATA_WITH_STRIDE  v16, v17, v18, v19, x0, x1
-
-WELS_ASM_AARCH64_FUNC_END
-
-
-WELS_ASM_AARCH64_FUNC_BEGIN WelsCopy16x16NotAligned_AArch64_neon
-    SIGN_EXTENSION x1,w1
-    SIGN_EXTENSION x3,w3
-    LOAD16_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x2, x3
-
-    STORE16_UNALIGNED_DATA_WITH_STRIDE    v0, v1, v2, v3, x0, x1
-
-    LOAD16_UNALIGNED_DATA_WITH_STRIDE v16, v17, v18, v19, x2, x3
-
-    STORE16_UNALIGNED_DATA_WITH_STRIDE    v16, v17, v18, v19, x0, x1
-
-    LOAD16_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x2, x3
-
-    STORE16_UNALIGNED_DATA_WITH_STRIDE    v0, v1, v2, v3, x0, x1
-
-    LOAD16_UNALIGNED_DATA_WITH_STRIDE v16, v17, v18, v19, x2, x3
-
-    STORE16_UNALIGNED_DATA_WITH_STRIDE    v16, v17, v18, v19, x0, x1
-
-WELS_ASM_AARCH64_FUNC_END
-
-
-WELS_ASM_AARCH64_FUNC_BEGIN WelsCopy16x8NotAligned_AArch64_neon
-    SIGN_EXTENSION x1,w1
-    SIGN_EXTENSION x3,w3
-    LOAD16_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x2, x3
-
-    STORE16_UNALIGNED_DATA_WITH_STRIDE    v0, v1, v2, v3, x0, x1
-
-    LOAD16_UNALIGNED_DATA_WITH_STRIDE v16, v17, v18, v19, x2, x3
-
-    STORE16_UNALIGNED_DATA_WITH_STRIDE    v16, v17, v18, v19, x0, x1
-
-WELS_ASM_AARCH64_FUNC_END
-
-
-WELS_ASM_AARCH64_FUNC_BEGIN WelsCopy8x16_AArch64_neon
-    SIGN_EXTENSION x1,w1
-    SIGN_EXTENSION x3,w3
-    LOAD_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x2, x3
-
-    STORE_UNALIGNED_DATA_WITH_STRIDE    v0, v1, v2, v3, x0, x1
-
-    LOAD_UNALIGNED_DATA_WITH_STRIDE v4, v5, v6, v7, x2, x3
-
-    STORE_UNALIGNED_DATA_WITH_STRIDE    v4, v5, v6, v7, x0, x1
-
-    LOAD_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x2, x3
-
-    STORE_UNALIGNED_DATA_WITH_STRIDE    v0, v1, v2, v3, x0, x1
-
-    LOAD_UNALIGNED_DATA_WITH_STRIDE v4, v5, v6, v7, x2, x3
-
-    STORE_UNALIGNED_DATA_WITH_STRIDE    v4, v5, v6, v7, x0, x1
-
-WELS_ASM_AARCH64_FUNC_END
-
-#endif