@schemd/core 0.2.1 → 0.3.1

package/CHANGELOG.md

@@ -0,0 +1,64 @@
+# Changelog
+
+All notable changes to `@schemd/core` are recorded here. Dates describe actual npm publication dates; unpublished versions deliberately use `Unreleased`.
+
+## [0.3.1] - 07/20/2026
+
+### Fixed
+
+- Orthogonal routing no longer fails diagrams whose components sit closer than twice the 12-unit clearance margin. The post-routing guard now rejects only physical body clips; escape stubs may legitimately pass through a neighbor's clearance ring, so densely packed parallel wires route as straight traces instead of throwing `Orthogonal route intersects … after routing.`
+- Empty `qgate` detail rows (`parameter=""`, `phase=""`, `matrix=""`) no longer reserve blank text space: layout and renderer now agree that empty details are absent, so such gates keep the canonical shared quantum shell.
+- `embedded-css` output no longer emits keyboard-focusable component and wire groups beneath its `role="img"` root, which flattened them for assistive technology while leaving unlabeled tab stops. Internal `tabindex`/ARIA semantics are now exclusive to `full` mode, and every `full`-mode root is `role="group"` regardless of which semantic hooks are enabled.
+
+### Changed
+
+- `renderSchematic` skips the redundant geometry revalidation pass when the parser's route cache proves the same frozen document already validated against identical bounds, and computes the AST-serializing signature hash only when no `idPrefix` is supplied. Rendered output is byte-identical; hosts that pass `idPrefix` (such as compile endpoints) no longer pay an `O(document)` serialization per render.
+
+### Verified release-candidate measurements
+
+- Compiler bundle: 90,294 B minified, 26,479 B gzip — 4,241 B below the 30,720 B gate and 33 B smaller than 0.3.0.
+- Coverage: 100% statements, branches, functions, and lines across 123 tests, including new regressions for sub-clearance routing, single-track barriers, and empty quantum detail rows.
+- Runtime dependencies: zero. No public API, grammar, or geometry contracts changed; no migration is required.
+
+## [0.3.0] - 07/19/2026
+
+### Added
+
+- Exact quarter-turn component orientation through `orientation=right|down|left|up`, including rotated ports, outward normals, AABBs, text extents, obstacle routing, and four-turn identity.
+- Electrical sources, native junctions/test points/connectors, power symbols, switch and protection families, amplifiers, resonators, meters, loads, expanded passive/diode/transistor variants, and side-aware IC orientation.
+- Digital buffers, logic states, clocks, latches/flip-flops, mux/demux blocks, encoders, decoders, registers, counters, half/full adders, comparators, and bus primitives.
+- Named and parameterized quantum gates, preparation/reset/measurement, control and swap structures, generalized controlled gates, barriers/delays, and classical result nodes.
+- First-class UML structure, deployment, activity, interaction, and state-machine primitives plus synchronous, asynchronous, return, control-flow, object-flow, assembly, and delegation relations.
+- Public vocabulary registries and discriminated AST contracts for every new family, signal domain, output mode, semantic hook, and UML relation.
+
+### Changed
+
+- `qgate` now uses the same high-fidelity shell, typography, sizing discipline, orientation path, and semantic metadata quality as `hadamard`, while retaining optional `parameter`, `phase`, and `matrix` detail rows.
+- Orthogonal routing consumes rotated component obstacles and terminates at exact rotated semantic ports.
+- Repeated canonical geometry is amortized through diagram-local `<symbol>`/`<use>` reuse; unused families emit no definitions.
+- The hard compiler budget is now exactly 30,720 B gzip and fails at 30,721 B.
+
+### Compatibility and migration
+
+- Existing syntax without orientation remains valid; omitted orientation is byte-for-byte equivalent to `orientation=right` where compatibility is promised.
+- Existing component kinds, public entry points, port aliases, `hadamard`, `cnot`, `qgate`, IC, diode/transistor, logic, and UML documents remain supported.
+- New public AST members are additive. TypeScript consumers with exhaustive switches over `SchematicComponent['kind']` must add the 0.3.0 discriminants.
+- See [the 0.2.x migration guide](./docs/MIGRATION-0.3.md) for exact changes.
+
+### Verified release-candidate measurements
+
+- Compiler grew from 59,363 B minified / 18,181 B gzip in 0.2.1 to 90,714 B minified / 26,398 B gzip in 0.3.0. The candidate retains 4,322 B below the 30,720 B gate.
+- Coverage: 100% statements, branches, functions, and lines.
+- Runtime dependencies: zero.
+- On Node.js 26.4.0 / Apple Silicon, the Phase 5 warm medians were 0.202 ms for the representative RC compile, 6.583 ms for 512 rotated components, and 2.982 ms for the dense 16×16 routing fixture. Their SVG outputs were 6,019 B, 279,243 B, and 44,604 B respectively.
+- The repeated-symbol fixture emitted 1,353 B for one resistor and 35,463 B for 64 mixed-orientation instances: 541.429 B per additional labeled instance after the shared symbol definition. Re-run `bun run benchmark` on the release commit for machine-specific latency confirmation.
+
+### Known limits
+
+- Quarter-turn orientation is intentionally rejected for rotationally symmetric UML/electrical nodes where it would have no semantic effect.
+- Standards options implement documented visual subsets; this package does not claim IEEE, IEC, OpenQASM, or OMG certification.
+- Text sizing remains deterministic and SSR-safe rather than font-engine exact. Hosts using materially different fonts should preserve the supplied SVG typography or allocate additional label space.
+
+## [0.2.1]
+
+- Last 0.2.x release. Historical documentation remains at [the official 0.2.1 route](https://schemd.johnowolabiidogun.dev/docs/0.2.1/overview).

package/README.md

@@ -1,70 +1,122 @@
 <p align="center">
-  <img src="./assets/brand/schemd-logo.svg" alt="Schemd — engineering vectors" width="640" />
+  <img src="https://github.com/schemd/web/blob/main/src/lib/assets/brand/schemd-logo.svg" alt="Schemd — engineering vectors" width="640" />
 </p>
 
 # @schemd/core
 
-Write schematics and UML as text. Get accessible, deterministic SVG.
+`schemd`—pronounced like “skemd” (`/skɛmd/`)—is a strict, deterministic text-to-SVG compiler for electrical, digital, quantum, and UML diagrams. It has zero runtime dependencies and does not use a DOM, Canvas, browser layout, external fonts, raster assets, or `getBBox()`.
 
-Schemd has no runtime dependencies, browser layout pass, or DOM requirement. It works on a server or during a build.
+Version 0.3.0 requires Node.js 24 or newer. The complete compiler bundle is 90,714 B minified and 26,398 B gzip, leaving 4,322 B below the enforced 30 KiB ceiling.
 
 ## Install
 
 ```sh
-npm i @schemd/core # bun i @schemd/core
+npm install --save-exact @schemd/core@0.3.0
 ```
 
-Node.js 24+ is required.
-
-## Quick start
+## Compile
 
 ```ts
-import { compileSchematic, parseSchematicFence } from "@schemd/core";
+import { compileSchematic, parseSchematicFence } from '@schemd/core';
 
 const fence = parseSchematicFence(
-  'schemd bounds="640x260" title="Sensor input"',
+  'schemd bounds="760x460" title="RC low-pass filter"',
 )!;
 
-const { svg, document, metrics } = compileSchematic(`
-port:VIN "Input" at (60, 130) #blue
-resistor:R1 "10 k\\Omega" at (220, 130) #amber
-capacitor:C1 "100 nF" at (400, 130) #cyan
-
-VIN.out -> R1.in #blue [ortho]
-R1.out -> C1.in #amber [ortho]
-`, fence);
+const result = compileSchematic(
+  `source:VIN "AC" at (90, 150) #blue [type=voltage-ac]
+resistor:R1 "1 k\\Omega" at (280, 150) #amber
+junction:VOUT "V_{out}" at (470, 150) #cyan
+capacitor:C1 "100 nF" at (470, 290) #cyan [orientation=down]
+junction:RETURN "return" at (470, 380) #slate
+ground:GND "0 V" at (650, 380) #slate
+
+VIN.positive -> R1.in #blue [line]
+R1.out -> VOUT.node #amber [line]
+VOUT.node -> C1.in #cyan [ortho]
+C1.out -> RETURN.node #slate [line]
+VIN.negative -> RETURN.node #slate [ortho]
+RETURN.node -> GND.in #slate [line]`,
+  { ...fence, mode: 'full', semanticHooks: ['nodes', 'ports', 'wires'] },
+);
+
+console.log(result.svg, result.metrics);
 ```
 
-The DSL is intentionally small:
+Declarations and connections are line-oriented:
 
 ```text
 kind:ID "label" at (x, y) color [options]
-ID.port -> ID.port color [line|bezier|ortho]
+SOURCE.port -> TARGET.port color [line|bezier|ortho options]
 ```
 
-It includes electrical parts, analog devices, logic and quantum gates, configurable ICs, math labels, collision-aware routing, and wire bridges.
+Invalid component variants, duplicate options, unsupported rotations, bad ports, incompatible bus widths, unsafe colors, malformed markup, and out-of-bounds geometry fail with stable diagnostics before SVG emission.
+
+## Component inventory
+
+- Electrical: passives, diode and transistor families, ports, grounds, sources, junctions, test points, connectors, power symbols, switches, protection, amplifiers, resonators, meters, loads, and arbitrary side-pinned ICs.
+- Digital: IEEE/ANSI- or IEC-style gates, buffers, logic states, clocks, latches and flip-flops, mux/demux blocks, encoders, decoders, registers, counters, adders, comparators, and bus taps/splitters/joiners.
+- Quantum: Hadamard, polished general `qgate`, named single-qubit gates, measurement, reset, preparation, controls, swaps, controlled operators, barriers, delays, and classical bit/register nodes.
+- UML: structural, component/deployment, activity, sequence/interaction, and state-machine nodes with first-class relation semantics.
 
-UML nodes and relations use the same syntax:
+The exhaustive variants and stable port names are in the [component reference](./docs/COMPONENTS.md). Grammar/options, quarter-turn behavior, conventions, output modes, and migration details are documented separately:
+
+- [Grammar and options](./docs/GRAMMAR.md)
+- [Orientation and geometry](./docs/ORIENTATION.md)
+- [Standards and conventions](./docs/STANDARDS.md)
+- [SVG output modes](./docs/OUTPUT-MODES.md)
+- [Performance and size](./docs/PERFORMANCE.md)
+- [Migration from 0.2.x](./docs/MIGRATION-0.3.md)
+
+## Digital example
 
 ```text
-class:User "User" at (160, 120) #slate [attributes="- id: UUID" operations="+ save(): void"]
-class:Admin "Admin" at (460, 120) #blue
+port:DIN "D[7:0]" at (80, 130) #blue [width=8]
+register:REG "Q[7:0]" at (390, 130) #purple [width=8]
+clock:CLK "CLK" at (390, 300) #amber
+port:OUT "Q[7:0]" at (720, 130) #emerald [width=8 orientation=left]
+
+DIN.out -> REG.in #blue [digital width=8]
+CLK.out -> REG.clock #amber [digital ortho]
+REG.out -> OUT.in #emerald [digital width=8]
+```
 
-Admin.left -> User.right #blue [ortho generalization]
+## Quantum example
+
+`qgate` uses the same calibrated shell, centered operator typography, port geometry, upright labels, and semantic hooks as `hadamard`; optional parameter, phase, and matrix rows expand it deterministically.
+
+```text
+prepare:Q0 "|0\\rangle" at (80, 150) #blue
+hadamard:H "H" at (260, 150) #cyan
+qgate:U "U" at (480, 150) #purple [parameter="\\theta" phase="\\pi/2" matrix="[[a,b],[c,d]]"]
+measure:M "M" at (720, 150) #emerald
+
+Q0.out -> H.in #blue [quantum]
+H.out -> U.in #cyan [quantum]
+U.out -> M.in #purple [quantum]
 ```
 
-Class, actor, use-case, state, lifeline, note, package, initial, and final nodes are built in. Relations include association, dependency, generalization, realization, aggregation, composition, message, transition, include, and extend.
+## UML example
 
-Use `mode: "embedded-css"` for built-in styling or `mode: "full"` for interaction metadata. The default output stays compact and static.
+```text
+device:EDGE "Edge device" at (170, 140) #blue [width=180 height=100]
+artifact:FW "firmware.bin" at (480, 140) #amber [width=170 height=90]
+action:DEPLOY "Deploy" at (480, 340) #cyan [width=150 height=70]
+
+EDGE.right -> FW.left #blue [assembly]
+DEPLOY.top -> FW.bottom #cyan [control-flow]
+```
 
-On a colored surface, set `--schematic-surface` to that background color so hollow UML markers and connector-label halos match it.
+## Output modes
 
-Markdown belongs at the host boundary. Detect `schemd` fences in your server-side Markdown renderer and pass their text to `compileSchematic`; core does not ship or require a Markdown parser.
+- `default`: compact, accessible, static SVG.
+- `embedded-css`: the same geometry plus isolated built-in styles and state classes.
+- `full`: node, port, wire, source-line, and topology metadata for delegated interaction.
 
-## Roadmap
+All modes are deterministic and use diagram-local IDs. Hosts should use a unique `idPrefix` when more than one generated SVG can share a document.
 
-**Now: topology and routing** → **Next: visual precision** → **Later: language and footprint**
+## Compatibility
 
-Known limits and contributor-sized work live in the [active roadmap](./ROADMAP.md). Pick an item, open its claim link, and agree on the approach before starting a large change. Completed items are removed after merge.
+Omitting `orientation` is byte-identical to the explicit legacy default `orientation=right`. Existing 0.2.x declarations, port aliases, UML stereotypes, output modes, and compiler entry points continue to work. New AST members are additive; consumers with exhaustive component-kind switches must handle the new discriminants.
 
-[Documentation](https://johnowolabiidogun.dev/tools/schemd/docs/overview) · [Roadmap](./ROADMAP.md) · [Issues](https://github.com/Sirneij/schemd/issues) · [MIT](https://github.com/Sirneij/schemd/blob/main/LICENSE)
+[Official versioned documentation](https://schemd.johnowolabiidogun.dev/docs/0.3.0/overview) · [Changelog](./CHANGELOG.md) · [Roadmap](./ROADMAP.md) · [Issues](https://github.com/schemd/core/issues) · [MIT](./LICENSE)

package/dist/compiler.d.ts

@@ -6,11 +6,50 @@ export interface SchematicCompilationMetrics {
     readonly connections: number;
     readonly svgBytes: number;
 }
+/** One component's declaration site, keyed by its document-unique id. */
+export interface SchematicNodeSource {
+    /** Document-unique component identifier (matches `data-node-id`). */
+    readonly id: string;
+    /** One-based source line that declared the component. */
+    readonly line: number;
+}
+/** One connection's declaration site, keyed by its endpoint pair. */
+export interface SchematicWireSource {
+    /** Source endpoint `id.port` (matches `data-wire-source`). */
+    readonly source: string;
+    /** Target endpoint `id.port` (matches `data-wire-target`). */
+    readonly target: string;
+    /** One-based source line that declared the connection. */
+    readonly line: number;
+}
+/**
+ * A JSON-serializable map from rendered vectors back to their source lines.
+ *
+ * Both arrays are in source order, so a host can build whichever lookup it
+ * needs (line → vector, or vector → line) without re-parsing the DSL. In
+ * `full`-mode SVG the same lines are also emitted as `data-source-line`
+ * attributes on each node and wire group.
+ */
+export interface SchematicSourceMap {
+    readonly nodes: readonly SchematicNodeSource[];
+    readonly wires: readonly SchematicWireSource[];
+}
 /** Validated AST, rendered SVG, and useful host-side counters. */
 export interface SchematicCompilation {
     readonly document: SchematicDocument;
     readonly svg: string;
     readonly metrics: SchematicCompilationMetrics;
+    readonly sourceMap: SchematicSourceMap;
 }
+/**
+ * Derive the source map from an already-parsed document.
+ *
+ * Runs in one linear pass with no parsing, so hosts holding a document (for
+ * example after {@link renderSchematic}) can obtain declaration lines cheaply.
+ *
+ * @param document - Immutable document returned by the parser.
+ * @returns Source-ordered node and wire declaration sites.
+ */
+export declare function schematicSourceMap(document: SchematicDocument): SchematicSourceMap;
 /** Parse and render a schematic with one stable public call. */
 export declare function compileSchematic(source: string, options: CompileSchematicOptions): SchematicCompilation;

package/dist/compiler.js

@@ -1,6 +1,21 @@
 import { utf8ByteLength } from './limits.js';
 import { parseSchematic } from './parser.js';
 import { renderSchematic } from './renderer.js';
+export function schematicSourceMap(document) {
+    const nodes = [];
+    for (const component of document.components) {
+        nodes.push({ id: component.id, line: component.line });
+    }
+    const wires = [];
+    for (const connection of document.connections) {
+        wires.push({
+            source: `${connection.from.componentId}.${connection.from.port}`,
+            target: `${connection.to.componentId}.${connection.to.port}`,
+            line: connection.line
+        });
+    }
+    return { nodes, wires };
+}
 export function compileSchematic(source, options) {
     const document = parseSchematic(source, options);
     const svg = renderSchematic(document, options);
@@ -12,6 +27,7 @@ export function compileSchematic(source, options) {
             components: document.components.length,
             connections: document.connections.length,
             svgBytes: utf8ByteLength(svg)
-        }
+        },
+        sourceMap: schematicSourceMap(document)
     };
 }

package/dist/index.d.ts

@@ -7,8 +7,8 @@
  */
 export { parseSchematic, parseSchematicColor, parseSchematicFence } from './parser.js';
 export { renderSchematic } from './renderer.js';
-export { compileSchematic, type SchematicCompilation, type SchematicCompilationMetrics } from './compiler.js';
+export { compileSchematic, schematicSourceMap, type SchematicCompilation, type SchematicCompilationMetrics, type SchematicSourceMap, type SchematicNodeSource, type SchematicWireSource } from './compiler.js';
 export { mathLabelGlyphLength, mathLabelTextWidth, mathLabelText, parseMathLabel, renderMathLabelTspans, type MathLabelSegment, type MathLabelSegmentKind } from './math-label.js';
 export { MAX_SCHEMATIC_COMPONENTS, MAX_SCHEMATIC_CONNECTIONS, MAX_SCHEMATIC_WIRE_CROSSINGS, MAX_SCHEMATIC_SOURCE_CHARACTERS, MAX_SCHEMATIC_SVG_OUTPUT_BYTES, SCHEMATIC_LIMITS } from './limits.js';
-export { classicalGateHeight, componentObstacleRectangle, componentRectangle, componentTextAnchors, distributedCoordinate, enumerateComponentPorts, positionIcPin, PORT_HOTSPOT_RADIUS, resolvePortPoint, resolvePortGeometry, routeConnections, routeConnection, SCHEMATIC_BRIDGE_RADIUS, SCHEMATIC_OBSTACLE_CLEARANCE, validateDocumentGeometry, type RoutedConnection, type ComponentTextAnchors, type ComponentPort, type IcPinSide, type SchematicRectangle } from './layout.js';
-export { ANALOG_KINDS, COMPONENT_KINDS, CLASSICAL_GATE_KINDS, DIODE_TYPES, GROUND_STYLES, PASSIVE_KINDS, QUANTUM_GATE_KINDS, SCHEMATIC_SIGNAL_MARKERS, SEMANTIC_COLORS, TRANSISTOR_TYPES, UML_COMPONENT_KINDS, UML_RELATION_KINDS, SCHEMD_OUTPUT_MODES, SCHEMD_SEMANTIC_HOOKS, SchematicSyntaxError, type AnalogKind, type CompileSchematicOptions, type ClassicalGateComponent, type ClassicalGateKind, type ComponentKind, type DiodeComponent, type DiodeType, type GroundComponent, type GroundStyle, type IcComponent, type IntegratedCircuitComponent, type IntegratedCircuitPins, type PassiveComponent, type PassiveKind, type PortComponent, type SemanticColor, type SchematicBounds, type SchematicComponent, type SchematicConnection, type SchematicColor, type SchematicDocument, type SchematicEndpoint, type SchematicFence, type SchematicSignalMarker, type SchematicSemanticHook, type SchematicPoint, type SchemdOutputMode, type TransistorComponent, type TransistorType, type QuantumGateComponent, type QuantumGateKind, type SchematicRelationKind, type UmlActorComponent, type UmlClassComponent, type UmlComponent, type UmlComponentKind, type UmlPseudostateComponent, type UmlRelationKind, type UmlSizedComponent, type UmlStateComponent } from './types.js';
+export { classicalGateHeight, composeQuarterTurns, componentObstacleRectangle, componentRectangle, componentTextAnchors, distributedCoordinate, enumerateComponentPorts, positionIcPin, PORT_HOTSPOT_RADIUS, quantumGateDimensions, orientationQuarterTurn, inverseQuarterTurn, resolvePortPoint, resolvePortGeometry, rotateQuarterExtents, rotateQuarterPoint, routeConnections, routeConnection, SCHEMATIC_BRIDGE_RADIUS, SCHEMATIC_OBSTACLE_CLEARANCE, validateDocumentGeometry, type RoutedConnection, type ComponentTextAnchors, type ComponentPort, type IcPinSide, type SchematicHalfExtents, type SchematicRectangle } from './layout.js';
+export { ANALOG_KINDS, ADDER_TYPES, AMPLIFIER_TYPES, BUFFER_TYPES, BUS_TYPES, COMPONENT_KINDS, CLASSICAL_GATE_KINDS, DIGITAL_COMPONENT_KINDS, DIODE_TYPES, ELECTRICAL_COMPONENT_KINDS, FLIPFLOP_TYPES, GROUND_STYLES, LOAD_TYPES, LOGIC_STATES, METER_TYPES, MUX_TYPES, NAMED_QUANTUM_GATE_KINDS, PASSIVE_KINDS, PASSIVE_TYPES, POWER_TYPES, PROTECTION_TYPES, QUANTUM_GATE_KINDS, QUANTUM_SPECIAL_KINDS, RESONATOR_TYPES, SCHEMATIC_ORIENTATIONS, SCHEMATIC_SIGNAL_KINDS, SCHEMATIC_SIGNAL_MARKERS, SEMANTIC_COLORS, SOURCE_TYPES, SWITCH_TYPES, TRANSISTOR_TYPES, UML_COMPONENT_KINDS, UML_RELATION_KINDS, SCHEMD_OUTPUT_MODES, SCHEMD_SEMANTIC_HOOKS, SchematicSyntaxError, type AnalogKind, type AdderType, type AmplifierType, type BufferType, type BusType, type CompileSchematicOptions, type ClassicalGateComponent, type ClassicalGateKind, type DigitalComponent, type DigitalComponentKind, type ElectricalComponent, type ElectricalComponentKind, type ElectricalVariant, type ComponentKind, type DiodeComponent, type DirectionalComponentBase, type DiodeType, type GroundComponent, type GroundStyle, type FlipFlopType, type IcComponent, type IntegratedCircuitComponent, type IntegratedCircuitPins, type PassiveComponent, type PassiveKind, type PassiveType, type LoadType, type LogicState, type MeterType, type MuxType, type PowerType, type ProtectionType, type PortComponent, type SemanticColor, type SchematicBounds, type SchematicComponent, type SchematicConnection, type SchematicColor, type SchematicDocument, type SchematicEndpoint, type SchematicFence, type SchematicOrientation, type SchematicSignalMarker, type SchematicSemanticHook, type SchematicPoint, type SchematicQuarterTurn, type SchemdOutputMode, type TransistorComponent, type TransistorType, type QuantumGateComponent, type QuantumGateKind, type QuantumSpecialComponent, type QuantumSpecialKind, type NamedQuantumGateKind, type ResonatorType, type SchematicSignalKind, type SourceType, type SwitchType, type SchematicRelationKind, type UmlActorComponent, type UmlClassComponent, type UmlComponent, type UmlComponentKind, type UmlPseudostateComponent, type UmlRelationKind, type UmlSizedComponent, type UmlStateComponent } from './types.js';

package/dist/index.js

@@ -1,7 +1,7 @@
 export { parseSchematic, parseSchematicColor, parseSchematicFence } from './parser.js';
 export { renderSchematic } from './renderer.js';
-export { compileSchematic } from './compiler.js';
+export { compileSchematic, schematicSourceMap } from './compiler.js';
 export { mathLabelGlyphLength, mathLabelTextWidth, mathLabelText, parseMathLabel, renderMathLabelTspans } from './math-label.js';
 export { MAX_SCHEMATIC_COMPONENTS, MAX_SCHEMATIC_CONNECTIONS, MAX_SCHEMATIC_WIRE_CROSSINGS, MAX_SCHEMATIC_SOURCE_CHARACTERS, MAX_SCHEMATIC_SVG_OUTPUT_BYTES, SCHEMATIC_LIMITS } from './limits.js';
-export { classicalGateHeight, componentObstacleRectangle, componentRectangle, componentTextAnchors, distributedCoordinate, enumerateComponentPorts, positionIcPin, PORT_HOTSPOT_RADIUS, resolvePortPoint, resolvePortGeometry, routeConnections, routeConnection, SCHEMATIC_BRIDGE_RADIUS, SCHEMATIC_OBSTACLE_CLEARANCE, validateDocumentGeometry } from './layout.js';
-export { ANALOG_KINDS, COMPONENT_KINDS, CLASSICAL_GATE_KINDS, DIODE_TYPES, GROUND_STYLES, PASSIVE_KINDS, QUANTUM_GATE_KINDS, SCHEMATIC_SIGNAL_MARKERS, SEMANTIC_COLORS, TRANSISTOR_TYPES, UML_COMPONENT_KINDS, UML_RELATION_KINDS, SCHEMD_OUTPUT_MODES, SCHEMD_SEMANTIC_HOOKS, SchematicSyntaxError } from './types.js';
+export { classicalGateHeight, composeQuarterTurns, componentObstacleRectangle, componentRectangle, componentTextAnchors, distributedCoordinate, enumerateComponentPorts, positionIcPin, PORT_HOTSPOT_RADIUS, quantumGateDimensions, orientationQuarterTurn, inverseQuarterTurn, resolvePortPoint, resolvePortGeometry, rotateQuarterExtents, rotateQuarterPoint, routeConnections, routeConnection, SCHEMATIC_BRIDGE_RADIUS, SCHEMATIC_OBSTACLE_CLEARANCE, validateDocumentGeometry } from './layout.js';
+export { ANALOG_KINDS, ADDER_TYPES, AMPLIFIER_TYPES, BUFFER_TYPES, BUS_TYPES, COMPONENT_KINDS, CLASSICAL_GATE_KINDS, DIGITAL_COMPONENT_KINDS, DIODE_TYPES, ELECTRICAL_COMPONENT_KINDS, FLIPFLOP_TYPES, GROUND_STYLES, LOAD_TYPES, LOGIC_STATES, METER_TYPES, MUX_TYPES, NAMED_QUANTUM_GATE_KINDS, PASSIVE_KINDS, PASSIVE_TYPES, POWER_TYPES, PROTECTION_TYPES, QUANTUM_GATE_KINDS, QUANTUM_SPECIAL_KINDS, RESONATOR_TYPES, SCHEMATIC_ORIENTATIONS, SCHEMATIC_SIGNAL_KINDS, SCHEMATIC_SIGNAL_MARKERS, SEMANTIC_COLORS, SOURCE_TYPES, SWITCH_TYPES, TRANSISTOR_TYPES, UML_COMPONENT_KINDS, UML_RELATION_KINDS, SCHEMD_OUTPUT_MODES, SCHEMD_SEMANTIC_HOOKS, SchematicSyntaxError } from './types.js';

package/dist/layout.d.ts

@@ -8,7 +8,7 @@
  *
  * @packageDocumentation
  */
-import { type ClassicalGateComponent, type IntegratedCircuitComponent, type SchematicBounds, type SchematicComponent, type SchematicConnection, type SchematicDocument, type SchematicFence, type SchematicPoint } from './types.js';
+import { type ClassicalGateComponent, type IntegratedCircuitComponent, type QuantumGateComponent, type SchematicBounds, type SchematicComponent, type SchematicConnection, type SchematicDocument, type SchematicFence, type SchematicOrientation, type SchematicPoint, type SchematicQuarterTurn } from './types.js';
 /** Axis-aligned rectangle expressed in absolute schematic coordinates. */
 export interface SchematicRectangle {
     /** Inclusive left extent. */
@@ -20,6 +20,13 @@ export interface SchematicRectangle {
     /** Inclusive bottom extent. */
     maxY: number;
 }
+/** Axis-aligned half-extents around a component origin. */
+export interface SchematicHalfExtents {
+    /** Non-negative horizontal distance from the origin to either side. */
+    halfWidth: number;
+    /** Non-negative vertical distance from the origin to either side. */
+    halfHeight: number;
+}
 /** Render-ready connection path and the points used for bounds validation. */
 export interface RoutedConnection {
     /** Original routing strategy; crossing passes must never infer it from control points. */
@@ -57,6 +64,40 @@ export declare const PORT_HOTSPOT_RADIUS = 4;
 export declare const SCHEMATIC_OBSTACLE_CLEARANCE = 12;
 /** Radius of the engineering crossover arc inserted at non-junction wire crossings. */
 export declare const SCHEMATIC_BRIDGE_RADIUS = 5;
+/**
+ * Normalize the public direction vocabulary to a compact clockwise quarter turn.
+ *
+ * @param orientation - Validated author-facing orientation.
+ * @returns Zero for right, one for down, two for left, or three for up.
+ */
+export declare function orientationQuarterTurn(orientation: SchematicOrientation): SchematicQuarterTurn;
+/**
+ * Compose two clockwise quarter turns without floating-point angle arithmetic.
+ *
+ * @param first - Turn applied first.
+ * @param second - Turn applied second.
+ * @returns Canonical combined turn modulo four.
+ */
+export declare function composeQuarterTurns(first: SchematicQuarterTurn, second: SchematicQuarterTurn): SchematicQuarterTurn;
+/** Return the exact quarter turn that reverses the supplied rotation. */
+export declare function inverseQuarterTurn(turn: SchematicQuarterTurn): SchematicQuarterTurn;
+/**
+ * Rotate a local point or unit vector clockwise around the origin using only
+ * coordinate swaps and sign changes.
+ *
+ * @param point - Local coordinate or vector.
+ * @param turn - Clockwise quarter-turn count.
+ * @returns Newly allocated exact coordinate with no negative zero.
+ */
+export declare function rotateQuarterPoint(point: SchematicPoint, turn: SchematicQuarterTurn): SchematicPoint;
+/**
+ * Rotate axis-aligned half-extents; odd turns swap axes and even turns retain them.
+ *
+ * @param extents - Canonical unrotated component half-extents.
+ * @param turn - Clockwise quarter-turn count.
+ * @returns Exact axis-aligned extents of the rotated component.
+ */
+export declare function rotateQuarterExtents(extents: SchematicHalfExtents, turn: SchematicQuarterTurn): SchematicHalfExtents;
 /**
  * Evenly distribute a terminal within a centered span while preserving edge clearance.
  *
@@ -66,6 +107,18 @@ export declare const SCHEMATIC_BRIDGE_RADIUS = 5;
  * @returns Relative coordinate between negative and positive half-span.
  */
 export declare function distributedCoordinate(index: number, count: number, span: number): number;
+/** Total centered height of a quantum glyph carrying `tracks` qubit lines. */
+export declare function quantumTrackSpan(tracks: number): number;
+/**
+ * Vertical offset of quantum track `index` within a `tracks`-line glyph.
+ *
+ * Unlike {@link distributedCoordinate}, tracks are spread *edge-to-edge* so the
+ * outermost rails land exactly at ±span/2 — where the connecting bar and body
+ * extent terminate. That keeps control dots, targets, and swap crosses on rails
+ * a full pitch apart instead of collapsing a two-qubit swap into an overlapped
+ * star. Renderer and port geometry both call this, so marks and wires align.
+ */
+export declare function quantumTrackCoordinate(index: number, tracks: number): number;
 /**
  * Compute a classical gate height that scales with its busiest terminal side.
  *
@@ -73,6 +126,12 @@ export declare function distributedCoordinate(index: number, count: number, span
  * @returns Height in viewBox units, never smaller than 48.
  */
 export declare function classicalGateHeight(component: ClassicalGateComponent): number;
+/** Deterministic shared shell dimensions for native and custom single-qubit gates. */
+export declare function quantumGateDimensions(component: QuantumGateComponent): {
+    bodyWidth: number;
+    bodyHeight: number;
+    stubExtent: number;
+};
 /**
  * Position an already-indexed IC pin in O(1), without scanning any side list.
  *