@ohos-ports/react-native-quick-crypto 0.0.0-stage → 1.1.8-beta.0

package/deps/simdutf/src/simdutf/icelake/intrinsics.h

@@ -0,0 +1,138 @@
+#ifndef SIMDUTF_ICELAKE_INTRINSICS_H
+#define SIMDUTF_ICELAKE_INTRINSICS_H
+
+#include "simdutf.h"
+
+#ifdef SIMDUTF_VISUAL_STUDIO
+  // under clang within visual studio, this will include <x86intrin.h>
+  #include <intrin.h> // visual studio or clang
+  #include <immintrin.h>
+#else
+
+  #if SIMDUTF_GCC11ORMORE
+// We should not get warnings while including <x86intrin.h> yet we do
+// under some versions of GCC.
+// If the x86intrin.h header has uninitialized values that are problematic,
+// it is a GCC issue, we want to ignore these warnings.
+SIMDUTF_DISABLE_GCC_WARNING(-Wuninitialized)
+  #endif
+
+  #include <x86intrin.h> // elsewhere
+
+  #if SIMDUTF_GCC11ORMORE
+// cancels the suppression of the -Wuninitialized
+SIMDUTF_POP_DISABLE_WARNINGS
+  #endif
+
+  #ifndef _tzcnt_u64
+    #define _tzcnt_u64(x) __tzcnt_u64(x)
+  #endif // _tzcnt_u64
+#endif   // SIMDUTF_VISUAL_STUDIO
+
+#ifdef SIMDUTF_CLANG_VISUAL_STUDIO
+  /**
+   * You are not supposed, normally, to include these
+   * headers directly. Instead you should either include intrin.h
+   * or x86intrin.h. However, when compiling with clang
+   * under Windows (i.e., when _MSC_VER is set), these headers
+   * only get included *if* the corresponding features are detected
+   * from macros:
+   * e.g., if __AVX2__ is set... in turn,  we normally set these
+   * macros by compiling against the corresponding architecture
+   * (e.g., arch:AVX2, -mavx2, etc.) which compiles the whole
+   * software with these advanced instructions. In simdutf, we
+   * want to compile the whole program for a generic target,
+   * and only target our specific kernels. As a workaround,
+   * we directly include the needed headers. These headers would
+   * normally guard against such usage, but we carefully included
+   * <x86intrin.h>  (or <intrin.h>) before, so the headers
+   * are fooled.
+   */
+  #include <bmiintrin.h>   // for _blsr_u64
+  #include <bmi2intrin.h>  // for _pext_u64, _pdep_u64
+  #include <lzcntintrin.h> // for  __lzcnt64
+  #include <immintrin.h>   // for most things (AVX2, AVX512, _popcnt64)
+  #include <smmintrin.h>
+  #include <tmmintrin.h>
+  #include <avxintrin.h>
+  #include <avx2intrin.h>
+  // Important: we need the AVX-512 headers:
+  #include <avx512fintrin.h>
+  #include <avx512dqintrin.h>
+  #include <avx512cdintrin.h>
+  #include <avx512bwintrin.h>
+  #include <avx512vlintrin.h>
+  #include <avx512vlbwintrin.h>
+  #include <avx512vbmiintrin.h>
+  #include <avx512vbmi2intrin.h>
+  #include <avx512vpopcntdqintrin.h>
+  #include <avx512vpopcntdqvlintrin.h>
+  // unfortunately, we may not get _blsr_u64, but, thankfully, clang
+  // has it as a macro.
+  #ifndef _blsr_u64
+    // we roll our own
+    #define _blsr_u64(n) ((n - 1) & n)
+  #endif //  _blsr_u64
+#endif   // SIMDUTF_CLANG_VISUAL_STUDIO
+
+#if defined(__GNUC__) && !defined(__clang__)
+
+  #if __GNUC__ == 8
+    #define SIMDUTF_GCC8 1
+  #elif __GNUC__ == 9
+    #define SIMDUTF_GCC9 1
+  #endif //  __GNUC__ == 8 || __GNUC__ == 9
+
+#endif // defined(__GNUC__) && !defined(__clang__)
+
+#if SIMDUTF_GCC8
+  #pragma GCC push_options
+  #pragma GCC target("avx512f")
+/**
+ * GCC 8 fails to provide _mm512_set_epi8. We roll our own.
+ */
+inline __m512i
+_mm512_set_epi8(uint8_t a0, uint8_t a1, uint8_t a2, uint8_t a3, uint8_t a4,
+                uint8_t a5, uint8_t a6, uint8_t a7, uint8_t a8, uint8_t a9,
+                uint8_t a10, uint8_t a11, uint8_t a12, uint8_t a13, uint8_t a14,
+                uint8_t a15, uint8_t a16, uint8_t a17, uint8_t a18, uint8_t a19,
+                uint8_t a20, uint8_t a21, uint8_t a22, uint8_t a23, uint8_t a24,
+                uint8_t a25, uint8_t a26, uint8_t a27, uint8_t a28, uint8_t a29,
+                uint8_t a30, uint8_t a31, uint8_t a32, uint8_t a33, uint8_t a34,
+                uint8_t a35, uint8_t a36, uint8_t a37, uint8_t a38, uint8_t a39,
+                uint8_t a40, uint8_t a41, uint8_t a42, uint8_t a43, uint8_t a44,
+                uint8_t a45, uint8_t a46, uint8_t a47, uint8_t a48, uint8_t a49,
+                uint8_t a50, uint8_t a51, uint8_t a52, uint8_t a53, uint8_t a54,
+                uint8_t a55, uint8_t a56, uint8_t a57, uint8_t a58, uint8_t a59,
+                uint8_t a60, uint8_t a61, uint8_t a62, uint8_t a63) {
+  return _mm512_set_epi64(
+      uint64_t(a7) + (uint64_t(a6) << 8) + (uint64_t(a5) << 16) +
+          (uint64_t(a4) << 24) + (uint64_t(a3) << 32) + (uint64_t(a2) << 40) +
+          (uint64_t(a1) << 48) + (uint64_t(a0) << 56),
+      uint64_t(a15) + (uint64_t(a14) << 8) + (uint64_t(a13) << 16) +
+          (uint64_t(a12) << 24) + (uint64_t(a11) << 32) +
+          (uint64_t(a10) << 40) + (uint64_t(a9) << 48) + (uint64_t(a8) << 56),
+      uint64_t(a23) + (uint64_t(a22) << 8) + (uint64_t(a21) << 16) +
+          (uint64_t(a20) << 24) + (uint64_t(a19) << 32) +
+          (uint64_t(a18) << 40) + (uint64_t(a17) << 48) + (uint64_t(a16) << 56),
+      uint64_t(a31) + (uint64_t(a30) << 8) + (uint64_t(a29) << 16) +
+          (uint64_t(a28) << 24) + (uint64_t(a27) << 32) +
+          (uint64_t(a26) << 40) + (uint64_t(a25) << 48) + (uint64_t(a24) << 56),
+      uint64_t(a39) + (uint64_t(a38) << 8) + (uint64_t(a37) << 16) +
+          (uint64_t(a36) << 24) + (uint64_t(a35) << 32) +
+          (uint64_t(a34) << 40) + (uint64_t(a33) << 48) + (uint64_t(a32) << 56),
+      uint64_t(a47) + (uint64_t(a46) << 8) + (uint64_t(a45) << 16) +
+          (uint64_t(a44) << 24) + (uint64_t(a43) << 32) +
+          (uint64_t(a42) << 40) + (uint64_t(a41) << 48) + (uint64_t(a40) << 56),
+      uint64_t(a55) + (uint64_t(a54) << 8) + (uint64_t(a53) << 16) +
+          (uint64_t(a52) << 24) + (uint64_t(a51) << 32) +
+          (uint64_t(a50) << 40) + (uint64_t(a49) << 48) + (uint64_t(a48) << 56),
+      uint64_t(a63) + (uint64_t(a62) << 8) + (uint64_t(a61) << 16) +
+          (uint64_t(a60) << 24) + (uint64_t(a59) << 32) +
+          (uint64_t(a58) << 40) + (uint64_t(a57) << 48) +
+          (uint64_t(a56) << 56));
+}
+  #pragma GCC pop_options
+#endif // SIMDUTF_GCC8
+
+#endif // SIMDUTF_HASWELL_INTRINSICS_H

package/deps/simdutf/src/simdutf/icelake/simd.h

@@ -0,0 +1,17 @@
+#ifndef SIMDUTF_ICELAKE_SIMD_H
+#define SIMDUTF_ICELAKE_SIMD_H
+
+namespace simdutf {
+namespace SIMDUTF_IMPLEMENTATION {
+namespace {
+namespace simd {
+
+#include "simdutf/icelake/simd16-inl.h"
+#include "simdutf/icelake/simd32-inl.h"
+
+} // namespace simd
+} // unnamed namespace
+} // namespace SIMDUTF_IMPLEMENTATION
+} // namespace simdutf
+
+#endif // SIMDUTF_ICELAKE_SIMD_H

package/deps/simdutf/src/simdutf/icelake/simd16-inl.h

@@ -0,0 +1,90 @@
+template <typename T> struct simd16;
+
+template <> struct simd16<uint16_t> {
+  static const size_t SIZE = sizeof(__m512i);
+  static const size_t ELEMENTS = SIZE / sizeof(uint16_t);
+
+  template <typename Pointer>
+  static simdutf_really_inline simd16<uint16_t> load(const Pointer *ptr) {
+    return simd16<uint16_t>(ptr);
+  }
+
+  __m512i value;
+
+  simdutf_really_inline simd16(const __m512i v) : value(v) {}
+
+  template <typename Pointer>
+  simdutf_really_inline simd16(const Pointer *ptr)
+      : value(_mm512_loadu_si512(reinterpret_cast<const __m512i *>(ptr))) {}
+
+  // operators
+  simdutf_really_inline simd16 &operator+=(const simd16 other) {
+    value = _mm512_add_epi32(value, other.value);
+    return *this;
+  }
+
+  simdutf_really_inline simd16 &operator-=(const simd16 other) {
+    value = _mm512_sub_epi32(value, other.value);
+    return *this;
+  }
+
+  // methods
+  simdutf_really_inline simd16 swap_bytes() const {
+    const __m512i byteflip = _mm512_setr_epi64(
+        0x0607040502030001, 0x0e0f0c0d0a0b0809, 0x0607040502030001,
+        0x0e0f0c0d0a0b0809, 0x0607040502030001, 0x0e0f0c0d0a0b0809,
+        0x0607040502030001, 0x0e0f0c0d0a0b0809);
+
+    return _mm512_shuffle_epi8(value, byteflip);
+  }
+
+  simdutf_really_inline uint64_t sum() const {
+    const auto lo = _mm512_and_si512(value, _mm512_set1_epi32(0xffff));
+    const auto hi = _mm512_srli_epi32(value, 16);
+    const auto sum32 = _mm512_add_epi32(lo, hi);
+
+    return _mm512_reduce_add_epi32(sum32);
+  }
+
+  // static members
+  simdutf_really_inline static simd16<uint16_t> zero() {
+    return _mm512_setzero_si512();
+  }
+
+  simdutf_really_inline static simd16<uint16_t> splat(uint16_t v) {
+    return _mm512_set1_epi16(v);
+  }
+};
+
+template <> struct simd16<bool> {
+  __mmask32 value;
+
+  simdutf_really_inline simd16(const __mmask32 v) : value(v) {}
+};
+
+// ------------------------------------------------------------
+
+simdutf_really_inline simd16<uint16_t> min(const simd16<uint16_t> b,
+                                           const simd16<uint16_t> a) {
+  return _mm512_min_epu16(a.value, b.value);
+}
+
+simdutf_really_inline simd16<uint16_t> operator&(const simd16<uint16_t> a,
+                                                 uint16_t b) {
+  return _mm512_and_si512(a.value, _mm512_set1_epi16(b));
+}
+
+simdutf_really_inline simd16<uint16_t> operator^(const simd16<uint16_t> a,
+                                                 uint16_t b) {
+  return _mm512_xor_si512(a.value, _mm512_set1_epi16(b));
+}
+
+simdutf_really_inline simd16<uint16_t> operator^(const simd16<uint16_t> a,
+                                                 const simd16<uint16_t> b) {
+  return _mm512_xor_si512(a.value, b.value);
+}
+
+simdutf_really_inline simd16<bool> operator==(const simd16<uint16_t> a,
+                                              uint16_t b) {
+  return _mm512_cmpeq_epi16_mask(a.value, _mm512_set1_epi16(b));
+}

package/deps/simdutf/src/simdutf/icelake/simd32-inl.h

@@ -0,0 +1,47 @@
+template <typename T> struct simd32;
+
+template <> struct simd32<uint32_t> {
+  static const size_t SIZE = sizeof(__m512i);
+  static const size_t ELEMENTS = SIZE / sizeof(uint32_t);
+
+  __m512i value;
+
+  simdutf_really_inline simd32(const __m512i v) : value(v) {}
+
+  template <typename Pointer>
+  simdutf_really_inline simd32(const Pointer *ptr)
+      : value(_mm512_loadu_si512(reinterpret_cast<const __m512i *>(ptr))) {}
+
+  uint64_t sum() const {
+    const __m512i mask = _mm512_set1_epi64(0xffffffff);
+    const __m512i t0 = _mm512_and_si512(value, mask);
+    const __m512i t1 = _mm512_srli_epi64(value, 32);
+    const __m512i t2 = _mm512_add_epi64(t0, t1);
+    return _mm512_reduce_add_epi64(t2);
+  }
+
+  // operators
+  simdutf_really_inline simd32 &operator+=(const simd32 other) {
+    value = _mm512_add_epi32(value, other.value);
+    return *this;
+  }
+
+  // static members
+  simdutf_really_inline static simd32<uint32_t> zero() {
+    return _mm512_setzero_si512();
+  }
+
+  simdutf_really_inline static simd32<uint32_t> splat(uint32_t v) {
+    return _mm512_set1_epi32(v);
+  }
+};
+
+simdutf_really_inline simd32<uint32_t> min(const simd32<uint32_t> b,
+                                           const simd32<uint32_t> a) {
+  return _mm512_min_epu32(a.value, b.value);
+}
+
+simdutf_really_inline simd32<uint32_t> operator&(const simd32<uint32_t> b,
+                                                 const simd32<uint32_t> a) {
+  return _mm512_and_si512(a.value, b.value);
+}

package/deps/simdutf/src/simdutf/icelake.h

@@ -0,0 +1,81 @@
+#ifndef SIMDUTF_ICELAKE_H
+#define SIMDUTF_ICELAKE_H
+
+#include "simdutf/portability.h"
+
+#ifdef __has_include
+  // How do we detect that a compiler supports vbmi2?
+  // For sure if the following header is found, we are ok?
+  #if __has_include(<avx512vbmi2intrin.h>)
+    #define SIMDUTF_COMPILER_SUPPORTS_VBMI2 1
+  #endif
+#endif
+
+#ifdef _MSC_VER
+  #if _MSC_VER >= 1930
+    // Visual Studio 2022 and up support VBMI2 under x64 even if the header
+    // avx512vbmi2intrin.h is not found.
+    // Visual Studio 2019 technically supports VBMI2, but the implementation
+    // might be unreliable. Search for visualstudio2019icelakeissue in our
+    // tests.
+    #ifndef SIMDUTF_COMPILER_SUPPORTS_VBMI2
+      #define SIMDUTF_COMPILER_SUPPORTS_VBMI2 1
+    #endif
+  #endif
+#endif
+
+#if SIMDUTF_GCC9OROLDER && SIMDUTF_IS_X86_64
+  #define SIMDUTF_IMPLEMENTATION_ICELAKE 0
+  #warning                                                                     \
+      "You are using a legacy GCC compiler, we are disabling AVX-512 support"
+#endif
+
+// We allow icelake on x64 as long as the compiler is known to support VBMI2.
+#ifndef SIMDUTF_IMPLEMENTATION_ICELAKE
+  #define SIMDUTF_IMPLEMENTATION_ICELAKE                                       \
+    ((SIMDUTF_IS_X86_64) && (SIMDUTF_COMPILER_SUPPORTS_VBMI2))
+#endif
+
+// To see why  (__BMI__) && (__LZCNT__) are not part of this next line, see
+// https://github.com/simdutf/simdutf/issues/1247
+#if ((SIMDUTF_IMPLEMENTATION_ICELAKE) && (SIMDUTF_IS_X86_64) && (__AVX2__) &&  \
+     (SIMDUTF_HAS_AVX512F && SIMDUTF_HAS_AVX512DQ && SIMDUTF_HAS_AVX512VL &&   \
+      SIMDUTF_HAS_AVX512VBMI2) &&                                              \
+     (!SIMDUTF_IS_32BITS))
+  #define SIMDUTF_CAN_ALWAYS_RUN_ICELAKE 1
+#else
+  #define SIMDUTF_CAN_ALWAYS_RUN_ICELAKE 0
+#endif
+
+#if SIMDUTF_IMPLEMENTATION_ICELAKE
+  #if SIMDUTF_CAN_ALWAYS_RUN_ICELAKE
+    #define SIMDUTF_TARGET_ICELAKE
+  #else
+    #define SIMDUTF_TARGET_ICELAKE                                             \
+      SIMDUTF_TARGET_REGION(                                                   \
+          "avx512f,avx512dq,avx512cd,avx512bw,avx512vbmi,avx512vbmi2,"         \
+          "avx512vl,avx2,bmi,bmi2,pclmul,lzcnt,popcnt,avx512vpopcntdq")
+  #endif
+
+namespace simdutf {
+namespace icelake {} // namespace icelake
+} // namespace simdutf
+
+  //
+  // These two need to be included outside SIMDUTF_TARGET_REGION
+  //
+  #include "simdutf/icelake/intrinsics.h"
+  #include "simdutf/icelake/implementation.h"
+
+  //
+  // The rest need to be inside the region
+  //
+  #include "simdutf/icelake/begin.h"
+  // Declarations
+  #include "simdutf/icelake/bitmanipulation.h"
+  #include "simdutf/icelake/simd.h"
+
+  #include "simdutf/icelake/end.h"
+
+#endif // SIMDUTF_IMPLEMENTATION_ICELAKE
+#endif // SIMDUTF_ICELAKE_H

package/deps/simdutf/src/simdutf/lasx/begin.h

@@ -0,0 +1,8 @@
+#define SIMDUTF_IMPLEMENTATION lasx
+#define SIMDUTF_SIMD_HAS_UNSIGNED_CMP 1
+
+#if SIMDUTF_CAN_ALWAYS_RUN_LASX
+// nothing needed.
+#else
+SIMDUTF_TARGET_LASX
+#endif

package/deps/simdutf/src/simdutf/lasx/bitmanipulation.h

@@ -0,0 +1,25 @@
+#ifndef SIMDUTF_LASX_BITMANIPULATION_H
+#define SIMDUTF_LASX_BITMANIPULATION_H
+
+#include "simdutf.h"
+#include <limits>
+
+namespace simdutf {
+namespace SIMDUTF_IMPLEMENTATION {
+namespace {
+
+simdutf_really_inline int count_ones(uint64_t input_num) {
+  return __lsx_vpickve2gr_w(__lsx_vpcnt_d(__lsx_vreplgr2vr_d(input_num)), 0);
+}
+
+#if SIMDUTF_NEED_TRAILING_ZEROES
+simdutf_really_inline int trailing_zeroes(uint64_t input_num) {
+  return __builtin_ctzll(input_num);
+}
+#endif
+
+} // unnamed namespace
+} // namespace SIMDUTF_IMPLEMENTATION
+} // namespace simdutf
+
+#endif // SIMDUTF_LASX_BITMANIPULATION_H

package/deps/simdutf/src/simdutf/lasx/end.h

@@ -0,0 +1,8 @@
+#undef SIMDUTF_IMPLEMENTATION
+#undef SIMDUTF_SIMD_HAS_UNSIGNED_CMP
+
+#if SIMDUTF_CAN_ALWAYS_RUN_LASX
+// nothing needed.
+#else
+SIMDUTF_UNTARGET_REGION
+#endif