@fluffylabs/anan-as 1.2.0-c2b7f5a → 1.2.0-d27ef10
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/dist/bin/src/trace-replay.js +3 -1
- package/dist/build/compiler-inline.js +1 -1
- package/dist/build/compiler.wasm +0 -0
- package/dist/build/debug-inline.js +1 -1
- package/dist/build/debug-raw-inline.js +1 -1
- package/dist/build/debug-raw.wasm +0 -0
- package/dist/build/debug.wasm +0 -0
- package/dist/build/js/assembly/arguments.js +4 -4
- package/dist/build/js/assembly/instructions/bit.js +22 -22
- package/dist/build/js/assembly/instructions/branch.js +56 -56
- package/dist/build/js/assembly/instructions/jump.js +10 -10
- package/dist/build/js/assembly/instructions/load.js +41 -41
- package/dist/build/js/assembly/instructions/logic.js +20 -20
- package/dist/build/js/assembly/instructions/math.js +105 -105
- package/dist/build/js/assembly/instructions/misc.js +10 -10
- package/dist/build/js/assembly/instructions/mov.js +16 -16
- package/dist/build/js/assembly/instructions/outcome.d.ts +7 -7
- package/dist/build/js/assembly/instructions/outcome.js +63 -36
- package/dist/build/js/assembly/instructions/rot.js +18 -18
- package/dist/build/js/assembly/instructions/set.js +18 -18
- package/dist/build/js/assembly/instructions/shift.js +59 -59
- package/dist/build/js/assembly/instructions/store.js +29 -29
- package/dist/build/js/assembly/instructions/utils.d.ts +6 -4
- package/dist/build/js/assembly/instructions/utils.js +32 -16
- package/dist/build/js/assembly/math.d.ts +6 -8
- package/dist/build/js/assembly/math.js +21 -13
- package/dist/build/js/assembly/memory.js +9 -7
- package/dist/build/js/assembly/program-build.js +4 -4
- package/dist/build/js/assembly/program.js +29 -29
- package/dist/build/js/portable-bundle.js +547 -482
- package/dist/build/release-inline.js +1 -1
- package/dist/build/release-mini-inline.js +1 -1
- package/dist/build/release-mini.wasm +0 -0
- package/dist/build/release-stub-inline.js +1 -1
- package/dist/build/release-stub.wasm +0 -0
- package/dist/build/release.wasm +0 -0
- package/dist/build/test-inline.js +1 -1
- package/dist/build/test.wasm +0 -0
- package/package.json +1 -1
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@@ -740,12 +740,28 @@ if (typeof globalScope.ASC_TARGET === "undefined") {
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}
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// dist/build/js/assembly/math.js
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var __decorate2 = function(decorators, target, key, desc) {
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var c = arguments.length, r = c < 3 ? target : desc === null ? desc = Object.getOwnPropertyDescriptor(target, key) : desc, d;
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else for (var i = decorators.length - 1; i >= 0; i--) if (d = decorators[i]) r = (c < 3 ? d(r) : c > 3 ? d(target, key, r) : d(target, key)) || r;
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return c > 3 && r && Object.defineProperty(target, key, r), r;
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};
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var IntMath = class {
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/** Integer minimum of two i32 values. */
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static minI32(a, b) {
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return a < b ? a : b;
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}
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/** Unsigned integer minimum of two u32 values. */
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static minU32(a, b) {
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return a < b ? a : b;
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}
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};
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// dist/build/js/assembly/arguments.js
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var Arguments;
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};
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function twoImm(args, code, offset, end) {
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const low = lowNibble(portable.staticArrayAt(code, offset));
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const split = minI32(4, low) + 1;
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const split = IntMath.minI32(4, low) + 1;
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const first = decodeI32(code, offset + 1, offset + split);
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const second = decodeI32(code, offset + split, end);
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return args.fill(first, second, 0, 0);
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(args, data, o, lim) => {
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const h = higNibble(data[o]);
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const l = lowNibble(data[o]);
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const split = minI32(4, h) + 1;
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const split = IntMath.minI32(4, h) + 1;
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const immA = decodeI32(data, o + 1, o + split);
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const immB = decodeI32(data, o + split, lim);
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return args.fill(l, immA, immB, 0);
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const l = lowNibble(data[o]);
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const split = minI32(4, h) + 1;
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const split = IntMath.minI32(4, h) + 1;
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const immA = decodeI32(data, o + 1, o + split);
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const offs = decodeI32(data, o + split, lim);
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return args.fill(l, immA, offs, 0);
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// dist/build/js/assembly/gas.js
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// dist/build/js/assembly/instructions/outcome.js
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var c = arguments.length, r = c < 3 ? target : desc === null ? desc = Object.getOwnPropertyDescriptor(target, key) : desc, d;
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if (typeof Reflect === "object" && typeof Reflect.decorate === "function") r = Reflect.decorate(decorators, target, key, desc);
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else for (var i = decorators.length - 1; i >= 0; i--) if (d = decorators[i]) r = (c < 3 ? d(r) : c > 3 ? d(target, key, r) : d(target, key)) || r;
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return c > 3 && r && Object.defineProperty(target, key, r), r;
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};
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var Result;
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(function(Result2) {
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Result2[Result2["PANIC"] = 0] = "PANIC";
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Outcome2[Outcome2["DynamicJump"] = 2] = "DynamicJump";
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Outcome2[Outcome2["Result"] = 3] = "Result";
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})(Outcome || (Outcome = {}));
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var OutcomeData = class {
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var OutcomeData = class _OutcomeData {
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constructor() {
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this.outcome = Outcome.Ok;
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this.result = Result.PANIC;
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function status(r, result) {
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r.outcome = Outcome.StaticJump;
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r.staticJump = offset;
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return r;
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}
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function dJump(r, address) {
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r.outcome = Outcome.DynamicJump;
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r.dJump = address;
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return r;
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}
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function ok(r) {
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}
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function panic(r) {
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}
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r.result = Result.HOST;
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r.outcome = Outcome.Result;
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r.outcome = Outcome.StaticJump;
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r.staticJump = offset;
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}
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static ok(r) {
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static panic(r) {
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else for (var i = decorators.length - 1; i >= 0; i--) if (d = decorators[i]) r = (c < 3 ? d(r) : c > 3 ? d(target, key, r) : d(target, key)) || r;
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|
1517
|
+
return OutcomeData.ok(r);
|
|
1455
1518
|
};
|
|
1456
1519
|
var leading_zero_bits_64 = (r, args, regs) => {
|
|
1457
|
-
regs[reg(args.b)] = portable.clz_u64(regs[reg(args.a)]);
|
|
1458
|
-
return ok(r);
|
|
1520
|
+
regs[Inst.reg(args.b)] = portable.clz_u64(regs[Inst.reg(args.a)]);
|
|
1521
|
+
return OutcomeData.ok(r);
|
|
1459
1522
|
};
|
|
1460
1523
|
var leading_zero_bits_32 = (r, args, regs) => {
|
|
1461
|
-
regs[reg(args.b)] = u64(portable.clz_u32(u32(regs[reg(args.a)])));
|
|
1462
|
-
return ok(r);
|
|
1524
|
+
regs[Inst.reg(args.b)] = u64(portable.clz_u32(u32(regs[Inst.reg(args.a)])));
|
|
1525
|
+
return OutcomeData.ok(r);
|
|
1463
1526
|
};
|
|
1464
1527
|
var trailing_zero_bits_64 = (r, args, regs) => {
|
|
1465
|
-
regs[reg(args.b)] = portable.ctz_u64(regs[reg(args.a)]);
|
|
1466
|
-
return ok(r);
|
|
1528
|
+
regs[Inst.reg(args.b)] = portable.ctz_u64(regs[Inst.reg(args.a)]);
|
|
1529
|
+
return OutcomeData.ok(r);
|
|
1467
1530
|
};
|
|
1468
1531
|
var trailing_zero_bits_32 = (r, args, regs) => {
|
|
1469
|
-
regs[reg(args.b)] = u64(portable.ctz_u32(u32(regs[reg(args.a)])));
|
|
1470
|
-
return ok(r);
|
|
1532
|
+
regs[Inst.reg(args.b)] = u64(portable.ctz_u32(u32(regs[Inst.reg(args.a)])));
|
|
1533
|
+
return OutcomeData.ok(r);
|
|
1471
1534
|
};
|
|
1472
1535
|
var sign_extend_8 = (r, args, regs) => {
|
|
1473
|
-
regs[reg(args.b)] = u8SignExtend(u8(regs[reg(args.a)]));
|
|
1474
|
-
return ok(r);
|
|
1536
|
+
regs[Inst.reg(args.b)] = Inst.u8SignExtend(u8(regs[Inst.reg(args.a)]));
|
|
1537
|
+
return OutcomeData.ok(r);
|
|
1475
1538
|
};
|
|
1476
1539
|
var sign_extend_16 = (r, args, regs) => {
|
|
1477
|
-
regs[reg(args.b)] = u16SignExtend(u16(regs[reg(args.a)]));
|
|
1478
|
-
return ok(r);
|
|
1540
|
+
regs[Inst.reg(args.b)] = Inst.u16SignExtend(u16(regs[Inst.reg(args.a)]));
|
|
1541
|
+
return OutcomeData.ok(r);
|
|
1479
1542
|
};
|
|
1480
1543
|
var zero_extend_16 = (r, args, regs) => {
|
|
1481
|
-
regs[reg(args.b)] = u64(u16(regs[reg(args.a)]));
|
|
1482
|
-
return ok(r);
|
|
1544
|
+
regs[Inst.reg(args.b)] = u64(u16(regs[Inst.reg(args.a)]));
|
|
1545
|
+
return OutcomeData.ok(r);
|
|
1483
1546
|
};
|
|
1484
1547
|
var reverse_bytes = (r, args, regs) => {
|
|
1485
|
-
regs[reg(args.b)] = portable.bswap_u64(regs[reg(args.a)]);
|
|
1486
|
-
return ok(r);
|
|
1548
|
+
regs[Inst.reg(args.b)] = portable.bswap_u64(regs[Inst.reg(args.a)]);
|
|
1549
|
+
return OutcomeData.ok(r);
|
|
1487
1550
|
};
|
|
1488
1551
|
|
|
1489
1552
|
// dist/build/js/assembly/instructions/branch.js
|
|
1490
1553
|
var branch_eq_imm = (r, args, registers) => {
|
|
1491
|
-
const b = u64(u32SignExtend(args.b));
|
|
1492
|
-
if (registers[reg(args.a)] === b) {
|
|
1493
|
-
return staticJump(r, args.c);
|
|
1554
|
+
const b = u64(Inst.u32SignExtend(args.b));
|
|
1555
|
+
if (registers[Inst.reg(args.a)] === b) {
|
|
1556
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1494
1557
|
}
|
|
1495
|
-
return ok(r);
|
|
1558
|
+
return OutcomeData.ok(r);
|
|
1496
1559
|
};
|
|
1497
1560
|
var branch_ne_imm = (r, args, registers) => {
|
|
1498
|
-
const b = u64(u32SignExtend(args.b));
|
|
1499
|
-
if (registers[reg(args.a)] !== b) {
|
|
1500
|
-
return staticJump(r, args.c);
|
|
1561
|
+
const b = u64(Inst.u32SignExtend(args.b));
|
|
1562
|
+
if (registers[Inst.reg(args.a)] !== b) {
|
|
1563
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1501
1564
|
}
|
|
1502
|
-
return ok(r);
|
|
1565
|
+
return OutcomeData.ok(r);
|
|
1503
1566
|
};
|
|
1504
1567
|
var branch_lt_u_imm = (r, args, registers) => {
|
|
1505
|
-
const b = u64(u32SignExtend(args.b));
|
|
1506
|
-
if (registers[reg(args.a)] < b) {
|
|
1507
|
-
return staticJump(r, args.c);
|
|
1568
|
+
const b = u64(Inst.u32SignExtend(args.b));
|
|
1569
|
+
if (registers[Inst.reg(args.a)] < b) {
|
|
1570
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1508
1571
|
}
|
|
1509
|
-
return ok(r);
|
|
1572
|
+
return OutcomeData.ok(r);
|
|
1510
1573
|
};
|
|
1511
1574
|
var branch_le_u_imm = (r, args, registers) => {
|
|
1512
|
-
const b = u64(u32SignExtend(args.b));
|
|
1513
|
-
if (registers[reg(args.a)] <= b) {
|
|
1514
|
-
return staticJump(r, args.c);
|
|
1575
|
+
const b = u64(Inst.u32SignExtend(args.b));
|
|
1576
|
+
if (registers[Inst.reg(args.a)] <= b) {
|
|
1577
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1515
1578
|
}
|
|
1516
|
-
return ok(r);
|
|
1579
|
+
return OutcomeData.ok(r);
|
|
1517
1580
|
};
|
|
1518
1581
|
var branch_ge_u_imm = (r, args, registers) => {
|
|
1519
|
-
const b = u64(u32SignExtend(args.b));
|
|
1520
|
-
if (registers[reg(args.a)] >= b) {
|
|
1521
|
-
return staticJump(r, args.c);
|
|
1582
|
+
const b = u64(Inst.u32SignExtend(args.b));
|
|
1583
|
+
if (registers[Inst.reg(args.a)] >= b) {
|
|
1584
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1522
1585
|
}
|
|
1523
|
-
return ok(r);
|
|
1586
|
+
return OutcomeData.ok(r);
|
|
1524
1587
|
};
|
|
1525
1588
|
var branch_gt_u_imm = (r, args, registers) => {
|
|
1526
|
-
const b = u64(u32SignExtend(args.b));
|
|
1527
|
-
if (registers[reg(args.a)] > b) {
|
|
1528
|
-
return staticJump(r, args.c);
|
|
1589
|
+
const b = u64(Inst.u32SignExtend(args.b));
|
|
1590
|
+
if (registers[Inst.reg(args.a)] > b) {
|
|
1591
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1529
1592
|
}
|
|
1530
|
-
return ok(r);
|
|
1593
|
+
return OutcomeData.ok(r);
|
|
1531
1594
|
};
|
|
1532
1595
|
var branch_lt_s_imm = (r, args, registers) => {
|
|
1533
|
-
if (i64(registers[reg(args.a)]) < i64(u32SignExtend(args.b))) {
|
|
1534
|
-
return staticJump(r, args.c);
|
|
1596
|
+
if (i64(registers[Inst.reg(args.a)]) < i64(Inst.u32SignExtend(args.b))) {
|
|
1597
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1535
1598
|
}
|
|
1536
|
-
return ok(r);
|
|
1599
|
+
return OutcomeData.ok(r);
|
|
1537
1600
|
};
|
|
1538
1601
|
var branch_le_s_imm = (r, args, registers) => {
|
|
1539
|
-
if (i64(registers[reg(args.a)]) <= i64(u32SignExtend(args.b))) {
|
|
1540
|
-
return staticJump(r, args.c);
|
|
1602
|
+
if (i64(registers[Inst.reg(args.a)]) <= i64(Inst.u32SignExtend(args.b))) {
|
|
1603
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1541
1604
|
}
|
|
1542
|
-
return ok(r);
|
|
1605
|
+
return OutcomeData.ok(r);
|
|
1543
1606
|
};
|
|
1544
1607
|
var branch_ge_s_imm = (r, args, registers) => {
|
|
1545
|
-
if (i64(registers[reg(args.a)]) >= i64(u32SignExtend(args.b))) {
|
|
1546
|
-
return staticJump(r, args.c);
|
|
1608
|
+
if (i64(registers[Inst.reg(args.a)]) >= i64(Inst.u32SignExtend(args.b))) {
|
|
1609
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1547
1610
|
}
|
|
1548
|
-
return ok(r);
|
|
1611
|
+
return OutcomeData.ok(r);
|
|
1549
1612
|
};
|
|
1550
1613
|
var branch_gt_s_imm = (r, args, registers) => {
|
|
1551
|
-
if (i64(registers[reg(args.a)]) > i64(u32SignExtend(args.b))) {
|
|
1552
|
-
return staticJump(r, args.c);
|
|
1614
|
+
if (i64(registers[Inst.reg(args.a)]) > i64(Inst.u32SignExtend(args.b))) {
|
|
1615
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1553
1616
|
}
|
|
1554
|
-
return ok(r);
|
|
1617
|
+
return OutcomeData.ok(r);
|
|
1555
1618
|
};
|
|
1556
1619
|
var branch_eq = (r, args, registers) => {
|
|
1557
|
-
if (registers[reg(args.a)] === registers[reg(args.b)]) {
|
|
1558
|
-
return staticJump(r, args.c);
|
|
1620
|
+
if (registers[Inst.reg(args.a)] === registers[Inst.reg(args.b)]) {
|
|
1621
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1559
1622
|
}
|
|
1560
|
-
return ok(r);
|
|
1623
|
+
return OutcomeData.ok(r);
|
|
1561
1624
|
};
|
|
1562
1625
|
var branch_ne = (r, args, registers) => {
|
|
1563
|
-
if (registers[reg(args.a)] !== registers[reg(args.b)]) {
|
|
1564
|
-
return staticJump(r, args.c);
|
|
1626
|
+
if (registers[Inst.reg(args.a)] !== registers[Inst.reg(args.b)]) {
|
|
1627
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1565
1628
|
}
|
|
1566
|
-
return ok(r);
|
|
1629
|
+
return OutcomeData.ok(r);
|
|
1567
1630
|
};
|
|
1568
1631
|
var branch_lt_u = (r, args, registers) => {
|
|
1569
|
-
if (registers[reg(args.b)] < registers[reg(args.a)]) {
|
|
1570
|
-
return staticJump(r, args.c);
|
|
1632
|
+
if (registers[Inst.reg(args.b)] < registers[Inst.reg(args.a)]) {
|
|
1633
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1571
1634
|
}
|
|
1572
|
-
return ok(r);
|
|
1635
|
+
return OutcomeData.ok(r);
|
|
1573
1636
|
};
|
|
1574
1637
|
var branch_lt_s = (r, args, registers) => {
|
|
1575
|
-
if (i64(registers[reg(args.b)]) < i64(registers[reg(args.a)])) {
|
|
1576
|
-
return staticJump(r, args.c);
|
|
1638
|
+
if (i64(registers[Inst.reg(args.b)]) < i64(registers[Inst.reg(args.a)])) {
|
|
1639
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1577
1640
|
}
|
|
1578
|
-
return ok(r);
|
|
1641
|
+
return OutcomeData.ok(r);
|
|
1579
1642
|
};
|
|
1580
1643
|
var branch_ge_u = (r, args, registers) => {
|
|
1581
|
-
if (registers[reg(args.b)] >= registers[reg(args.a)]) {
|
|
1582
|
-
return staticJump(r, args.c);
|
|
1644
|
+
if (registers[Inst.reg(args.b)] >= registers[Inst.reg(args.a)]) {
|
|
1645
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1583
1646
|
}
|
|
1584
|
-
return ok(r);
|
|
1647
|
+
return OutcomeData.ok(r);
|
|
1585
1648
|
};
|
|
1586
1649
|
var branch_ge_s = (r, args, registers) => {
|
|
1587
|
-
if (i64(registers[reg(args.b)]) >= i64(registers[reg(args.a)])) {
|
|
1588
|
-
return staticJump(r, args.c);
|
|
1650
|
+
if (i64(registers[Inst.reg(args.b)]) >= i64(registers[Inst.reg(args.a)])) {
|
|
1651
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1589
1652
|
}
|
|
1590
|
-
return ok(r);
|
|
1653
|
+
return OutcomeData.ok(r);
|
|
1591
1654
|
};
|
|
1592
1655
|
|
|
1593
1656
|
// dist/build/js/assembly/instructions/jump.js
|
|
1594
|
-
var jump = (r, args) => staticJump(r, args.a);
|
|
1657
|
+
var jump = (r, args) => OutcomeData.staticJump(r, args.a);
|
|
1595
1658
|
var jump_ind = (r, args, registers) => {
|
|
1596
|
-
const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.b)));
|
|
1597
|
-
return dJump(r, address);
|
|
1659
|
+
const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.b)));
|
|
1660
|
+
return OutcomeData.dJump(r, address);
|
|
1598
1661
|
};
|
|
1599
1662
|
var load_imm_jump = (r, args, registers) => {
|
|
1600
|
-
registers[reg(args.a)] = u32SignExtend(args.b);
|
|
1601
|
-
return staticJump(r, args.c);
|
|
1663
|
+
registers[Inst.reg(args.a)] = Inst.u32SignExtend(args.b);
|
|
1664
|
+
return OutcomeData.staticJump(r, args.c);
|
|
1602
1665
|
};
|
|
1603
1666
|
var load_imm_jump_ind = (r, args, registers) => {
|
|
1604
|
-
const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.d)));
|
|
1605
|
-
registers[reg(args.b)] = u32SignExtend(args.c);
|
|
1606
|
-
return dJump(r, address);
|
|
1667
|
+
const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.d)));
|
|
1668
|
+
registers[Inst.reg(args.b)] = Inst.u32SignExtend(args.c);
|
|
1669
|
+
return OutcomeData.dJump(r, address);
|
|
1607
1670
|
};
|
|
1608
1671
|
|
|
1609
1672
|
// dist/build/js/assembly/memory-page.js
|
|
1610
|
-
var
|
|
1673
|
+
var __decorate6 = function(decorators, target, key, desc) {
|
|
1611
1674
|
var c = arguments.length, r = c < 3 ? target : desc === null ? desc = Object.getOwnPropertyDescriptor(target, key) : desc, d;
|
|
1612
1675
|
if (typeof Reflect === "object" && typeof Reflect.decorate === "function") r = Reflect.decorate(decorators, target, key, desc);
|
|
1613
1676
|
else for (var i = decorators.length - 1; i >= 0; i--) if (d = decorators[i]) r = (c < 3 ? d(r) : c > 3 ? d(target, key, r) : d(target, key)) || r;
|
|
@@ -1634,7 +1697,7 @@ var Page = class {
|
|
|
1634
1697
|
return this.access === Access.Write || this.access === access;
|
|
1635
1698
|
}
|
|
1636
1699
|
};
|
|
1637
|
-
|
|
1700
|
+
__decorate6([
|
|
1638
1701
|
inline
|
|
1639
1702
|
], Page.prototype, "can", null);
|
|
1640
1703
|
var RawPage = class {
|
|
@@ -1646,7 +1709,7 @@ var RawPage = class {
|
|
|
1646
1709
|
return this.page;
|
|
1647
1710
|
}
|
|
1648
1711
|
};
|
|
1649
|
-
|
|
1712
|
+
__decorate6([
|
|
1650
1713
|
inline
|
|
1651
1714
|
], RawPage.prototype, "data", null);
|
|
1652
1715
|
var Arena = class {
|
|
@@ -1677,7 +1740,7 @@ var Arena = class {
|
|
|
1677
1740
|
};
|
|
1678
1741
|
|
|
1679
1742
|
// dist/build/js/assembly/memory.js
|
|
1680
|
-
var
|
|
1743
|
+
var __decorate7 = function(decorators, target, key, desc) {
|
|
1681
1744
|
var c = arguments.length, r = c < 3 ? target : desc === null ? desc = Object.getOwnPropertyDescriptor(target, key) : desc, d;
|
|
1682
1745
|
if (typeof Reflect === "object" && typeof Reflect.decorate === "function") r = Reflect.decorate(decorators, target, key, desc);
|
|
1683
1746
|
else for (var i = decorators.length - 1; i >= 0; i--) if (d = decorators[i]) r = (c < 3 ? d(r) : c > 3 ? d(target, key, r) : d(target, key)) || r;
|
|
@@ -1740,10 +1803,10 @@ var PageCache = class {
|
|
|
1740
1803
|
}
|
|
1741
1804
|
}
|
|
1742
1805
|
};
|
|
1743
|
-
|
|
1806
|
+
__decorate7([
|
|
1744
1807
|
inline
|
|
1745
1808
|
], PageCache.prototype, "lookup", null);
|
|
1746
|
-
|
|
1809
|
+
__decorate7([
|
|
1747
1810
|
inline
|
|
1748
1811
|
], PageCache.prototype, "insert", null);
|
|
1749
1812
|
var MemoryBuilder = class {
|
|
@@ -1880,6 +1943,7 @@ var Memory = class {
|
|
|
1880
1943
|
this.sbrkAddress = u32(newSbrk);
|
|
1881
1944
|
const pageIdx = i32(portable.u64_sub(newSbrk, u64(1)) >> u64(PAGE_SIZE_SHIFT));
|
|
1882
1945
|
if (pageIdx === this.lastAllocatedPage) {
|
|
1946
|
+
faultRes4.isFault = false;
|
|
1883
1947
|
return freeMemoryStart;
|
|
1884
1948
|
}
|
|
1885
1949
|
for (let i = this.lastAllocatedPage + 1; i <= pageIdx; i++) {
|
|
@@ -1889,6 +1953,7 @@ var Memory = class {
|
|
|
1889
1953
|
this.cache.insert(i, page);
|
|
1890
1954
|
}
|
|
1891
1955
|
this.lastAllocatedPage = pageIdx;
|
|
1956
|
+
faultRes4.isFault = false;
|
|
1892
1957
|
return freeMemoryStart;
|
|
1893
1958
|
}
|
|
1894
1959
|
getU8(faultRes4, address) {
|
|
@@ -1904,13 +1969,13 @@ var Memory = class {
|
|
|
1904
1969
|
return portable.bswap_u64(this.getBytesReversed(faultRes4, Access.Read, address, 8));
|
|
1905
1970
|
}
|
|
1906
1971
|
getI8(faultRes4, address) {
|
|
1907
|
-
return u8SignExtend(u8(this.getU8(faultRes4, address)));
|
|
1972
|
+
return Inst.u8SignExtend(u8(this.getU8(faultRes4, address)));
|
|
1908
1973
|
}
|
|
1909
1974
|
getI16(faultRes4, address) {
|
|
1910
|
-
return u16SignExtend(u16(this.getU16(faultRes4, address)));
|
|
1975
|
+
return Inst.u16SignExtend(u16(this.getU16(faultRes4, address)));
|
|
1911
1976
|
}
|
|
1912
1977
|
getI32(faultRes4, address) {
|
|
1913
|
-
return u32SignExtend(u32(this.getU32(faultRes4, address)));
|
|
1978
|
+
return Inst.u32SignExtend(u32(this.getU32(faultRes4, address)));
|
|
1914
1979
|
}
|
|
1915
1980
|
setU8(faultRes4, address, value) {
|
|
1916
1981
|
this.setBytes(faultRes4, address, value, 1);
|
|
@@ -2084,7 +2149,7 @@ var Memory = class {
|
|
|
2084
2149
|
return;
|
|
2085
2150
|
}
|
|
2086
2151
|
let bytesLeft = u64(value);
|
|
2087
|
-
const firstPageEnd = minU32(PAGE_SIZE, r.firstPageOffset + bytes);
|
|
2152
|
+
const firstPageEnd = IntMath.minU32(PAGE_SIZE, r.firstPageOffset + bytes);
|
|
2088
2153
|
for (let i = r.firstPageOffset; i < firstPageEnd; i++) {
|
|
2089
2154
|
r.firstPageData[i] = u8(bytesLeft);
|
|
2090
2155
|
bytesLeft >>= u64(8);
|
|
@@ -2100,7 +2165,7 @@ var Memory = class {
|
|
|
2100
2165
|
return u64(0);
|
|
2101
2166
|
}
|
|
2102
2167
|
let r = u64(0);
|
|
2103
|
-
const firstPageEnd = minU32(PAGE_SIZE, this.chunksResult.firstPageOffset + bytes);
|
|
2168
|
+
const firstPageEnd = IntMath.minU32(PAGE_SIZE, this.chunksResult.firstPageOffset + bytes);
|
|
2104
2169
|
for (let i = this.chunksResult.firstPageOffset; i < firstPageEnd; i++) {
|
|
2105
2170
|
r = r << u64(8) | u64(this.chunksResult.firstPageData[i]);
|
|
2106
2171
|
}
|
|
@@ -2119,419 +2184,419 @@ function fault(r, address) {
|
|
|
2119
2184
|
// dist/build/js/assembly/instructions/load.js
|
|
2120
2185
|
var faultRes = new MaybePageFault();
|
|
2121
2186
|
var load_imm_64 = (r, args, registers) => {
|
|
2122
|
-
registers[reg(args.a)] = portable.u64_add(u64(args.b), u64(args.c) << u64(32));
|
|
2123
|
-
return ok(r);
|
|
2187
|
+
registers[Inst.reg(args.a)] = portable.u64_add(u64(args.b), u64(args.c) << u64(32));
|
|
2188
|
+
return OutcomeData.ok(r);
|
|
2124
2189
|
};
|
|
2125
2190
|
var load_imm = (r, args, registers) => {
|
|
2126
|
-
registers[reg(args.a)] = u32SignExtend(args.b);
|
|
2127
|
-
return ok(r);
|
|
2191
|
+
registers[Inst.reg(args.a)] = Inst.u32SignExtend(args.b);
|
|
2192
|
+
return OutcomeData.ok(r);
|
|
2128
2193
|
};
|
|
2129
2194
|
var load_u8 = (r, args, registers, memory) => {
|
|
2130
2195
|
const result = memory.getU8(faultRes, args.b);
|
|
2131
2196
|
if (!faultRes.isFault) {
|
|
2132
|
-
registers[reg(args.a)] = result;
|
|
2197
|
+
registers[Inst.reg(args.a)] = result;
|
|
2133
2198
|
}
|
|
2134
|
-
return okOrFault(r, faultRes);
|
|
2199
|
+
return OutcomeData.okOrFault(r, faultRes);
|
|
2135
2200
|
};
|
|
2136
2201
|
var load_i8 = (r, args, registers, memory) => {
|
|
2137
2202
|
const result = memory.getI8(faultRes, args.b);
|
|
2138
2203
|
if (!faultRes.isFault) {
|
|
2139
|
-
registers[reg(args.a)] = result;
|
|
2204
|
+
registers[Inst.reg(args.a)] = result;
|
|
2140
2205
|
}
|
|
2141
|
-
return okOrFault(r, faultRes);
|
|
2206
|
+
return OutcomeData.okOrFault(r, faultRes);
|
|
2142
2207
|
};
|
|
2143
2208
|
var load_u16 = (r, args, registers, memory) => {
|
|
2144
2209
|
const result = memory.getU16(faultRes, args.b);
|
|
2145
2210
|
if (!faultRes.isFault) {
|
|
2146
|
-
registers[reg(args.a)] = result;
|
|
2211
|
+
registers[Inst.reg(args.a)] = result;
|
|
2147
2212
|
}
|
|
2148
|
-
return okOrFault(r, faultRes);
|
|
2213
|
+
return OutcomeData.okOrFault(r, faultRes);
|
|
2149
2214
|
};
|
|
2150
2215
|
var load_i16 = (r, args, registers, memory) => {
|
|
2151
2216
|
const result = memory.getI16(faultRes, args.b);
|
|
2152
2217
|
if (!faultRes.isFault) {
|
|
2153
|
-
registers[reg(args.a)] = result;
|
|
2218
|
+
registers[Inst.reg(args.a)] = result;
|
|
2154
2219
|
}
|
|
2155
|
-
return okOrFault(r, faultRes);
|
|
2220
|
+
return OutcomeData.okOrFault(r, faultRes);
|
|
2156
2221
|
};
|
|
2157
2222
|
var load_u32 = (r, args, registers, memory) => {
|
|
2158
2223
|
const result = memory.getU32(faultRes, args.b);
|
|
2159
2224
|
if (!faultRes.isFault) {
|
|
2160
|
-
registers[reg(args.a)] = result;
|
|
2225
|
+
registers[Inst.reg(args.a)] = result;
|
|
2161
2226
|
}
|
|
2162
|
-
return okOrFault(r, faultRes);
|
|
2227
|
+
return OutcomeData.okOrFault(r, faultRes);
|
|
2163
2228
|
};
|
|
2164
2229
|
var load_i32 = (r, args, registers, memory) => {
|
|
2165
2230
|
const result = memory.getI32(faultRes, args.b);
|
|
2166
2231
|
if (!faultRes.isFault) {
|
|
2167
|
-
registers[reg(args.a)] = result;
|
|
2232
|
+
registers[Inst.reg(args.a)] = result;
|
|
2168
2233
|
}
|
|
2169
|
-
return okOrFault(r, faultRes);
|
|
2234
|
+
return OutcomeData.okOrFault(r, faultRes);
|
|
2170
2235
|
};
|
|
2171
2236
|
var load_u64 = (r, args, registers, memory) => {
|
|
2172
2237
|
const result = memory.getU64(faultRes, args.b);
|
|
2173
2238
|
if (!faultRes.isFault) {
|
|
2174
|
-
registers[reg(args.a)] = result;
|
|
2239
|
+
registers[Inst.reg(args.a)] = result;
|
|
2175
2240
|
}
|
|
2176
|
-
return okOrFault(r, faultRes);
|
|
2241
|
+
return OutcomeData.okOrFault(r, faultRes);
|
|
2177
2242
|
};
|
|
2178
2243
|
var load_ind_u8 = (r, args, registers, memory) => {
|
|
2179
|
-
const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
|
|
2244
|
+
const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
|
|
2180
2245
|
const result = memory.getU8(faultRes, address);
|
|
2181
2246
|
if (!faultRes.isFault) {
|
|
2182
|
-
registers[reg(args.b)] = result;
|
|
2247
|
+
registers[Inst.reg(args.b)] = result;
|
|
2183
2248
|
}
|
|
2184
|
-
return okOrFault(r, faultRes);
|
|
2249
|
+
return OutcomeData.okOrFault(r, faultRes);
|
|
2185
2250
|
};
|
|
2186
2251
|
var load_ind_i8 = (r, args, registers, memory) => {
|
|
2187
|
-
const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
|
|
2252
|
+
const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
|
|
2188
2253
|
const result = memory.getI8(faultRes, address);
|
|
2189
2254
|
if (!faultRes.isFault) {
|
|
2190
|
-
registers[reg(args.b)] = result;
|
|
2255
|
+
registers[Inst.reg(args.b)] = result;
|
|
2191
2256
|
}
|
|
2192
|
-
return okOrFault(r, faultRes);
|
|
2257
|
+
return OutcomeData.okOrFault(r, faultRes);
|
|
2193
2258
|
};
|
|
2194
2259
|
var load_ind_u16 = (r, args, registers, memory) => {
|
|
2195
|
-
const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
|
|
2260
|
+
const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
|
|
2196
2261
|
const result = memory.getU16(faultRes, address);
|
|
2197
2262
|
if (!faultRes.isFault) {
|
|
2198
|
-
registers[reg(args.b)] = result;
|
|
2263
|
+
registers[Inst.reg(args.b)] = result;
|
|
2199
2264
|
}
|
|
2200
|
-
return okOrFault(r, faultRes);
|
|
2265
|
+
return OutcomeData.okOrFault(r, faultRes);
|
|
2201
2266
|
};
|
|
2202
2267
|
var load_ind_i16 = (r, args, registers, memory) => {
|
|
2203
|
-
const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
|
|
2268
|
+
const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
|
|
2204
2269
|
const result = memory.getI16(faultRes, address);
|
|
2205
2270
|
if (!faultRes.isFault) {
|
|
2206
|
-
registers[reg(args.b)] = result;
|
|
2271
|
+
registers[Inst.reg(args.b)] = result;
|
|
2207
2272
|
}
|
|
2208
|
-
return okOrFault(r, faultRes);
|
|
2273
|
+
return OutcomeData.okOrFault(r, faultRes);
|
|
2209
2274
|
};
|
|
2210
2275
|
var load_ind_u32 = (r, args, registers, memory) => {
|
|
2211
|
-
const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
|
|
2276
|
+
const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
|
|
2212
2277
|
const result = memory.getU32(faultRes, address);
|
|
2213
2278
|
if (!faultRes.isFault) {
|
|
2214
|
-
registers[reg(args.b)] = result;
|
|
2279
|
+
registers[Inst.reg(args.b)] = result;
|
|
2215
2280
|
}
|
|
2216
|
-
return okOrFault(r, faultRes);
|
|
2281
|
+
return OutcomeData.okOrFault(r, faultRes);
|
|
2217
2282
|
};
|
|
2218
2283
|
var load_ind_i32 = (r, args, registers, memory) => {
|
|
2219
|
-
const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
|
|
2284
|
+
const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
|
|
2220
2285
|
const result = memory.getI32(faultRes, address);
|
|
2221
2286
|
if (!faultRes.isFault) {
|
|
2222
|
-
registers[reg(args.b)] = result;
|
|
2287
|
+
registers[Inst.reg(args.b)] = result;
|
|
2223
2288
|
}
|
|
2224
|
-
return okOrFault(r, faultRes);
|
|
2289
|
+
return OutcomeData.okOrFault(r, faultRes);
|
|
2225
2290
|
};
|
|
2226
2291
|
var load_ind_u64 = (r, args, registers, memory) => {
|
|
2227
|
-
const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
|
|
2292
|
+
const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
|
|
2228
2293
|
const result = memory.getU64(faultRes, u32(address));
|
|
2229
2294
|
if (!faultRes.isFault) {
|
|
2230
|
-
registers[reg(args.b)] = result;
|
|
2295
|
+
registers[Inst.reg(args.b)] = result;
|
|
2231
2296
|
}
|
|
2232
|
-
return okOrFault(r, faultRes);
|
|
2297
|
+
return OutcomeData.okOrFault(r, faultRes);
|
|
2233
2298
|
};
|
|
2234
2299
|
|
|
2235
2300
|
// dist/build/js/assembly/instructions/logic.js
|
|
2236
2301
|
var and_imm = (r, args, registers) => {
|
|
2237
|
-
registers[reg(args.b)] = registers[reg(args.a)] & u32SignExtend(args.c);
|
|
2238
|
-
return ok(r);
|
|
2302
|
+
registers[Inst.reg(args.b)] = registers[Inst.reg(args.a)] & Inst.u32SignExtend(args.c);
|
|
2303
|
+
return OutcomeData.ok(r);
|
|
2239
2304
|
};
|
|
2240
2305
|
var xor_imm = (r, args, registers) => {
|
|
2241
|
-
registers[reg(args.b)] = registers[reg(args.a)] ^ u32SignExtend(args.c);
|
|
2242
|
-
return ok(r);
|
|
2306
|
+
registers[Inst.reg(args.b)] = registers[Inst.reg(args.a)] ^ Inst.u32SignExtend(args.c);
|
|
2307
|
+
return OutcomeData.ok(r);
|
|
2243
2308
|
};
|
|
2244
2309
|
var or_imm = (r, args, registers) => {
|
|
2245
|
-
registers[reg(args.b)] = registers[reg(args.a)] | u32SignExtend(args.c);
|
|
2246
|
-
return ok(r);
|
|
2310
|
+
registers[Inst.reg(args.b)] = registers[Inst.reg(args.a)] | Inst.u32SignExtend(args.c);
|
|
2311
|
+
return OutcomeData.ok(r);
|
|
2247
2312
|
};
|
|
2248
2313
|
var and = (r, args, registers) => {
|
|
2249
|
-
registers[reg(args.c)] = registers[reg(args.b)] & registers[reg(args.a)];
|
|
2250
|
-
return ok(r);
|
|
2314
|
+
registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] & registers[Inst.reg(args.a)];
|
|
2315
|
+
return OutcomeData.ok(r);
|
|
2251
2316
|
};
|
|
2252
2317
|
var xor = (r, args, registers) => {
|
|
2253
|
-
registers[reg(args.c)] = registers[reg(args.b)] ^ registers[reg(args.a)];
|
|
2254
|
-
return ok(r);
|
|
2318
|
+
registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] ^ registers[Inst.reg(args.a)];
|
|
2319
|
+
return OutcomeData.ok(r);
|
|
2255
2320
|
};
|
|
2256
2321
|
var or = (r, args, registers) => {
|
|
2257
|
-
registers[reg(args.c)] = registers[reg(args.b)] | registers[reg(args.a)];
|
|
2258
|
-
return ok(r);
|
|
2322
|
+
registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] | registers[Inst.reg(args.a)];
|
|
2323
|
+
return OutcomeData.ok(r);
|
|
2259
2324
|
};
|
|
2260
2325
|
var and_inv = (r, args, registers) => {
|
|
2261
|
-
registers[reg(args.c)] = registers[reg(args.b)] & ~registers[reg(args.a)];
|
|
2262
|
-
return ok(r);
|
|
2326
|
+
registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] & ~registers[Inst.reg(args.a)];
|
|
2327
|
+
return OutcomeData.ok(r);
|
|
2263
2328
|
};
|
|
2264
2329
|
var or_inv = (r, args, registers) => {
|
|
2265
|
-
registers[reg(args.c)] = u64(registers[reg(args.b)] | ~registers[reg(args.a)]);
|
|
2266
|
-
return ok(r);
|
|
2330
|
+
registers[Inst.reg(args.c)] = u64(registers[Inst.reg(args.b)] | ~registers[Inst.reg(args.a)]);
|
|
2331
|
+
return OutcomeData.ok(r);
|
|
2267
2332
|
};
|
|
2268
2333
|
var xnor = (r, args, registers) => {
|
|
2269
|
-
registers[reg(args.c)] = u64(~(registers[reg(args.b)] ^ registers[reg(args.a)]));
|
|
2270
|
-
return ok(r);
|
|
2334
|
+
registers[Inst.reg(args.c)] = u64(~(registers[Inst.reg(args.b)] ^ registers[Inst.reg(args.a)]));
|
|
2335
|
+
return OutcomeData.ok(r);
|
|
2271
2336
|
};
|
|
2272
2337
|
|
|
2273
2338
|
// dist/build/js/assembly/instructions/math.js
|
|
2274
2339
|
var add_imm_32 = (r, args, registers) => {
|
|
2275
|
-
const a = registers[reg(args.a)];
|
|
2276
|
-
const c = u32SignExtend(args.c);
|
|
2277
|
-
registers[reg(args.b)] = u32SignExtend(u32(portable.u64_add(a, c)));
|
|
2278
|
-
return ok(r);
|
|
2340
|
+
const a = registers[Inst.reg(args.a)];
|
|
2341
|
+
const c = Inst.u32SignExtend(args.c);
|
|
2342
|
+
registers[Inst.reg(args.b)] = Inst.u32SignExtend(u32(portable.u64_add(a, c)));
|
|
2343
|
+
return OutcomeData.ok(r);
|
|
2279
2344
|
};
|
|
2280
2345
|
var mul_imm_32 = (r, args, registers) => {
|
|
2281
|
-
registers[reg(args.b)] = u32SignExtend(u32(portable.u64_mul(registers[reg(args.a)], u64(args.c))));
|
|
2282
|
-
return ok(r);
|
|
2346
|
+
registers[Inst.reg(args.b)] = Inst.u32SignExtend(u32(portable.u64_mul(registers[Inst.reg(args.a)], u64(args.c))));
|
|
2347
|
+
return OutcomeData.ok(r);
|
|
2283
2348
|
};
|
|
2284
2349
|
var neg_add_imm_32 = (r, args, registers) => {
|
|
2285
|
-
const sum = portable.u64_sub(u64(args.c) | u64(4294967296), registers[reg(args.a)]);
|
|
2286
|
-
registers[reg(args.b)] = u32SignExtend(u32(sum));
|
|
2287
|
-
return ok(r);
|
|
2350
|
+
const sum = portable.u64_sub(u64(args.c) | u64(4294967296), registers[Inst.reg(args.a)]);
|
|
2351
|
+
registers[Inst.reg(args.b)] = Inst.u32SignExtend(u32(sum));
|
|
2352
|
+
return OutcomeData.ok(r);
|
|
2288
2353
|
};
|
|
2289
2354
|
var add_imm = (r, args, registers) => {
|
|
2290
|
-
const sum = portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c));
|
|
2291
|
-
registers[reg(args.b)] = sum;
|
|
2292
|
-
return ok(r);
|
|
2355
|
+
const sum = portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c));
|
|
2356
|
+
registers[Inst.reg(args.b)] = sum;
|
|
2357
|
+
return OutcomeData.ok(r);
|
|
2293
2358
|
};
|
|
2294
2359
|
var mul_imm = (r, args, registers) => {
|
|
2295
|
-
registers[reg(args.b)] = portable.u64_mul(registers[reg(args.a)], u32SignExtend(args.c));
|
|
2296
|
-
return ok(r);
|
|
2360
|
+
registers[Inst.reg(args.b)] = portable.u64_mul(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c));
|
|
2361
|
+
return OutcomeData.ok(r);
|
|
2297
2362
|
};
|
|
2298
2363
|
var neg_add_imm = (r, args, registers) => {
|
|
2299
|
-
const sum = portable.u64_sub(u32SignExtend(args.c), registers[reg(args.a)]);
|
|
2300
|
-
registers[reg(args.b)] = sum;
|
|
2301
|
-
return ok(r);
|
|
2364
|
+
const sum = portable.u64_sub(Inst.u32SignExtend(args.c), registers[Inst.reg(args.a)]);
|
|
2365
|
+
registers[Inst.reg(args.b)] = sum;
|
|
2366
|
+
return OutcomeData.ok(r);
|
|
2302
2367
|
};
|
|
2303
2368
|
var add_32 = (r, args, registers) => {
|
|
2304
|
-
const a = u32(registers[reg(args.a)]);
|
|
2305
|
-
const b = u32(registers[reg(args.b)]);
|
|
2306
|
-
registers[reg(args.c)] = u32SignExtend(a + b);
|
|
2307
|
-
return ok(r);
|
|
2369
|
+
const a = u32(registers[Inst.reg(args.a)]);
|
|
2370
|
+
const b = u32(registers[Inst.reg(args.b)]);
|
|
2371
|
+
registers[Inst.reg(args.c)] = Inst.u32SignExtend(a + b);
|
|
2372
|
+
return OutcomeData.ok(r);
|
|
2308
2373
|
};
|
|
2309
2374
|
var sub_32 = (r, args, registers) => {
|
|
2310
|
-
const a = registers[reg(args.b)];
|
|
2311
|
-
const b = u64(4294967296 - u32(registers[reg(args.a)]));
|
|
2312
|
-
registers[reg(args.c)] = u32SignExtend(u32(portable.u64_add(a, b)));
|
|
2313
|
-
return ok(r);
|
|
2375
|
+
const a = registers[Inst.reg(args.b)];
|
|
2376
|
+
const b = u64(4294967296 - u32(registers[Inst.reg(args.a)]));
|
|
2377
|
+
registers[Inst.reg(args.c)] = Inst.u32SignExtend(u32(portable.u64_add(a, b)));
|
|
2378
|
+
return OutcomeData.ok(r);
|
|
2314
2379
|
};
|
|
2315
2380
|
var mul_32 = (r, args, registers) => {
|
|
2316
|
-
registers[reg(args.c)] = u32SignExtend(u32(portable.u64_mul(registers[reg(args.a)], registers[reg(args.b)])));
|
|
2317
|
-
return ok(r);
|
|
2381
|
+
registers[Inst.reg(args.c)] = Inst.u32SignExtend(u32(portable.u64_mul(registers[Inst.reg(args.a)], registers[Inst.reg(args.b)])));
|
|
2382
|
+
return OutcomeData.ok(r);
|
|
2318
2383
|
};
|
|
2319
2384
|
var div_u_32 = (r, args, registers) => {
|
|
2320
|
-
const a = u32(registers[reg(args.a)]);
|
|
2385
|
+
const a = u32(registers[Inst.reg(args.a)]);
|
|
2321
2386
|
if (a === 0) {
|
|
2322
|
-
registers[reg(args.c)] = u64.MAX_VALUE;
|
|
2387
|
+
registers[Inst.reg(args.c)] = u64.MAX_VALUE;
|
|
2323
2388
|
} else {
|
|
2324
|
-
const b = u32(registers[reg(args.b)]);
|
|
2325
|
-
registers[reg(args.c)] = u32SignExtend(b / a);
|
|
2389
|
+
const b = u32(registers[Inst.reg(args.b)]);
|
|
2390
|
+
registers[Inst.reg(args.c)] = Inst.u32SignExtend(b / a);
|
|
2326
2391
|
}
|
|
2327
|
-
return ok(r);
|
|
2392
|
+
return OutcomeData.ok(r);
|
|
2328
2393
|
};
|
|
2329
2394
|
var div_s_32 = (r, args, registers) => {
|
|
2330
|
-
const b = i64(u32SignExtend(u32(registers[reg(args.b)])));
|
|
2331
|
-
const a = i64(u32SignExtend(u32(registers[reg(args.a)])));
|
|
2395
|
+
const b = i64(Inst.u32SignExtend(u32(registers[Inst.reg(args.b)])));
|
|
2396
|
+
const a = i64(Inst.u32SignExtend(u32(registers[Inst.reg(args.a)])));
|
|
2332
2397
|
if (a === i64(0)) {
|
|
2333
|
-
registers[reg(args.c)] = u64.MAX_VALUE;
|
|
2398
|
+
registers[Inst.reg(args.c)] = u64.MAX_VALUE;
|
|
2334
2399
|
} else if (a === i64(-1) && b === i64(i32.MIN_VALUE)) {
|
|
2335
|
-
registers[reg(args.c)] = u64(b);
|
|
2400
|
+
registers[Inst.reg(args.c)] = u64(b);
|
|
2336
2401
|
} else {
|
|
2337
|
-
registers[reg(args.c)] = u64(b / a);
|
|
2402
|
+
registers[Inst.reg(args.c)] = u64(b / a);
|
|
2338
2403
|
}
|
|
2339
|
-
return ok(r);
|
|
2404
|
+
return OutcomeData.ok(r);
|
|
2340
2405
|
};
|
|
2341
2406
|
var rem_u_32 = (r, args, registers) => {
|
|
2342
|
-
const a = u32(registers[reg(args.a)]);
|
|
2343
|
-
const b = u32(registers[reg(args.b)]);
|
|
2407
|
+
const a = u32(registers[Inst.reg(args.a)]);
|
|
2408
|
+
const b = u32(registers[Inst.reg(args.b)]);
|
|
2344
2409
|
if (a === 0) {
|
|
2345
|
-
registers[reg(args.c)] = u32SignExtend(b);
|
|
2410
|
+
registers[Inst.reg(args.c)] = Inst.u32SignExtend(b);
|
|
2346
2411
|
} else {
|
|
2347
|
-
registers[reg(args.c)] = u32SignExtend(b % a);
|
|
2412
|
+
registers[Inst.reg(args.c)] = Inst.u32SignExtend(b % a);
|
|
2348
2413
|
}
|
|
2349
|
-
return ok(r);
|
|
2414
|
+
return OutcomeData.ok(r);
|
|
2350
2415
|
};
|
|
2351
2416
|
var rem_s_32 = (r, args, registers) => {
|
|
2352
|
-
const b = i32(registers[reg(args.b)]);
|
|
2353
|
-
const a = i32(registers[reg(args.a)]);
|
|
2417
|
+
const b = i32(registers[Inst.reg(args.b)]);
|
|
2418
|
+
const a = i32(registers[Inst.reg(args.a)]);
|
|
2354
2419
|
if (a === 0) {
|
|
2355
|
-
registers[reg(args.c)] = u64(i64(b));
|
|
2420
|
+
registers[Inst.reg(args.c)] = u64(i64(b));
|
|
2356
2421
|
} else if (a === -1 && b === i32.MIN_VALUE) {
|
|
2357
|
-
registers[reg(args.c)] = u64(0);
|
|
2422
|
+
registers[Inst.reg(args.c)] = u64(0);
|
|
2358
2423
|
} else {
|
|
2359
|
-
registers[reg(args.c)] = u64(i64(b) % i64(a));
|
|
2424
|
+
registers[Inst.reg(args.c)] = u64(i64(b) % i64(a));
|
|
2360
2425
|
}
|
|
2361
|
-
return ok(r);
|
|
2426
|
+
return OutcomeData.ok(r);
|
|
2362
2427
|
};
|
|
2363
2428
|
var add_64 = (r, args, registers) => {
|
|
2364
|
-
const a = registers[reg(args.a)];
|
|
2365
|
-
const b = registers[reg(args.b)];
|
|
2366
|
-
registers[reg(args.c)] = portable.u64_add(a, b);
|
|
2367
|
-
return ok(r);
|
|
2429
|
+
const a = registers[Inst.reg(args.a)];
|
|
2430
|
+
const b = registers[Inst.reg(args.b)];
|
|
2431
|
+
registers[Inst.reg(args.c)] = portable.u64_add(a, b);
|
|
2432
|
+
return OutcomeData.ok(r);
|
|
2368
2433
|
};
|
|
2369
2434
|
var sub = (r, args, registers) => {
|
|
2370
|
-
const a = registers[reg(args.a)];
|
|
2371
|
-
const b = registers[reg(args.b)];
|
|
2372
|
-
registers[reg(args.c)] = portable.u64_sub(b, a);
|
|
2373
|
-
return ok(r);
|
|
2435
|
+
const a = registers[Inst.reg(args.a)];
|
|
2436
|
+
const b = registers[Inst.reg(args.b)];
|
|
2437
|
+
registers[Inst.reg(args.c)] = portable.u64_sub(b, a);
|
|
2438
|
+
return OutcomeData.ok(r);
|
|
2374
2439
|
};
|
|
2375
2440
|
var mul = (r, args, registers) => {
|
|
2376
|
-
const a = registers[reg(args.a)];
|
|
2377
|
-
const b = registers[reg(args.b)];
|
|
2378
|
-
registers[reg(args.c)] = portable.u64_mul(a, b);
|
|
2379
|
-
return ok(r);
|
|
2441
|
+
const a = registers[Inst.reg(args.a)];
|
|
2442
|
+
const b = registers[Inst.reg(args.b)];
|
|
2443
|
+
registers[Inst.reg(args.c)] = portable.u64_mul(a, b);
|
|
2444
|
+
return OutcomeData.ok(r);
|
|
2380
2445
|
};
|
|
2381
2446
|
var div_u = (r, args, registers) => {
|
|
2382
|
-
if (registers[reg(args.a)] === u64(0)) {
|
|
2383
|
-
registers[reg(args.c)] = u64.MAX_VALUE;
|
|
2447
|
+
if (registers[Inst.reg(args.a)] === u64(0)) {
|
|
2448
|
+
registers[Inst.reg(args.c)] = u64.MAX_VALUE;
|
|
2384
2449
|
} else {
|
|
2385
|
-
registers[reg(args.c)] = registers[reg(args.b)] / registers[reg(args.a)];
|
|
2450
|
+
registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] / registers[Inst.reg(args.a)];
|
|
2386
2451
|
}
|
|
2387
|
-
return ok(r);
|
|
2452
|
+
return OutcomeData.ok(r);
|
|
2388
2453
|
};
|
|
2389
2454
|
var div_s = (r, args, registers) => {
|
|
2390
|
-
const b = i64(registers[reg(args.b)]);
|
|
2391
|
-
const a = i64(registers[reg(args.a)]);
|
|
2455
|
+
const b = i64(registers[Inst.reg(args.b)]);
|
|
2456
|
+
const a = i64(registers[Inst.reg(args.a)]);
|
|
2392
2457
|
if (a === i64(0)) {
|
|
2393
|
-
registers[reg(args.c)] = u64.MAX_VALUE;
|
|
2458
|
+
registers[Inst.reg(args.c)] = u64.MAX_VALUE;
|
|
2394
2459
|
} else if (a === i64(-1) && b === i64.MIN_VALUE) {
|
|
2395
|
-
registers[reg(args.c)] = u64(b);
|
|
2460
|
+
registers[Inst.reg(args.c)] = u64(b);
|
|
2396
2461
|
} else {
|
|
2397
|
-
registers[reg(args.c)] = u64(b / a);
|
|
2462
|
+
registers[Inst.reg(args.c)] = u64(b / a);
|
|
2398
2463
|
}
|
|
2399
|
-
return ok(r);
|
|
2464
|
+
return OutcomeData.ok(r);
|
|
2400
2465
|
};
|
|
2401
2466
|
var rem_u = (r, args, registers) => {
|
|
2402
|
-
if (registers[reg(args.a)] === u64(0)) {
|
|
2403
|
-
registers[reg(args.c)] = registers[reg(args.b)];
|
|
2467
|
+
if (registers[Inst.reg(args.a)] === u64(0)) {
|
|
2468
|
+
registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)];
|
|
2404
2469
|
} else {
|
|
2405
|
-
registers[reg(args.c)] = registers[reg(args.b)] % registers[reg(args.a)];
|
|
2470
|
+
registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] % registers[Inst.reg(args.a)];
|
|
2406
2471
|
}
|
|
2407
|
-
return ok(r);
|
|
2472
|
+
return OutcomeData.ok(r);
|
|
2408
2473
|
};
|
|
2409
2474
|
var rem_s = (r, args, registers) => {
|
|
2410
|
-
const b = i64(registers[reg(args.b)]);
|
|
2411
|
-
const a = i64(registers[reg(args.a)]);
|
|
2475
|
+
const b = i64(registers[Inst.reg(args.b)]);
|
|
2476
|
+
const a = i64(registers[Inst.reg(args.a)]);
|
|
2412
2477
|
if (a === i64(0)) {
|
|
2413
|
-
registers[reg(args.c)] = u64(b);
|
|
2478
|
+
registers[Inst.reg(args.c)] = u64(b);
|
|
2414
2479
|
} else if (a === i64(-1) && b === i64.MIN_VALUE) {
|
|
2415
|
-
registers[reg(args.c)] = u64(0);
|
|
2480
|
+
registers[Inst.reg(args.c)] = u64(0);
|
|
2416
2481
|
} else {
|
|
2417
|
-
registers[reg(args.c)] = u64(b % a);
|
|
2482
|
+
registers[Inst.reg(args.c)] = u64(b % a);
|
|
2418
2483
|
}
|
|
2419
|
-
return ok(r);
|
|
2484
|
+
return OutcomeData.ok(r);
|
|
2420
2485
|
};
|
|
2421
2486
|
var mul_upper_s_s = (r, args, registers) => {
|
|
2422
|
-
registers[reg(args.c)] = mulUpperSigned(i64(registers[reg(args.b)]), i64(registers[reg(args.a)]));
|
|
2423
|
-
return ok(r);
|
|
2487
|
+
registers[Inst.reg(args.c)] = mulUpperSigned(i64(registers[Inst.reg(args.b)]), i64(registers[Inst.reg(args.a)]));
|
|
2488
|
+
return OutcomeData.ok(r);
|
|
2424
2489
|
};
|
|
2425
2490
|
var mul_upper_u_u = (r, args, registers) => {
|
|
2426
|
-
registers[reg(args.c)] = mulUpperUnsigned(registers[reg(args.b)], registers[reg(args.a)]);
|
|
2427
|
-
return ok(r);
|
|
2491
|
+
registers[Inst.reg(args.c)] = mulUpperUnsigned(registers[Inst.reg(args.b)], registers[Inst.reg(args.a)]);
|
|
2492
|
+
return OutcomeData.ok(r);
|
|
2428
2493
|
};
|
|
2429
2494
|
var mul_upper_s_u = (r, args, registers) => {
|
|
2430
|
-
registers[reg(args.c)] = mulUpperSignedUnsigned(i64(registers[reg(args.b)]), registers[reg(args.a)]);
|
|
2431
|
-
return ok(r);
|
|
2495
|
+
registers[Inst.reg(args.c)] = mulUpperSignedUnsigned(i64(registers[Inst.reg(args.b)]), registers[Inst.reg(args.a)]);
|
|
2496
|
+
return OutcomeData.ok(r);
|
|
2432
2497
|
};
|
|
2433
2498
|
var max = (r, args, registers) => {
|
|
2434
|
-
const a = i64(registers[reg(args.a)]);
|
|
2435
|
-
const b = i64(registers[reg(args.b)]);
|
|
2436
|
-
registers[reg(args.c)] = u64(a < b ? b : a);
|
|
2437
|
-
return ok(r);
|
|
2499
|
+
const a = i64(registers[Inst.reg(args.a)]);
|
|
2500
|
+
const b = i64(registers[Inst.reg(args.b)]);
|
|
2501
|
+
registers[Inst.reg(args.c)] = u64(a < b ? b : a);
|
|
2502
|
+
return OutcomeData.ok(r);
|
|
2438
2503
|
};
|
|
2439
2504
|
var max_u = (r, args, registers) => {
|
|
2440
|
-
const a = registers[reg(args.a)];
|
|
2441
|
-
const b = registers[reg(args.b)];
|
|
2442
|
-
registers[reg(args.c)] = a < b ? b : a;
|
|
2443
|
-
return ok(r);
|
|
2505
|
+
const a = registers[Inst.reg(args.a)];
|
|
2506
|
+
const b = registers[Inst.reg(args.b)];
|
|
2507
|
+
registers[Inst.reg(args.c)] = a < b ? b : a;
|
|
2508
|
+
return OutcomeData.ok(r);
|
|
2444
2509
|
};
|
|
2445
2510
|
var min = (r, args, registers) => {
|
|
2446
|
-
const a = i64(registers[reg(args.a)]);
|
|
2447
|
-
const b = i64(registers[reg(args.b)]);
|
|
2448
|
-
registers[reg(args.c)] = u64(a > b ? b : a);
|
|
2449
|
-
return ok(r);
|
|
2511
|
+
const a = i64(registers[Inst.reg(args.a)]);
|
|
2512
|
+
const b = i64(registers[Inst.reg(args.b)]);
|
|
2513
|
+
registers[Inst.reg(args.c)] = u64(a > b ? b : a);
|
|
2514
|
+
return OutcomeData.ok(r);
|
|
2450
2515
|
};
|
|
2451
2516
|
var min_u = (r, args, registers) => {
|
|
2452
|
-
const a = registers[reg(args.a)];
|
|
2453
|
-
const b = registers[reg(args.b)];
|
|
2454
|
-
registers[reg(args.c)] = a > b ? b : a;
|
|
2455
|
-
return ok(r);
|
|
2517
|
+
const a = registers[Inst.reg(args.a)];
|
|
2518
|
+
const b = registers[Inst.reg(args.b)];
|
|
2519
|
+
registers[Inst.reg(args.c)] = a > b ? b : a;
|
|
2520
|
+
return OutcomeData.ok(r);
|
|
2456
2521
|
};
|
|
2457
2522
|
|
|
2458
2523
|
// dist/build/js/assembly/instructions/misc.js
|
|
2459
2524
|
var faultRes2 = new MaybePageFault();
|
|
2460
|
-
var INVALID = (r) => panic(r);
|
|
2461
|
-
var trap = (r) => panic(r);
|
|
2462
|
-
var fallthrough = (r) => ok(r);
|
|
2463
|
-
var ecalli = (r, args) => hostCall(r, args.a);
|
|
2525
|
+
var INVALID = (r) => OutcomeData.panic(r);
|
|
2526
|
+
var trap = (r) => OutcomeData.panic(r);
|
|
2527
|
+
var fallthrough = (r) => OutcomeData.ok(r);
|
|
2528
|
+
var ecalli = (r, args) => OutcomeData.hostCall(r, args.a);
|
|
2464
2529
|
var sbrk = (r, args, registers, memory) => {
|
|
2465
|
-
const res = memory.sbrk(faultRes2, u32(registers[reg(args.a)]));
|
|
2530
|
+
const res = memory.sbrk(faultRes2, u32(registers[Inst.reg(args.a)]));
|
|
2466
2531
|
if (faultRes2.isFault) {
|
|
2467
|
-
return okOrFault(r, faultRes2);
|
|
2532
|
+
return OutcomeData.okOrFault(r, faultRes2);
|
|
2468
2533
|
}
|
|
2469
|
-
registers[reg(args.b)] = res;
|
|
2470
|
-
return ok(r);
|
|
2534
|
+
registers[Inst.reg(args.b)] = res;
|
|
2535
|
+
return OutcomeData.ok(r);
|
|
2471
2536
|
};
|
|
2472
2537
|
|
|
2473
2538
|
// dist/build/js/assembly/instructions/mov.js
|
|
2474
2539
|
var move_reg = (r, args, registers) => {
|
|
2475
|
-
registers[reg(args.b)] = registers[reg(args.a)];
|
|
2476
|
-
return ok(r);
|
|
2540
|
+
registers[Inst.reg(args.b)] = registers[Inst.reg(args.a)];
|
|
2541
|
+
return OutcomeData.ok(r);
|
|
2477
2542
|
};
|
|
2478
2543
|
var cmov_iz_imm = (r, args, registers) => {
|
|
2479
|
-
if (registers[reg(args.a)] === u64(0)) {
|
|
2480
|
-
registers[reg(args.b)] = u32SignExtend(args.c);
|
|
2544
|
+
if (registers[Inst.reg(args.a)] === u64(0)) {
|
|
2545
|
+
registers[Inst.reg(args.b)] = Inst.u32SignExtend(args.c);
|
|
2481
2546
|
}
|
|
2482
|
-
return ok(r);
|
|
2547
|
+
return OutcomeData.ok(r);
|
|
2483
2548
|
};
|
|
2484
2549
|
var cmov_nz_imm = (r, args, registers) => {
|
|
2485
|
-
if (registers[reg(args.a)] !== u64(0)) {
|
|
2486
|
-
registers[reg(args.b)] = u32SignExtend(args.c);
|
|
2550
|
+
if (registers[Inst.reg(args.a)] !== u64(0)) {
|
|
2551
|
+
registers[Inst.reg(args.b)] = Inst.u32SignExtend(args.c);
|
|
2487
2552
|
}
|
|
2488
|
-
return ok(r);
|
|
2553
|
+
return OutcomeData.ok(r);
|
|
2489
2554
|
};
|
|
2490
2555
|
var cmov_iz = (r, args, registers) => {
|
|
2491
|
-
if (registers[reg(args.a)] === u64(0)) {
|
|
2492
|
-
registers[reg(args.c)] = registers[reg(args.b)];
|
|
2556
|
+
if (registers[Inst.reg(args.a)] === u64(0)) {
|
|
2557
|
+
registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)];
|
|
2493
2558
|
}
|
|
2494
|
-
return ok(r);
|
|
2559
|
+
return OutcomeData.ok(r);
|
|
2495
2560
|
};
|
|
2496
2561
|
var cmov_nz = (r, args, registers) => {
|
|
2497
|
-
if (registers[reg(args.a)] !== u64(0)) {
|
|
2498
|
-
registers[reg(args.c)] = registers[reg(args.b)];
|
|
2562
|
+
if (registers[Inst.reg(args.a)] !== u64(0)) {
|
|
2563
|
+
registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)];
|
|
2499
2564
|
}
|
|
2500
|
-
return ok(r);
|
|
2565
|
+
return OutcomeData.ok(r);
|
|
2501
2566
|
};
|
|
2502
2567
|
|
|
2503
2568
|
// dist/build/js/assembly/instructions/rot.js
|
|
2504
2569
|
var rot_r_64_imm = (r, args, regs) => {
|
|
2505
|
-
regs[reg(args.b)] = math.rot_r(regs[reg(args.a)], u32SignExtend(args.c));
|
|
2506
|
-
return ok(r);
|
|
2570
|
+
regs[Inst.reg(args.b)] = math.rot_r(regs[Inst.reg(args.a)], Inst.u32SignExtend(args.c));
|
|
2571
|
+
return OutcomeData.ok(r);
|
|
2507
2572
|
};
|
|
2508
2573
|
var rot_r_64_imm_alt = (r, args, regs) => {
|
|
2509
|
-
regs[reg(args.b)] = math.rot_r(u32SignExtend(args.c), regs[reg(args.a)]);
|
|
2510
|
-
return ok(r);
|
|
2574
|
+
regs[Inst.reg(args.b)] = math.rot_r(Inst.u32SignExtend(args.c), regs[Inst.reg(args.a)]);
|
|
2575
|
+
return OutcomeData.ok(r);
|
|
2511
2576
|
};
|
|
2512
2577
|
var rot_r_32_imm = (r, args, regs) => {
|
|
2513
|
-
regs[reg(args.b)] = u32SignExtend(math.rot_r_32(u32(regs[reg(args.a)]), u32(args.c)));
|
|
2514
|
-
return ok(r);
|
|
2578
|
+
regs[Inst.reg(args.b)] = Inst.u32SignExtend(math.rot_r_32(u32(regs[Inst.reg(args.a)]), u32(args.c)));
|
|
2579
|
+
return OutcomeData.ok(r);
|
|
2515
2580
|
};
|
|
2516
2581
|
var rot_r_32_imm_alt = (r, args, regs) => {
|
|
2517
|
-
regs[reg(args.b)] = u32SignExtend(math.rot_r_32(u32(args.c), u32(regs[reg(args.a)])));
|
|
2518
|
-
return ok(r);
|
|
2582
|
+
regs[Inst.reg(args.b)] = Inst.u32SignExtend(math.rot_r_32(u32(args.c), u32(regs[Inst.reg(args.a)])));
|
|
2583
|
+
return OutcomeData.ok(r);
|
|
2519
2584
|
};
|
|
2520
2585
|
var rot_l_64 = (r, args, regs) => {
|
|
2521
|
-
regs[reg(args.c)] = math.rot_l(regs[reg(args.b)], regs[reg(args.a)]);
|
|
2522
|
-
return ok(r);
|
|
2586
|
+
regs[Inst.reg(args.c)] = math.rot_l(regs[Inst.reg(args.b)], regs[Inst.reg(args.a)]);
|
|
2587
|
+
return OutcomeData.ok(r);
|
|
2523
2588
|
};
|
|
2524
2589
|
var rot_l_32 = (r, args, regs) => {
|
|
2525
|
-
regs[reg(args.c)] = u32SignExtend(math.rot_l_32(u32(regs[reg(args.b)]), u32(regs[reg(args.a)])));
|
|
2526
|
-
return ok(r);
|
|
2590
|
+
regs[Inst.reg(args.c)] = Inst.u32SignExtend(math.rot_l_32(u32(regs[Inst.reg(args.b)]), u32(regs[Inst.reg(args.a)])));
|
|
2591
|
+
return OutcomeData.ok(r);
|
|
2527
2592
|
};
|
|
2528
2593
|
var rot_r_64 = (r, args, regs) => {
|
|
2529
|
-
regs[reg(args.c)] = math.rot_r(regs[reg(args.b)], regs[reg(args.a)]);
|
|
2530
|
-
return ok(r);
|
|
2594
|
+
regs[Inst.reg(args.c)] = math.rot_r(regs[Inst.reg(args.b)], regs[Inst.reg(args.a)]);
|
|
2595
|
+
return OutcomeData.ok(r);
|
|
2531
2596
|
};
|
|
2532
2597
|
var rot_r_32 = (r, args, regs) => {
|
|
2533
|
-
regs[reg(args.c)] = u32SignExtend(math.rot_r_32(u32(regs[reg(args.b)]), u32(regs[reg(args.a)])));
|
|
2534
|
-
return ok(r);
|
|
2598
|
+
regs[Inst.reg(args.c)] = Inst.u32SignExtend(math.rot_r_32(u32(regs[Inst.reg(args.b)]), u32(regs[Inst.reg(args.a)])));
|
|
2599
|
+
return OutcomeData.ok(r);
|
|
2535
2600
|
};
|
|
2536
2601
|
var math;
|
|
2537
2602
|
(function(math2) {
|
|
@@ -2555,32 +2620,32 @@ var math;
|
|
|
2555
2620
|
|
|
2556
2621
|
// dist/build/js/assembly/instructions/set.js
|
|
2557
2622
|
var set_lt_u_imm = (r, args, registers) => {
|
|
2558
|
-
const cond = registers[reg(args.a)] < u64(u32SignExtend(args.c));
|
|
2559
|
-
registers[reg(args.b)] = cond ? u64(1) : u64(0);
|
|
2560
|
-
return ok(r);
|
|
2623
|
+
const cond = registers[Inst.reg(args.a)] < u64(Inst.u32SignExtend(args.c));
|
|
2624
|
+
registers[Inst.reg(args.b)] = cond ? u64(1) : u64(0);
|
|
2625
|
+
return OutcomeData.ok(r);
|
|
2561
2626
|
};
|
|
2562
2627
|
var set_lt_s_imm = (r, args, registers) => {
|
|
2563
|
-
const cond = i64(registers[reg(args.a)]) < i64(u32SignExtend(args.c));
|
|
2564
|
-
registers[reg(args.b)] = cond ? u64(1) : u64(0);
|
|
2565
|
-
return ok(r);
|
|
2628
|
+
const cond = i64(registers[Inst.reg(args.a)]) < i64(Inst.u32SignExtend(args.c));
|
|
2629
|
+
registers[Inst.reg(args.b)] = cond ? u64(1) : u64(0);
|
|
2630
|
+
return OutcomeData.ok(r);
|
|
2566
2631
|
};
|
|
2567
2632
|
var set_gt_u_imm = (r, args, registers) => {
|
|
2568
|
-
const cond = registers[reg(args.a)] > u64(u32SignExtend(args.c));
|
|
2569
|
-
registers[reg(args.b)] = cond ? u64(1) : u64(0);
|
|
2570
|
-
return ok(r);
|
|
2633
|
+
const cond = registers[Inst.reg(args.a)] > u64(Inst.u32SignExtend(args.c));
|
|
2634
|
+
registers[Inst.reg(args.b)] = cond ? u64(1) : u64(0);
|
|
2635
|
+
return OutcomeData.ok(r);
|
|
2571
2636
|
};
|
|
2572
2637
|
var set_gt_s_imm = (r, args, registers) => {
|
|
2573
|
-
const cond = i64(registers[reg(args.a)]) > i64(u32SignExtend(args.c));
|
|
2574
|
-
registers[reg(args.b)] = cond ? u64(1) : u64(0);
|
|
2575
|
-
return ok(r);
|
|
2638
|
+
const cond = i64(registers[Inst.reg(args.a)]) > i64(Inst.u32SignExtend(args.c));
|
|
2639
|
+
registers[Inst.reg(args.b)] = cond ? u64(1) : u64(0);
|
|
2640
|
+
return OutcomeData.ok(r);
|
|
2576
2641
|
};
|
|
2577
2642
|
var set_lt_u = (r, args, registers) => {
|
|
2578
|
-
registers[reg(args.c)] = registers[reg(args.b)] < registers[reg(args.a)] ? u64(1) : u64(0);
|
|
2579
|
-
return ok(r);
|
|
2643
|
+
registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] < registers[Inst.reg(args.a)] ? u64(1) : u64(0);
|
|
2644
|
+
return OutcomeData.ok(r);
|
|
2580
2645
|
};
|
|
2581
2646
|
var set_lt_s = (r, args, registers) => {
|
|
2582
|
-
registers[reg(args.c)] = i64(registers[reg(args.b)]) < i64(registers[reg(args.a)]) ? u64(1) : u64(0);
|
|
2583
|
-
return ok(r);
|
|
2647
|
+
registers[Inst.reg(args.c)] = i64(registers[Inst.reg(args.b)]) < i64(registers[Inst.reg(args.a)]) ? u64(1) : u64(0);
|
|
2648
|
+
return OutcomeData.ok(r);
|
|
2584
2649
|
};
|
|
2585
2650
|
|
|
2586
2651
|
// dist/build/js/assembly/instructions/shift.js
|
|
@@ -2588,184 +2653,184 @@ var MAX_SHIFT_64 = 64;
|
|
|
2588
2653
|
var MAX_SHIFT_32 = 32;
|
|
2589
2654
|
var shlo_l_imm_32 = (r, args, registers) => {
|
|
2590
2655
|
const shift = u32(args.c % MAX_SHIFT_32);
|
|
2591
|
-
const value = u32(registers[reg(args.a)]);
|
|
2592
|
-
registers[reg(args.b)] = u32SignExtend(value << shift);
|
|
2593
|
-
return ok(r);
|
|
2656
|
+
const value = u32(registers[Inst.reg(args.a)]);
|
|
2657
|
+
registers[Inst.reg(args.b)] = Inst.u32SignExtend(value << shift);
|
|
2658
|
+
return OutcomeData.ok(r);
|
|
2594
2659
|
};
|
|
2595
2660
|
var shlo_r_imm_32 = (r, args, registers) => {
|
|
2596
2661
|
const shift = u32(args.c % MAX_SHIFT_32);
|
|
2597
|
-
const value = u32(registers[reg(args.a)]);
|
|
2598
|
-
registers[reg(args.b)] = u32SignExtend(value >>> shift);
|
|
2599
|
-
return ok(r);
|
|
2662
|
+
const value = u32(registers[Inst.reg(args.a)]);
|
|
2663
|
+
registers[Inst.reg(args.b)] = Inst.u32SignExtend(value >>> shift);
|
|
2664
|
+
return OutcomeData.ok(r);
|
|
2600
2665
|
};
|
|
2601
2666
|
var shar_r_imm_32 = (r, args, registers) => {
|
|
2602
2667
|
const shift = u32(args.c % MAX_SHIFT_32);
|
|
2603
|
-
const value = u32SignExtend(u32(registers[reg(args.a)]));
|
|
2604
|
-
registers[reg(args.b)] = u64(i64(value) >> i64(shift));
|
|
2605
|
-
return ok(r);
|
|
2668
|
+
const value = Inst.u32SignExtend(u32(registers[Inst.reg(args.a)]));
|
|
2669
|
+
registers[Inst.reg(args.b)] = u64(i64(value) >> i64(shift));
|
|
2670
|
+
return OutcomeData.ok(r);
|
|
2606
2671
|
};
|
|
2607
2672
|
var shlo_l_imm_alt_32 = (r, args, registers) => {
|
|
2608
|
-
const shift = u32(registers[reg(args.a)] % u64(MAX_SHIFT_32));
|
|
2609
|
-
registers[reg(args.b)] = u32SignExtend(args.c << shift);
|
|
2610
|
-
return ok(r);
|
|
2673
|
+
const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_32));
|
|
2674
|
+
registers[Inst.reg(args.b)] = Inst.u32SignExtend(args.c << shift);
|
|
2675
|
+
return OutcomeData.ok(r);
|
|
2611
2676
|
};
|
|
2612
2677
|
var shlo_r_imm_alt_32 = (r, args, registers) => {
|
|
2613
|
-
const shift = u32(registers[reg(args.a)] % u64(MAX_SHIFT_32));
|
|
2614
|
-
registers[reg(args.b)] = u32SignExtend(args.c >>> shift);
|
|
2615
|
-
return ok(r);
|
|
2678
|
+
const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_32));
|
|
2679
|
+
registers[Inst.reg(args.b)] = Inst.u32SignExtend(args.c >>> shift);
|
|
2680
|
+
return OutcomeData.ok(r);
|
|
2616
2681
|
};
|
|
2617
2682
|
var shar_r_imm_alt_32 = (r, args, registers) => {
|
|
2618
|
-
const shift = u32(registers[reg(args.a)] % u64(MAX_SHIFT_32));
|
|
2619
|
-
const imm = u32SignExtend(args.c);
|
|
2620
|
-
registers[reg(args.b)] = u32SignExtend(u32(i64(imm) >> i64(shift)));
|
|
2621
|
-
return ok(r);
|
|
2683
|
+
const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_32));
|
|
2684
|
+
const imm = Inst.u32SignExtend(args.c);
|
|
2685
|
+
registers[Inst.reg(args.b)] = Inst.u32SignExtend(u32(i64(imm) >> i64(shift)));
|
|
2686
|
+
return OutcomeData.ok(r);
|
|
2622
2687
|
};
|
|
2623
2688
|
var shlo_l_imm = (r, args, registers) => {
|
|
2624
2689
|
const shift = u32(args.c % MAX_SHIFT_64);
|
|
2625
|
-
registers[reg(args.b)] = u64(registers[reg(args.a)] << u64(shift));
|
|
2626
|
-
return ok(r);
|
|
2690
|
+
registers[Inst.reg(args.b)] = u64(registers[Inst.reg(args.a)] << u64(shift));
|
|
2691
|
+
return OutcomeData.ok(r);
|
|
2627
2692
|
};
|
|
2628
2693
|
var shlo_r_imm = (r, args, registers) => {
|
|
2629
2694
|
const shift = u32(args.c % MAX_SHIFT_64);
|
|
2630
|
-
registers[reg(args.b)] = registers[reg(args.a)] >> u64(shift);
|
|
2631
|
-
return ok(r);
|
|
2695
|
+
registers[Inst.reg(args.b)] = registers[Inst.reg(args.a)] >> u64(shift);
|
|
2696
|
+
return OutcomeData.ok(r);
|
|
2632
2697
|
};
|
|
2633
2698
|
var shar_r_imm = (r, args, registers) => {
|
|
2634
2699
|
const shift = u32(args.c % MAX_SHIFT_64);
|
|
2635
|
-
const value = i64(registers[reg(args.a)]);
|
|
2636
|
-
registers[reg(args.b)] = u64(value >> i64(shift));
|
|
2637
|
-
return ok(r);
|
|
2700
|
+
const value = i64(registers[Inst.reg(args.a)]);
|
|
2701
|
+
registers[Inst.reg(args.b)] = u64(value >> i64(shift));
|
|
2702
|
+
return OutcomeData.ok(r);
|
|
2638
2703
|
};
|
|
2639
2704
|
var shlo_l_imm_alt = (r, args, registers) => {
|
|
2640
|
-
const shift = u32(registers[reg(args.a)] % u64(MAX_SHIFT_64));
|
|
2641
|
-
registers[reg(args.b)] = u64(u32SignExtend(args.c) << i64(shift));
|
|
2642
|
-
return ok(r);
|
|
2705
|
+
const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_64));
|
|
2706
|
+
registers[Inst.reg(args.b)] = u64(Inst.u32SignExtend(args.c) << i64(shift));
|
|
2707
|
+
return OutcomeData.ok(r);
|
|
2643
2708
|
};
|
|
2644
2709
|
var shlo_r_imm_alt = (r, args, registers) => {
|
|
2645
|
-
const shift = u32(registers[reg(args.a)] % u64(MAX_SHIFT_64));
|
|
2646
|
-
registers[reg(args.b)] = u64(u32SignExtend(args.c)) >> u64(shift);
|
|
2647
|
-
return ok(r);
|
|
2710
|
+
const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_64));
|
|
2711
|
+
registers[Inst.reg(args.b)] = u64(Inst.u32SignExtend(args.c)) >> u64(shift);
|
|
2712
|
+
return OutcomeData.ok(r);
|
|
2648
2713
|
};
|
|
2649
2714
|
var shar_r_imm_alt = (r, args, registers) => {
|
|
2650
|
-
const shift = u32(registers[reg(args.a)] % u64(MAX_SHIFT_64));
|
|
2651
|
-
const value = u32SignExtend(args.c);
|
|
2652
|
-
registers[reg(args.b)] = u32SignExtend(u32(value >> i64(shift)));
|
|
2653
|
-
return ok(r);
|
|
2715
|
+
const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_64));
|
|
2716
|
+
const value = Inst.u32SignExtend(args.c);
|
|
2717
|
+
registers[Inst.reg(args.b)] = Inst.u32SignExtend(u32(value >> i64(shift)));
|
|
2718
|
+
return OutcomeData.ok(r);
|
|
2654
2719
|
};
|
|
2655
2720
|
var shlo_l_32 = (r, args, registers) => {
|
|
2656
|
-
const shift = u32(registers[reg(args.a)] % u64(MAX_SHIFT_32));
|
|
2657
|
-
const value = u32(registers[reg(args.b)]);
|
|
2658
|
-
registers[reg(args.c)] = u32SignExtend(value << shift);
|
|
2659
|
-
return ok(r);
|
|
2721
|
+
const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_32));
|
|
2722
|
+
const value = u32(registers[Inst.reg(args.b)]);
|
|
2723
|
+
registers[Inst.reg(args.c)] = Inst.u32SignExtend(value << shift);
|
|
2724
|
+
return OutcomeData.ok(r);
|
|
2660
2725
|
};
|
|
2661
2726
|
var shlo_r_32 = (r, args, registers) => {
|
|
2662
|
-
const shift = u32(registers[reg(args.a)] % u64(MAX_SHIFT_32));
|
|
2663
|
-
const value = u32(registers[reg(args.b)]);
|
|
2664
|
-
registers[reg(args.c)] = u32SignExtend(value >>> shift);
|
|
2665
|
-
return ok(r);
|
|
2727
|
+
const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_32));
|
|
2728
|
+
const value = u32(registers[Inst.reg(args.b)]);
|
|
2729
|
+
registers[Inst.reg(args.c)] = Inst.u32SignExtend(value >>> shift);
|
|
2730
|
+
return OutcomeData.ok(r);
|
|
2666
2731
|
};
|
|
2667
2732
|
var shar_r_32 = (r, args, registers) => {
|
|
2668
|
-
const shift = u32(registers[reg(args.a)] % u64(MAX_SHIFT_32));
|
|
2669
|
-
const regValue = u32SignExtend(u32(registers[reg(args.b)]));
|
|
2670
|
-
registers[reg(args.c)] = u32SignExtend(u32(i64(regValue) >> i64(shift)));
|
|
2671
|
-
return ok(r);
|
|
2733
|
+
const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_32));
|
|
2734
|
+
const regValue = Inst.u32SignExtend(u32(registers[Inst.reg(args.b)]));
|
|
2735
|
+
registers[Inst.reg(args.c)] = Inst.u32SignExtend(u32(i64(regValue) >> i64(shift)));
|
|
2736
|
+
return OutcomeData.ok(r);
|
|
2672
2737
|
};
|
|
2673
2738
|
var shlo_l = (r, args, registers) => {
|
|
2674
|
-
const shift = u32(registers[reg(args.a)] % u64(MAX_SHIFT_64));
|
|
2675
|
-
registers[reg(args.c)] = u64(registers[reg(args.b)] << u64(shift));
|
|
2676
|
-
return ok(r);
|
|
2739
|
+
const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_64));
|
|
2740
|
+
registers[Inst.reg(args.c)] = u64(registers[Inst.reg(args.b)] << u64(shift));
|
|
2741
|
+
return OutcomeData.ok(r);
|
|
2677
2742
|
};
|
|
2678
2743
|
var shlo_r = (r, args, registers) => {
|
|
2679
|
-
const shift = u32(registers[reg(args.a)] % u64(MAX_SHIFT_64));
|
|
2680
|
-
registers[reg(args.c)] = registers[reg(args.b)] >> u64(shift);
|
|
2681
|
-
return ok(r);
|
|
2744
|
+
const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_64));
|
|
2745
|
+
registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] >> u64(shift);
|
|
2746
|
+
return OutcomeData.ok(r);
|
|
2682
2747
|
};
|
|
2683
2748
|
var shar_r = (r, args, registers) => {
|
|
2684
|
-
const shift = u32(registers[reg(args.a)] % u64(MAX_SHIFT_64));
|
|
2685
|
-
registers[reg(args.c)] = u64(i64(registers[reg(args.b)]) >> i64(shift));
|
|
2686
|
-
return ok(r);
|
|
2749
|
+
const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_64));
|
|
2750
|
+
registers[Inst.reg(args.c)] = u64(i64(registers[Inst.reg(args.b)]) >> i64(shift));
|
|
2751
|
+
return OutcomeData.ok(r);
|
|
2687
2752
|
};
|
|
2688
2753
|
|
|
2689
2754
|
// dist/build/js/assembly/instructions/store.js
|
|
2690
2755
|
var faultRes3 = new MaybePageFault();
|
|
2691
2756
|
function effectiveAddress(registers, baseReg, offset) {
|
|
2692
|
-
return u32(portable.u64_add(registers[reg(u64(baseReg))], u32SignExtend(offset)));
|
|
2757
|
+
return u32(portable.u64_add(registers[Inst.reg(u64(baseReg))], Inst.u32SignExtend(offset)));
|
|
2693
2758
|
}
|
|
2694
2759
|
var store_imm_u8 = (r, args, _registers, memory) => {
|
|
2695
2760
|
const address = args.a;
|
|
2696
2761
|
memory.setU8(faultRes3, address, args.b & 255);
|
|
2697
|
-
return okOrFault(r, faultRes3);
|
|
2762
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2698
2763
|
};
|
|
2699
2764
|
var store_imm_u16 = (r, args, _registers, memory) => {
|
|
2700
2765
|
const address = args.a;
|
|
2701
2766
|
memory.setU16(faultRes3, address, args.b & 65535);
|
|
2702
|
-
return okOrFault(r, faultRes3);
|
|
2767
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2703
2768
|
};
|
|
2704
2769
|
var store_imm_u32 = (r, args, _registers, memory) => {
|
|
2705
2770
|
const address = args.a;
|
|
2706
2771
|
memory.setU32(faultRes3, address, args.b);
|
|
2707
|
-
return okOrFault(r, faultRes3);
|
|
2772
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2708
2773
|
};
|
|
2709
2774
|
var store_imm_u64 = (r, args, _registers, memory) => {
|
|
2710
2775
|
const address = args.a;
|
|
2711
|
-
memory.setU64(faultRes3, address, u32SignExtend(args.b));
|
|
2712
|
-
return okOrFault(r, faultRes3);
|
|
2776
|
+
memory.setU64(faultRes3, address, Inst.u32SignExtend(args.b));
|
|
2777
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2713
2778
|
};
|
|
2714
2779
|
var store_u8 = (r, args, registers, memory) => {
|
|
2715
|
-
memory.setU8(faultRes3, args.b, registers[reg(args.a)] & u64(255));
|
|
2716
|
-
return okOrFault(r, faultRes3);
|
|
2780
|
+
memory.setU8(faultRes3, args.b, registers[Inst.reg(args.a)] & u64(255));
|
|
2781
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2717
2782
|
};
|
|
2718
2783
|
var store_u16 = (r, args, registers, memory) => {
|
|
2719
|
-
memory.setU16(faultRes3, args.b, registers[reg(args.a)] & u64(65535));
|
|
2720
|
-
return okOrFault(r, faultRes3);
|
|
2784
|
+
memory.setU16(faultRes3, args.b, registers[Inst.reg(args.a)] & u64(65535));
|
|
2785
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2721
2786
|
};
|
|
2722
2787
|
var store_u32 = (r, args, registers, memory) => {
|
|
2723
|
-
memory.setU32(faultRes3, args.b, u32(registers[reg(args.a)]));
|
|
2724
|
-
return okOrFault(r, faultRes3);
|
|
2788
|
+
memory.setU32(faultRes3, args.b, u32(registers[Inst.reg(args.a)]));
|
|
2789
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2725
2790
|
};
|
|
2726
2791
|
var store_u64 = (r, args, registers, memory) => {
|
|
2727
|
-
memory.setU64(faultRes3, args.b, registers[reg(args.a)]);
|
|
2728
|
-
return okOrFault(r, faultRes3);
|
|
2792
|
+
memory.setU64(faultRes3, args.b, registers[Inst.reg(args.a)]);
|
|
2793
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2729
2794
|
};
|
|
2730
2795
|
var store_imm_ind_u8 = (r, args, registers, memory) => {
|
|
2731
2796
|
const address = effectiveAddress(registers, args.a, args.b);
|
|
2732
2797
|
memory.setU8(faultRes3, address, args.c & 255);
|
|
2733
|
-
return okOrFault(r, faultRes3);
|
|
2798
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2734
2799
|
};
|
|
2735
2800
|
var store_imm_ind_u16 = (r, args, registers, memory) => {
|
|
2736
2801
|
const address = effectiveAddress(registers, args.a, args.b);
|
|
2737
2802
|
memory.setU16(faultRes3, address, args.c & 65535);
|
|
2738
|
-
return okOrFault(r, faultRes3);
|
|
2803
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2739
2804
|
};
|
|
2740
2805
|
var store_imm_ind_u32 = (r, args, registers, memory) => {
|
|
2741
2806
|
const address = effectiveAddress(registers, args.a, args.b);
|
|
2742
2807
|
memory.setU32(faultRes3, address, args.c);
|
|
2743
|
-
return okOrFault(r, faultRes3);
|
|
2808
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2744
2809
|
};
|
|
2745
2810
|
var store_imm_ind_u64 = (r, args, registers, memory) => {
|
|
2746
2811
|
const address = effectiveAddress(registers, args.a, args.b);
|
|
2747
|
-
memory.setU64(faultRes3, address, u32SignExtend(args.c));
|
|
2748
|
-
return okOrFault(r, faultRes3);
|
|
2812
|
+
memory.setU64(faultRes3, address, Inst.u32SignExtend(args.c));
|
|
2813
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2749
2814
|
};
|
|
2750
2815
|
var store_ind_u8 = (r, args, registers, memory) => {
|
|
2751
2816
|
const address = effectiveAddress(registers, args.a, args.c);
|
|
2752
|
-
memory.setU8(faultRes3, address, registers[reg(args.b)] & u64(255));
|
|
2753
|
-
return okOrFault(r, faultRes3);
|
|
2817
|
+
memory.setU8(faultRes3, address, registers[Inst.reg(args.b)] & u64(255));
|
|
2818
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2754
2819
|
};
|
|
2755
2820
|
var store_ind_u16 = (r, args, registers, memory) => {
|
|
2756
2821
|
const address = effectiveAddress(registers, args.a, args.c);
|
|
2757
|
-
memory.setU16(faultRes3, address, registers[reg(args.b)] & u64(65535));
|
|
2758
|
-
return okOrFault(r, faultRes3);
|
|
2822
|
+
memory.setU16(faultRes3, address, registers[Inst.reg(args.b)] & u64(65535));
|
|
2823
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2759
2824
|
};
|
|
2760
2825
|
var store_ind_u32 = (r, args, registers, memory) => {
|
|
2761
2826
|
const address = effectiveAddress(registers, args.a, args.c);
|
|
2762
|
-
memory.setU32(faultRes3, address, u32(registers[reg(args.b)]));
|
|
2763
|
-
return okOrFault(r, faultRes3);
|
|
2827
|
+
memory.setU32(faultRes3, address, u32(registers[Inst.reg(args.b)]));
|
|
2828
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2764
2829
|
};
|
|
2765
2830
|
var store_ind_u64 = (r, args, registers, memory) => {
|
|
2766
2831
|
const address = effectiveAddress(registers, args.a, args.c);
|
|
2767
|
-
memory.setU64(faultRes3, address, registers[reg(args.b)]);
|
|
2768
|
-
return okOrFault(r, faultRes3);
|
|
2832
|
+
memory.setU64(faultRes3, address, registers[Inst.reg(args.b)]);
|
|
2833
|
+
return OutcomeData.okOrFault(r, faultRes3);
|
|
2769
2834
|
};
|
|
2770
2835
|
|
|
2771
2836
|
// dist/build/js/assembly/instructions-exe.js
|
|
@@ -3395,57 +3460,57 @@ function resolveArguments(argsRes, kind, code, offset, lim, registers) {
|
|
|
3395
3460
|
case Arguments.Zero:
|
|
3396
3461
|
return resolved;
|
|
3397
3462
|
case Arguments.OneImm:
|
|
3398
|
-
resolved.a = u32SignExtend(args.a);
|
|
3463
|
+
resolved.a = Inst.u32SignExtend(args.a);
|
|
3399
3464
|
return resolved;
|
|
3400
3465
|
case Arguments.TwoImm:
|
|
3401
|
-
resolved.a = u32SignExtend(args.a);
|
|
3402
|
-
resolved.b = u32SignExtend(args.b);
|
|
3466
|
+
resolved.a = Inst.u32SignExtend(args.a);
|
|
3467
|
+
resolved.b = Inst.u32SignExtend(args.b);
|
|
3403
3468
|
return resolved;
|
|
3404
3469
|
case Arguments.OneOff:
|
|
3405
|
-
resolved.a = u32SignExtend(args.a);
|
|
3470
|
+
resolved.a = Inst.u32SignExtend(args.a);
|
|
3406
3471
|
return resolved;
|
|
3407
3472
|
case Arguments.OneRegOneImm:
|
|
3408
|
-
resolved.a = registers[reg(u64(args.a))];
|
|
3409
|
-
resolved.b = u32SignExtend(args.b);
|
|
3473
|
+
resolved.a = registers[Inst.reg(u64(args.a))];
|
|
3474
|
+
resolved.b = Inst.u32SignExtend(args.b);
|
|
3410
3475
|
return resolved;
|
|
3411
3476
|
case Arguments.OneRegOneExtImm:
|
|
3412
|
-
resolved.a = registers[reg(u64(args.a))];
|
|
3477
|
+
resolved.a = registers[Inst.reg(u64(args.a))];
|
|
3413
3478
|
resolved.b = portable.u64_add(u64(args.a) << u64(32), u64(args.b));
|
|
3414
3479
|
return resolved;
|
|
3415
3480
|
case Arguments.OneRegTwoImm:
|
|
3416
|
-
resolved.a = registers[reg(u64(args.a))];
|
|
3417
|
-
resolved.b = u32SignExtend(args.b);
|
|
3418
|
-
resolved.c = u32SignExtend(args.c);
|
|
3481
|
+
resolved.a = registers[Inst.reg(u64(args.a))];
|
|
3482
|
+
resolved.b = Inst.u32SignExtend(args.b);
|
|
3483
|
+
resolved.c = Inst.u32SignExtend(args.c);
|
|
3419
3484
|
return resolved;
|
|
3420
3485
|
case Arguments.OneRegOneImmOneOff:
|
|
3421
|
-
resolved.a = registers[reg(u64(args.a))];
|
|
3422
|
-
resolved.b = u32SignExtend(args.b);
|
|
3423
|
-
resolved.c = u32SignExtend(args.c);
|
|
3486
|
+
resolved.a = registers[Inst.reg(u64(args.a))];
|
|
3487
|
+
resolved.b = Inst.u32SignExtend(args.b);
|
|
3488
|
+
resolved.c = Inst.u32SignExtend(args.c);
|
|
3424
3489
|
return resolved;
|
|
3425
3490
|
case Arguments.TwoReg:
|
|
3426
|
-
resolved.a = registers[reg(u64(args.a))];
|
|
3427
|
-
resolved.b = registers[reg(u64(args.b))];
|
|
3491
|
+
resolved.a = registers[Inst.reg(u64(args.a))];
|
|
3492
|
+
resolved.b = registers[Inst.reg(u64(args.b))];
|
|
3428
3493
|
return resolved;
|
|
3429
3494
|
case Arguments.TwoRegOneImm:
|
|
3430
|
-
resolved.a = registers[reg(u64(args.a))];
|
|
3431
|
-
resolved.b = registers[reg(u64(args.b))];
|
|
3432
|
-
resolved.c = u32SignExtend(args.c);
|
|
3495
|
+
resolved.a = registers[Inst.reg(u64(args.a))];
|
|
3496
|
+
resolved.b = registers[Inst.reg(u64(args.b))];
|
|
3497
|
+
resolved.c = Inst.u32SignExtend(args.c);
|
|
3433
3498
|
return resolved;
|
|
3434
3499
|
case Arguments.TwoRegOneOff:
|
|
3435
|
-
resolved.a = registers[reg(u64(args.a))];
|
|
3436
|
-
resolved.b = registers[reg(u64(args.b))];
|
|
3437
|
-
resolved.c = u32SignExtend(args.c);
|
|
3500
|
+
resolved.a = registers[Inst.reg(u64(args.a))];
|
|
3501
|
+
resolved.b = registers[Inst.reg(u64(args.b))];
|
|
3502
|
+
resolved.c = Inst.u32SignExtend(args.c);
|
|
3438
3503
|
return resolved;
|
|
3439
3504
|
case Arguments.TwoRegTwoImm:
|
|
3440
|
-
resolved.a = registers[reg(u64(args.a))];
|
|
3441
|
-
resolved.b = registers[reg(u64(args.b))];
|
|
3442
|
-
resolved.c = u32SignExtend(args.c);
|
|
3443
|
-
resolved.d = u32SignExtend(args.d);
|
|
3505
|
+
resolved.a = registers[Inst.reg(u64(args.a))];
|
|
3506
|
+
resolved.b = registers[Inst.reg(u64(args.b))];
|
|
3507
|
+
resolved.c = Inst.u32SignExtend(args.c);
|
|
3508
|
+
resolved.d = Inst.u32SignExtend(args.d);
|
|
3444
3509
|
return resolved;
|
|
3445
3510
|
case Arguments.ThreeReg:
|
|
3446
|
-
resolved.a = registers[reg(u64(args.a))];
|
|
3447
|
-
resolved.b = registers[reg(u64(args.b))];
|
|
3448
|
-
resolved.c = registers[reg(u64(args.c))];
|
|
3511
|
+
resolved.a = registers[Inst.reg(u64(args.a))];
|
|
3512
|
+
resolved.b = registers[Inst.reg(u64(args.b))];
|
|
3513
|
+
resolved.c = registers[Inst.reg(u64(args.c))];
|
|
3449
3514
|
return resolved;
|
|
3450
3515
|
default:
|
|
3451
3516
|
throw new Error(`Unhandled arguments kind: ${kind}`);
|
|
@@ -3560,7 +3625,7 @@ var Interpreter = class {
|
|
|
3560
3625
|
continue;
|
|
3561
3626
|
}
|
|
3562
3627
|
case Outcome.DynamicJump: {
|
|
3563
|
-
const res =
|
|
3628
|
+
const res = dJump(this.djumpRes, jumpTable, outcome.dJump);
|
|
3564
3629
|
if (res.status === DjumpStatus.HALT) {
|
|
3565
3630
|
this.status = Status.HALT;
|
|
3566
3631
|
return false;
|
|
@@ -3622,7 +3687,7 @@ function branch(r, basicBlocks, pc, offset) {
|
|
|
3622
3687
|
}
|
|
3623
3688
|
var EXIT = 4294901760;
|
|
3624
3689
|
var JUMP_ALIGMENT_FACTOR = 2;
|
|
3625
|
-
function
|
|
3690
|
+
function dJump(r, jumpTable, address) {
|
|
3626
3691
|
if (address === EXIT) {
|
|
3627
3692
|
r.status = DjumpStatus.HALT;
|
|
3628
3693
|
return r;
|
|
@@ -4351,9 +4416,9 @@ function skipBytes(kind, data) {
|
|
|
4351
4416
|
case Arguments.TwoReg:
|
|
4352
4417
|
return 1;
|
|
4353
4418
|
case Arguments.TwoRegOneImm:
|
|
4354
|
-
return 1 + minI32(4, data.length);
|
|
4419
|
+
return 1 + IntMath.minI32(4, data.length);
|
|
4355
4420
|
case Arguments.TwoRegOneOff:
|
|
4356
|
-
return 1 + minI32(4, data.length);
|
|
4421
|
+
return 1 + IntMath.minI32(4, data.length);
|
|
4357
4422
|
case Arguments.TwoRegTwoImm: {
|
|
4358
4423
|
const low = lowNibble(data[1]);
|
|
4359
4424
|
const split = low + 1;
|
|
@@ -4393,7 +4458,7 @@ function immBytes(dataLength, required) {
|
|
|
4393
4458
|
if (dataLength < required) {
|
|
4394
4459
|
return 0;
|
|
4395
4460
|
}
|
|
4396
|
-
return minI32(4, dataLength - required);
|
|
4461
|
+
return IntMath.minI32(4, dataLength - required);
|
|
4397
4462
|
}
|
|
4398
4463
|
export {
|
|
4399
4464
|
HasMetadata,
|