@aardworx/wombat.rendering 0.9.33 → 0.19.0

package/dist/runtime/derivedModes/modeKeyCpu.d.ts.map

@@ -1 +1 @@
-{"version":3,"file":"modeKeyCpu.d.ts","sourceRoot":"","sources":["../../../src/runtime/derivedModes/modeKeyCpu.ts"],"names":[],"mappings":"AAYA,OAAO,KAAK,EAEV,aAAa,EAKd,MAAM,6BAA6B,CAAC;AACrC,OAAO,KAAK,EAAE,oBAAoB,EAAE,MAAM,oCAAoC,CAAC;AAC/E,OAAO,KAAK,EAAE,IAAI,EAAE,WAAW,EAAE,MAAM,2BAA2B,CAAC;AACnE,OAAO,EAAsB,aAAa,EAAE,MAAM,2BAA2B,CAAC;AAE9E,OAAO,EAIL,KAAK,uBAAuB,EAI7B,MAAM,2BAA2B,CAAC;AACnC,OAAO,KAAK,EAAE,eAAe,EAAE,MAAM,WAAW,CAAC;AAEjD;;;GAGG;AACH,MAAM,WAAW,WAAW;IAC1B,QAAQ,CAAC,IAAI,CAAC,EAAa,eAAe,CAAC,MAAM,CAAC,CAAC;IACnD,QAAQ,CAAC,SAAS,CAAC,EAAQ,eAAe,CAAC,WAAW,CAAC,CAAC;IACxD,QAAQ,CAAC,QAAQ,CAAC,EAAS,eAAe,CAAC,UAAU,CAAC,CAAC;IACvD,QAAQ,CAAC,YAAY,CAAC,EAAK,eAAe,CAAC,cAAc,CAAC,CAAC;IAC3D,QAAQ,CAAC,UAAU,CAAC,EAAO,eAAe,CAAC,YAAY,CAAC,CAAC;IACzD,QAAQ,CAAC,eAAe,CAAC,EAAE,eAAe,CAAC,iBAAiB,CAAC,CAAC;CAC/D;AAwBD;;;;;;GAMG;AACH,wBAAgB,kBAAkB,CAChC,EAAE,EAAE,aAAa,GAAG,SAAS,EAC7B,SAAS,EAAE,oBAAoB,EAC/B,OAAO,GAAE;IACP,QAAQ,CAAC,SAAS,CAAC,EAAE,WAAW,CAAC;IACjC,QAAQ,CAAC,YAAY,CAAC,EAAE,WAAW,CAAC,MAAM,EAAE,IAAI,CAAC,OAAO,CAAC,CAAC,CAAC;IAC3D,QAAQ,CAAC,KAAK,CAAC,EAAE,aAAa,CAAC;IAC/B,QAAQ,CAAC,SAAS,CAAC,EAAE,CAAC,EAAE,EAAE,IAAI,CAAC,OAAO,CAAC,KAAK,IAAI,CAAC;CAC7C,GACL,uBAAuB,CAsBzB;AAgGD;;;;;;;;;GASG;AACH,qBAAa,cAAe,YAAW,WAAW;IAChD,QAAQ,CAAC,EAAE,EAAE,aAAa,GAAG,SAAS,CAAC;IACvC,QAAQ,CAAC,SAAS,EAAE,oBAAoB,CAAC;IACzC,OAAO,CAAC,QAAQ,CAAC,OAAO,CAAa;IACrC,OAAO,CAAC,QAAQ,CAAC,IAAI,CAAqB;IAC1C,OAAO,CAAC,gBAAgB,CAA0B;IAClD,OAAO,CAAC,aAAa,CAAS;IAC9B,OAAO,CAAC,QAAQ,CAAC,SAAS,CAA0B;IACpD,OAAO,CAAC,QAAQ,CAAC,YAAY,CAAiD;IAC9E;2EACuE;IACvE,OAAO,CAAC,QAAQ,CAAC,QAAQ,CAA4B;gBAGnD,EAAE,EAAE,aAAa,GAAG,SAAS,EAC7B,SAAS,EAAE,oBAAoB,EAC/B,OAAO,EAAE,MAAM,IAAI;IACnB;;;;;;;OAOG;IACH,OAAO,GAAE;QACP,aAAa,CAAC,EAAE,OAAO,CAAC;QACxB,SAAS,CAAC,EAAE,WAAW,CAAC;QACxB,YAAY,CAAC,EAAE,WAAW,CAAC,MAAM,EAAE,IAAI,CAAC,OAAO,CAAC,CAAC,CAAC;KAC9C;IAYR,OAAO,CAAC,QAAQ;IAQhB;;;;OAIG;IACH,WAAW,CAAC,KAAK,EAAE,CAAC,CAAC,EAAE,IAAI,CAAC,OAAO,CAAC,KAAK,IAAI,GAAG,IAAI;IA8BpD,IAAI,UAAU,IAAI,uBAAuB,CAAkC;IAC3E,IAAI,OAAO,IAAI,MAAM,CAA+B;IAEpD;;;;;;;;;OASG;IACH,SAAS,IAAI,OAAO;IAUpB,OAAO,IAAI,IAAI;IAKf,OAAO,CAAC,YAAY;IA6BpB,OAAO,CAAC,GAAG;IAIX,OAAO,CAAC,aAAa;IAMrB,OAAO,CAAC,eAAe;CAIxB"}
+{"version":3,"file":"modeKeyCpu.d.ts","sourceRoot":"","sources":["../../../src/runtime/derivedModes/modeKeyCpu.ts"],"names":[],"mappings":"AAYA,OAAO,KAAK,EAEV,aAAa,EAKd,MAAM,6BAA6B,CAAC;AACrC,OAAO,KAAK,EAAE,oBAAoB,EAAE,MAAM,oCAAoC,CAAC;AAC/E,OAAO,KAAK,EAAE,IAAI,EAAE,WAAW,EAAE,MAAM,2BAA2B,CAAC;AACnE,OAAO,EAAsB,aAAa,EAAE,MAAM,2BAA2B,CAAC;AAE9E,OAAO,EAIL,KAAK,uBAAuB,EAI7B,MAAM,2BAA2B,CAAC;AACnC,OAAO,KAAK,EAAE,eAAe,EAAE,MAAM,WAAW,CAAC;AAEjD;;;GAGG;AACH,MAAM,WAAW,WAAW;IAC1B,QAAQ,CAAC,IAAI,CAAC,EAAa,eAAe,CAAC,MAAM,CAAC,CAAC;IACnD,QAAQ,CAAC,SAAS,CAAC,EAAQ,eAAe,CAAC,WAAW,CAAC,CAAC;IACxD,QAAQ,CAAC,QAAQ,CAAC,EAAS,eAAe,CAAC,UAAU,CAAC,CAAC;IACvD,QAAQ,CAAC,YAAY,CAAC,EAAK,eAAe,CAAC,cAAc,CAAC,CAAC;IAC3D,QAAQ,CAAC,UAAU,CAAC,EAAO,eAAe,CAAC,YAAY,CAAC,CAAC;IACzD,QAAQ,CAAC,eAAe,CAAC,EAAE,eAAe,CAAC,iBAAiB,CAAC,CAAC;CAC/D;AAGD;;;;;;GAMG;AACH,wBAAgB,kBAAkB,CAChC,EAAE,EAAE,aAAa,GAAG,SAAS,EAC7B,SAAS,EAAE,oBAAoB,EAC/B,OAAO,GAAE;IACP,QAAQ,CAAC,SAAS,CAAC,EAAE,WAAW,CAAC;IACjC,QAAQ,CAAC,YAAY,CAAC,EAAE,WAAW,CAAC,MAAM,EAAE,IAAI,CAAC,OAAO,CAAC,CAAC,CAAC;IAC3D,QAAQ,CAAC,KAAK,CAAC,EAAE,aAAa,CAAC;IAC/B,QAAQ,CAAC,SAAS,CAAC,EAAE,CAAC,EAAE,EAAE,IAAI,CAAC,OAAO,CAAC,KAAK,IAAI,CAAC;CAC7C,GACL,uBAAuB,CAsBzB;AAoED;;;;;;;;;GASG;AACH,qBAAa,cAAe,YAAW,WAAW;IAChD,QAAQ,CAAC,EAAE,EAAE,aAAa,GAAG,SAAS,CAAC;IACvC,QAAQ,CAAC,SAAS,EAAE,oBAAoB,CAAC;IACzC,OAAO,CAAC,QAAQ,CAAC,OAAO,CAAa;IACrC,OAAO,CAAC,QAAQ,CAAC,IAAI,CAAqB;IAC1C,OAAO,CAAC,gBAAgB,CAA0B;IAClD,OAAO,CAAC,aAAa,CAAS;IAC9B,OAAO,CAAC,QAAQ,CAAC,SAAS,CAA0B;IACpD,OAAO,CAAC,QAAQ,CAAC,YAAY,CAAiD;IAC9E;2EACuE;IACvE,OAAO,CAAC,QAAQ,CAAC,QAAQ,CAA4B;gBAGnD,EAAE,EAAE,aAAa,GAAG,SAAS,EAC7B,SAAS,EAAE,oBAAoB,EAC/B,OAAO,EAAE,MAAM,IAAI;IACnB;;;;;;;OAOG;IACH,OAAO,GAAE;QACP,aAAa,CAAC,EAAE,OAAO,CAAC;QACxB,SAAS,CAAC,EAAE,WAAW,CAAC;QACxB,YAAY,CAAC,EAAE,WAAW,CAAC,MAAM,EAAE,IAAI,CAAC,OAAO,CAAC,CAAC,CAAC;KAC9C;IAYR,OAAO,CAAC,QAAQ;IAQhB;;;;OAIG;IACH,WAAW,CAAC,KAAK,EAAE,CAAC,CAAC,EAAE,IAAI,CAAC,OAAO,CAAC,KAAK,IAAI,GAAG,IAAI;IAyCpD,IAAI,UAAU,IAAI,uBAAuB,CAAkC;IAC3E,IAAI,OAAO,IAAI,MAAM,CAA+B;IAEpD;;;;;;;;;OASG;IACH,SAAS,IAAI,OAAO;IAUpB,OAAO,IAAI,IAAI;IAKf,OAAO,CAAC,YAAY;IA6BpB,OAAO,CAAC,GAAG;IAIX,OAAO,CAAC,aAAa;IAMrB,OAAO,CAAC,eAAe;CAIxB"}

package/dist/runtime/derivedModes/modeKeyCpu.js

@@ -11,26 +11,6 @@
 // `derivedMode(...)` on top of this.
 import { addMarkingCallback, AdaptiveToken } from "@aardworx/wombat.adaptive";
 import { encodeModeKey, DEFAULT_DESCRIPTOR, DEFAULT_ATTACHMENT_BLEND, } from "../pipelineCache/index.js";
-/**
- * Uniforms accessor exposed to a derived-mode rule's `(u, declared)`
- * closure. Reads each `u.<Name>` from the supplied aval map at
- * evaluation time and tracks which avals were accessed so the
- * `ModeKeyTracker` can subscribe to them.
- */
-function uniformsProxy(uniformAvals, tok, recordDep) {
-    return new Proxy({}, {
-        get(_target, prop) {
-            if (typeof prop !== "string")
-                return undefined;
-            const av = uniformAvals.get(prop);
-            if (av === undefined)
-                return undefined;
-            if (recordDep !== undefined)
-                recordDep(av);
-            return av.getValue(tok);
-        },
-    });
-}
 /**
  * One-shot snapshot of the current values of every leaf aval in a
  * `PipelineState`, mapped onto a `PipelineStateDescriptor` whose
@@ -62,49 +42,13 @@ export function snapshotDescriptor(ps, signature, options = {}) {
     return applyRules(out, options);
 }
 function applyRules(d, options) {
-    const rules = options.modeRules;
-    if (rules === undefined)
-        return d;
-    const uniforms = options.uniformAvals ?? new Map();
-    const tok = options.token ?? AdaptiveToken.top;
-    const proxy = uniformsProxy(uniforms, tok, options.recordDep);
-    let out = d;
-    if (rules.cull !== undefined) {
-        const v = rules.cull.evaluate(proxy, out.cullMode);
-        if (v !== out.cullMode)
-            out = { ...out, cullMode: v };
-    }
-    if (rules.frontFace !== undefined) {
-        const v = rules.frontFace.evaluate(proxy, out.frontFace);
-        if (v !== out.frontFace)
-            out = { ...out, frontFace: v };
-    }
-    if (rules.topology !== undefined) {
-        const v = rules.topology.evaluate(proxy, out.topology);
-        if (v !== out.topology)
-            out = { ...out, topology: v, stripIndexFormat: stripFormatFor(v) };
-    }
-    if (rules.alphaToCoverage !== undefined) {
-        const v = rules.alphaToCoverage.evaluate(proxy, out.alphaToCoverage);
-        if (v !== out.alphaToCoverage)
-            out = { ...out, alphaToCoverage: v };
-    }
-    if (out.depth !== undefined && (rules.depthCompare !== undefined || rules.depthWrite !== undefined)) {
-        let depthOut = out.depth;
-        if (rules.depthCompare !== undefined) {
-            const v = rules.depthCompare.evaluate(proxy, depthOut.compare);
-            if (v !== depthOut.compare)
-                depthOut = { ...depthOut, compare: v };
-        }
-        if (rules.depthWrite !== undefined) {
-            const v = rules.depthWrite.evaluate(proxy, depthOut.write);
-            if (v !== depthOut.write)
-                depthOut = { ...depthOut, write: v };
-        }
-        if (depthOut !== out.depth)
-            out = { ...out, depth: depthOut };
-    }
-    return out;
+    // Phase 5c.3 — rules are IR-traced and run on the GPU. We never
+    // CPU-evaluate them here; the descriptor returned reflects the
+    // raw PipelineState aval values (= the "declared" value for each
+    // axis). The heap runtime creates one bucket slot per
+    // `rule.domain` entry and the partition kernel routes per record.
+    void options;
+    return d;
 }
 function buildAttachmentsFor(base, signature) {
     // When `ps` is undefined, every named attachment uses defaults.
@@ -231,10 +175,22 @@ export class ModeKeyTracker {
             if (ps.alphaToCoverage !== undefined)
                 visit(ps.alphaToCoverage);
         }
-        // Rule-input deps discovered on the last evaluation. The set is
-        // refreshed each `recompute()`; callers re-subscribe accordingly.
-        // Surfaced regardless of `ps` because a rule can fire without
-        // any underlying PipelineState aval (e.g. ps === undefined).
+        // Phase 5c.3: rule-input deps will be walked from the rule's
+        // shader-IR body (analyseInputUniforms — pending M6/M7 wire-up).
+        // For now we only visit `declared` if it's an aval — leaves
+        // referenced from the rule body don't trigger partition re-
+        // dispatch until the heap side reads the IR. Hidden behind the
+        // initGpuRouting stub that throws on attached rules.
+        if (this.modeRules !== undefined) {
+            for (const rule of Object.values(this.modeRules)) {
+                if (rule === undefined)
+                    continue;
+                const d = rule.declared;
+                if (typeof d === "object" && d !== null && "getValue" in d) {
+                    visit(d);
+                }
+            }
+        }
         for (const av of this.ruleDeps)
             visit(av);
     }

package/dist/runtime/derivedModes/modeKeyCpu.js.map

@@ -1 +1 @@
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package/dist/runtime/derivedModes/partitionDispatcher.d.ts

@@ -0,0 +1,79 @@
+export interface PartitionSceneSpec {
+    /** Total slot count = `resolved.length` (for the single-axis v1). */
+    readonly totalSlots: number;
+    /** Externally-owned slot draw buffers (one per slot). */
+    readonly slotDrawBufs: ReadonlyArray<GPUBuffer>;
+    /** Initial record capacity. */
+    readonly initialRecords?: number;
+    /** Codegen'd kernel WGSL. Embeds `declared` as a Const + the
+     *  SLOT_LOOKUP table. Swap via `rebuildKernel(...)` on declared mark. */
+    readonly kernelWGSL: string;
+    /** Number of per-record uniform refs (= bucket.uniformOrder.length).
+     *  The master record's width is `6 + numUniforms` u32s. Grow with
+     *  `growUniforms(...)` when a new rule reads a uniform not yet in
+     *  the bucket's order. */
+    readonly numUniforms: number;
+}
+export declare class GpuPartitionScene {
+    readonly device: GPUDevice;
+    readonly label: string;
+    get totalSlots(): number;
+    masterBuf: GPUBuffer;
+    masterShadow: Uint32Array;
+    numRecords: number;
+    capacity: number;
+    slotCountBufs: GPUBuffer[];
+    slotDrawBufs: GPUBuffer[];
+    private _totalSlots;
+    private _numUniforms;
+    get numUniforms(): number;
+    get recordU32(): number;
+    get recordBytes(): number;
+    /** params: [numRecords] — single u32 (padded to 16 bytes for WGSL
+     *  uniform alignment). `declared` is no longer carried here; the
+     *  kernel WGSL bakes it as a Const at codegen time. */
+    paramsBuf: GPUBuffer;
+    private kernelWGSL;
+    private bindGroup;
+    private layout;
+    private clearPipeline;
+    private partitionPipeline;
+    constructor(device: GPUDevice, label: string, spec: PartitionSceneSpec);
+    /** Swap to a freshly-codegen'd kernel WGSL string. Triggered when
+     *  `declared` (baked as a Const in the kernel) changes — the
+     *  pipelines + bind group are reset so the next dispatch
+     *  recompiles. The master records, slot count buffers and slot
+     *  draw buffers are kept. */
+    rebuildKernel(kernelWGSL: string): void;
+    rebindSlotDrawBufs(slotDraws: ReadonlyArray<GPUBuffer>): void;
+    /** Grow the bucket's slot count when a new rule registers and the
+     *  union of its outputs introduces fresh slots. Allocates the
+     *  additional atomic-count buffers and discards the bind-group
+     *  layout (different N = different binding shape). The caller
+     *  must follow up with `rebuildKernel(...)` so the new kernel
+     *  knows about the new slot count. */
+    growSlots(newCount: number, newSlotDraws: ReadonlyArray<GPUBuffer>): void;
+    private ensurePipelines;
+    private ensureBindGroup;
+    appendRecord(drawIdx: number, indexStart: number, indexCount: number, instanceCount: number, comboId: number, uniformRefs: ReadonlyArray<number>): number;
+    /** Update an existing record's comboId. Used when an RO already
+     *  in the master is re-classified (rare; only when rule rebucket
+     *  fires on aval marks). */
+    setRecordComboId(recordIdx: number, comboId: number): void;
+    /** Update an existing record's uniform ref by uniform index. */
+    setRecordUniformRef(recordIdx: number, uniformIdx: number, ref: number): void;
+    removeRecord(recordIdx: number): number;
+    /** Widen the per-record uniform tail from `_numUniforms` to
+     *  `newNumUniforms`. Existing records are restrided in-place; the
+     *  new tail slots are zero-filled (rules added later that read
+     *  the new uniform will only do so under their own combo, where
+     *  records carry real refs). The kernel WGSL must be rebuilt
+     *  separately (`rebuildKernel`). */
+    growUniforms(newNumUniforms: number): void;
+    private grow;
+    flush(): void;
+    /** Encode clear + partition into `enc`. */
+    dispatch(arenaBuf: GPUBuffer, enc: GPUCommandEncoder): void;
+    dispose(): void;
+}
+//# sourceMappingURL=partitionDispatcher.d.ts.map

package/dist/runtime/derivedModes/partitionDispatcher.d.ts.map

@@ -0,0 +1 @@
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package/dist/runtime/derivedModes/partitionDispatcher.js

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+// Phase 5c.3 — per-bucket partition dispatcher.
+//
+// Owns the master record buffer + per-slot atomic counters + the
+// compute pipelines. One instance per GPU-routed bucket. The WGSL
+// kernel is codegen'd by `emitPartitionKernel(...)` upstream (in
+// heapScene) and handed to the dispatcher as a string — declared
+// values are baked in as Consts, so a `declared`-aval mark
+// triggers `rebuildKernel(newWgsl)` to swap to a freshly-codegen'd
+// kernel for the new declared.
+//
+// `dispatch(enc)` encodes:
+//   1. clear pass (zero every slot's atomic counter)
+//   2. partition pass (one thread per record; evaluates the per-
+//      axis rule, scatters into the matching slot via the kernel's
+//      embedded SLOT_LOOKUP table)
+//
+// After dispatch the existing scan kernel runs per slot, reading the
+// slot's drawTable that the partition just populated.
+import { partitionRecordU32, partitionRecordBytes, PARTITION_RECORD_PREFIX_U32 } from "./partitionKernelLayout.js";
+const WG_SIZE = 64;
+const POW2 = (n) => { let p = 1; while (p < n)
+    p <<= 1; return Math.max(64, p); };
+export class GpuPartitionScene {
+    device;
+    label;
+    get totalSlots() { return this._totalSlots; }
+    masterBuf;
+    masterShadow;
+    numRecords = 0;
+    capacity = 0;
+    slotCountBufs;
+    slotDrawBufs;
+    // `totalSlots` is mutable — `growSlots(...)` extends both the
+    // dispatcher and the kernel layout to accommodate new pipeline
+    // slots that appear when a new rule is registered on the bucket.
+    _totalSlots;
+    // Per-bucket master record width = 6 + numUniforms. Mutable —
+    // `growUniforms(...)` widens existing records in-place so a rule
+    // reading a new uniform can land without rebuilding the master.
+    _numUniforms;
+    get numUniforms() { return this._numUniforms; }
+    get recordU32() { return partitionRecordU32(this._numUniforms); }
+    get recordBytes() { return partitionRecordBytes(this._numUniforms); }
+    /** params: [numRecords] — single u32 (padded to 16 bytes for WGSL
+     *  uniform alignment). `declared` is no longer carried here; the
+     *  kernel WGSL bakes it as a Const at codegen time. */
+    paramsBuf;
+    kernelWGSL;
+    bindGroup = null;
+    layout = null;
+    clearPipeline = null;
+    partitionPipeline = null;
+    constructor(device, label, spec) {
+        if (spec.slotDrawBufs.length !== spec.totalSlots) {
+            throw new Error(`GpuPartitionScene: slotDrawBufs.length (${spec.slotDrawBufs.length}) != totalSlots (${spec.totalSlots})`);
+        }
+        this.device = device;
+        this.label = label;
+        this._totalSlots = spec.totalSlots;
+        this._numUniforms = spec.numUniforms;
+        this.capacity = POW2(spec.initialRecords ?? 16);
+        const bytes = this.capacity * partitionRecordBytes(this._numUniforms);
+        this.masterBuf = device.createBuffer({
+            label: `${label}/master`, size: bytes,
+            usage: GPUBufferUsage.STORAGE | GPUBufferUsage.COPY_DST,
+        });
+        this.masterShadow = new Uint32Array(bytes / 4);
+        this.slotCountBufs = new Array(spec.totalSlots).fill(0).map((_, i) => device.createBuffer({
+            label: `${label}/slot${i}Count`, size: 4,
+            usage: GPUBufferUsage.STORAGE | GPUBufferUsage.COPY_SRC,
+        }));
+        this.slotDrawBufs = [...spec.slotDrawBufs];
+        this.paramsBuf = device.createBuffer({
+            label: `${label}/params`, size: 16,
+            usage: GPUBufferUsage.UNIFORM | GPUBufferUsage.COPY_DST,
+        });
+        this.kernelWGSL = spec.kernelWGSL;
+    }
+    /** Swap to a freshly-codegen'd kernel WGSL string. Triggered when
+     *  `declared` (baked as a Const in the kernel) changes — the
+     *  pipelines + bind group are reset so the next dispatch
+     *  recompiles. The master records, slot count buffers and slot
+     *  draw buffers are kept. */
+    rebuildKernel(kernelWGSL) {
+        this.kernelWGSL = kernelWGSL;
+        this.clearPipeline = null;
+        this.partitionPipeline = null;
+        // layout shape is invariant across declared values (slot count
+        // is fixed for a given bucket); keep it.
+    }
+    rebindSlotDrawBufs(slotDraws) {
+        if (slotDraws.length !== this._totalSlots) {
+            throw new Error(`rebindSlotDrawBufs: expected ${this._totalSlots} buffers, got ${slotDraws.length}`);
+        }
+        this.slotDrawBufs = [...slotDraws];
+        this.bindGroup = null;
+    }
+    /** Grow the bucket's slot count when a new rule registers and the
+     *  union of its outputs introduces fresh slots. Allocates the
+     *  additional atomic-count buffers and discards the bind-group
+     *  layout (different N = different binding shape). The caller
+     *  must follow up with `rebuildKernel(...)` so the new kernel
+     *  knows about the new slot count. */
+    growSlots(newCount, newSlotDraws) {
+        if (newCount < this._totalSlots) {
+            throw new Error(`growSlots: cannot shrink (have ${this._totalSlots}, asked for ${newCount})`);
+        }
+        if (newSlotDraws.length !== newCount) {
+            throw new Error(`growSlots: slotDraws.length ${newSlotDraws.length} != newCount ${newCount}`);
+        }
+        for (let i = this._totalSlots; i < newCount; i++) {
+            this.slotCountBufs.push(this.device.createBuffer({
+                label: `${this.label}/slot${i}Count`, size: 4,
+                usage: GPUBufferUsage.STORAGE | GPUBufferUsage.COPY_SRC,
+            }));
+        }
+        this._totalSlots = newCount;
+        this.slotDrawBufs = [...newSlotDraws];
+        this.layout = null;
+        this.clearPipeline = null;
+        this.partitionPipeline = null;
+        this.bindGroup = null;
+    }
+    ensurePipelines() {
+        if (this.layout === null) {
+            const entries = [
+                { binding: 0, visibility: GPUShaderStage.COMPUTE, buffer: { type: "read-only-storage" } }, // arena
+                { binding: 1, visibility: GPUShaderStage.COMPUTE, buffer: { type: "read-only-storage" } }, // master
+                { binding: 2, visibility: GPUShaderStage.COMPUTE, buffer: { type: "uniform" } }, // params
+            ];
+            let nb = 3;
+            for (let i = 0; i < this.totalSlots; i++) {
+                entries.push({ binding: nb + i, visibility: GPUShaderStage.COMPUTE, buffer: { type: "storage" } });
+            }
+            nb += this.totalSlots;
+            for (let i = 0; i < this.totalSlots; i++) {
+                entries.push({ binding: nb + i, visibility: GPUShaderStage.COMPUTE, buffer: { type: "storage" } });
+            }
+            this.layout = this.device.createBindGroupLayout({ label: `${this.label}/bgl`, entries });
+        }
+        if (this.clearPipeline === null || this.partitionPipeline === null) {
+            const module = this.device.createShaderModule({
+                code: this.kernelWGSL,
+                label: `${this.label}/module`,
+            });
+            const plLayout = this.device.createPipelineLayout({ bindGroupLayouts: [this.layout] });
+            this.clearPipeline = this.device.createComputePipeline({
+                label: `${this.label}/clear`, layout: plLayout,
+                compute: { module, entryPoint: "clear" },
+            });
+            this.partitionPipeline = this.device.createComputePipeline({
+                label: `${this.label}/partition`, layout: plLayout,
+                compute: { module, entryPoint: "partitionRecords" },
+            });
+        }
+    }
+    ensureBindGroup(arenaBuf) {
+        this.ensurePipelines();
+        if (this.bindGroup === null) {
+            const entries = [
+                { binding: 0, resource: { buffer: arenaBuf } },
+                { binding: 1, resource: { buffer: this.masterBuf } },
+                { binding: 2, resource: { buffer: this.paramsBuf } },
+            ];
+            let nb = 3;
+            for (let i = 0; i < this.totalSlots; i++) {
+                entries.push({ binding: nb + i, resource: { buffer: this.slotCountBufs[i] } });
+            }
+            nb += this.totalSlots;
+            for (let i = 0; i < this.totalSlots; i++) {
+                entries.push({ binding: nb + i, resource: { buffer: this.slotDrawBufs[i] } });
+            }
+            this.bindGroup = this.device.createBindGroup({
+                label: `${this.label}/bg`,
+                layout: this.layout,
+                entries,
+            });
+        }
+    }
+    appendRecord(drawIdx, indexStart, indexCount, instanceCount, comboId, uniformRefs) {
+        if (uniformRefs.length !== this._numUniforms) {
+            throw new Error(`GpuPartitionScene/appendRecord: expected ${this._numUniforms} uniform refs, got ${uniformRefs.length}`);
+        }
+        if (this.numRecords >= this.capacity)
+            this.grow();
+        const i = this.numRecords;
+        const ru32 = this.recordU32;
+        const o = i * ru32;
+        this.masterShadow[o + 0] = 0;
+        this.masterShadow[o + 1] = drawIdx;
+        this.masterShadow[o + 2] = indexStart;
+        this.masterShadow[o + 3] = indexCount;
+        this.masterShadow[o + 4] = instanceCount;
+        this.masterShadow[o + 5] = comboId >>> 0;
+        for (let k = 0; k < this._numUniforms; k++) {
+            this.masterShadow[o + PARTITION_RECORD_PREFIX_U32 + k] = (uniformRefs[k] ?? 0) >>> 0;
+        }
+        this.numRecords = i + 1;
+        return i;
+    }
+    /** Update an existing record's comboId. Used when an RO already
+     *  in the master is re-classified (rare; only when rule rebucket
+     *  fires on aval marks). */
+    setRecordComboId(recordIdx, comboId) {
+        if (recordIdx < 0 || recordIdx >= this.numRecords)
+            return;
+        this.masterShadow[recordIdx * this.recordU32 + 5] = comboId >>> 0;
+    }
+    /** Update an existing record's uniform ref by uniform index. */
+    setRecordUniformRef(recordIdx, uniformIdx, ref) {
+        if (recordIdx < 0 || recordIdx >= this.numRecords)
+            return;
+        if (uniformIdx < 0 || uniformIdx >= this._numUniforms)
+            return;
+        this.masterShadow[recordIdx * this.recordU32 + PARTITION_RECORD_PREFIX_U32 + uniformIdx] = ref >>> 0;
+    }
+    removeRecord(recordIdx) {
+        if (recordIdx < 0 || recordIdx >= this.numRecords)
+            return -1;
+        const last = this.numRecords - 1;
+        const ru32 = this.recordU32;
+        if (recordIdx !== last) {
+            const dst = recordIdx * ru32;
+            const src = last * ru32;
+            for (let k = 0; k < ru32; k++) {
+                this.masterShadow[dst + k] = this.masterShadow[src + k];
+            }
+        }
+        this.numRecords = last;
+        return recordIdx !== last ? last : -1;
+    }
+    /** Widen the per-record uniform tail from `_numUniforms` to
+     *  `newNumUniforms`. Existing records are restrided in-place; the
+     *  new tail slots are zero-filled (rules added later that read
+     *  the new uniform will only do so under their own combo, where
+     *  records carry real refs). The kernel WGSL must be rebuilt
+     *  separately (`rebuildKernel`). */
+    growUniforms(newNumUniforms) {
+        if (newNumUniforms <= this._numUniforms)
+            return;
+        const oldU32 = partitionRecordU32(this._numUniforms);
+        const newU32 = partitionRecordU32(newNumUniforms);
+        const newBytes = this.capacity * newU32 * 4;
+        const grown = new Uint32Array(newBytes / 4);
+        // Restride existing records into the wider layout.
+        for (let i = 0; i < this.numRecords; i++) {
+            const oldOff = i * oldU32;
+            const newOff = i * newU32;
+            for (let k = 0; k < oldU32; k++)
+                grown[newOff + k] = this.masterShadow[oldOff + k];
+            // Trailing newU32-oldU32 slots stay 0.
+        }
+        this.masterShadow = grown;
+        this.masterBuf.destroy();
+        this.masterBuf = this.device.createBuffer({
+            label: `${this.label}/master`, size: newBytes,
+            usage: GPUBufferUsage.STORAGE | GPUBufferUsage.COPY_DST,
+        });
+        this._numUniforms = newNumUniforms;
+        this.bindGroup = null;
+    }
+    grow() {
+        const newCap = POW2(this.numRecords + 1);
+        const bytes = newCap * this.recordBytes;
+        const grown = new Uint32Array(bytes / 4);
+        grown.set(this.masterShadow);
+        this.masterShadow = grown;
+        this.masterBuf.destroy();
+        this.masterBuf = this.device.createBuffer({
+            label: `${this.label}/master`, size: bytes,
+            usage: GPUBufferUsage.STORAGE | GPUBufferUsage.COPY_DST,
+        });
+        this.capacity = newCap;
+        this.bindGroup = null;
+    }
+    flush() {
+        if (this.numRecords === 0)
+            return;
+        const bytes = this.numRecords * this.recordBytes;
+        this.device.queue.writeBuffer(this.masterBuf, 0, this.masterShadow.buffer, this.masterShadow.byteOffset, bytes);
+    }
+    /** Encode clear + partition into `enc`. */
+    dispatch(arenaBuf, enc) {
+        this.ensureBindGroup(arenaBuf);
+        this.device.queue.writeBuffer(this.paramsBuf, 0, new Uint32Array([this.numRecords, 0, 0, 0]).buffer, 0, 16);
+        const pass = enc.beginComputePass({ label: `${this.label}/pass` });
+        pass.setBindGroup(0, this.bindGroup);
+        pass.setPipeline(this.clearPipeline);
+        pass.dispatchWorkgroups(1);
+        if (this.numRecords > 0) {
+            pass.setPipeline(this.partitionPipeline);
+            pass.dispatchWorkgroups(Math.ceil(this.numRecords / WG_SIZE));
+        }
+        pass.end();
+    }
+    dispose() {
+        this.masterBuf.destroy();
+        for (const b of this.slotCountBufs)
+            b.destroy();
+        this.paramsBuf.destroy();
+    }
+}
+//# sourceMappingURL=partitionDispatcher.js.map

package/dist/runtime/derivedModes/partitionDispatcher.js.map

@@ -0,0 +1 @@
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package/dist/runtime/derivedModes/partitionKernel.d.ts

@@ -0,0 +1,12 @@
+import type { CullMode } from "../pipelineCache/index.js";
+/** Record layout: 6 × u32 = 24 bytes per record. Matches the heap
+ *  scan's record format (5 × u32) plus a `modelRef` byte offset. */
+export declare const PARTITION_RECORD_U32 = 6;
+export declare const PARTITION_RECORD_BYTES: number;
+/** Per-bucket partition kernel WGSL. Two output slots: declared
+ *  + flipped. */
+export declare const PARTITION_FLIP_CULL_BY_DET_WGSL = "\nstruct Record {\n  // firstEmit is GPU-written by the scan; leave as 0 here.\n  firstEmit:     u32,\n  drawIdx:       u32,\n  indexStart:    u32,\n  indexCount:    u32,\n  instanceCount: u32,\n  modelRef:      u32,\n};\nstruct PartitionParams {\n  numRecords:     u32,\n  declaredCull:   u32,   // 0=none, 1=front, 2=back\n  _pad0:          u32,\n  _pad1:          u32,\n};\n\n@group(0) @binding(0) var<storage, read>        arena:           array<u32>;\n@group(0) @binding(1) var<storage, read>        masterRecords:   array<Record>;\n@group(0) @binding(2) var<uniform>              params:          PartitionParams;\n// Slot 0 = declared cull mode. Slot 1 = flipped cull mode.\n@group(0) @binding(3) var<storage, read_write>  slot0Count:      array<atomic<u32>>;  // length 1\n@group(0) @binding(4) var<storage, read_write>  slot1Count:      array<atomic<u32>>;\n// Slot draw tables hold scan-format records (5 \u00D7 u32 per record:\n// firstEmit, drawIdx, indexStart, indexCount, instanceCount). We\n// drop modelRef on scatter \u2014 only the partition kernel needs it,\n// and including it would force the scan to read a 6-u32 stride.\n@group(0) @binding(5) var<storage, read_write>  slot0DrawTable:  array<u32>;\n@group(0) @binding(6) var<storage, read_write>  slot1DrawTable:  array<u32>;\n\nconst SCAN_REC_U32: u32 = 5u;\n\nfn loadUpper3x3(refBytes: u32) -> array<f32, 9> {\n  let baseU32 = (refBytes + 16u) >> 2u;\n  return array<f32, 9>(\n    bitcast<f32>(arena[baseU32 + 0u]),  bitcast<f32>(arena[baseU32 + 1u]),  bitcast<f32>(arena[baseU32 + 2u]),\n    bitcast<f32>(arena[baseU32 + 4u]),  bitcast<f32>(arena[baseU32 + 5u]),  bitcast<f32>(arena[baseU32 + 6u]),\n    bitcast<f32>(arena[baseU32 + 8u]),  bitcast<f32>(arena[baseU32 + 9u]),  bitcast<f32>(arena[baseU32 + 10u]),\n  );\n}\n\nfn det3x3(m: array<f32, 9>) -> f32 {\n  return m[0] * (m[4] * m[8] - m[5] * m[7])\n       - m[1] * (m[3] * m[8] - m[5] * m[6])\n       + m[2] * (m[3] * m[7] - m[4] * m[6]);\n}\n\n@compute @workgroup_size(64)\nfn clear(@builtin(global_invocation_id) gid: vec3<u32>) {\n  // One thread total clears both atomics. Cheap pass.\n  if (gid.x != 0u) { return; }\n  atomicStore(&slot0Count[0], 0u);\n  atomicStore(&slot1Count[0], 0u);\n}\n\n@compute @workgroup_size(64)\nfn partition(@builtin(global_invocation_id) gid: vec3<u32>) {\n  let i = gid.x;\n  if (i >= params.numRecords) { return; }\n  let r = masterRecords[i];\n  let m = loadUpper3x3(r.modelRef);\n  let flipped = det3x3(m) < 0.0;\n  // slotIdx 0 = declared (not flipped), 1 = flipped.\n  // Atomic-add into the appropriate slot's count, then scatter the\n  // record into the slot's drawTable at the reserved offset.\n  if (flipped) {\n    let off = atomicAdd(&slot1Count[0], 1u);\n    let base = off * SCAN_REC_U32;\n    slot1DrawTable[base + 0u] = 0u;              // firstEmit (scan rewrites)\n    slot1DrawTable[base + 1u] = r.drawIdx;\n    slot1DrawTable[base + 2u] = r.indexStart;\n    slot1DrawTable[base + 3u] = r.indexCount;\n    slot1DrawTable[base + 4u] = r.instanceCount;\n  } else {\n    let off = atomicAdd(&slot0Count[0], 1u);\n    let base = off * SCAN_REC_U32;\n    slot0DrawTable[base + 0u] = 0u;\n    slot0DrawTable[base + 1u] = r.drawIdx;\n    slot0DrawTable[base + 2u] = r.indexStart;\n    slot0DrawTable[base + 3u] = r.indexCount;\n    slot0DrawTable[base + 4u] = r.instanceCount;\n  }\n}\n";
+/** WGSL helper: pack a Trafo3d's upper-left 3×3 + a CullMode enum
+ *  into the partition kernel's expected uniform layout. */
+export declare function cullModeToU32(c: CullMode): number;
+//# sourceMappingURL=partitionKernel.d.ts.map

package/dist/runtime/derivedModes/partitionKernel.d.ts.map

@@ -0,0 +1 @@
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