xcodebuild-helper 1.0.0
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +7 -0
- data/.codeclimate.yml +20 -0
- data/.gitignore +1 -0
- data/.rspec +2 -0
- data/.travis.yml +7 -0
- data/Gemfile +6 -0
- data/Gemfile.lock +110 -0
- data/Guardfile +18 -0
- data/README.md +7 -0
- data/Rakefile +7 -0
- data/TODO.md +3 -0
- data/bin/oclint +5 -0
- data/bin/oclint-0.8 +5 -0
- data/bin/oclint-json-compilation-database +5 -0
- data/bin/oclint-xcodebuild +5 -0
- data/externals/oclint/LICENSE +69 -0
- data/externals/oclint/bin/oclint +0 -0
- data/externals/oclint/bin/oclint-0.10.2 +0 -0
- data/externals/oclint/bin/oclint-json-compilation-database +88 -0
- data/externals/oclint/bin/oclint-xcodebuild +218 -0
- data/externals/oclint/lib/clang/3.7.0/asan_blacklist.txt +13 -0
- data/externals/oclint/lib/clang/3.7.0/include/Intrin.h +958 -0
- data/externals/oclint/lib/clang/3.7.0/include/__stddef_max_align_t.h +43 -0
- data/externals/oclint/lib/clang/3.7.0/include/__wmmintrin_aes.h +72 -0
- data/externals/oclint/lib/clang/3.7.0/include/__wmmintrin_pclmul.h +34 -0
- data/externals/oclint/lib/clang/3.7.0/include/adxintrin.h +88 -0
- data/externals/oclint/lib/clang/3.7.0/include/altivec.h +13528 -0
- data/externals/oclint/lib/clang/3.7.0/include/ammintrin.h +215 -0
- data/externals/oclint/lib/clang/3.7.0/include/arm_acle.h +304 -0
- data/externals/oclint/lib/clang/3.7.0/include/arm_neon.h +68419 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx2intrin.h +1256 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512bwintrin.h +1250 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512cdintrin.h +131 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512dqintrin.h +242 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512erintrin.h +285 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512fintrin.h +2457 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512vlbwintrin.h +1907 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512vldqintrin.h +353 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512vlintrin.h +1982 -0
- data/externals/oclint/lib/clang/3.7.0/include/avxintrin.h +1308 -0
- data/externals/oclint/lib/clang/3.7.0/include/bmi2intrin.h +99 -0
- data/externals/oclint/lib/clang/3.7.0/include/bmiintrin.h +153 -0
- data/externals/oclint/lib/clang/3.7.0/include/cpuid.h +209 -0
- data/externals/oclint/lib/clang/3.7.0/include/cuda_builtin_vars.h +110 -0
- data/externals/oclint/lib/clang/3.7.0/include/emmintrin.h +1480 -0
- data/externals/oclint/lib/clang/3.7.0/include/f16cintrin.h +63 -0
- data/externals/oclint/lib/clang/3.7.0/include/float.h +124 -0
- data/externals/oclint/lib/clang/3.7.0/include/fma4intrin.h +236 -0
- data/externals/oclint/lib/clang/3.7.0/include/fmaintrin.h +234 -0
- data/externals/oclint/lib/clang/3.7.0/include/fxsrintrin.h +55 -0
- data/externals/oclint/lib/clang/3.7.0/include/htmintrin.h +226 -0
- data/externals/oclint/lib/clang/3.7.0/include/htmxlintrin.h +363 -0
- data/externals/oclint/lib/clang/3.7.0/include/ia32intrin.h +101 -0
- data/externals/oclint/lib/clang/3.7.0/include/immintrin.h +203 -0
- data/externals/oclint/lib/clang/3.7.0/include/inttypes.h +102 -0
- data/externals/oclint/lib/clang/3.7.0/include/iso646.h +43 -0
- data/externals/oclint/lib/clang/3.7.0/include/limits.h +118 -0
- data/externals/oclint/lib/clang/3.7.0/include/lzcntintrin.h +72 -0
- data/externals/oclint/lib/clang/3.7.0/include/mm3dnow.h +167 -0
- data/externals/oclint/lib/clang/3.7.0/include/mm_malloc.h +75 -0
- data/externals/oclint/lib/clang/3.7.0/include/mmintrin.h +507 -0
- data/externals/oclint/lib/clang/3.7.0/include/module.modulemap +196 -0
- data/externals/oclint/lib/clang/3.7.0/include/nmmintrin.h +35 -0
- data/externals/oclint/lib/clang/3.7.0/include/pmmintrin.h +122 -0
- data/externals/oclint/lib/clang/3.7.0/include/popcntintrin.h +50 -0
- data/externals/oclint/lib/clang/3.7.0/include/prfchwintrin.h +39 -0
- data/externals/oclint/lib/clang/3.7.0/include/rdseedintrin.h +59 -0
- data/externals/oclint/lib/clang/3.7.0/include/rtmintrin.h +59 -0
- data/externals/oclint/lib/clang/3.7.0/include/s390intrin.h +39 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/allocator_interface.h +66 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/asan_interface.h +155 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/common_interface_defs.h +118 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/coverage_interface.h +63 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/dfsan_interface.h +114 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/linux_syscall_hooks.h +3070 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/lsan_interface.h +84 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/msan_interface.h +107 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/tsan_interface_atomic.h +222 -0
- data/externals/oclint/lib/clang/3.7.0/include/shaintrin.h +79 -0
- data/externals/oclint/lib/clang/3.7.0/include/smmintrin.h +487 -0
- data/externals/oclint/lib/clang/3.7.0/include/stdalign.h +35 -0
- data/externals/oclint/lib/clang/3.7.0/include/stdarg.h +52 -0
- data/externals/oclint/lib/clang/3.7.0/include/stdatomic.h +190 -0
- data/externals/oclint/lib/clang/3.7.0/include/stdbool.h +44 -0
- data/externals/oclint/lib/clang/3.7.0/include/stddef.h +137 -0
- data/externals/oclint/lib/clang/3.7.0/include/stdint.h +707 -0
- data/externals/oclint/lib/clang/3.7.0/include/stdnoreturn.h +30 -0
- data/externals/oclint/lib/clang/3.7.0/include/tbmintrin.h +154 -0
- data/externals/oclint/lib/clang/3.7.0/include/tgmath.h +1374 -0
- data/externals/oclint/lib/clang/3.7.0/include/tmmintrin.h +230 -0
- data/externals/oclint/lib/clang/3.7.0/include/unwind.h +282 -0
- data/externals/oclint/lib/clang/3.7.0/include/vadefs.h +65 -0
- data/externals/oclint/lib/clang/3.7.0/include/varargs.h +26 -0
- data/externals/oclint/lib/clang/3.7.0/include/vecintrin.h +8946 -0
- data/externals/oclint/lib/clang/3.7.0/include/wmmintrin.h +42 -0
- data/externals/oclint/lib/clang/3.7.0/include/x86intrin.h +81 -0
- data/externals/oclint/lib/clang/3.7.0/include/xmmintrin.h +1008 -0
- data/externals/oclint/lib/clang/3.7.0/include/xopintrin.h +809 -0
- data/externals/oclint/lib/clang/3.7.0/include/xtestintrin.h +41 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.asan_iossim_dynamic.dylib +0 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.asan_osx_dynamic.dylib +0 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.builtins-i386.a +0 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.builtins-x86_64.a +0 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.profile_osx.a +0 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.safestack_osx.a +0 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.ubsan_iossim_dynamic.dylib +0 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.ubsan_osx_dynamic.dylib +0 -0
- data/externals/oclint/lib/oclint/reporters/libHTMLReporter.dylib +0 -0
- data/externals/oclint/lib/oclint/reporters/libJSONReporter.dylib +0 -0
- data/externals/oclint/lib/oclint/reporters/libPMDReporter.dylib +0 -0
- data/externals/oclint/lib/oclint/reporters/libTextReporter.dylib +0 -0
- data/externals/oclint/lib/oclint/reporters/libXMLReporter.dylib +0 -0
- data/externals/oclint/lib/oclint/reporters/libXcodeReporter.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libAvoidBranchingStatementAsLastInLoopRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libAvoidDefaultArgumentsOnVirtualMethodsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libAvoidPrivateStaticMembersRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libBaseClassDestructorShouldBeVirtualOrProtectedRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libBitwiseOperatorInConditionalRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libBrokenNullCheckRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libBrokenOddnessCheckRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libCollapsibleIfStatementsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libConstantConditionalOperatorRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libConstantIfExpressionRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libCoveredSwitchStatementsDontNeedDefaultRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libCyclomaticComplexityRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libDeadCodeRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libDefaultLabelNotLastInSwitchStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libDestructorOfVirtualClassRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libDoubleNegativeRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyCatchStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyDoWhileStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyElseBlockRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyFinallyStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyForStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyIfStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptySwitchStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyTryStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyWhileStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libForLoopShouldBeWhileLoopRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libGotoStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libInvertedLogicRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libJumbledIncrementerRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libLongClassRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libLongLineRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libLongMethodRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libLongVariableNameRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libMisplacedNullCheckRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libMissingBreakInSwitchStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libMultipleUnaryOperatorRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libNPathComplexityRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libNcssMethodCountRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libNestedBlockDepthRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libNonCaseLabelInSwitchStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCAssignIvarOutsideAccessorsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCBoxedExpressionsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCContainerLiteralsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCNSNumberLiteralsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCObjectSubscriptingRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCVerifyIsEqualHashRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCVerifyMustCallSuperRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCVerifyProhibitedCallRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCVerifyProtectedMethodRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCVerifySubclassMustImplementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libParameterReassignmentRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libPreferEarlyExitRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libRedundantConditionalOperatorRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libRedundantIfStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libRedundantLocalVariableRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libRedundantNilCheckRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libReturnFromFinallyBlockRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libShortVariableNameRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libSwitchStatementsShouldHaveDefaultRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libThrowExceptionFromFinallyBlockRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libTooFewBranchesInSwitchStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libTooManyFieldsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libTooManyMethodsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libTooManyParametersRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libUnnecessaryElseStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libUnnecessaryNullCheckForCXXDeallocRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libUnusedLocalVariableRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libUnusedMethodParameterRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libUselessParenthesesRule.dylib +0 -0
- data/lib/coverage_plan.rb +19 -0
- data/lib/device.rb +27 -0
- data/lib/execute.rb +7 -0
- data/lib/lint_plan.rb +41 -0
- data/lib/rules.rb +23 -0
- data/lib/test_plan.rb +11 -0
- data/lib/version.rb +3 -0
- data/lib/xcode.rb +128 -0
- data/lib/xcodebuild-helper.rb +110 -0
- data/spec/coverage_plan_spec.rb +18 -0
- data/spec/device_spec.rb +24 -0
- data/spec/lint_plan_spec.rb +35 -0
- data/spec/rule_spec.rb +37 -0
- data/spec/spec_helper.rb +17 -0
- data/spec/test_plan_spec.rb +11 -0
- data/spec/xcode_dsl_actions_spec.rb +136 -0
- data/spec/xcode_dsl_spec.rb +176 -0
- data/spec/xcode_spec.rb +79 -0
- data/xcodebuild-helper.gemspec +26 -0
- metadata +327 -0
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/*===---- avx512vldqintrin.h - AVX512VL and AVX512DQ intrinsics ---------------------------===
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error "Never use <avx512vldqintrin.h> directly; include <immintrin.h> instead."
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#endif
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#ifndef __AVX512VLDQINTRIN_H
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#define __AVX512VLDQINTRIN_H
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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static __inline__ __m256i __DEFAULT_FN_ATTRS
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_mm256_mullo_epi64 (__m256i __A, __m256i __B) {
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return (__m256i) ((__v4di) __A * (__v4di) __B);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS
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_mm256_mask_mullo_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
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return (__m256i) __builtin_ia32_pmullq256_mask ((__v4di) __A,
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(__mmask8) __U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS
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_mm256_maskz_mullo_epi64 (__mmask8 __U, __m256i __A, __m256i __B) {
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return (__m256i) __builtin_ia32_pmullq256_mask ((__v4di) __A,
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS
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_mm_mullo_epi64 (__m128i __A, __m128i __B) {
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return (__m128i) ((__v2di) __A * (__v2di) __B);
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS
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_mm_mask_mullo_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
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(__v2di) __B,
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(__v2di) __W,
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(__mmask8) __U);
|
|
67
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+
}
|
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68
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+
|
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69
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+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
70
|
+
_mm_maskz_mullo_epi64 (__mmask8 __U, __m128i __A, __m128i __B) {
|
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71
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+
return (__m128i) __builtin_ia32_pmullq128_mask ((__v2di) __A,
|
|
72
|
+
(__v2di) __B,
|
|
73
|
+
(__v2di)
|
|
74
|
+
_mm_setzero_si128 (),
|
|
75
|
+
(__mmask8) __U);
|
|
76
|
+
}
|
|
77
|
+
|
|
78
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
79
|
+
_mm256_mask_andnot_pd (__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
|
|
80
|
+
return (__m256d) __builtin_ia32_andnpd256_mask ((__v4df) __A,
|
|
81
|
+
(__v4df) __B,
|
|
82
|
+
(__v4df) __W,
|
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83
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+
(__mmask8) __U);
|
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84
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+
}
|
|
85
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+
|
|
86
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
87
|
+
_mm256_maskz_andnot_pd (__mmask8 __U, __m256d __A, __m256d __B) {
|
|
88
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+
return (__m256d) __builtin_ia32_andnpd256_mask ((__v4df) __A,
|
|
89
|
+
(__v4df) __B,
|
|
90
|
+
(__v4df)
|
|
91
|
+
_mm256_setzero_pd (),
|
|
92
|
+
(__mmask8) __U);
|
|
93
|
+
}
|
|
94
|
+
|
|
95
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
96
|
+
_mm_mask_andnot_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
|
|
97
|
+
return (__m128d) __builtin_ia32_andnpd128_mask ((__v2df) __A,
|
|
98
|
+
(__v2df) __B,
|
|
99
|
+
(__v2df) __W,
|
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100
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+
(__mmask8) __U);
|
|
101
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+
}
|
|
102
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+
|
|
103
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
104
|
+
_mm_maskz_andnot_pd (__mmask8 __U, __m128d __A, __m128d __B) {
|
|
105
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+
return (__m128d) __builtin_ia32_andnpd128_mask ((__v2df) __A,
|
|
106
|
+
(__v2df) __B,
|
|
107
|
+
(__v2df)
|
|
108
|
+
_mm_setzero_pd (),
|
|
109
|
+
(__mmask8) __U);
|
|
110
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+
}
|
|
111
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+
|
|
112
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+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
113
|
+
_mm256_mask_andnot_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
|
|
114
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+
return (__m256) __builtin_ia32_andnps256_mask ((__v8sf) __A,
|
|
115
|
+
(__v8sf) __B,
|
|
116
|
+
(__v8sf) __W,
|
|
117
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+
(__mmask8) __U);
|
|
118
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+
}
|
|
119
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+
|
|
120
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
121
|
+
_mm256_maskz_andnot_ps (__mmask8 __U, __m256 __A, __m256 __B) {
|
|
122
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+
return (__m256) __builtin_ia32_andnps256_mask ((__v8sf) __A,
|
|
123
|
+
(__v8sf) __B,
|
|
124
|
+
(__v8sf)
|
|
125
|
+
_mm256_setzero_ps (),
|
|
126
|
+
(__mmask8) __U);
|
|
127
|
+
}
|
|
128
|
+
|
|
129
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
130
|
+
_mm_mask_andnot_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
|
|
131
|
+
return (__m128) __builtin_ia32_andnps128_mask ((__v4sf) __A,
|
|
132
|
+
(__v4sf) __B,
|
|
133
|
+
(__v4sf) __W,
|
|
134
|
+
(__mmask8) __U);
|
|
135
|
+
}
|
|
136
|
+
|
|
137
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
138
|
+
_mm_maskz_andnot_ps (__mmask8 __U, __m128 __A, __m128 __B) {
|
|
139
|
+
return (__m128) __builtin_ia32_andnps128_mask ((__v4sf) __A,
|
|
140
|
+
(__v4sf) __B,
|
|
141
|
+
(__v4sf)
|
|
142
|
+
_mm_setzero_ps (),
|
|
143
|
+
(__mmask8) __U);
|
|
144
|
+
}
|
|
145
|
+
|
|
146
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
147
|
+
_mm256_mask_and_pd (__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
|
|
148
|
+
return (__m256d) __builtin_ia32_andpd256_mask ((__v4df) __A,
|
|
149
|
+
(__v4df) __B,
|
|
150
|
+
(__v4df) __W,
|
|
151
|
+
(__mmask8) __U);
|
|
152
|
+
}
|
|
153
|
+
|
|
154
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
155
|
+
_mm256_maskz_and_pd (__mmask8 __U, __m256d __A, __m256d __B) {
|
|
156
|
+
return (__m256d) __builtin_ia32_andpd256_mask ((__v4df) __A,
|
|
157
|
+
(__v4df) __B,
|
|
158
|
+
(__v4df)
|
|
159
|
+
_mm256_setzero_pd (),
|
|
160
|
+
(__mmask8) __U);
|
|
161
|
+
}
|
|
162
|
+
|
|
163
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
164
|
+
_mm_mask_and_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
|
|
165
|
+
return (__m128d) __builtin_ia32_andpd128_mask ((__v2df) __A,
|
|
166
|
+
(__v2df) __B,
|
|
167
|
+
(__v2df) __W,
|
|
168
|
+
(__mmask8) __U);
|
|
169
|
+
}
|
|
170
|
+
|
|
171
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
172
|
+
_mm_maskz_and_pd (__mmask8 __U, __m128d __A, __m128d __B) {
|
|
173
|
+
return (__m128d) __builtin_ia32_andpd128_mask ((__v2df) __A,
|
|
174
|
+
(__v2df) __B,
|
|
175
|
+
(__v2df)
|
|
176
|
+
_mm_setzero_pd (),
|
|
177
|
+
(__mmask8) __U);
|
|
178
|
+
}
|
|
179
|
+
|
|
180
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
181
|
+
_mm256_mask_and_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
|
|
182
|
+
return (__m256) __builtin_ia32_andps256_mask ((__v8sf) __A,
|
|
183
|
+
(__v8sf) __B,
|
|
184
|
+
(__v8sf) __W,
|
|
185
|
+
(__mmask8) __U);
|
|
186
|
+
}
|
|
187
|
+
|
|
188
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
189
|
+
_mm256_maskz_and_ps (__mmask8 __U, __m256 __A, __m256 __B) {
|
|
190
|
+
return (__m256) __builtin_ia32_andps256_mask ((__v8sf) __A,
|
|
191
|
+
(__v8sf) __B,
|
|
192
|
+
(__v8sf)
|
|
193
|
+
_mm256_setzero_ps (),
|
|
194
|
+
(__mmask8) __U);
|
|
195
|
+
}
|
|
196
|
+
|
|
197
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
198
|
+
_mm_mask_and_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
|
|
199
|
+
return (__m128) __builtin_ia32_andps128_mask ((__v4sf) __A,
|
|
200
|
+
(__v4sf) __B,
|
|
201
|
+
(__v4sf) __W,
|
|
202
|
+
(__mmask8) __U);
|
|
203
|
+
}
|
|
204
|
+
|
|
205
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
206
|
+
_mm_maskz_and_ps (__mmask8 __U, __m128 __A, __m128 __B) {
|
|
207
|
+
return (__m128) __builtin_ia32_andps128_mask ((__v4sf) __A,
|
|
208
|
+
(__v4sf) __B,
|
|
209
|
+
(__v4sf)
|
|
210
|
+
_mm_setzero_ps (),
|
|
211
|
+
(__mmask8) __U);
|
|
212
|
+
}
|
|
213
|
+
|
|
214
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
215
|
+
_mm256_mask_xor_pd (__m256d __W, __mmask8 __U, __m256d __A,
|
|
216
|
+
__m256d __B) {
|
|
217
|
+
return (__m256d) __builtin_ia32_xorpd256_mask ((__v4df) __A,
|
|
218
|
+
(__v4df) __B,
|
|
219
|
+
(__v4df) __W,
|
|
220
|
+
(__mmask8) __U);
|
|
221
|
+
}
|
|
222
|
+
|
|
223
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
224
|
+
_mm256_maskz_xor_pd (__mmask8 __U, __m256d __A, __m256d __B) {
|
|
225
|
+
return (__m256d) __builtin_ia32_xorpd256_mask ((__v4df) __A,
|
|
226
|
+
(__v4df) __B,
|
|
227
|
+
(__v4df)
|
|
228
|
+
_mm256_setzero_pd (),
|
|
229
|
+
(__mmask8) __U);
|
|
230
|
+
}
|
|
231
|
+
|
|
232
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
233
|
+
_mm_mask_xor_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
|
|
234
|
+
return (__m128d) __builtin_ia32_xorpd128_mask ((__v2df) __A,
|
|
235
|
+
(__v2df) __B,
|
|
236
|
+
(__v2df) __W,
|
|
237
|
+
(__mmask8) __U);
|
|
238
|
+
}
|
|
239
|
+
|
|
240
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
241
|
+
_mm_maskz_xor_pd (__mmask8 __U, __m128d __A, __m128d __B) {
|
|
242
|
+
return (__m128d) __builtin_ia32_xorpd128_mask ((__v2df) __A,
|
|
243
|
+
(__v2df) __B,
|
|
244
|
+
(__v2df)
|
|
245
|
+
_mm_setzero_pd (),
|
|
246
|
+
(__mmask8) __U);
|
|
247
|
+
}
|
|
248
|
+
|
|
249
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
250
|
+
_mm256_mask_xor_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
|
|
251
|
+
return (__m256) __builtin_ia32_xorps256_mask ((__v8sf) __A,
|
|
252
|
+
(__v8sf) __B,
|
|
253
|
+
(__v8sf) __W,
|
|
254
|
+
(__mmask8) __U);
|
|
255
|
+
}
|
|
256
|
+
|
|
257
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
258
|
+
_mm256_maskz_xor_ps (__mmask8 __U, __m256 __A, __m256 __B) {
|
|
259
|
+
return (__m256) __builtin_ia32_xorps256_mask ((__v8sf) __A,
|
|
260
|
+
(__v8sf) __B,
|
|
261
|
+
(__v8sf)
|
|
262
|
+
_mm256_setzero_ps (),
|
|
263
|
+
(__mmask8) __U);
|
|
264
|
+
}
|
|
265
|
+
|
|
266
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
267
|
+
_mm_mask_xor_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
|
|
268
|
+
return (__m128) __builtin_ia32_xorps128_mask ((__v4sf) __A,
|
|
269
|
+
(__v4sf) __B,
|
|
270
|
+
(__v4sf) __W,
|
|
271
|
+
(__mmask8) __U);
|
|
272
|
+
}
|
|
273
|
+
|
|
274
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
275
|
+
_mm_maskz_xor_ps (__mmask8 __U, __m128 __A, __m128 __B) {
|
|
276
|
+
return (__m128) __builtin_ia32_xorps128_mask ((__v4sf) __A,
|
|
277
|
+
(__v4sf) __B,
|
|
278
|
+
(__v4sf)
|
|
279
|
+
_mm_setzero_ps (),
|
|
280
|
+
(__mmask8) __U);
|
|
281
|
+
}
|
|
282
|
+
|
|
283
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
284
|
+
_mm256_mask_or_pd (__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
|
|
285
|
+
return (__m256d) __builtin_ia32_orpd256_mask ((__v4df) __A,
|
|
286
|
+
(__v4df) __B,
|
|
287
|
+
(__v4df) __W,
|
|
288
|
+
(__mmask8) __U);
|
|
289
|
+
}
|
|
290
|
+
|
|
291
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
292
|
+
_mm256_maskz_or_pd (__mmask8 __U, __m256d __A, __m256d __B) {
|
|
293
|
+
return (__m256d) __builtin_ia32_orpd256_mask ((__v4df) __A,
|
|
294
|
+
(__v4df) __B,
|
|
295
|
+
(__v4df)
|
|
296
|
+
_mm256_setzero_pd (),
|
|
297
|
+
(__mmask8) __U);
|
|
298
|
+
}
|
|
299
|
+
|
|
300
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
301
|
+
_mm_mask_or_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
|
|
302
|
+
return (__m128d) __builtin_ia32_orpd128_mask ((__v2df) __A,
|
|
303
|
+
(__v2df) __B,
|
|
304
|
+
(__v2df) __W,
|
|
305
|
+
(__mmask8) __U);
|
|
306
|
+
}
|
|
307
|
+
|
|
308
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
309
|
+
_mm_maskz_or_pd (__mmask8 __U, __m128d __A, __m128d __B) {
|
|
310
|
+
return (__m128d) __builtin_ia32_orpd128_mask ((__v2df) __A,
|
|
311
|
+
(__v2df) __B,
|
|
312
|
+
(__v2df)
|
|
313
|
+
_mm_setzero_pd (),
|
|
314
|
+
(__mmask8) __U);
|
|
315
|
+
}
|
|
316
|
+
|
|
317
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
318
|
+
_mm256_mask_or_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
|
|
319
|
+
return (__m256) __builtin_ia32_orps256_mask ((__v8sf) __A,
|
|
320
|
+
(__v8sf) __B,
|
|
321
|
+
(__v8sf) __W,
|
|
322
|
+
(__mmask8) __U);
|
|
323
|
+
}
|
|
324
|
+
|
|
325
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
326
|
+
_mm256_maskz_or_ps (__mmask8 __U, __m256 __A, __m256 __B) {
|
|
327
|
+
return (__m256) __builtin_ia32_orps256_mask ((__v8sf) __A,
|
|
328
|
+
(__v8sf) __B,
|
|
329
|
+
(__v8sf)
|
|
330
|
+
_mm256_setzero_ps (),
|
|
331
|
+
(__mmask8) __U);
|
|
332
|
+
}
|
|
333
|
+
|
|
334
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
335
|
+
_mm_mask_or_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
|
|
336
|
+
return (__m128) __builtin_ia32_orps128_mask ((__v4sf) __A,
|
|
337
|
+
(__v4sf) __B,
|
|
338
|
+
(__v4sf) __W,
|
|
339
|
+
(__mmask8) __U);
|
|
340
|
+
}
|
|
341
|
+
|
|
342
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
343
|
+
_mm_maskz_or_ps (__mmask8 __U, __m128 __A, __m128 __B) {
|
|
344
|
+
return (__m128) __builtin_ia32_orps128_mask ((__v4sf) __A,
|
|
345
|
+
(__v4sf) __B,
|
|
346
|
+
(__v4sf)
|
|
347
|
+
_mm_setzero_ps (),
|
|
348
|
+
(__mmask8) __U);
|
|
349
|
+
}
|
|
350
|
+
|
|
351
|
+
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/*===---- avx512vlintrin.h - AVX512VL intrinsics ---------------------------===
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error "Never use <avx512vlintrin.h> directly; include <immintrin.h> instead."
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#endif
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#ifndef __AVX512VLINTRIN_H
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#define __AVX512VLINTRIN_H
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/* Define the default attributes for the functions in this file. */
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/* Integer compare */
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static __inline__ __mmask8 __DEFAULT_FN_ATTRS
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_mm_cmpeq_epi32_mask(__m128i __a, __m128i __b) {
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return (__mmask8)__builtin_ia32_pcmpeqd128_mask((__v4si)__a, (__v4si)__b,
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(__mmask8)-1);
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}
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static __inline__ __mmask8 __DEFAULT_FN_ATTRS
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_mm_mask_cmpeq_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
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return (__mmask8)__builtin_ia32_pcmpeqd128_mask((__v4si)__a, (__v4si)__b,
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__u);
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}
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static __inline__ __mmask8 __DEFAULT_FN_ATTRS
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_mm_cmpeq_epu32_mask(__m128i __a, __m128i __b) {
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return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 0,
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(__mmask8)-1);
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}
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static __inline__ __mmask8 __DEFAULT_FN_ATTRS
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_mm_mask_cmpeq_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
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return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 0,
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__u);
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}
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static __inline__ __mmask8 __DEFAULT_FN_ATTRS
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_mm256_cmpeq_epi32_mask(__m256i __a, __m256i __b) {
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return (__mmask8)__builtin_ia32_pcmpeqd256_mask((__v8si)__a, (__v8si)__b,
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(__mmask8)-1);
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}
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_mm256_mask_cmpeq_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
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return (__mmask8)__builtin_ia32_pcmpeqd256_mask((__v8si)__a, (__v8si)__b,
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__u);
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}
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static __inline__ __mmask8 __DEFAULT_FN_ATTRS
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_mm256_cmpeq_epu32_mask(__m256i __a, __m256i __b) {
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(__mmask8)-1);
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}
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_mm256_mask_cmpeq_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
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__u);
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}
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_mm_cmpeq_epi64_mask(__m128i __a, __m128i __b) {
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(__mmask8)-1);
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_mm_mask_cmpeq_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
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__u);
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_mm_cmpeq_epu64_mask(__m128i __a, __m128i __b) {
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(__mmask8)-1);
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__u);
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_mm256_cmpeq_epi64_mask(__m256i __a, __m256i __b) {
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return (__mmask8)__builtin_ia32_pcmpeqq256_mask((__v4di)__a, (__v4di)__b,
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(__mmask8)-1);
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}
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static __inline__ __mmask8 __DEFAULT_FN_ATTRS
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_mm256_mask_cmpeq_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
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return (__mmask8)__builtin_ia32_pcmpeqq256_mask((__v4di)__a, (__v4di)__b,
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__u);
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}
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static __inline__ __mmask8 __DEFAULT_FN_ATTRS
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_mm256_cmpeq_epu64_mask(__m256i __a, __m256i __b) {
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(__mmask8)-1);
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}
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static __inline__ __mmask8 __DEFAULT_FN_ATTRS
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_mm256_mask_cmpeq_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
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return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 0,
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__u);
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}
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static __inline__ __mmask8 __DEFAULT_FN_ATTRS
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_mm_cmpge_epi32_mask(__m128i __a, __m128i __b) {
|
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return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 5,
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(__mmask8)-1);
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}
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|
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static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
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_mm_mask_cmpge_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
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return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 5,
|
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__u);
|
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}
|
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|
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|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
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146
|
+
_mm_cmpge_epu32_mask(__m128i __a, __m128i __b) {
|
|
147
|
+
return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 5,
|
|
148
|
+
(__mmask8)-1);
|
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149
|
+
}
|
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+
|
|
151
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
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152
|
+
_mm_mask_cmpge_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
153
|
+
return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 5,
|
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__u);
|
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+
}
|
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|
+
|
|
157
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
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158
|
+
_mm256_cmpge_epi32_mask(__m256i __a, __m256i __b) {
|
|
159
|
+
return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 5,
|
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160
|
+
(__mmask8)-1);
|
|
161
|
+
}
|
|
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|
+
|
|
163
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
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164
|
+
_mm256_mask_cmpge_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
165
|
+
return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 5,
|
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166
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__u);
|
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167
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+
}
|
|
168
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+
|
|
169
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
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170
|
+
_mm256_cmpge_epu32_mask(__m256i __a, __m256i __b) {
|
|
171
|
+
return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 5,
|
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172
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+
(__mmask8)-1);
|
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173
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+
}
|
|
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+
|
|
175
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
176
|
+
_mm256_mask_cmpge_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
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177
|
+
return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 5,
|
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178
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__u);
|
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179
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}
|
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+
|
|
181
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
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182
|
+
_mm_cmpge_epi64_mask(__m128i __a, __m128i __b) {
|
|
183
|
+
return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 5,
|
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184
|
+
(__mmask8)-1);
|
|
185
|
+
}
|
|
186
|
+
|
|
187
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
188
|
+
_mm_mask_cmpge_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
189
|
+
return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 5,
|
|
190
|
+
__u);
|
|
191
|
+
}
|
|
192
|
+
|
|
193
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
194
|
+
_mm_cmpge_epu64_mask(__m128i __a, __m128i __b) {
|
|
195
|
+
return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 5,
|
|
196
|
+
(__mmask8)-1);
|
|
197
|
+
}
|
|
198
|
+
|
|
199
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
200
|
+
_mm_mask_cmpge_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
201
|
+
return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 5,
|
|
202
|
+
__u);
|
|
203
|
+
}
|
|
204
|
+
|
|
205
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
206
|
+
_mm256_cmpge_epi64_mask(__m256i __a, __m256i __b) {
|
|
207
|
+
return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 5,
|
|
208
|
+
(__mmask8)-1);
|
|
209
|
+
}
|
|
210
|
+
|
|
211
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
212
|
+
_mm256_mask_cmpge_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
213
|
+
return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 5,
|
|
214
|
+
__u);
|
|
215
|
+
}
|
|
216
|
+
|
|
217
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
218
|
+
_mm256_cmpge_epu64_mask(__m256i __a, __m256i __b) {
|
|
219
|
+
return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 5,
|
|
220
|
+
(__mmask8)-1);
|
|
221
|
+
}
|
|
222
|
+
|
|
223
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
224
|
+
_mm256_mask_cmpge_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
225
|
+
return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 5,
|
|
226
|
+
__u);
|
|
227
|
+
}
|
|
228
|
+
|
|
229
|
+
|
|
230
|
+
|
|
231
|
+
|
|
232
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
233
|
+
_mm_cmpgt_epi32_mask(__m128i __a, __m128i __b) {
|
|
234
|
+
return (__mmask8)__builtin_ia32_pcmpgtd128_mask((__v4si)__a, (__v4si)__b,
|
|
235
|
+
(__mmask8)-1);
|
|
236
|
+
}
|
|
237
|
+
|
|
238
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
239
|
+
_mm_mask_cmpgt_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
240
|
+
return (__mmask8)__builtin_ia32_pcmpgtd128_mask((__v4si)__a, (__v4si)__b,
|
|
241
|
+
__u);
|
|
242
|
+
}
|
|
243
|
+
|
|
244
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
245
|
+
_mm_cmpgt_epu32_mask(__m128i __a, __m128i __b) {
|
|
246
|
+
return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 6,
|
|
247
|
+
(__mmask8)-1);
|
|
248
|
+
}
|
|
249
|
+
|
|
250
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
251
|
+
_mm_mask_cmpgt_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
252
|
+
return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 6,
|
|
253
|
+
__u);
|
|
254
|
+
}
|
|
255
|
+
|
|
256
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
257
|
+
_mm256_cmpgt_epi32_mask(__m256i __a, __m256i __b) {
|
|
258
|
+
return (__mmask8)__builtin_ia32_pcmpgtd256_mask((__v8si)__a, (__v8si)__b,
|
|
259
|
+
(__mmask8)-1);
|
|
260
|
+
}
|
|
261
|
+
|
|
262
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
263
|
+
_mm256_mask_cmpgt_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
264
|
+
return (__mmask8)__builtin_ia32_pcmpgtd256_mask((__v8si)__a, (__v8si)__b,
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265
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__u);
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266
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}
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268
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static __inline__ __mmask8 __DEFAULT_FN_ATTRS
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269
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_mm256_cmpgt_epu32_mask(__m256i __a, __m256i __b) {
|
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270
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return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 6,
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271
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(__mmask8)-1);
|
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272
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}
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274
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static __inline__ __mmask8 __DEFAULT_FN_ATTRS
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275
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+
_mm256_mask_cmpgt_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
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276
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return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 6,
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277
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+
__u);
|
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278
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}
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279
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+
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280
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+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
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281
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+
_mm_cmpgt_epi64_mask(__m128i __a, __m128i __b) {
|
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282
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return (__mmask8)__builtin_ia32_pcmpgtq128_mask((__v2di)__a, (__v2di)__b,
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283
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+
(__mmask8)-1);
|
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284
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+
}
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285
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+
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286
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+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
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287
|
+
_mm_mask_cmpgt_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
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288
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+
return (__mmask8)__builtin_ia32_pcmpgtq128_mask((__v2di)__a, (__v2di)__b,
|
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289
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+
__u);
|
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290
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+
}
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291
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+
|
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292
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+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
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293
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+
_mm_cmpgt_epu64_mask(__m128i __a, __m128i __b) {
|
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294
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+
return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 6,
|
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295
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+
(__mmask8)-1);
|
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296
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+
}
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297
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+
|
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298
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+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
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299
|
+
_mm_mask_cmpgt_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
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300
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+
return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 6,
|
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301
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+
__u);
|
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302
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+
}
|
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303
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+
|
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304
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+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
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305
|
+
_mm256_cmpgt_epi64_mask(__m256i __a, __m256i __b) {
|
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306
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+
return (__mmask8)__builtin_ia32_pcmpgtq256_mask((__v4di)__a, (__v4di)__b,
|
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307
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+
(__mmask8)-1);
|
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308
|
+
}
|
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309
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+
|
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310
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
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311
|
+
_mm256_mask_cmpgt_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
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312
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+
return (__mmask8)__builtin_ia32_pcmpgtq256_mask((__v4di)__a, (__v4di)__b,
|
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313
|
+
__u);
|
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314
|
+
}
|
|
315
|
+
|
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316
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
317
|
+
_mm256_cmpgt_epu64_mask(__m256i __a, __m256i __b) {
|
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318
|
+
return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 6,
|
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319
|
+
(__mmask8)-1);
|
|
320
|
+
}
|
|
321
|
+
|
|
322
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
323
|
+
_mm256_mask_cmpgt_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
324
|
+
return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 6,
|
|
325
|
+
__u);
|
|
326
|
+
}
|
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327
|
+
|
|
328
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
329
|
+
_mm_cmple_epi32_mask(__m128i __a, __m128i __b) {
|
|
330
|
+
return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 2,
|
|
331
|
+
(__mmask8)-1);
|
|
332
|
+
}
|
|
333
|
+
|
|
334
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
335
|
+
_mm_mask_cmple_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
336
|
+
return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 2,
|
|
337
|
+
__u);
|
|
338
|
+
}
|
|
339
|
+
|
|
340
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
341
|
+
_mm_cmple_epu32_mask(__m128i __a, __m128i __b) {
|
|
342
|
+
return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 2,
|
|
343
|
+
(__mmask8)-1);
|
|
344
|
+
}
|
|
345
|
+
|
|
346
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
347
|
+
_mm_mask_cmple_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
348
|
+
return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 2,
|
|
349
|
+
__u);
|
|
350
|
+
}
|
|
351
|
+
|
|
352
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
353
|
+
_mm256_cmple_epi32_mask(__m256i __a, __m256i __b) {
|
|
354
|
+
return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 2,
|
|
355
|
+
(__mmask8)-1);
|
|
356
|
+
}
|
|
357
|
+
|
|
358
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
359
|
+
_mm256_mask_cmple_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
360
|
+
return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 2,
|
|
361
|
+
__u);
|
|
362
|
+
}
|
|
363
|
+
|
|
364
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
365
|
+
_mm256_cmple_epu32_mask(__m256i __a, __m256i __b) {
|
|
366
|
+
return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 2,
|
|
367
|
+
(__mmask8)-1);
|
|
368
|
+
}
|
|
369
|
+
|
|
370
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
371
|
+
_mm256_mask_cmple_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
372
|
+
return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 2,
|
|
373
|
+
__u);
|
|
374
|
+
}
|
|
375
|
+
|
|
376
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
377
|
+
_mm_cmple_epi64_mask(__m128i __a, __m128i __b) {
|
|
378
|
+
return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 2,
|
|
379
|
+
(__mmask8)-1);
|
|
380
|
+
}
|
|
381
|
+
|
|
382
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
383
|
+
_mm_mask_cmple_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
384
|
+
return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 2,
|
|
385
|
+
__u);
|
|
386
|
+
}
|
|
387
|
+
|
|
388
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
389
|
+
_mm_cmple_epu64_mask(__m128i __a, __m128i __b) {
|
|
390
|
+
return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 2,
|
|
391
|
+
(__mmask8)-1);
|
|
392
|
+
}
|
|
393
|
+
|
|
394
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
395
|
+
_mm_mask_cmple_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
396
|
+
return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 2,
|
|
397
|
+
__u);
|
|
398
|
+
}
|
|
399
|
+
|
|
400
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
401
|
+
_mm256_cmple_epi64_mask(__m256i __a, __m256i __b) {
|
|
402
|
+
return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 2,
|
|
403
|
+
(__mmask8)-1);
|
|
404
|
+
}
|
|
405
|
+
|
|
406
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
407
|
+
_mm256_mask_cmple_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
408
|
+
return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 2,
|
|
409
|
+
__u);
|
|
410
|
+
}
|
|
411
|
+
|
|
412
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
413
|
+
_mm256_cmple_epu64_mask(__m256i __a, __m256i __b) {
|
|
414
|
+
return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 2,
|
|
415
|
+
(__mmask8)-1);
|
|
416
|
+
}
|
|
417
|
+
|
|
418
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
419
|
+
_mm256_mask_cmple_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
420
|
+
return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 2,
|
|
421
|
+
__u);
|
|
422
|
+
}
|
|
423
|
+
|
|
424
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
425
|
+
_mm_cmplt_epi32_mask(__m128i __a, __m128i __b) {
|
|
426
|
+
return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 1,
|
|
427
|
+
(__mmask8)-1);
|
|
428
|
+
}
|
|
429
|
+
|
|
430
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
431
|
+
_mm_mask_cmplt_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
432
|
+
return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 1,
|
|
433
|
+
__u);
|
|
434
|
+
}
|
|
435
|
+
|
|
436
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
437
|
+
_mm_cmplt_epu32_mask(__m128i __a, __m128i __b) {
|
|
438
|
+
return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 1,
|
|
439
|
+
(__mmask8)-1);
|
|
440
|
+
}
|
|
441
|
+
|
|
442
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
443
|
+
_mm_mask_cmplt_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
444
|
+
return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 1,
|
|
445
|
+
__u);
|
|
446
|
+
}
|
|
447
|
+
|
|
448
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
449
|
+
_mm256_cmplt_epi32_mask(__m256i __a, __m256i __b) {
|
|
450
|
+
return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 1,
|
|
451
|
+
(__mmask8)-1);
|
|
452
|
+
}
|
|
453
|
+
|
|
454
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
455
|
+
_mm256_mask_cmplt_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
456
|
+
return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 1,
|
|
457
|
+
__u);
|
|
458
|
+
}
|
|
459
|
+
|
|
460
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
461
|
+
_mm256_cmplt_epu32_mask(__m256i __a, __m256i __b) {
|
|
462
|
+
return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 1,
|
|
463
|
+
(__mmask8)-1);
|
|
464
|
+
}
|
|
465
|
+
|
|
466
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
467
|
+
_mm256_mask_cmplt_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
468
|
+
return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 1,
|
|
469
|
+
__u);
|
|
470
|
+
}
|
|
471
|
+
|
|
472
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
473
|
+
_mm_cmplt_epi64_mask(__m128i __a, __m128i __b) {
|
|
474
|
+
return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 1,
|
|
475
|
+
(__mmask8)-1);
|
|
476
|
+
}
|
|
477
|
+
|
|
478
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
479
|
+
_mm_mask_cmplt_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
480
|
+
return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 1,
|
|
481
|
+
__u);
|
|
482
|
+
}
|
|
483
|
+
|
|
484
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
485
|
+
_mm_cmplt_epu64_mask(__m128i __a, __m128i __b) {
|
|
486
|
+
return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 1,
|
|
487
|
+
(__mmask8)-1);
|
|
488
|
+
}
|
|
489
|
+
|
|
490
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
491
|
+
_mm_mask_cmplt_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
492
|
+
return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 1,
|
|
493
|
+
__u);
|
|
494
|
+
}
|
|
495
|
+
|
|
496
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
497
|
+
_mm256_cmplt_epi64_mask(__m256i __a, __m256i __b) {
|
|
498
|
+
return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 1,
|
|
499
|
+
(__mmask8)-1);
|
|
500
|
+
}
|
|
501
|
+
|
|
502
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
503
|
+
_mm256_mask_cmplt_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
504
|
+
return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 1,
|
|
505
|
+
__u);
|
|
506
|
+
}
|
|
507
|
+
|
|
508
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
509
|
+
_mm256_cmplt_epu64_mask(__m256i __a, __m256i __b) {
|
|
510
|
+
return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 1,
|
|
511
|
+
(__mmask8)-1);
|
|
512
|
+
}
|
|
513
|
+
|
|
514
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
515
|
+
_mm256_mask_cmplt_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
516
|
+
return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 1,
|
|
517
|
+
__u);
|
|
518
|
+
}
|
|
519
|
+
|
|
520
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
521
|
+
_mm_cmpneq_epi32_mask(__m128i __a, __m128i __b) {
|
|
522
|
+
return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 4,
|
|
523
|
+
(__mmask8)-1);
|
|
524
|
+
}
|
|
525
|
+
|
|
526
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
527
|
+
_mm_mask_cmpneq_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
528
|
+
return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 4,
|
|
529
|
+
__u);
|
|
530
|
+
}
|
|
531
|
+
|
|
532
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
533
|
+
_mm_cmpneq_epu32_mask(__m128i __a, __m128i __b) {
|
|
534
|
+
return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 4,
|
|
535
|
+
(__mmask8)-1);
|
|
536
|
+
}
|
|
537
|
+
|
|
538
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
539
|
+
_mm_mask_cmpneq_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
540
|
+
return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 4,
|
|
541
|
+
__u);
|
|
542
|
+
}
|
|
543
|
+
|
|
544
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
545
|
+
_mm256_cmpneq_epi32_mask(__m256i __a, __m256i __b) {
|
|
546
|
+
return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 4,
|
|
547
|
+
(__mmask8)-1);
|
|
548
|
+
}
|
|
549
|
+
|
|
550
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
551
|
+
_mm256_mask_cmpneq_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
552
|
+
return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 4,
|
|
553
|
+
__u);
|
|
554
|
+
}
|
|
555
|
+
|
|
556
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
557
|
+
_mm256_cmpneq_epu32_mask(__m256i __a, __m256i __b) {
|
|
558
|
+
return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 4,
|
|
559
|
+
(__mmask8)-1);
|
|
560
|
+
}
|
|
561
|
+
|
|
562
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
563
|
+
_mm256_mask_cmpneq_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
564
|
+
return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 4,
|
|
565
|
+
__u);
|
|
566
|
+
}
|
|
567
|
+
|
|
568
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
569
|
+
_mm_cmpneq_epi64_mask(__m128i __a, __m128i __b) {
|
|
570
|
+
return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 4,
|
|
571
|
+
(__mmask8)-1);
|
|
572
|
+
}
|
|
573
|
+
|
|
574
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
575
|
+
_mm_mask_cmpneq_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
576
|
+
return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 4,
|
|
577
|
+
__u);
|
|
578
|
+
}
|
|
579
|
+
|
|
580
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
581
|
+
_mm_cmpneq_epu64_mask(__m128i __a, __m128i __b) {
|
|
582
|
+
return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 4,
|
|
583
|
+
(__mmask8)-1);
|
|
584
|
+
}
|
|
585
|
+
|
|
586
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
587
|
+
_mm_mask_cmpneq_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
|
588
|
+
return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 4,
|
|
589
|
+
__u);
|
|
590
|
+
}
|
|
591
|
+
|
|
592
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
593
|
+
_mm256_cmpneq_epi64_mask(__m256i __a, __m256i __b) {
|
|
594
|
+
return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 4,
|
|
595
|
+
(__mmask8)-1);
|
|
596
|
+
}
|
|
597
|
+
|
|
598
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
599
|
+
_mm256_mask_cmpneq_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
600
|
+
return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 4,
|
|
601
|
+
__u);
|
|
602
|
+
}
|
|
603
|
+
|
|
604
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
605
|
+
_mm256_cmpneq_epu64_mask(__m256i __a, __m256i __b) {
|
|
606
|
+
return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 4,
|
|
607
|
+
(__mmask8)-1);
|
|
608
|
+
}
|
|
609
|
+
|
|
610
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
|
611
|
+
_mm256_mask_cmpneq_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
|
|
612
|
+
return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 4,
|
|
613
|
+
__u);
|
|
614
|
+
}
|
|
615
|
+
|
|
616
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
617
|
+
_mm256_mask_add_epi32 (__m256i __W, __mmask8 __U, __m256i __A,
|
|
618
|
+
__m256i __B)
|
|
619
|
+
{
|
|
620
|
+
return (__m256i) __builtin_ia32_paddd256_mask ((__v8si) __A,
|
|
621
|
+
(__v8si) __B,
|
|
622
|
+
(__v8si) __W,
|
|
623
|
+
(__mmask8) __U);
|
|
624
|
+
}
|
|
625
|
+
|
|
626
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
627
|
+
_mm256_maskz_add_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
|
|
628
|
+
{
|
|
629
|
+
return (__m256i) __builtin_ia32_paddd256_mask ((__v8si) __A,
|
|
630
|
+
(__v8si) __B,
|
|
631
|
+
(__v8si)
|
|
632
|
+
_mm256_setzero_si256 (),
|
|
633
|
+
(__mmask8) __U);
|
|
634
|
+
}
|
|
635
|
+
|
|
636
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
637
|
+
_mm256_mask_add_epi64 (__m256i __W, __mmask8 __U, __m256i __A,
|
|
638
|
+
__m256i __B)
|
|
639
|
+
{
|
|
640
|
+
return (__m256i) __builtin_ia32_paddq256_mask ((__v4di) __A,
|
|
641
|
+
(__v4di) __B,
|
|
642
|
+
(__v4di) __W,
|
|
643
|
+
(__mmask8) __U);
|
|
644
|
+
}
|
|
645
|
+
|
|
646
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
647
|
+
_mm256_maskz_add_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
|
|
648
|
+
{
|
|
649
|
+
return (__m256i) __builtin_ia32_paddq256_mask ((__v4di) __A,
|
|
650
|
+
(__v4di) __B,
|
|
651
|
+
(__v4di)
|
|
652
|
+
_mm256_setzero_si256 (),
|
|
653
|
+
(__mmask8) __U);
|
|
654
|
+
}
|
|
655
|
+
|
|
656
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
657
|
+
_mm256_mask_sub_epi32 (__m256i __W, __mmask8 __U, __m256i __A,
|
|
658
|
+
__m256i __B)
|
|
659
|
+
{
|
|
660
|
+
return (__m256i) __builtin_ia32_psubd256_mask ((__v8si) __A,
|
|
661
|
+
(__v8si) __B,
|
|
662
|
+
(__v8si) __W,
|
|
663
|
+
(__mmask8) __U);
|
|
664
|
+
}
|
|
665
|
+
|
|
666
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
667
|
+
_mm256_maskz_sub_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
|
|
668
|
+
{
|
|
669
|
+
return (__m256i) __builtin_ia32_psubd256_mask ((__v8si) __A,
|
|
670
|
+
(__v8si) __B,
|
|
671
|
+
(__v8si)
|
|
672
|
+
_mm256_setzero_si256 (),
|
|
673
|
+
(__mmask8) __U);
|
|
674
|
+
}
|
|
675
|
+
|
|
676
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
677
|
+
_mm256_mask_sub_epi64 (__m256i __W, __mmask8 __U, __m256i __A,
|
|
678
|
+
__m256i __B)
|
|
679
|
+
{
|
|
680
|
+
return (__m256i) __builtin_ia32_psubq256_mask ((__v4di) __A,
|
|
681
|
+
(__v4di) __B,
|
|
682
|
+
(__v4di) __W,
|
|
683
|
+
(__mmask8) __U);
|
|
684
|
+
}
|
|
685
|
+
|
|
686
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
687
|
+
_mm256_maskz_sub_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
|
|
688
|
+
{
|
|
689
|
+
return (__m256i) __builtin_ia32_psubq256_mask ((__v4di) __A,
|
|
690
|
+
(__v4di) __B,
|
|
691
|
+
(__v4di)
|
|
692
|
+
_mm256_setzero_si256 (),
|
|
693
|
+
(__mmask8) __U);
|
|
694
|
+
}
|
|
695
|
+
|
|
696
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
697
|
+
_mm_mask_add_epi32 (__m128i __W, __mmask8 __U, __m128i __A,
|
|
698
|
+
__m128i __B)
|
|
699
|
+
{
|
|
700
|
+
return (__m128i) __builtin_ia32_paddd128_mask ((__v4si) __A,
|
|
701
|
+
(__v4si) __B,
|
|
702
|
+
(__v4si) __W,
|
|
703
|
+
(__mmask8) __U);
|
|
704
|
+
}
|
|
705
|
+
|
|
706
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
707
|
+
_mm_maskz_add_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
|
|
708
|
+
{
|
|
709
|
+
return (__m128i) __builtin_ia32_paddd128_mask ((__v4si) __A,
|
|
710
|
+
(__v4si) __B,
|
|
711
|
+
(__v4si)
|
|
712
|
+
_mm_setzero_si128 (),
|
|
713
|
+
(__mmask8) __U);
|
|
714
|
+
}
|
|
715
|
+
|
|
716
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
717
|
+
_mm_mask_add_epi64 (__m128i __W, __mmask8 __U, __m128i __A,
|
|
718
|
+
__m128i __B)
|
|
719
|
+
{
|
|
720
|
+
return (__m128i) __builtin_ia32_paddq128_mask ((__v2di) __A,
|
|
721
|
+
(__v2di) __B,
|
|
722
|
+
(__v2di) __W,
|
|
723
|
+
(__mmask8) __U);
|
|
724
|
+
}
|
|
725
|
+
|
|
726
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
727
|
+
_mm_maskz_add_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
|
|
728
|
+
{
|
|
729
|
+
return (__m128i) __builtin_ia32_paddq128_mask ((__v2di) __A,
|
|
730
|
+
(__v2di) __B,
|
|
731
|
+
(__v2di)
|
|
732
|
+
_mm_setzero_si128 (),
|
|
733
|
+
(__mmask8) __U);
|
|
734
|
+
}
|
|
735
|
+
|
|
736
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
737
|
+
_mm_mask_sub_epi32 (__m128i __W, __mmask8 __U, __m128i __A,
|
|
738
|
+
__m128i __B)
|
|
739
|
+
{
|
|
740
|
+
return (__m128i) __builtin_ia32_psubd128_mask ((__v4si) __A,
|
|
741
|
+
(__v4si) __B,
|
|
742
|
+
(__v4si) __W,
|
|
743
|
+
(__mmask8) __U);
|
|
744
|
+
}
|
|
745
|
+
|
|
746
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
747
|
+
_mm_maskz_sub_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
|
|
748
|
+
{
|
|
749
|
+
return (__m128i) __builtin_ia32_psubd128_mask ((__v4si) __A,
|
|
750
|
+
(__v4si) __B,
|
|
751
|
+
(__v4si)
|
|
752
|
+
_mm_setzero_si128 (),
|
|
753
|
+
(__mmask8) __U);
|
|
754
|
+
}
|
|
755
|
+
|
|
756
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
757
|
+
_mm_mask_sub_epi64 (__m128i __W, __mmask8 __U, __m128i __A,
|
|
758
|
+
__m128i __B)
|
|
759
|
+
{
|
|
760
|
+
return (__m128i) __builtin_ia32_psubq128_mask ((__v2di) __A,
|
|
761
|
+
(__v2di) __B,
|
|
762
|
+
(__v2di) __W,
|
|
763
|
+
(__mmask8) __U);
|
|
764
|
+
}
|
|
765
|
+
|
|
766
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
767
|
+
_mm_maskz_sub_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
|
|
768
|
+
{
|
|
769
|
+
return (__m128i) __builtin_ia32_psubq128_mask ((__v2di) __A,
|
|
770
|
+
(__v2di) __B,
|
|
771
|
+
(__v2di)
|
|
772
|
+
_mm_setzero_si128 (),
|
|
773
|
+
(__mmask8) __U);
|
|
774
|
+
}
|
|
775
|
+
|
|
776
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
777
|
+
_mm256_mask_mul_epi32 (__m256i __W, __mmask8 __M, __m256i __X,
|
|
778
|
+
__m256i __Y)
|
|
779
|
+
{
|
|
780
|
+
return (__m256i) __builtin_ia32_pmuldq256_mask ((__v8si) __X,
|
|
781
|
+
(__v8si) __Y,
|
|
782
|
+
(__v4di) __W, __M);
|
|
783
|
+
}
|
|
784
|
+
|
|
785
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
786
|
+
_mm256_maskz_mul_epi32 (__mmask8 __M, __m256i __X, __m256i __Y)
|
|
787
|
+
{
|
|
788
|
+
return (__m256i) __builtin_ia32_pmuldq256_mask ((__v8si) __X,
|
|
789
|
+
(__v8si) __Y,
|
|
790
|
+
(__v4di)
|
|
791
|
+
_mm256_setzero_si256 (),
|
|
792
|
+
__M);
|
|
793
|
+
}
|
|
794
|
+
|
|
795
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
796
|
+
_mm_mask_mul_epi32 (__m128i __W, __mmask8 __M, __m128i __X,
|
|
797
|
+
__m128i __Y)
|
|
798
|
+
{
|
|
799
|
+
return (__m128i) __builtin_ia32_pmuldq128_mask ((__v4si) __X,
|
|
800
|
+
(__v4si) __Y,
|
|
801
|
+
(__v2di) __W, __M);
|
|
802
|
+
}
|
|
803
|
+
|
|
804
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
805
|
+
_mm_maskz_mul_epi32 (__mmask8 __M, __m128i __X, __m128i __Y)
|
|
806
|
+
{
|
|
807
|
+
return (__m128i) __builtin_ia32_pmuldq128_mask ((__v4si) __X,
|
|
808
|
+
(__v4si) __Y,
|
|
809
|
+
(__v2di)
|
|
810
|
+
_mm_setzero_si128 (),
|
|
811
|
+
__M);
|
|
812
|
+
}
|
|
813
|
+
|
|
814
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
815
|
+
_mm256_mask_mul_epu32 (__m256i __W, __mmask8 __M, __m256i __X,
|
|
816
|
+
__m256i __Y)
|
|
817
|
+
{
|
|
818
|
+
return (__m256i) __builtin_ia32_pmuludq256_mask ((__v8si) __X,
|
|
819
|
+
(__v8si) __Y,
|
|
820
|
+
(__v4di) __W, __M);
|
|
821
|
+
}
|
|
822
|
+
|
|
823
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
824
|
+
_mm256_maskz_mul_epu32 (__mmask8 __M, __m256i __X, __m256i __Y)
|
|
825
|
+
{
|
|
826
|
+
return (__m256i) __builtin_ia32_pmuludq256_mask ((__v8si) __X,
|
|
827
|
+
(__v8si) __Y,
|
|
828
|
+
(__v4di)
|
|
829
|
+
_mm256_setzero_si256 (),
|
|
830
|
+
__M);
|
|
831
|
+
}
|
|
832
|
+
|
|
833
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
834
|
+
_mm_mask_mul_epu32 (__m128i __W, __mmask8 __M, __m128i __X,
|
|
835
|
+
__m128i __Y)
|
|
836
|
+
{
|
|
837
|
+
return (__m128i) __builtin_ia32_pmuludq128_mask ((__v4si) __X,
|
|
838
|
+
(__v4si) __Y,
|
|
839
|
+
(__v2di) __W, __M);
|
|
840
|
+
}
|
|
841
|
+
|
|
842
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
843
|
+
_mm_maskz_mul_epu32 (__mmask8 __M, __m128i __X, __m128i __Y)
|
|
844
|
+
{
|
|
845
|
+
return (__m128i) __builtin_ia32_pmuludq128_mask ((__v4si) __X,
|
|
846
|
+
(__v4si) __Y,
|
|
847
|
+
(__v2di)
|
|
848
|
+
_mm_setzero_si128 (),
|
|
849
|
+
__M);
|
|
850
|
+
}
|
|
851
|
+
|
|
852
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
853
|
+
_mm256_maskz_mullo_epi32 (__mmask8 __M, __m256i __A, __m256i __B)
|
|
854
|
+
{
|
|
855
|
+
return (__m256i) __builtin_ia32_pmulld256_mask ((__v8si) __A,
|
|
856
|
+
(__v8si) __B,
|
|
857
|
+
(__v8si)
|
|
858
|
+
_mm256_setzero_si256 (),
|
|
859
|
+
__M);
|
|
860
|
+
}
|
|
861
|
+
|
|
862
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
863
|
+
_mm256_mask_mullo_epi32 (__m256i __W, __mmask8 __M, __m256i __A,
|
|
864
|
+
__m256i __B)
|
|
865
|
+
{
|
|
866
|
+
return (__m256i) __builtin_ia32_pmulld256_mask ((__v8si) __A,
|
|
867
|
+
(__v8si) __B,
|
|
868
|
+
(__v8si) __W, __M);
|
|
869
|
+
}
|
|
870
|
+
|
|
871
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
872
|
+
_mm_maskz_mullo_epi32 (__mmask8 __M, __m128i __A, __m128i __B)
|
|
873
|
+
{
|
|
874
|
+
return (__m128i) __builtin_ia32_pmulld128_mask ((__v4si) __A,
|
|
875
|
+
(__v4si) __B,
|
|
876
|
+
(__v4si)
|
|
877
|
+
_mm_setzero_si128 (),
|
|
878
|
+
__M);
|
|
879
|
+
}
|
|
880
|
+
|
|
881
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
882
|
+
_mm_mask_mullo_epi32 (__m128i __W, __mmask16 __M, __m128i __A,
|
|
883
|
+
__m128i __B)
|
|
884
|
+
{
|
|
885
|
+
return (__m128i) __builtin_ia32_pmulld128_mask ((__v4si) __A,
|
|
886
|
+
(__v4si) __B,
|
|
887
|
+
(__v4si) __W, __M);
|
|
888
|
+
}
|
|
889
|
+
|
|
890
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
891
|
+
_mm256_mask_and_epi32 (__m256i __W, __mmask8 __U, __m256i __A,
|
|
892
|
+
__m256i __B)
|
|
893
|
+
{
|
|
894
|
+
return (__m256i) __builtin_ia32_pandd256_mask ((__v8si) __A,
|
|
895
|
+
(__v8si) __B,
|
|
896
|
+
(__v8si) __W,
|
|
897
|
+
(__mmask8) __U);
|
|
898
|
+
}
|
|
899
|
+
|
|
900
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
901
|
+
_mm256_maskz_and_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
|
|
902
|
+
{
|
|
903
|
+
return (__m256i) __builtin_ia32_pandd256_mask ((__v8si) __A,
|
|
904
|
+
(__v8si) __B,
|
|
905
|
+
(__v8si)
|
|
906
|
+
_mm256_setzero_si256 (),
|
|
907
|
+
(__mmask8) __U);
|
|
908
|
+
}
|
|
909
|
+
|
|
910
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
911
|
+
_mm_mask_and_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
|
|
912
|
+
{
|
|
913
|
+
return (__m128i) __builtin_ia32_pandd128_mask ((__v4si) __A,
|
|
914
|
+
(__v4si) __B,
|
|
915
|
+
(__v4si) __W,
|
|
916
|
+
(__mmask8) __U);
|
|
917
|
+
}
|
|
918
|
+
|
|
919
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
920
|
+
_mm_maskz_and_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
|
|
921
|
+
{
|
|
922
|
+
return (__m128i) __builtin_ia32_pandd128_mask ((__v4si) __A,
|
|
923
|
+
(__v4si) __B,
|
|
924
|
+
(__v4si)
|
|
925
|
+
_mm_setzero_si128 (),
|
|
926
|
+
(__mmask8) __U);
|
|
927
|
+
}
|
|
928
|
+
|
|
929
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
930
|
+
_mm256_mask_andnot_epi32 (__m256i __W, __mmask8 __U, __m256i __A,
|
|
931
|
+
__m256i __B)
|
|
932
|
+
{
|
|
933
|
+
return (__m256i) __builtin_ia32_pandnd256_mask ((__v8si) __A,
|
|
934
|
+
(__v8si) __B,
|
|
935
|
+
(__v8si) __W,
|
|
936
|
+
(__mmask8) __U);
|
|
937
|
+
}
|
|
938
|
+
|
|
939
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
940
|
+
_mm256_maskz_andnot_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
|
|
941
|
+
{
|
|
942
|
+
return (__m256i) __builtin_ia32_pandnd256_mask ((__v8si) __A,
|
|
943
|
+
(__v8si) __B,
|
|
944
|
+
(__v8si)
|
|
945
|
+
_mm256_setzero_si256 (),
|
|
946
|
+
(__mmask8) __U);
|
|
947
|
+
}
|
|
948
|
+
|
|
949
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
950
|
+
_mm_mask_andnot_epi32 (__m128i __W, __mmask8 __U, __m128i __A,
|
|
951
|
+
__m128i __B)
|
|
952
|
+
{
|
|
953
|
+
return (__m128i) __builtin_ia32_pandnd128_mask ((__v4si) __A,
|
|
954
|
+
(__v4si) __B,
|
|
955
|
+
(__v4si) __W,
|
|
956
|
+
(__mmask8) __U);
|
|
957
|
+
}
|
|
958
|
+
|
|
959
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
960
|
+
_mm_maskz_andnot_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
|
|
961
|
+
{
|
|
962
|
+
return (__m128i) __builtin_ia32_pandnd128_mask ((__v4si) __A,
|
|
963
|
+
(__v4si) __B,
|
|
964
|
+
(__v4si)
|
|
965
|
+
_mm_setzero_si128 (),
|
|
966
|
+
(__mmask8) __U);
|
|
967
|
+
}
|
|
968
|
+
|
|
969
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
970
|
+
_mm256_mask_or_epi32 (__m256i __W, __mmask8 __U, __m256i __A,
|
|
971
|
+
__m256i __B)
|
|
972
|
+
{
|
|
973
|
+
return (__m256i) __builtin_ia32_pord256_mask ((__v8si) __A,
|
|
974
|
+
(__v8si) __B,
|
|
975
|
+
(__v8si) __W,
|
|
976
|
+
(__mmask8) __U);
|
|
977
|
+
}
|
|
978
|
+
|
|
979
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
980
|
+
_mm256_maskz_or_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
|
|
981
|
+
{
|
|
982
|
+
return (__m256i) __builtin_ia32_pord256_mask ((__v8si) __A,
|
|
983
|
+
(__v8si) __B,
|
|
984
|
+
(__v8si)
|
|
985
|
+
_mm256_setzero_si256 (),
|
|
986
|
+
(__mmask8) __U);
|
|
987
|
+
}
|
|
988
|
+
|
|
989
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
990
|
+
_mm_mask_or_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
|
|
991
|
+
{
|
|
992
|
+
return (__m128i) __builtin_ia32_pord128_mask ((__v4si) __A,
|
|
993
|
+
(__v4si) __B,
|
|
994
|
+
(__v4si) __W,
|
|
995
|
+
(__mmask8) __U);
|
|
996
|
+
}
|
|
997
|
+
|
|
998
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
999
|
+
_mm_maskz_or_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
|
|
1000
|
+
{
|
|
1001
|
+
return (__m128i) __builtin_ia32_pord128_mask ((__v4si) __A,
|
|
1002
|
+
(__v4si) __B,
|
|
1003
|
+
(__v4si)
|
|
1004
|
+
_mm_setzero_si128 (),
|
|
1005
|
+
(__mmask8) __U);
|
|
1006
|
+
}
|
|
1007
|
+
|
|
1008
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
1009
|
+
_mm256_mask_xor_epi32 (__m256i __W, __mmask8 __U, __m256i __A,
|
|
1010
|
+
__m256i __B)
|
|
1011
|
+
{
|
|
1012
|
+
return (__m256i) __builtin_ia32_pxord256_mask ((__v8si) __A,
|
|
1013
|
+
(__v8si) __B,
|
|
1014
|
+
(__v8si) __W,
|
|
1015
|
+
(__mmask8) __U);
|
|
1016
|
+
}
|
|
1017
|
+
|
|
1018
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
1019
|
+
_mm256_maskz_xor_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
|
|
1020
|
+
{
|
|
1021
|
+
return (__m256i) __builtin_ia32_pxord256_mask ((__v8si) __A,
|
|
1022
|
+
(__v8si) __B,
|
|
1023
|
+
(__v8si)
|
|
1024
|
+
_mm256_setzero_si256 (),
|
|
1025
|
+
(__mmask8) __U);
|
|
1026
|
+
}
|
|
1027
|
+
|
|
1028
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1029
|
+
_mm_mask_xor_epi32 (__m128i __W, __mmask8 __U, __m128i __A,
|
|
1030
|
+
__m128i __B)
|
|
1031
|
+
{
|
|
1032
|
+
return (__m128i) __builtin_ia32_pxord128_mask ((__v4si) __A,
|
|
1033
|
+
(__v4si) __B,
|
|
1034
|
+
(__v4si) __W,
|
|
1035
|
+
(__mmask8) __U);
|
|
1036
|
+
}
|
|
1037
|
+
|
|
1038
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1039
|
+
_mm_maskz_xor_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
|
|
1040
|
+
{
|
|
1041
|
+
return (__m128i) __builtin_ia32_pxord128_mask ((__v4si) __A,
|
|
1042
|
+
(__v4si) __B,
|
|
1043
|
+
(__v4si)
|
|
1044
|
+
_mm_setzero_si128 (),
|
|
1045
|
+
(__mmask8) __U);
|
|
1046
|
+
}
|
|
1047
|
+
|
|
1048
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
1049
|
+
_mm256_mask_and_epi64 (__m256i __W, __mmask8 __U, __m256i __A,
|
|
1050
|
+
__m256i __B)
|
|
1051
|
+
{
|
|
1052
|
+
return (__m256i) __builtin_ia32_pandq256_mask ((__v4di) __A,
|
|
1053
|
+
(__v4di) __B,
|
|
1054
|
+
(__v4di) __W, __U);
|
|
1055
|
+
}
|
|
1056
|
+
|
|
1057
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
1058
|
+
_mm256_maskz_and_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
|
|
1059
|
+
{
|
|
1060
|
+
return (__m256i) __builtin_ia32_pandq256_mask ((__v4di) __A,
|
|
1061
|
+
(__v4di) __B,
|
|
1062
|
+
(__v4di)
|
|
1063
|
+
_mm256_setzero_pd (),
|
|
1064
|
+
__U);
|
|
1065
|
+
}
|
|
1066
|
+
|
|
1067
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1068
|
+
_mm_mask_and_epi64 (__m128i __W, __mmask8 __U, __m128i __A,
|
|
1069
|
+
__m128i __B)
|
|
1070
|
+
{
|
|
1071
|
+
return (__m128i) __builtin_ia32_pandq128_mask ((__v2di) __A,
|
|
1072
|
+
(__v2di) __B,
|
|
1073
|
+
(__v2di) __W, __U);
|
|
1074
|
+
}
|
|
1075
|
+
|
|
1076
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1077
|
+
_mm_maskz_and_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
|
|
1078
|
+
{
|
|
1079
|
+
return (__m128i) __builtin_ia32_pandq128_mask ((__v2di) __A,
|
|
1080
|
+
(__v2di) __B,
|
|
1081
|
+
(__v2di)
|
|
1082
|
+
_mm_setzero_pd (),
|
|
1083
|
+
__U);
|
|
1084
|
+
}
|
|
1085
|
+
|
|
1086
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
1087
|
+
_mm256_mask_andnot_epi64 (__m256i __W, __mmask8 __U, __m256i __A,
|
|
1088
|
+
__m256i __B)
|
|
1089
|
+
{
|
|
1090
|
+
return (__m256i) __builtin_ia32_pandnq256_mask ((__v4di) __A,
|
|
1091
|
+
(__v4di) __B,
|
|
1092
|
+
(__v4di) __W, __U);
|
|
1093
|
+
}
|
|
1094
|
+
|
|
1095
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
1096
|
+
_mm256_maskz_andnot_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
|
|
1097
|
+
{
|
|
1098
|
+
return (__m256i) __builtin_ia32_pandnq256_mask ((__v4di) __A,
|
|
1099
|
+
(__v4di) __B,
|
|
1100
|
+
(__v4di)
|
|
1101
|
+
_mm256_setzero_pd (),
|
|
1102
|
+
__U);
|
|
1103
|
+
}
|
|
1104
|
+
|
|
1105
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1106
|
+
_mm_mask_andnot_epi64 (__m128i __W, __mmask8 __U, __m128i __A,
|
|
1107
|
+
__m128i __B)
|
|
1108
|
+
{
|
|
1109
|
+
return (__m128i) __builtin_ia32_pandnq128_mask ((__v2di) __A,
|
|
1110
|
+
(__v2di) __B,
|
|
1111
|
+
(__v2di) __W, __U);
|
|
1112
|
+
}
|
|
1113
|
+
|
|
1114
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1115
|
+
_mm_maskz_andnot_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
|
|
1116
|
+
{
|
|
1117
|
+
return (__m128i) __builtin_ia32_pandnq128_mask ((__v2di) __A,
|
|
1118
|
+
(__v2di) __B,
|
|
1119
|
+
(__v2di)
|
|
1120
|
+
_mm_setzero_pd (),
|
|
1121
|
+
__U);
|
|
1122
|
+
}
|
|
1123
|
+
|
|
1124
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
1125
|
+
_mm256_mask_or_epi64 (__m256i __W, __mmask8 __U, __m256i __A,
|
|
1126
|
+
__m256i __B)
|
|
1127
|
+
{
|
|
1128
|
+
return (__m256i) __builtin_ia32_porq256_mask ((__v4di) __A,
|
|
1129
|
+
(__v4di) __B,
|
|
1130
|
+
(__v4di) __W,
|
|
1131
|
+
(__mmask8) __U);
|
|
1132
|
+
}
|
|
1133
|
+
|
|
1134
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
1135
|
+
_mm256_maskz_or_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
|
|
1136
|
+
{
|
|
1137
|
+
return (__m256i) __builtin_ia32_porq256_mask ((__v4di) __A,
|
|
1138
|
+
(__v4di) __B,
|
|
1139
|
+
(__v4di)
|
|
1140
|
+
_mm256_setzero_si256 (),
|
|
1141
|
+
(__mmask8) __U);
|
|
1142
|
+
}
|
|
1143
|
+
|
|
1144
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1145
|
+
_mm_mask_or_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
|
|
1146
|
+
{
|
|
1147
|
+
return (__m128i) __builtin_ia32_porq128_mask ((__v2di) __A,
|
|
1148
|
+
(__v2di) __B,
|
|
1149
|
+
(__v2di) __W,
|
|
1150
|
+
(__mmask8) __U);
|
|
1151
|
+
}
|
|
1152
|
+
|
|
1153
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1154
|
+
_mm_maskz_or_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
|
|
1155
|
+
{
|
|
1156
|
+
return (__m128i) __builtin_ia32_porq128_mask ((__v2di) __A,
|
|
1157
|
+
(__v2di) __B,
|
|
1158
|
+
(__v2di)
|
|
1159
|
+
_mm_setzero_si128 (),
|
|
1160
|
+
(__mmask8) __U);
|
|
1161
|
+
}
|
|
1162
|
+
|
|
1163
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
1164
|
+
_mm256_mask_xor_epi64 (__m256i __W, __mmask8 __U, __m256i __A,
|
|
1165
|
+
__m256i __B)
|
|
1166
|
+
{
|
|
1167
|
+
return (__m256i) __builtin_ia32_pxorq256_mask ((__v4di) __A,
|
|
1168
|
+
(__v4di) __B,
|
|
1169
|
+
(__v4di) __W,
|
|
1170
|
+
(__mmask8) __U);
|
|
1171
|
+
}
|
|
1172
|
+
|
|
1173
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
|
1174
|
+
_mm256_maskz_xor_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
|
|
1175
|
+
{
|
|
1176
|
+
return (__m256i) __builtin_ia32_pxorq256_mask ((__v4di) __A,
|
|
1177
|
+
(__v4di) __B,
|
|
1178
|
+
(__v4di)
|
|
1179
|
+
_mm256_setzero_si256 (),
|
|
1180
|
+
(__mmask8) __U);
|
|
1181
|
+
}
|
|
1182
|
+
|
|
1183
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1184
|
+
_mm_mask_xor_epi64 (__m128i __W, __mmask8 __U, __m128i __A,
|
|
1185
|
+
__m128i __B)
|
|
1186
|
+
{
|
|
1187
|
+
return (__m128i) __builtin_ia32_pxorq128_mask ((__v2di) __A,
|
|
1188
|
+
(__v2di) __B,
|
|
1189
|
+
(__v2di) __W,
|
|
1190
|
+
(__mmask8) __U);
|
|
1191
|
+
}
|
|
1192
|
+
|
|
1193
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1194
|
+
_mm_maskz_xor_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
|
|
1195
|
+
{
|
|
1196
|
+
return (__m128i) __builtin_ia32_pxorq128_mask ((__v2di) __A,
|
|
1197
|
+
(__v2di) __B,
|
|
1198
|
+
(__v2di)
|
|
1199
|
+
_mm_setzero_si128 (),
|
|
1200
|
+
(__mmask8) __U);
|
|
1201
|
+
}
|
|
1202
|
+
|
|
1203
|
+
#define _mm_cmp_epi32_mask(a, b, p) __extension__ ({ \
|
|
1204
|
+
(__mmask8)__builtin_ia32_cmpd128_mask((__v4si)(__m128i)(a), \
|
|
1205
|
+
(__v4si)(__m128i)(b), \
|
|
1206
|
+
(p), (__mmask8)-1); })
|
|
1207
|
+
|
|
1208
|
+
#define _mm_mask_cmp_epi32_mask(m, a, b, p) __extension__ ({ \
|
|
1209
|
+
(__mmask8)__builtin_ia32_cmpd128_mask((__v4si)(__m128i)(a), \
|
|
1210
|
+
(__v4si)(__m128i)(b), \
|
|
1211
|
+
(p), (__mmask8)(m)); })
|
|
1212
|
+
|
|
1213
|
+
#define _mm_cmp_epu32_mask(a, b, p) __extension__ ({ \
|
|
1214
|
+
(__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)(__m128i)(a), \
|
|
1215
|
+
(__v4si)(__m128i)(b), \
|
|
1216
|
+
(p), (__mmask8)-1); })
|
|
1217
|
+
|
|
1218
|
+
#define _mm_mask_cmp_epu32_mask(m, a, b, p) __extension__ ({ \
|
|
1219
|
+
(__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)(__m128i)(a), \
|
|
1220
|
+
(__v4si)(__m128i)(b), \
|
|
1221
|
+
(p), (__mmask8)(m)); })
|
|
1222
|
+
|
|
1223
|
+
#define _mm256_cmp_epi32_mask(a, b, p) __extension__ ({ \
|
|
1224
|
+
(__mmask8)__builtin_ia32_cmpd256_mask((__v8si)(__m256i)(a), \
|
|
1225
|
+
(__v8si)(__m256i)(b), \
|
|
1226
|
+
(p), (__mmask8)-1); })
|
|
1227
|
+
|
|
1228
|
+
#define _mm256_mask_cmp_epi32_mask(m, a, b, p) __extension__ ({ \
|
|
1229
|
+
(__mmask8)__builtin_ia32_cmpd256_mask((__v8si)(__m256i)(a), \
|
|
1230
|
+
(__v8si)(__m256i)(b), \
|
|
1231
|
+
(p), (__mmask8)(m)); })
|
|
1232
|
+
|
|
1233
|
+
#define _mm256_cmp_epu32_mask(a, b, p) __extension__ ({ \
|
|
1234
|
+
(__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)(__m256i)(a), \
|
|
1235
|
+
(__v8si)(__m256i)(b), \
|
|
1236
|
+
(p), (__mmask8)-1); })
|
|
1237
|
+
|
|
1238
|
+
#define _mm256_mask_cmp_epu32_mask(m, a, b, p) __extension__ ({ \
|
|
1239
|
+
(__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)(__m256i)(a), \
|
|
1240
|
+
(__v8si)(__m256i)(b), \
|
|
1241
|
+
(p), (__mmask8)(m)); })
|
|
1242
|
+
|
|
1243
|
+
#define _mm_cmp_epi64_mask(a, b, p) __extension__ ({ \
|
|
1244
|
+
(__mmask8)__builtin_ia32_cmpq128_mask((__v2di)(__m128i)(a), \
|
|
1245
|
+
(__v2di)(__m128i)(b), \
|
|
1246
|
+
(p), (__mmask8)-1); })
|
|
1247
|
+
|
|
1248
|
+
#define _mm_mask_cmp_epi64_mask(m, a, b, p) __extension__ ({ \
|
|
1249
|
+
(__mmask8)__builtin_ia32_cmpq128_mask((__v2di)(__m128i)(a), \
|
|
1250
|
+
(__v2di)(__m128i)(b), \
|
|
1251
|
+
(p), (__mmask8)(m)); })
|
|
1252
|
+
|
|
1253
|
+
#define _mm_cmp_epu64_mask(a, b, p) __extension__ ({ \
|
|
1254
|
+
(__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)(__m128i)(a), \
|
|
1255
|
+
(__v2di)(__m128i)(b), \
|
|
1256
|
+
(p), (__mmask8)-1); })
|
|
1257
|
+
|
|
1258
|
+
#define _mm_mask_cmp_epu64_mask(m, a, b, p) __extension__ ({ \
|
|
1259
|
+
(__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)(__m128i)(a), \
|
|
1260
|
+
(__v2di)(__m128i)(b), \
|
|
1261
|
+
(p), (__mmask8)(m)); })
|
|
1262
|
+
|
|
1263
|
+
#define _mm256_cmp_epi64_mask(a, b, p) __extension__ ({ \
|
|
1264
|
+
(__mmask8)__builtin_ia32_cmpq256_mask((__v4di)(__m256i)(a), \
|
|
1265
|
+
(__v4di)(__m256i)(b), \
|
|
1266
|
+
(p), (__mmask8)-1); })
|
|
1267
|
+
|
|
1268
|
+
#define _mm256_mask_cmp_epi64_mask(m, a, b, p) __extension__ ({ \
|
|
1269
|
+
(__mmask8)__builtin_ia32_cmpq256_mask((__v4di)(__m256i)(a), \
|
|
1270
|
+
(__v4di)(__m256i)(b), \
|
|
1271
|
+
(p), (__mmask8)(m)); })
|
|
1272
|
+
|
|
1273
|
+
#define _mm256_cmp_epu64_mask(a, b, p) __extension__ ({ \
|
|
1274
|
+
(__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)(__m256i)(a), \
|
|
1275
|
+
(__v4di)(__m256i)(b), \
|
|
1276
|
+
(p), (__mmask8)-1); })
|
|
1277
|
+
|
|
1278
|
+
#define _mm256_mask_cmp_epu64_mask(m, a, b, p) __extension__ ({ \
|
|
1279
|
+
(__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)(__m256i)(a), \
|
|
1280
|
+
(__v4di)(__m256i)(b), \
|
|
1281
|
+
(p), (__mmask8)(m)); })
|
|
1282
|
+
|
|
1283
|
+
#define _mm256_cmp_ps_mask(a, b, p) __extension__ ({ \
|
|
1284
|
+
(__mmask8)__builtin_ia32_cmpps256_mask((__v8sf)(__m256)(a), \
|
|
1285
|
+
(__v8sf)(__m256)(b), \
|
|
1286
|
+
(p), (__mmask8)-1); })
|
|
1287
|
+
|
|
1288
|
+
#define _mm256_mask_cmp_ps_mask(m, a, b, p) __extension__ ({ \
|
|
1289
|
+
(__mmask8)__builtin_ia32_cmpps256_mask((__v8sf)(__m256)(a), \
|
|
1290
|
+
(__v8sf)(__m256)(b), \
|
|
1291
|
+
(p), (__mmask8)(m)); })
|
|
1292
|
+
|
|
1293
|
+
#define _mm256_cmp_pd_mask(a, b, p) __extension__ ({ \
|
|
1294
|
+
(__mmask8)__builtin_ia32_cmppd256_mask((__v4df)(__m256)(a), \
|
|
1295
|
+
(__v4df)(__m256)(b), \
|
|
1296
|
+
(p), (__mmask8)-1); })
|
|
1297
|
+
|
|
1298
|
+
#define _mm256_mask_cmp_pd_mask(m, a, b, p) __extension__ ({ \
|
|
1299
|
+
(__mmask8)__builtin_ia32_cmppd256_mask((__v4df)(__m256)(a), \
|
|
1300
|
+
(__v4df)(__m256)(b), \
|
|
1301
|
+
(p), (__mmask8)(m)); })
|
|
1302
|
+
|
|
1303
|
+
#define _mm128_cmp_ps_mask(a, b, p) __extension__ ({ \
|
|
1304
|
+
(__mmask8)__builtin_ia32_cmpps128_mask((__v4sf)(__m128)(a), \
|
|
1305
|
+
(__v4sf)(__m128)(b), \
|
|
1306
|
+
(p), (__mmask8)-1); })
|
|
1307
|
+
|
|
1308
|
+
#define _mm128_mask_cmp_ps_mask(m, a, b, p) __extension__ ({ \
|
|
1309
|
+
(__mmask8)__builtin_ia32_cmpps128_mask((__v4sf)(__m128)(a), \
|
|
1310
|
+
(__v4sf)(__m128)(b), \
|
|
1311
|
+
(p), (__mmask8)(m)); })
|
|
1312
|
+
|
|
1313
|
+
#define _mm128_cmp_pd_mask(a, b, p) __extension__ ({ \
|
|
1314
|
+
(__mmask8)__builtin_ia32_cmppd128_mask((__v2df)(__m128)(a), \
|
|
1315
|
+
(__v2df)(__m128)(b), \
|
|
1316
|
+
(p), (__mmask8)-1); })
|
|
1317
|
+
|
|
1318
|
+
#define _mm128_mask_cmp_pd_mask(m, a, b, p) __extension__ ({ \
|
|
1319
|
+
(__mmask8)__builtin_ia32_cmppd128_mask((__v2df)(__m128)(a), \
|
|
1320
|
+
(__v2df)(__m128)(b), \
|
|
1321
|
+
(p), (__mmask8)(m)); })
|
|
1322
|
+
|
|
1323
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1324
|
+
_mm_mask_fmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
|
|
1325
|
+
{
|
|
1326
|
+
return (__m128d) __builtin_ia32_vfmaddpd128_mask ((__v2df) __A,
|
|
1327
|
+
(__v2df) __B,
|
|
1328
|
+
(__v2df) __C,
|
|
1329
|
+
(__mmask8) __U);
|
|
1330
|
+
}
|
|
1331
|
+
|
|
1332
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1333
|
+
_mm_mask3_fmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
|
|
1334
|
+
{
|
|
1335
|
+
return (__m128d) __builtin_ia32_vfmaddpd128_mask3 ((__v2df) __A,
|
|
1336
|
+
(__v2df) __B,
|
|
1337
|
+
(__v2df) __C,
|
|
1338
|
+
(__mmask8) __U);
|
|
1339
|
+
}
|
|
1340
|
+
|
|
1341
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1342
|
+
_mm_maskz_fmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
|
|
1343
|
+
{
|
|
1344
|
+
return (__m128d) __builtin_ia32_vfmaddpd128_maskz ((__v2df) __A,
|
|
1345
|
+
(__v2df) __B,
|
|
1346
|
+
(__v2df) __C,
|
|
1347
|
+
(__mmask8) __U);
|
|
1348
|
+
}
|
|
1349
|
+
|
|
1350
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1351
|
+
_mm_mask_fmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
|
|
1352
|
+
{
|
|
1353
|
+
return (__m128d) __builtin_ia32_vfmaddpd128_mask ((__v2df) __A,
|
|
1354
|
+
(__v2df) __B,
|
|
1355
|
+
-(__v2df) __C,
|
|
1356
|
+
(__mmask8) __U);
|
|
1357
|
+
}
|
|
1358
|
+
|
|
1359
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1360
|
+
_mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
|
|
1361
|
+
{
|
|
1362
|
+
return (__m128d) __builtin_ia32_vfmaddpd128_maskz ((__v2df) __A,
|
|
1363
|
+
(__v2df) __B,
|
|
1364
|
+
-(__v2df) __C,
|
|
1365
|
+
(__mmask8) __U);
|
|
1366
|
+
}
|
|
1367
|
+
|
|
1368
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1369
|
+
_mm_mask3_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
|
|
1370
|
+
{
|
|
1371
|
+
return (__m128d) __builtin_ia32_vfmaddpd128_mask3 (-(__v2df) __A,
|
|
1372
|
+
(__v2df) __B,
|
|
1373
|
+
(__v2df) __C,
|
|
1374
|
+
(__mmask8) __U);
|
|
1375
|
+
}
|
|
1376
|
+
|
|
1377
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1378
|
+
_mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
|
|
1379
|
+
{
|
|
1380
|
+
return (__m128d) __builtin_ia32_vfmaddpd128_maskz (-(__v2df) __A,
|
|
1381
|
+
(__v2df) __B,
|
|
1382
|
+
(__v2df) __C,
|
|
1383
|
+
(__mmask8) __U);
|
|
1384
|
+
}
|
|
1385
|
+
|
|
1386
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1387
|
+
_mm_maskz_fnmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
|
|
1388
|
+
{
|
|
1389
|
+
return (__m128d) __builtin_ia32_vfmaddpd128_maskz (-(__v2df) __A,
|
|
1390
|
+
(__v2df) __B,
|
|
1391
|
+
-(__v2df) __C,
|
|
1392
|
+
(__mmask8) __U);
|
|
1393
|
+
}
|
|
1394
|
+
|
|
1395
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1396
|
+
_mm256_mask_fmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
|
|
1397
|
+
{
|
|
1398
|
+
return (__m256d) __builtin_ia32_vfmaddpd256_mask ((__v4df) __A,
|
|
1399
|
+
(__v4df) __B,
|
|
1400
|
+
(__v4df) __C,
|
|
1401
|
+
(__mmask8) __U);
|
|
1402
|
+
}
|
|
1403
|
+
|
|
1404
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1405
|
+
_mm256_mask3_fmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
|
|
1406
|
+
{
|
|
1407
|
+
return (__m256d) __builtin_ia32_vfmaddpd256_mask3 ((__v4df) __A,
|
|
1408
|
+
(__v4df) __B,
|
|
1409
|
+
(__v4df) __C,
|
|
1410
|
+
(__mmask8) __U);
|
|
1411
|
+
}
|
|
1412
|
+
|
|
1413
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1414
|
+
_mm256_maskz_fmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
|
|
1415
|
+
{
|
|
1416
|
+
return (__m256d) __builtin_ia32_vfmaddpd256_maskz ((__v4df) __A,
|
|
1417
|
+
(__v4df) __B,
|
|
1418
|
+
(__v4df) __C,
|
|
1419
|
+
(__mmask8) __U);
|
|
1420
|
+
}
|
|
1421
|
+
|
|
1422
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1423
|
+
_mm256_mask_fmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
|
|
1424
|
+
{
|
|
1425
|
+
return (__m256d) __builtin_ia32_vfmaddpd256_mask ((__v4df) __A,
|
|
1426
|
+
(__v4df) __B,
|
|
1427
|
+
-(__v4df) __C,
|
|
1428
|
+
(__mmask8) __U);
|
|
1429
|
+
}
|
|
1430
|
+
|
|
1431
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1432
|
+
_mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
|
|
1433
|
+
{
|
|
1434
|
+
return (__m256d) __builtin_ia32_vfmaddpd256_maskz ((__v4df) __A,
|
|
1435
|
+
(__v4df) __B,
|
|
1436
|
+
-(__v4df) __C,
|
|
1437
|
+
(__mmask8) __U);
|
|
1438
|
+
}
|
|
1439
|
+
|
|
1440
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1441
|
+
_mm256_mask3_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
|
|
1442
|
+
{
|
|
1443
|
+
return (__m256d) __builtin_ia32_vfmaddpd256_mask3 (-(__v4df) __A,
|
|
1444
|
+
(__v4df) __B,
|
|
1445
|
+
(__v4df) __C,
|
|
1446
|
+
(__mmask8) __U);
|
|
1447
|
+
}
|
|
1448
|
+
|
|
1449
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1450
|
+
_mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
|
|
1451
|
+
{
|
|
1452
|
+
return (__m256d) __builtin_ia32_vfmaddpd256_maskz (-(__v4df) __A,
|
|
1453
|
+
(__v4df) __B,
|
|
1454
|
+
(__v4df) __C,
|
|
1455
|
+
(__mmask8) __U);
|
|
1456
|
+
}
|
|
1457
|
+
|
|
1458
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1459
|
+
_mm256_maskz_fnmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
|
|
1460
|
+
{
|
|
1461
|
+
return (__m256d) __builtin_ia32_vfmaddpd256_maskz (-(__v4df) __A,
|
|
1462
|
+
(__v4df) __B,
|
|
1463
|
+
-(__v4df) __C,
|
|
1464
|
+
(__mmask8) __U);
|
|
1465
|
+
}
|
|
1466
|
+
|
|
1467
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1468
|
+
_mm_mask_fmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
|
|
1469
|
+
{
|
|
1470
|
+
return (__m128) __builtin_ia32_vfmaddps128_mask ((__v4sf) __A,
|
|
1471
|
+
(__v4sf) __B,
|
|
1472
|
+
(__v4sf) __C,
|
|
1473
|
+
(__mmask8) __U);
|
|
1474
|
+
}
|
|
1475
|
+
|
|
1476
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1477
|
+
_mm_mask3_fmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
|
|
1478
|
+
{
|
|
1479
|
+
return (__m128) __builtin_ia32_vfmaddps128_mask3 ((__v4sf) __A,
|
|
1480
|
+
(__v4sf) __B,
|
|
1481
|
+
(__v4sf) __C,
|
|
1482
|
+
(__mmask8) __U);
|
|
1483
|
+
}
|
|
1484
|
+
|
|
1485
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1486
|
+
_mm_maskz_fmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
|
|
1487
|
+
{
|
|
1488
|
+
return (__m128) __builtin_ia32_vfmaddps128_maskz ((__v4sf) __A,
|
|
1489
|
+
(__v4sf) __B,
|
|
1490
|
+
(__v4sf) __C,
|
|
1491
|
+
(__mmask8) __U);
|
|
1492
|
+
}
|
|
1493
|
+
|
|
1494
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1495
|
+
_mm_mask_fmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
|
|
1496
|
+
{
|
|
1497
|
+
return (__m128) __builtin_ia32_vfmaddps128_mask ((__v4sf) __A,
|
|
1498
|
+
(__v4sf) __B,
|
|
1499
|
+
-(__v4sf) __C,
|
|
1500
|
+
(__mmask8) __U);
|
|
1501
|
+
}
|
|
1502
|
+
|
|
1503
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1504
|
+
_mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
|
|
1505
|
+
{
|
|
1506
|
+
return (__m128) __builtin_ia32_vfmaddps128_maskz ((__v4sf) __A,
|
|
1507
|
+
(__v4sf) __B,
|
|
1508
|
+
-(__v4sf) __C,
|
|
1509
|
+
(__mmask8) __U);
|
|
1510
|
+
}
|
|
1511
|
+
|
|
1512
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1513
|
+
_mm_mask3_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
|
|
1514
|
+
{
|
|
1515
|
+
return (__m128) __builtin_ia32_vfmaddps128_mask3 (-(__v4sf) __A,
|
|
1516
|
+
(__v4sf) __B,
|
|
1517
|
+
(__v4sf) __C,
|
|
1518
|
+
(__mmask8) __U);
|
|
1519
|
+
}
|
|
1520
|
+
|
|
1521
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1522
|
+
_mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
|
|
1523
|
+
{
|
|
1524
|
+
return (__m128) __builtin_ia32_vfmaddps128_maskz (-(__v4sf) __A,
|
|
1525
|
+
(__v4sf) __B,
|
|
1526
|
+
(__v4sf) __C,
|
|
1527
|
+
(__mmask8) __U);
|
|
1528
|
+
}
|
|
1529
|
+
|
|
1530
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1531
|
+
_mm_maskz_fnmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
|
|
1532
|
+
{
|
|
1533
|
+
return (__m128) __builtin_ia32_vfmaddps128_maskz (-(__v4sf) __A,
|
|
1534
|
+
(__v4sf) __B,
|
|
1535
|
+
-(__v4sf) __C,
|
|
1536
|
+
(__mmask8) __U);
|
|
1537
|
+
}
|
|
1538
|
+
|
|
1539
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1540
|
+
_mm256_mask_fmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
|
|
1541
|
+
{
|
|
1542
|
+
return (__m256) __builtin_ia32_vfmaddps256_mask ((__v8sf) __A,
|
|
1543
|
+
(__v8sf) __B,
|
|
1544
|
+
(__v8sf) __C,
|
|
1545
|
+
(__mmask8) __U);
|
|
1546
|
+
}
|
|
1547
|
+
|
|
1548
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1549
|
+
_mm256_mask3_fmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
|
|
1550
|
+
{
|
|
1551
|
+
return (__m256) __builtin_ia32_vfmaddps256_mask3 ((__v8sf) __A,
|
|
1552
|
+
(__v8sf) __B,
|
|
1553
|
+
(__v8sf) __C,
|
|
1554
|
+
(__mmask8) __U);
|
|
1555
|
+
}
|
|
1556
|
+
|
|
1557
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1558
|
+
_mm256_maskz_fmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
|
|
1559
|
+
{
|
|
1560
|
+
return (__m256) __builtin_ia32_vfmaddps256_maskz ((__v8sf) __A,
|
|
1561
|
+
(__v8sf) __B,
|
|
1562
|
+
(__v8sf) __C,
|
|
1563
|
+
(__mmask8) __U);
|
|
1564
|
+
}
|
|
1565
|
+
|
|
1566
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1567
|
+
_mm256_mask_fmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
|
|
1568
|
+
{
|
|
1569
|
+
return (__m256) __builtin_ia32_vfmaddps256_mask ((__v8sf) __A,
|
|
1570
|
+
(__v8sf) __B,
|
|
1571
|
+
-(__v8sf) __C,
|
|
1572
|
+
(__mmask8) __U);
|
|
1573
|
+
}
|
|
1574
|
+
|
|
1575
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1576
|
+
_mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
|
|
1577
|
+
{
|
|
1578
|
+
return (__m256) __builtin_ia32_vfmaddps256_maskz ((__v8sf) __A,
|
|
1579
|
+
(__v8sf) __B,
|
|
1580
|
+
-(__v8sf) __C,
|
|
1581
|
+
(__mmask8) __U);
|
|
1582
|
+
}
|
|
1583
|
+
|
|
1584
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1585
|
+
_mm256_mask3_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
|
|
1586
|
+
{
|
|
1587
|
+
return (__m256) __builtin_ia32_vfmaddps256_mask3 (-(__v8sf) __A,
|
|
1588
|
+
(__v8sf) __B,
|
|
1589
|
+
(__v8sf) __C,
|
|
1590
|
+
(__mmask8) __U);
|
|
1591
|
+
}
|
|
1592
|
+
|
|
1593
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1594
|
+
_mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
|
|
1595
|
+
{
|
|
1596
|
+
return (__m256) __builtin_ia32_vfmaddps256_maskz (-(__v8sf) __A,
|
|
1597
|
+
(__v8sf) __B,
|
|
1598
|
+
(__v8sf) __C,
|
|
1599
|
+
(__mmask8) __U);
|
|
1600
|
+
}
|
|
1601
|
+
|
|
1602
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1603
|
+
_mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
|
|
1604
|
+
{
|
|
1605
|
+
return (__m256) __builtin_ia32_vfmaddps256_maskz (-(__v8sf) __A,
|
|
1606
|
+
(__v8sf) __B,
|
|
1607
|
+
-(__v8sf) __C,
|
|
1608
|
+
(__mmask8) __U);
|
|
1609
|
+
}
|
|
1610
|
+
|
|
1611
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1612
|
+
_mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
|
|
1613
|
+
{
|
|
1614
|
+
return (__m128d) __builtin_ia32_vfmaddsubpd128_mask ((__v2df) __A,
|
|
1615
|
+
(__v2df) __B,
|
|
1616
|
+
(__v2df) __C,
|
|
1617
|
+
(__mmask8) __U);
|
|
1618
|
+
}
|
|
1619
|
+
|
|
1620
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1621
|
+
_mm_mask3_fmaddsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
|
|
1622
|
+
{
|
|
1623
|
+
return (__m128d) __builtin_ia32_vfmaddsubpd128_mask3 ((__v2df) __A,
|
|
1624
|
+
(__v2df) __B,
|
|
1625
|
+
(__v2df) __C,
|
|
1626
|
+
(__mmask8)
|
|
1627
|
+
__U);
|
|
1628
|
+
}
|
|
1629
|
+
|
|
1630
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1631
|
+
_mm_maskz_fmaddsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
|
|
1632
|
+
{
|
|
1633
|
+
return (__m128d) __builtin_ia32_vfmaddsubpd128_maskz ((__v2df) __A,
|
|
1634
|
+
(__v2df) __B,
|
|
1635
|
+
(__v2df) __C,
|
|
1636
|
+
(__mmask8)
|
|
1637
|
+
__U);
|
|
1638
|
+
}
|
|
1639
|
+
|
|
1640
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1641
|
+
_mm_mask_fmsubadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
|
|
1642
|
+
{
|
|
1643
|
+
return (__m128d) __builtin_ia32_vfmaddsubpd128_mask ((__v2df) __A,
|
|
1644
|
+
(__v2df) __B,
|
|
1645
|
+
-(__v2df) __C,
|
|
1646
|
+
(__mmask8) __U);
|
|
1647
|
+
}
|
|
1648
|
+
|
|
1649
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1650
|
+
_mm_maskz_fmsubadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
|
|
1651
|
+
{
|
|
1652
|
+
return (__m128d) __builtin_ia32_vfmaddsubpd128_maskz ((__v2df) __A,
|
|
1653
|
+
(__v2df) __B,
|
|
1654
|
+
-(__v2df) __C,
|
|
1655
|
+
(__mmask8)
|
|
1656
|
+
__U);
|
|
1657
|
+
}
|
|
1658
|
+
|
|
1659
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1660
|
+
_mm256_mask_fmaddsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
|
|
1661
|
+
{
|
|
1662
|
+
return (__m256d) __builtin_ia32_vfmaddsubpd256_mask ((__v4df) __A,
|
|
1663
|
+
(__v4df) __B,
|
|
1664
|
+
(__v4df) __C,
|
|
1665
|
+
(__mmask8) __U);
|
|
1666
|
+
}
|
|
1667
|
+
|
|
1668
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1669
|
+
_mm256_mask3_fmaddsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
|
|
1670
|
+
{
|
|
1671
|
+
return (__m256d) __builtin_ia32_vfmaddsubpd256_mask3 ((__v4df) __A,
|
|
1672
|
+
(__v4df) __B,
|
|
1673
|
+
(__v4df) __C,
|
|
1674
|
+
(__mmask8)
|
|
1675
|
+
__U);
|
|
1676
|
+
}
|
|
1677
|
+
|
|
1678
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1679
|
+
_mm256_maskz_fmaddsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
|
|
1680
|
+
{
|
|
1681
|
+
return (__m256d) __builtin_ia32_vfmaddsubpd256_maskz ((__v4df) __A,
|
|
1682
|
+
(__v4df) __B,
|
|
1683
|
+
(__v4df) __C,
|
|
1684
|
+
(__mmask8)
|
|
1685
|
+
__U);
|
|
1686
|
+
}
|
|
1687
|
+
|
|
1688
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1689
|
+
_mm256_mask_fmsubadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
|
|
1690
|
+
{
|
|
1691
|
+
return (__m256d) __builtin_ia32_vfmaddsubpd256_mask ((__v4df) __A,
|
|
1692
|
+
(__v4df) __B,
|
|
1693
|
+
-(__v4df) __C,
|
|
1694
|
+
(__mmask8) __U);
|
|
1695
|
+
}
|
|
1696
|
+
|
|
1697
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1698
|
+
_mm256_maskz_fmsubadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
|
|
1699
|
+
{
|
|
1700
|
+
return (__m256d) __builtin_ia32_vfmaddsubpd256_maskz ((__v4df) __A,
|
|
1701
|
+
(__v4df) __B,
|
|
1702
|
+
-(__v4df) __C,
|
|
1703
|
+
(__mmask8)
|
|
1704
|
+
__U);
|
|
1705
|
+
}
|
|
1706
|
+
|
|
1707
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1708
|
+
_mm_mask_fmaddsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
|
|
1709
|
+
{
|
|
1710
|
+
return (__m128) __builtin_ia32_vfmaddsubps128_mask ((__v4sf) __A,
|
|
1711
|
+
(__v4sf) __B,
|
|
1712
|
+
(__v4sf) __C,
|
|
1713
|
+
(__mmask8) __U);
|
|
1714
|
+
}
|
|
1715
|
+
|
|
1716
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1717
|
+
_mm_mask3_fmaddsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
|
|
1718
|
+
{
|
|
1719
|
+
return (__m128) __builtin_ia32_vfmaddsubps128_mask3 ((__v4sf) __A,
|
|
1720
|
+
(__v4sf) __B,
|
|
1721
|
+
(__v4sf) __C,
|
|
1722
|
+
(__mmask8) __U);
|
|
1723
|
+
}
|
|
1724
|
+
|
|
1725
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1726
|
+
_mm_maskz_fmaddsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
|
|
1727
|
+
{
|
|
1728
|
+
return (__m128) __builtin_ia32_vfmaddsubps128_maskz ((__v4sf) __A,
|
|
1729
|
+
(__v4sf) __B,
|
|
1730
|
+
(__v4sf) __C,
|
|
1731
|
+
(__mmask8) __U);
|
|
1732
|
+
}
|
|
1733
|
+
|
|
1734
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1735
|
+
_mm_mask_fmsubadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
|
|
1736
|
+
{
|
|
1737
|
+
return (__m128) __builtin_ia32_vfmaddsubps128_mask ((__v4sf) __A,
|
|
1738
|
+
(__v4sf) __B,
|
|
1739
|
+
-(__v4sf) __C,
|
|
1740
|
+
(__mmask8) __U);
|
|
1741
|
+
}
|
|
1742
|
+
|
|
1743
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1744
|
+
_mm_maskz_fmsubadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
|
|
1745
|
+
{
|
|
1746
|
+
return (__m128) __builtin_ia32_vfmaddsubps128_maskz ((__v4sf) __A,
|
|
1747
|
+
(__v4sf) __B,
|
|
1748
|
+
-(__v4sf) __C,
|
|
1749
|
+
(__mmask8) __U);
|
|
1750
|
+
}
|
|
1751
|
+
|
|
1752
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1753
|
+
_mm256_mask_fmaddsub_ps(__m256 __A, __mmask8 __U, __m256 __B,
|
|
1754
|
+
__m256 __C)
|
|
1755
|
+
{
|
|
1756
|
+
return (__m256) __builtin_ia32_vfmaddsubps256_mask ((__v8sf) __A,
|
|
1757
|
+
(__v8sf) __B,
|
|
1758
|
+
(__v8sf) __C,
|
|
1759
|
+
(__mmask8) __U);
|
|
1760
|
+
}
|
|
1761
|
+
|
|
1762
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1763
|
+
_mm256_mask3_fmaddsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
|
|
1764
|
+
{
|
|
1765
|
+
return (__m256) __builtin_ia32_vfmaddsubps256_mask3 ((__v8sf) __A,
|
|
1766
|
+
(__v8sf) __B,
|
|
1767
|
+
(__v8sf) __C,
|
|
1768
|
+
(__mmask8) __U);
|
|
1769
|
+
}
|
|
1770
|
+
|
|
1771
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1772
|
+
_mm256_maskz_fmaddsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
|
|
1773
|
+
{
|
|
1774
|
+
return (__m256) __builtin_ia32_vfmaddsubps256_maskz ((__v8sf) __A,
|
|
1775
|
+
(__v8sf) __B,
|
|
1776
|
+
(__v8sf) __C,
|
|
1777
|
+
(__mmask8) __U);
|
|
1778
|
+
}
|
|
1779
|
+
|
|
1780
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1781
|
+
_mm256_mask_fmsubadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
|
|
1782
|
+
{
|
|
1783
|
+
return (__m256) __builtin_ia32_vfmaddsubps256_mask ((__v8sf) __A,
|
|
1784
|
+
(__v8sf) __B,
|
|
1785
|
+
-(__v8sf) __C,
|
|
1786
|
+
(__mmask8) __U);
|
|
1787
|
+
}
|
|
1788
|
+
|
|
1789
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1790
|
+
_mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
|
|
1791
|
+
{
|
|
1792
|
+
return (__m256) __builtin_ia32_vfmaddsubps256_maskz ((__v8sf) __A,
|
|
1793
|
+
(__v8sf) __B,
|
|
1794
|
+
-(__v8sf) __C,
|
|
1795
|
+
(__mmask8) __U);
|
|
1796
|
+
}
|
|
1797
|
+
|
|
1798
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1799
|
+
_mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
|
|
1800
|
+
{
|
|
1801
|
+
return (__m128d) __builtin_ia32_vfmsubpd128_mask3 ((__v2df) __A,
|
|
1802
|
+
(__v2df) __B,
|
|
1803
|
+
(__v2df) __C,
|
|
1804
|
+
(__mmask8) __U);
|
|
1805
|
+
}
|
|
1806
|
+
|
|
1807
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1808
|
+
_mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
|
|
1809
|
+
{
|
|
1810
|
+
return (__m256d) __builtin_ia32_vfmsubpd256_mask3 ((__v4df) __A,
|
|
1811
|
+
(__v4df) __B,
|
|
1812
|
+
(__v4df) __C,
|
|
1813
|
+
(__mmask8) __U);
|
|
1814
|
+
}
|
|
1815
|
+
|
|
1816
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1817
|
+
_mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
|
|
1818
|
+
{
|
|
1819
|
+
return (__m128) __builtin_ia32_vfmsubps128_mask3 ((__v4sf) __A,
|
|
1820
|
+
(__v4sf) __B,
|
|
1821
|
+
(__v4sf) __C,
|
|
1822
|
+
(__mmask8) __U);
|
|
1823
|
+
}
|
|
1824
|
+
|
|
1825
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1826
|
+
_mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
|
|
1827
|
+
{
|
|
1828
|
+
return (__m256) __builtin_ia32_vfmsubps256_mask3 ((__v8sf) __A,
|
|
1829
|
+
(__v8sf) __B,
|
|
1830
|
+
(__v8sf) __C,
|
|
1831
|
+
(__mmask8) __U);
|
|
1832
|
+
}
|
|
1833
|
+
|
|
1834
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1835
|
+
_mm_mask3_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
|
|
1836
|
+
{
|
|
1837
|
+
return (__m128d) __builtin_ia32_vfmsubaddpd128_mask3 ((__v2df) __A,
|
|
1838
|
+
(__v2df) __B,
|
|
1839
|
+
(__v2df) __C,
|
|
1840
|
+
(__mmask8)
|
|
1841
|
+
__U);
|
|
1842
|
+
}
|
|
1843
|
+
|
|
1844
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1845
|
+
_mm256_mask3_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
|
|
1846
|
+
{
|
|
1847
|
+
return (__m256d) __builtin_ia32_vfmsubaddpd256_mask3 ((__v4df) __A,
|
|
1848
|
+
(__v4df) __B,
|
|
1849
|
+
(__v4df) __C,
|
|
1850
|
+
(__mmask8)
|
|
1851
|
+
__U);
|
|
1852
|
+
}
|
|
1853
|
+
|
|
1854
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1855
|
+
_mm_mask3_fmsubadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
|
|
1856
|
+
{
|
|
1857
|
+
return (__m128) __builtin_ia32_vfmsubaddps128_mask3 ((__v4sf) __A,
|
|
1858
|
+
(__v4sf) __B,
|
|
1859
|
+
(__v4sf) __C,
|
|
1860
|
+
(__mmask8) __U);
|
|
1861
|
+
}
|
|
1862
|
+
|
|
1863
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1864
|
+
_mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
|
|
1865
|
+
{
|
|
1866
|
+
return (__m256) __builtin_ia32_vfmsubaddps256_mask3 ((__v8sf) __A,
|
|
1867
|
+
(__v8sf) __B,
|
|
1868
|
+
(__v8sf) __C,
|
|
1869
|
+
(__mmask8) __U);
|
|
1870
|
+
}
|
|
1871
|
+
|
|
1872
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1873
|
+
_mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
|
|
1874
|
+
{
|
|
1875
|
+
return (__m128d) __builtin_ia32_vfnmaddpd128_mask ((__v2df) __A,
|
|
1876
|
+
(__v2df) __B,
|
|
1877
|
+
(__v2df) __C,
|
|
1878
|
+
(__mmask8) __U);
|
|
1879
|
+
}
|
|
1880
|
+
|
|
1881
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1882
|
+
_mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
|
|
1883
|
+
{
|
|
1884
|
+
return (__m256d) __builtin_ia32_vfnmaddpd256_mask ((__v4df) __A,
|
|
1885
|
+
(__v4df) __B,
|
|
1886
|
+
(__v4df) __C,
|
|
1887
|
+
(__mmask8) __U);
|
|
1888
|
+
}
|
|
1889
|
+
|
|
1890
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1891
|
+
_mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
|
|
1892
|
+
{
|
|
1893
|
+
return (__m128) __builtin_ia32_vfnmaddps128_mask ((__v4sf) __A,
|
|
1894
|
+
(__v4sf) __B,
|
|
1895
|
+
(__v4sf) __C,
|
|
1896
|
+
(__mmask8) __U);
|
|
1897
|
+
}
|
|
1898
|
+
|
|
1899
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1900
|
+
_mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
|
|
1901
|
+
{
|
|
1902
|
+
return (__m256) __builtin_ia32_vfnmaddps256_mask ((__v8sf) __A,
|
|
1903
|
+
(__v8sf) __B,
|
|
1904
|
+
(__v8sf) __C,
|
|
1905
|
+
(__mmask8) __U);
|
|
1906
|
+
}
|
|
1907
|
+
|
|
1908
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1909
|
+
_mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
|
|
1910
|
+
{
|
|
1911
|
+
return (__m128d) __builtin_ia32_vfnmsubpd128_mask ((__v2df) __A,
|
|
1912
|
+
(__v2df) __B,
|
|
1913
|
+
(__v2df) __C,
|
|
1914
|
+
(__mmask8) __U);
|
|
1915
|
+
}
|
|
1916
|
+
|
|
1917
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1918
|
+
_mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
|
|
1919
|
+
{
|
|
1920
|
+
return (__m128d) __builtin_ia32_vfnmsubpd128_mask3 ((__v2df) __A,
|
|
1921
|
+
(__v2df) __B,
|
|
1922
|
+
(__v2df) __C,
|
|
1923
|
+
(__mmask8) __U);
|
|
1924
|
+
}
|
|
1925
|
+
|
|
1926
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1927
|
+
_mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
|
|
1928
|
+
{
|
|
1929
|
+
return (__m256d) __builtin_ia32_vfnmsubpd256_mask ((__v4df) __A,
|
|
1930
|
+
(__v4df) __B,
|
|
1931
|
+
(__v4df) __C,
|
|
1932
|
+
(__mmask8) __U);
|
|
1933
|
+
}
|
|
1934
|
+
|
|
1935
|
+
static __inline__ __m256d __DEFAULT_FN_ATTRS
|
|
1936
|
+
_mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
|
|
1937
|
+
{
|
|
1938
|
+
return (__m256d) __builtin_ia32_vfnmsubpd256_mask3 ((__v4df) __A,
|
|
1939
|
+
(__v4df) __B,
|
|
1940
|
+
(__v4df) __C,
|
|
1941
|
+
(__mmask8) __U);
|
|
1942
|
+
}
|
|
1943
|
+
|
|
1944
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1945
|
+
_mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
|
|
1946
|
+
{
|
|
1947
|
+
return (__m128) __builtin_ia32_vfnmsubps128_mask ((__v4sf) __A,
|
|
1948
|
+
(__v4sf) __B,
|
|
1949
|
+
(__v4sf) __C,
|
|
1950
|
+
(__mmask8) __U);
|
|
1951
|
+
}
|
|
1952
|
+
|
|
1953
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1954
|
+
_mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
|
|
1955
|
+
{
|
|
1956
|
+
return (__m128) __builtin_ia32_vfnmsubps128_mask3 ((__v4sf) __A,
|
|
1957
|
+
(__v4sf) __B,
|
|
1958
|
+
(__v4sf) __C,
|
|
1959
|
+
(__mmask8) __U);
|
|
1960
|
+
}
|
|
1961
|
+
|
|
1962
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1963
|
+
_mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
|
|
1964
|
+
{
|
|
1965
|
+
return (__m256) __builtin_ia32_vfnmsubps256_mask ((__v8sf) __A,
|
|
1966
|
+
(__v8sf) __B,
|
|
1967
|
+
(__v8sf) __C,
|
|
1968
|
+
(__mmask8) __U);
|
|
1969
|
+
}
|
|
1970
|
+
|
|
1971
|
+
static __inline__ __m256 __DEFAULT_FN_ATTRS
|
|
1972
|
+
_mm256_mask3_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
|
|
1973
|
+
{
|
|
1974
|
+
return (__m256) __builtin_ia32_vfnmsubps256_mask3 ((__v8sf) __A,
|
|
1975
|
+
(__v8sf) __B,
|
|
1976
|
+
(__v8sf) __C,
|
|
1977
|
+
(__mmask8) __U);
|
|
1978
|
+
}
|
|
1979
|
+
|
|
1980
|
+
#undef __DEFAULT_FN_ATTRS
|
|
1981
|
+
|
|
1982
|
+
#endif /* __AVX512VLINTRIN_H */
|