xcodebuild-helper 1.0.0
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- checksums.yaml +7 -0
- data/.codeclimate.yml +20 -0
- data/.gitignore +1 -0
- data/.rspec +2 -0
- data/.travis.yml +7 -0
- data/Gemfile +6 -0
- data/Gemfile.lock +110 -0
- data/Guardfile +18 -0
- data/README.md +7 -0
- data/Rakefile +7 -0
- data/TODO.md +3 -0
- data/bin/oclint +5 -0
- data/bin/oclint-0.8 +5 -0
- data/bin/oclint-json-compilation-database +5 -0
- data/bin/oclint-xcodebuild +5 -0
- data/externals/oclint/LICENSE +69 -0
- data/externals/oclint/bin/oclint +0 -0
- data/externals/oclint/bin/oclint-0.10.2 +0 -0
- data/externals/oclint/bin/oclint-json-compilation-database +88 -0
- data/externals/oclint/bin/oclint-xcodebuild +218 -0
- data/externals/oclint/lib/clang/3.7.0/asan_blacklist.txt +13 -0
- data/externals/oclint/lib/clang/3.7.0/include/Intrin.h +958 -0
- data/externals/oclint/lib/clang/3.7.0/include/__stddef_max_align_t.h +43 -0
- data/externals/oclint/lib/clang/3.7.0/include/__wmmintrin_aes.h +72 -0
- data/externals/oclint/lib/clang/3.7.0/include/__wmmintrin_pclmul.h +34 -0
- data/externals/oclint/lib/clang/3.7.0/include/adxintrin.h +88 -0
- data/externals/oclint/lib/clang/3.7.0/include/altivec.h +13528 -0
- data/externals/oclint/lib/clang/3.7.0/include/ammintrin.h +215 -0
- data/externals/oclint/lib/clang/3.7.0/include/arm_acle.h +304 -0
- data/externals/oclint/lib/clang/3.7.0/include/arm_neon.h +68419 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx2intrin.h +1256 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512bwintrin.h +1250 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512cdintrin.h +131 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512dqintrin.h +242 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512erintrin.h +285 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512fintrin.h +2457 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512vlbwintrin.h +1907 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512vldqintrin.h +353 -0
- data/externals/oclint/lib/clang/3.7.0/include/avx512vlintrin.h +1982 -0
- data/externals/oclint/lib/clang/3.7.0/include/avxintrin.h +1308 -0
- data/externals/oclint/lib/clang/3.7.0/include/bmi2intrin.h +99 -0
- data/externals/oclint/lib/clang/3.7.0/include/bmiintrin.h +153 -0
- data/externals/oclint/lib/clang/3.7.0/include/cpuid.h +209 -0
- data/externals/oclint/lib/clang/3.7.0/include/cuda_builtin_vars.h +110 -0
- data/externals/oclint/lib/clang/3.7.0/include/emmintrin.h +1480 -0
- data/externals/oclint/lib/clang/3.7.0/include/f16cintrin.h +63 -0
- data/externals/oclint/lib/clang/3.7.0/include/float.h +124 -0
- data/externals/oclint/lib/clang/3.7.0/include/fma4intrin.h +236 -0
- data/externals/oclint/lib/clang/3.7.0/include/fmaintrin.h +234 -0
- data/externals/oclint/lib/clang/3.7.0/include/fxsrintrin.h +55 -0
- data/externals/oclint/lib/clang/3.7.0/include/htmintrin.h +226 -0
- data/externals/oclint/lib/clang/3.7.0/include/htmxlintrin.h +363 -0
- data/externals/oclint/lib/clang/3.7.0/include/ia32intrin.h +101 -0
- data/externals/oclint/lib/clang/3.7.0/include/immintrin.h +203 -0
- data/externals/oclint/lib/clang/3.7.0/include/inttypes.h +102 -0
- data/externals/oclint/lib/clang/3.7.0/include/iso646.h +43 -0
- data/externals/oclint/lib/clang/3.7.0/include/limits.h +118 -0
- data/externals/oclint/lib/clang/3.7.0/include/lzcntintrin.h +72 -0
- data/externals/oclint/lib/clang/3.7.0/include/mm3dnow.h +167 -0
- data/externals/oclint/lib/clang/3.7.0/include/mm_malloc.h +75 -0
- data/externals/oclint/lib/clang/3.7.0/include/mmintrin.h +507 -0
- data/externals/oclint/lib/clang/3.7.0/include/module.modulemap +196 -0
- data/externals/oclint/lib/clang/3.7.0/include/nmmintrin.h +35 -0
- data/externals/oclint/lib/clang/3.7.0/include/pmmintrin.h +122 -0
- data/externals/oclint/lib/clang/3.7.0/include/popcntintrin.h +50 -0
- data/externals/oclint/lib/clang/3.7.0/include/prfchwintrin.h +39 -0
- data/externals/oclint/lib/clang/3.7.0/include/rdseedintrin.h +59 -0
- data/externals/oclint/lib/clang/3.7.0/include/rtmintrin.h +59 -0
- data/externals/oclint/lib/clang/3.7.0/include/s390intrin.h +39 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/allocator_interface.h +66 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/asan_interface.h +155 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/common_interface_defs.h +118 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/coverage_interface.h +63 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/dfsan_interface.h +114 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/linux_syscall_hooks.h +3070 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/lsan_interface.h +84 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/msan_interface.h +107 -0
- data/externals/oclint/lib/clang/3.7.0/include/sanitizer/tsan_interface_atomic.h +222 -0
- data/externals/oclint/lib/clang/3.7.0/include/shaintrin.h +79 -0
- data/externals/oclint/lib/clang/3.7.0/include/smmintrin.h +487 -0
- data/externals/oclint/lib/clang/3.7.0/include/stdalign.h +35 -0
- data/externals/oclint/lib/clang/3.7.0/include/stdarg.h +52 -0
- data/externals/oclint/lib/clang/3.7.0/include/stdatomic.h +190 -0
- data/externals/oclint/lib/clang/3.7.0/include/stdbool.h +44 -0
- data/externals/oclint/lib/clang/3.7.0/include/stddef.h +137 -0
- data/externals/oclint/lib/clang/3.7.0/include/stdint.h +707 -0
- data/externals/oclint/lib/clang/3.7.0/include/stdnoreturn.h +30 -0
- data/externals/oclint/lib/clang/3.7.0/include/tbmintrin.h +154 -0
- data/externals/oclint/lib/clang/3.7.0/include/tgmath.h +1374 -0
- data/externals/oclint/lib/clang/3.7.0/include/tmmintrin.h +230 -0
- data/externals/oclint/lib/clang/3.7.0/include/unwind.h +282 -0
- data/externals/oclint/lib/clang/3.7.0/include/vadefs.h +65 -0
- data/externals/oclint/lib/clang/3.7.0/include/varargs.h +26 -0
- data/externals/oclint/lib/clang/3.7.0/include/vecintrin.h +8946 -0
- data/externals/oclint/lib/clang/3.7.0/include/wmmintrin.h +42 -0
- data/externals/oclint/lib/clang/3.7.0/include/x86intrin.h +81 -0
- data/externals/oclint/lib/clang/3.7.0/include/xmmintrin.h +1008 -0
- data/externals/oclint/lib/clang/3.7.0/include/xopintrin.h +809 -0
- data/externals/oclint/lib/clang/3.7.0/include/xtestintrin.h +41 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.asan_iossim_dynamic.dylib +0 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.asan_osx_dynamic.dylib +0 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.builtins-i386.a +0 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.builtins-x86_64.a +0 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.profile_osx.a +0 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.safestack_osx.a +0 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.ubsan_iossim_dynamic.dylib +0 -0
- data/externals/oclint/lib/clang/3.7.0/lib/darwin/libclang_rt.ubsan_osx_dynamic.dylib +0 -0
- data/externals/oclint/lib/oclint/reporters/libHTMLReporter.dylib +0 -0
- data/externals/oclint/lib/oclint/reporters/libJSONReporter.dylib +0 -0
- data/externals/oclint/lib/oclint/reporters/libPMDReporter.dylib +0 -0
- data/externals/oclint/lib/oclint/reporters/libTextReporter.dylib +0 -0
- data/externals/oclint/lib/oclint/reporters/libXMLReporter.dylib +0 -0
- data/externals/oclint/lib/oclint/reporters/libXcodeReporter.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libAvoidBranchingStatementAsLastInLoopRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libAvoidDefaultArgumentsOnVirtualMethodsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libAvoidPrivateStaticMembersRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libBaseClassDestructorShouldBeVirtualOrProtectedRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libBitwiseOperatorInConditionalRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libBrokenNullCheckRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libBrokenOddnessCheckRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libCollapsibleIfStatementsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libConstantConditionalOperatorRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libConstantIfExpressionRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libCoveredSwitchStatementsDontNeedDefaultRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libCyclomaticComplexityRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libDeadCodeRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libDefaultLabelNotLastInSwitchStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libDestructorOfVirtualClassRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libDoubleNegativeRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyCatchStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyDoWhileStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyElseBlockRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyFinallyStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyForStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyIfStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptySwitchStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyTryStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libEmptyWhileStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libForLoopShouldBeWhileLoopRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libGotoStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libInvertedLogicRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libJumbledIncrementerRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libLongClassRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libLongLineRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libLongMethodRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libLongVariableNameRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libMisplacedNullCheckRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libMissingBreakInSwitchStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libMultipleUnaryOperatorRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libNPathComplexityRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libNcssMethodCountRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libNestedBlockDepthRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libNonCaseLabelInSwitchStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCAssignIvarOutsideAccessorsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCBoxedExpressionsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCContainerLiteralsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCNSNumberLiteralsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCObjectSubscriptingRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCVerifyIsEqualHashRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCVerifyMustCallSuperRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCVerifyProhibitedCallRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCVerifyProtectedMethodRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libObjCVerifySubclassMustImplementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libParameterReassignmentRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libPreferEarlyExitRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libRedundantConditionalOperatorRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libRedundantIfStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libRedundantLocalVariableRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libRedundantNilCheckRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libReturnFromFinallyBlockRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libShortVariableNameRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libSwitchStatementsShouldHaveDefaultRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libThrowExceptionFromFinallyBlockRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libTooFewBranchesInSwitchStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libTooManyFieldsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libTooManyMethodsRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libTooManyParametersRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libUnnecessaryElseStatementRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libUnnecessaryNullCheckForCXXDeallocRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libUnusedLocalVariableRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libUnusedMethodParameterRule.dylib +0 -0
- data/externals/oclint/lib/oclint/rules/libUselessParenthesesRule.dylib +0 -0
- data/lib/coverage_plan.rb +19 -0
- data/lib/device.rb +27 -0
- data/lib/execute.rb +7 -0
- data/lib/lint_plan.rb +41 -0
- data/lib/rules.rb +23 -0
- data/lib/test_plan.rb +11 -0
- data/lib/version.rb +3 -0
- data/lib/xcode.rb +128 -0
- data/lib/xcodebuild-helper.rb +110 -0
- data/spec/coverage_plan_spec.rb +18 -0
- data/spec/device_spec.rb +24 -0
- data/spec/lint_plan_spec.rb +35 -0
- data/spec/rule_spec.rb +37 -0
- data/spec/spec_helper.rb +17 -0
- data/spec/test_plan_spec.rb +11 -0
- data/spec/xcode_dsl_actions_spec.rb +136 -0
- data/spec/xcode_dsl_spec.rb +176 -0
- data/spec/xcode_spec.rb +79 -0
- data/xcodebuild-helper.gemspec +26 -0
- metadata +327 -0
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/*===---- avx512vlbwintrin.h - AVX512VL and AVX512BW intrinsics ----------===
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error "Never use <avx512vlbwintrin.h> directly; include <immintrin.h> instead."
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#endif
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#ifndef __AVX512VLBWINTRIN_H
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#define __AVX512VLBWINTRIN_H
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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/* Integer compare */
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static __inline__ __mmask16 __DEFAULT_FN_ATTRS
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_mm_cmpeq_epi8_mask(__m128i __a, __m128i __b) {
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return (__mmask16)__builtin_ia32_pcmpeqb128_mask((__v16qi)__a, (__v16qi)__b,
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(__mmask16)-1);
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}
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static __inline__ __mmask16 __DEFAULT_FN_ATTRS
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_mm_mask_cmpeq_epi8_mask(__mmask16 __u, __m128i __a, __m128i __b) {
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return (__mmask16)__builtin_ia32_pcmpeqb128_mask((__v16qi)__a, (__v16qi)__b,
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__u);
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}
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static __inline__ __mmask16 __DEFAULT_FN_ATTRS
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_mm_cmpeq_epu8_mask(__m128i __a, __m128i __b) {
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return (__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)__a, (__v16qi)__b, 0,
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(__mmask16)-1);
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}
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static __inline__ __mmask16 __DEFAULT_FN_ATTRS
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_mm_mask_cmpeq_epu8_mask(__mmask16 __u, __m128i __a, __m128i __b) {
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return (__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)__a, (__v16qi)__b, 0,
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__u);
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}
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static __inline__ __mmask32 __DEFAULT_FN_ATTRS
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_mm256_cmpeq_epi8_mask(__m256i __a, __m256i __b) {
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return (__mmask32)__builtin_ia32_pcmpeqb256_mask((__v32qi)__a, (__v32qi)__b,
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(__mmask32)-1);
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}
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static __inline__ __mmask32 __DEFAULT_FN_ATTRS
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_mm256_mask_cmpeq_epi8_mask(__mmask32 __u, __m256i __a, __m256i __b) {
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return (__mmask32)__builtin_ia32_pcmpeqb256_mask((__v32qi)__a, (__v32qi)__b,
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__u);
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}
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static __inline__ __mmask32 __DEFAULT_FN_ATTRS
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_mm256_cmpeq_epu8_mask(__m256i __a, __m256i __b) {
|
74
|
+
return (__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)__a, (__v32qi)__b, 0,
|
75
|
+
(__mmask32)-1);
|
76
|
+
}
|
77
|
+
|
78
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
79
|
+
_mm256_mask_cmpeq_epu8_mask(__mmask32 __u, __m256i __a, __m256i __b) {
|
80
|
+
return (__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)__a, (__v32qi)__b, 0,
|
81
|
+
__u);
|
82
|
+
}
|
83
|
+
|
84
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
85
|
+
_mm_cmpeq_epi16_mask(__m128i __a, __m128i __b) {
|
86
|
+
return (__mmask8)__builtin_ia32_pcmpeqw128_mask((__v8hi)__a, (__v8hi)__b,
|
87
|
+
(__mmask8)-1);
|
88
|
+
}
|
89
|
+
|
90
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
91
|
+
_mm_mask_cmpeq_epi16_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
92
|
+
return (__mmask8)__builtin_ia32_pcmpeqw128_mask((__v8hi)__a, (__v8hi)__b,
|
93
|
+
__u);
|
94
|
+
}
|
95
|
+
|
96
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
97
|
+
_mm_cmpeq_epu16_mask(__m128i __a, __m128i __b) {
|
98
|
+
return (__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)__a, (__v8hi)__b, 0,
|
99
|
+
(__mmask8)-1);
|
100
|
+
}
|
101
|
+
|
102
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
103
|
+
_mm_mask_cmpeq_epu16_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
104
|
+
return (__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)__a, (__v8hi)__b, 0,
|
105
|
+
__u);
|
106
|
+
}
|
107
|
+
|
108
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
109
|
+
_mm256_cmpeq_epi16_mask(__m256i __a, __m256i __b) {
|
110
|
+
return (__mmask16)__builtin_ia32_pcmpeqw256_mask((__v16hi)__a, (__v16hi)__b,
|
111
|
+
(__mmask16)-1);
|
112
|
+
}
|
113
|
+
|
114
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
115
|
+
_mm256_mask_cmpeq_epi16_mask(__mmask16 __u, __m256i __a, __m256i __b) {
|
116
|
+
return (__mmask16)__builtin_ia32_pcmpeqw256_mask((__v16hi)__a, (__v16hi)__b,
|
117
|
+
__u);
|
118
|
+
}
|
119
|
+
|
120
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
121
|
+
_mm256_cmpeq_epu16_mask(__m256i __a, __m256i __b) {
|
122
|
+
return (__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)__a, (__v16hi)__b, 0,
|
123
|
+
(__mmask16)-1);
|
124
|
+
}
|
125
|
+
|
126
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
127
|
+
_mm256_mask_cmpeq_epu16_mask(__mmask16 __u, __m256i __a, __m256i __b) {
|
128
|
+
return (__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)__a, (__v16hi)__b, 0,
|
129
|
+
__u);
|
130
|
+
}
|
131
|
+
|
132
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
133
|
+
_mm_cmpge_epi8_mask(__m128i __a, __m128i __b) {
|
134
|
+
return (__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)__a, (__v16qi)__b, 5,
|
135
|
+
(__mmask16)-1);
|
136
|
+
}
|
137
|
+
|
138
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
139
|
+
_mm_mask_cmpge_epi8_mask(__mmask16 __u, __m128i __a, __m128i __b) {
|
140
|
+
return (__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)__a, (__v16qi)__b, 5,
|
141
|
+
__u);
|
142
|
+
}
|
143
|
+
|
144
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
145
|
+
_mm_cmpge_epu8_mask(__m128i __a, __m128i __b) {
|
146
|
+
return (__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)__a, (__v16qi)__b, 5,
|
147
|
+
(__mmask16)-1);
|
148
|
+
}
|
149
|
+
|
150
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
151
|
+
_mm_mask_cmpge_epu8_mask(__mmask16 __u, __m128i __a, __m128i __b) {
|
152
|
+
return (__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)__a, (__v16qi)__b, 5,
|
153
|
+
__u);
|
154
|
+
}
|
155
|
+
|
156
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
157
|
+
_mm256_cmpge_epi8_mask(__m256i __a, __m256i __b) {
|
158
|
+
return (__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)__a, (__v32qi)__b, 5,
|
159
|
+
(__mmask32)-1);
|
160
|
+
}
|
161
|
+
|
162
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
163
|
+
_mm256_mask_cmpge_epi8_mask(__mmask32 __u, __m256i __a, __m256i __b) {
|
164
|
+
return (__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)__a, (__v32qi)__b, 5,
|
165
|
+
__u);
|
166
|
+
}
|
167
|
+
|
168
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
169
|
+
_mm256_cmpge_epu8_mask(__m256i __a, __m256i __b) {
|
170
|
+
return (__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)__a, (__v32qi)__b, 5,
|
171
|
+
(__mmask32)-1);
|
172
|
+
}
|
173
|
+
|
174
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
175
|
+
_mm256_mask_cmpge_epu8_mask(__mmask32 __u, __m256i __a, __m256i __b) {
|
176
|
+
return (__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)__a, (__v32qi)__b, 5,
|
177
|
+
__u);
|
178
|
+
}
|
179
|
+
|
180
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
181
|
+
_mm_cmpge_epi16_mask(__m128i __a, __m128i __b) {
|
182
|
+
return (__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)__a, (__v8hi)__b, 5,
|
183
|
+
(__mmask8)-1);
|
184
|
+
}
|
185
|
+
|
186
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
187
|
+
_mm_mask_cmpge_epi16_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
188
|
+
return (__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)__a, (__v8hi)__b, 5,
|
189
|
+
__u);
|
190
|
+
}
|
191
|
+
|
192
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
193
|
+
_mm_cmpge_epu16_mask(__m128i __a, __m128i __b) {
|
194
|
+
return (__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)__a, (__v8hi)__b, 5,
|
195
|
+
(__mmask8)-1);
|
196
|
+
}
|
197
|
+
|
198
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
199
|
+
_mm_mask_cmpge_epu16_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
200
|
+
return (__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)__a, (__v8hi)__b, 5,
|
201
|
+
__u);
|
202
|
+
}
|
203
|
+
|
204
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
205
|
+
_mm256_cmpge_epi16_mask(__m256i __a, __m256i __b) {
|
206
|
+
return (__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)__a, (__v16hi)__b, 5,
|
207
|
+
(__mmask16)-1);
|
208
|
+
}
|
209
|
+
|
210
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
211
|
+
_mm256_mask_cmpge_epi16_mask(__mmask16 __u, __m256i __a, __m256i __b) {
|
212
|
+
return (__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)__a, (__v16hi)__b, 5,
|
213
|
+
__u);
|
214
|
+
}
|
215
|
+
|
216
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
217
|
+
_mm256_cmpge_epu16_mask(__m256i __a, __m256i __b) {
|
218
|
+
return (__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)__a, (__v16hi)__b, 5,
|
219
|
+
(__mmask16)-1);
|
220
|
+
}
|
221
|
+
|
222
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
223
|
+
_mm256_mask_cmpge_epu16_mask(__mmask16 __u, __m256i __a, __m256i __b) {
|
224
|
+
return (__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)__a, (__v16hi)__b, 5,
|
225
|
+
__u);
|
226
|
+
}
|
227
|
+
|
228
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
229
|
+
_mm_cmpgt_epi8_mask(__m128i __a, __m128i __b) {
|
230
|
+
return (__mmask16)__builtin_ia32_pcmpgtb128_mask((__v16qi)__a, (__v16qi)__b,
|
231
|
+
(__mmask16)-1);
|
232
|
+
}
|
233
|
+
|
234
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
235
|
+
_mm_mask_cmpgt_epi8_mask(__mmask16 __u, __m128i __a, __m128i __b) {
|
236
|
+
return (__mmask16)__builtin_ia32_pcmpgtb128_mask((__v16qi)__a, (__v16qi)__b,
|
237
|
+
__u);
|
238
|
+
}
|
239
|
+
|
240
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
241
|
+
_mm_cmpgt_epu8_mask(__m128i __a, __m128i __b) {
|
242
|
+
return (__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)__a, (__v16qi)__b, 6,
|
243
|
+
(__mmask16)-1);
|
244
|
+
}
|
245
|
+
|
246
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
247
|
+
_mm_mask_cmpgt_epu8_mask(__mmask16 __u, __m128i __a, __m128i __b) {
|
248
|
+
return (__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)__a, (__v16qi)__b, 6,
|
249
|
+
__u);
|
250
|
+
}
|
251
|
+
|
252
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
253
|
+
_mm256_cmpgt_epi8_mask(__m256i __a, __m256i __b) {
|
254
|
+
return (__mmask32)__builtin_ia32_pcmpgtb256_mask((__v32qi)__a, (__v32qi)__b,
|
255
|
+
(__mmask32)-1);
|
256
|
+
}
|
257
|
+
|
258
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
259
|
+
_mm256_mask_cmpgt_epi8_mask(__mmask32 __u, __m256i __a, __m256i __b) {
|
260
|
+
return (__mmask32)__builtin_ia32_pcmpgtb256_mask((__v32qi)__a, (__v32qi)__b,
|
261
|
+
__u);
|
262
|
+
}
|
263
|
+
|
264
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
265
|
+
_mm256_cmpgt_epu8_mask(__m256i __a, __m256i __b) {
|
266
|
+
return (__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)__a, (__v32qi)__b, 6,
|
267
|
+
(__mmask32)-1);
|
268
|
+
}
|
269
|
+
|
270
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
271
|
+
_mm256_mask_cmpgt_epu8_mask(__mmask32 __u, __m256i __a, __m256i __b) {
|
272
|
+
return (__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)__a, (__v32qi)__b, 6,
|
273
|
+
__u);
|
274
|
+
}
|
275
|
+
|
276
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
277
|
+
_mm_cmpgt_epi16_mask(__m128i __a, __m128i __b) {
|
278
|
+
return (__mmask8)__builtin_ia32_pcmpgtw128_mask((__v8hi)__a, (__v8hi)__b,
|
279
|
+
(__mmask8)-1);
|
280
|
+
}
|
281
|
+
|
282
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
283
|
+
_mm_mask_cmpgt_epi16_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
284
|
+
return (__mmask8)__builtin_ia32_pcmpgtw128_mask((__v8hi)__a, (__v8hi)__b,
|
285
|
+
__u);
|
286
|
+
}
|
287
|
+
|
288
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
289
|
+
_mm_cmpgt_epu16_mask(__m128i __a, __m128i __b) {
|
290
|
+
return (__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)__a, (__v8hi)__b, 6,
|
291
|
+
(__mmask8)-1);
|
292
|
+
}
|
293
|
+
|
294
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
295
|
+
_mm_mask_cmpgt_epu16_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
296
|
+
return (__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)__a, (__v8hi)__b, 6,
|
297
|
+
__u);
|
298
|
+
}
|
299
|
+
|
300
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
301
|
+
_mm256_cmpgt_epi16_mask(__m256i __a, __m256i __b) {
|
302
|
+
return (__mmask16)__builtin_ia32_pcmpgtw256_mask((__v16hi)__a, (__v16hi)__b,
|
303
|
+
(__mmask16)-1);
|
304
|
+
}
|
305
|
+
|
306
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
307
|
+
_mm256_mask_cmpgt_epi16_mask(__mmask16 __u, __m256i __a, __m256i __b) {
|
308
|
+
return (__mmask16)__builtin_ia32_pcmpgtw256_mask((__v16hi)__a, (__v16hi)__b,
|
309
|
+
__u);
|
310
|
+
}
|
311
|
+
|
312
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
313
|
+
_mm256_cmpgt_epu16_mask(__m256i __a, __m256i __b) {
|
314
|
+
return (__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)__a, (__v16hi)__b, 6,
|
315
|
+
(__mmask16)-1);
|
316
|
+
}
|
317
|
+
|
318
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
319
|
+
_mm256_mask_cmpgt_epu16_mask(__mmask16 __u, __m256i __a, __m256i __b) {
|
320
|
+
return (__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)__a, (__v16hi)__b, 6,
|
321
|
+
__u);
|
322
|
+
}
|
323
|
+
|
324
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
325
|
+
_mm_cmple_epi8_mask(__m128i __a, __m128i __b) {
|
326
|
+
return (__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)__a, (__v16qi)__b, 2,
|
327
|
+
(__mmask16)-1);
|
328
|
+
}
|
329
|
+
|
330
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
331
|
+
_mm_mask_cmple_epi8_mask(__mmask16 __u, __m128i __a, __m128i __b) {
|
332
|
+
return (__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)__a, (__v16qi)__b, 2,
|
333
|
+
__u);
|
334
|
+
}
|
335
|
+
|
336
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
337
|
+
_mm_cmple_epu8_mask(__m128i __a, __m128i __b) {
|
338
|
+
return (__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)__a, (__v16qi)__b, 2,
|
339
|
+
(__mmask16)-1);
|
340
|
+
}
|
341
|
+
|
342
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
343
|
+
_mm_mask_cmple_epu8_mask(__mmask16 __u, __m128i __a, __m128i __b) {
|
344
|
+
return (__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)__a, (__v16qi)__b, 2,
|
345
|
+
__u);
|
346
|
+
}
|
347
|
+
|
348
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
349
|
+
_mm256_cmple_epi8_mask(__m256i __a, __m256i __b) {
|
350
|
+
return (__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)__a, (__v32qi)__b, 2,
|
351
|
+
(__mmask32)-1);
|
352
|
+
}
|
353
|
+
|
354
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
355
|
+
_mm256_mask_cmple_epi8_mask(__mmask32 __u, __m256i __a, __m256i __b) {
|
356
|
+
return (__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)__a, (__v32qi)__b, 2,
|
357
|
+
__u);
|
358
|
+
}
|
359
|
+
|
360
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
361
|
+
_mm256_cmple_epu8_mask(__m256i __a, __m256i __b) {
|
362
|
+
return (__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)__a, (__v32qi)__b, 2,
|
363
|
+
(__mmask32)-1);
|
364
|
+
}
|
365
|
+
|
366
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
367
|
+
_mm256_mask_cmple_epu8_mask(__mmask32 __u, __m256i __a, __m256i __b) {
|
368
|
+
return (__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)__a, (__v32qi)__b, 2,
|
369
|
+
__u);
|
370
|
+
}
|
371
|
+
|
372
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
373
|
+
_mm_cmple_epi16_mask(__m128i __a, __m128i __b) {
|
374
|
+
return (__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)__a, (__v8hi)__b, 2,
|
375
|
+
(__mmask8)-1);
|
376
|
+
}
|
377
|
+
|
378
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
379
|
+
_mm_mask_cmple_epi16_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
380
|
+
return (__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)__a, (__v8hi)__b, 2,
|
381
|
+
__u);
|
382
|
+
}
|
383
|
+
|
384
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
385
|
+
_mm_cmple_epu16_mask(__m128i __a, __m128i __b) {
|
386
|
+
return (__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)__a, (__v8hi)__b, 2,
|
387
|
+
(__mmask8)-1);
|
388
|
+
}
|
389
|
+
|
390
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
391
|
+
_mm_mask_cmple_epu16_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
392
|
+
return (__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)__a, (__v8hi)__b, 2,
|
393
|
+
__u);
|
394
|
+
}
|
395
|
+
|
396
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
397
|
+
_mm256_cmple_epi16_mask(__m256i __a, __m256i __b) {
|
398
|
+
return (__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)__a, (__v16hi)__b, 2,
|
399
|
+
(__mmask16)-1);
|
400
|
+
}
|
401
|
+
|
402
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
403
|
+
_mm256_mask_cmple_epi16_mask(__mmask16 __u, __m256i __a, __m256i __b) {
|
404
|
+
return (__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)__a, (__v16hi)__b, 2,
|
405
|
+
__u);
|
406
|
+
}
|
407
|
+
|
408
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
409
|
+
_mm256_cmple_epu16_mask(__m256i __a, __m256i __b) {
|
410
|
+
return (__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)__a, (__v16hi)__b, 2,
|
411
|
+
(__mmask16)-1);
|
412
|
+
}
|
413
|
+
|
414
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
415
|
+
_mm256_mask_cmple_epu16_mask(__mmask16 __u, __m256i __a, __m256i __b) {
|
416
|
+
return (__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)__a, (__v16hi)__b, 2,
|
417
|
+
__u);
|
418
|
+
}
|
419
|
+
|
420
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
421
|
+
_mm_cmplt_epi8_mask(__m128i __a, __m128i __b) {
|
422
|
+
return (__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)__a, (__v16qi)__b, 1,
|
423
|
+
(__mmask16)-1);
|
424
|
+
}
|
425
|
+
|
426
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
427
|
+
_mm_mask_cmplt_epi8_mask(__mmask16 __u, __m128i __a, __m128i __b) {
|
428
|
+
return (__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)__a, (__v16qi)__b, 1,
|
429
|
+
__u);
|
430
|
+
}
|
431
|
+
|
432
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
433
|
+
_mm_cmplt_epu8_mask(__m128i __a, __m128i __b) {
|
434
|
+
return (__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)__a, (__v16qi)__b, 1,
|
435
|
+
(__mmask16)-1);
|
436
|
+
}
|
437
|
+
|
438
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
439
|
+
_mm_mask_cmplt_epu8_mask(__mmask16 __u, __m128i __a, __m128i __b) {
|
440
|
+
return (__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)__a, (__v16qi)__b, 1,
|
441
|
+
__u);
|
442
|
+
}
|
443
|
+
|
444
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
445
|
+
_mm256_cmplt_epi8_mask(__m256i __a, __m256i __b) {
|
446
|
+
return (__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)__a, (__v32qi)__b, 1,
|
447
|
+
(__mmask32)-1);
|
448
|
+
}
|
449
|
+
|
450
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
451
|
+
_mm256_mask_cmplt_epi8_mask(__mmask32 __u, __m256i __a, __m256i __b) {
|
452
|
+
return (__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)__a, (__v32qi)__b, 1,
|
453
|
+
__u);
|
454
|
+
}
|
455
|
+
|
456
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
457
|
+
_mm256_cmplt_epu8_mask(__m256i __a, __m256i __b) {
|
458
|
+
return (__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)__a, (__v32qi)__b, 1,
|
459
|
+
(__mmask32)-1);
|
460
|
+
}
|
461
|
+
|
462
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
463
|
+
_mm256_mask_cmplt_epu8_mask(__mmask32 __u, __m256i __a, __m256i __b) {
|
464
|
+
return (__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)__a, (__v32qi)__b, 1,
|
465
|
+
__u);
|
466
|
+
}
|
467
|
+
|
468
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
469
|
+
_mm_cmplt_epi16_mask(__m128i __a, __m128i __b) {
|
470
|
+
return (__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)__a, (__v8hi)__b, 1,
|
471
|
+
(__mmask8)-1);
|
472
|
+
}
|
473
|
+
|
474
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
475
|
+
_mm_mask_cmplt_epi16_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
476
|
+
return (__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)__a, (__v8hi)__b, 1,
|
477
|
+
__u);
|
478
|
+
}
|
479
|
+
|
480
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
481
|
+
_mm_cmplt_epu16_mask(__m128i __a, __m128i __b) {
|
482
|
+
return (__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)__a, (__v8hi)__b, 1,
|
483
|
+
(__mmask8)-1);
|
484
|
+
}
|
485
|
+
|
486
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
487
|
+
_mm_mask_cmplt_epu16_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
488
|
+
return (__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)__a, (__v8hi)__b, 1,
|
489
|
+
__u);
|
490
|
+
}
|
491
|
+
|
492
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
493
|
+
_mm256_cmplt_epi16_mask(__m256i __a, __m256i __b) {
|
494
|
+
return (__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)__a, (__v16hi)__b, 1,
|
495
|
+
(__mmask16)-1);
|
496
|
+
}
|
497
|
+
|
498
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
499
|
+
_mm256_mask_cmplt_epi16_mask(__mmask16 __u, __m256i __a, __m256i __b) {
|
500
|
+
return (__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)__a, (__v16hi)__b, 1,
|
501
|
+
__u);
|
502
|
+
}
|
503
|
+
|
504
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
505
|
+
_mm256_cmplt_epu16_mask(__m256i __a, __m256i __b) {
|
506
|
+
return (__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)__a, (__v16hi)__b, 1,
|
507
|
+
(__mmask16)-1);
|
508
|
+
}
|
509
|
+
|
510
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
511
|
+
_mm256_mask_cmplt_epu16_mask(__mmask16 __u, __m256i __a, __m256i __b) {
|
512
|
+
return (__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)__a, (__v16hi)__b, 1,
|
513
|
+
__u);
|
514
|
+
}
|
515
|
+
|
516
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
517
|
+
_mm_cmpneq_epi8_mask(__m128i __a, __m128i __b) {
|
518
|
+
return (__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)__a, (__v16qi)__b, 4,
|
519
|
+
(__mmask16)-1);
|
520
|
+
}
|
521
|
+
|
522
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
523
|
+
_mm_mask_cmpneq_epi8_mask(__mmask16 __u, __m128i __a, __m128i __b) {
|
524
|
+
return (__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)__a, (__v16qi)__b, 4,
|
525
|
+
__u);
|
526
|
+
}
|
527
|
+
|
528
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
529
|
+
_mm_cmpneq_epu8_mask(__m128i __a, __m128i __b) {
|
530
|
+
return (__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)__a, (__v16qi)__b, 4,
|
531
|
+
(__mmask16)-1);
|
532
|
+
}
|
533
|
+
|
534
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
535
|
+
_mm_mask_cmpneq_epu8_mask(__mmask16 __u, __m128i __a, __m128i __b) {
|
536
|
+
return (__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)__a, (__v16qi)__b, 4,
|
537
|
+
__u);
|
538
|
+
}
|
539
|
+
|
540
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
541
|
+
_mm256_cmpneq_epi8_mask(__m256i __a, __m256i __b) {
|
542
|
+
return (__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)__a, (__v32qi)__b, 4,
|
543
|
+
(__mmask32)-1);
|
544
|
+
}
|
545
|
+
|
546
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
547
|
+
_mm256_mask_cmpneq_epi8_mask(__mmask32 __u, __m256i __a, __m256i __b) {
|
548
|
+
return (__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)__a, (__v32qi)__b, 4,
|
549
|
+
__u);
|
550
|
+
}
|
551
|
+
|
552
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
553
|
+
_mm256_cmpneq_epu8_mask(__m256i __a, __m256i __b) {
|
554
|
+
return (__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)__a, (__v32qi)__b, 4,
|
555
|
+
(__mmask32)-1);
|
556
|
+
}
|
557
|
+
|
558
|
+
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
|
559
|
+
_mm256_mask_cmpneq_epu8_mask(__mmask32 __u, __m256i __a, __m256i __b) {
|
560
|
+
return (__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)__a, (__v32qi)__b, 4,
|
561
|
+
__u);
|
562
|
+
}
|
563
|
+
|
564
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
565
|
+
_mm_cmpneq_epi16_mask(__m128i __a, __m128i __b) {
|
566
|
+
return (__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)__a, (__v8hi)__b, 4,
|
567
|
+
(__mmask8)-1);
|
568
|
+
}
|
569
|
+
|
570
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
571
|
+
_mm_mask_cmpneq_epi16_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
572
|
+
return (__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)__a, (__v8hi)__b, 4,
|
573
|
+
__u);
|
574
|
+
}
|
575
|
+
|
576
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
577
|
+
_mm_cmpneq_epu16_mask(__m128i __a, __m128i __b) {
|
578
|
+
return (__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)__a, (__v8hi)__b, 4,
|
579
|
+
(__mmask8)-1);
|
580
|
+
}
|
581
|
+
|
582
|
+
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
|
583
|
+
_mm_mask_cmpneq_epu16_mask(__mmask8 __u, __m128i __a, __m128i __b) {
|
584
|
+
return (__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)__a, (__v8hi)__b, 4,
|
585
|
+
__u);
|
586
|
+
}
|
587
|
+
|
588
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
589
|
+
_mm256_cmpneq_epi16_mask(__m256i __a, __m256i __b) {
|
590
|
+
return (__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)__a, (__v16hi)__b, 4,
|
591
|
+
(__mmask16)-1);
|
592
|
+
}
|
593
|
+
|
594
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
595
|
+
_mm256_mask_cmpneq_epi16_mask(__mmask16 __u, __m256i __a, __m256i __b) {
|
596
|
+
return (__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)__a, (__v16hi)__b, 4,
|
597
|
+
__u);
|
598
|
+
}
|
599
|
+
|
600
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
601
|
+
_mm256_cmpneq_epu16_mask(__m256i __a, __m256i __b) {
|
602
|
+
return (__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)__a, (__v16hi)__b, 4,
|
603
|
+
(__mmask16)-1);
|
604
|
+
}
|
605
|
+
|
606
|
+
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
|
607
|
+
_mm256_mask_cmpneq_epu16_mask(__mmask16 __u, __m256i __a, __m256i __b) {
|
608
|
+
return (__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)__a, (__v16hi)__b, 4,
|
609
|
+
__u);
|
610
|
+
}
|
611
|
+
|
612
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
613
|
+
_mm256_mask_add_epi8 (__m256i __W, __mmask32 __U, __m256i __A, __m256i __B){
|
614
|
+
return (__m256i) __builtin_ia32_paddb256_mask ((__v32qi) __A,
|
615
|
+
(__v32qi) __B,
|
616
|
+
(__v32qi) __W,
|
617
|
+
(__mmask32) __U);
|
618
|
+
}
|
619
|
+
|
620
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
621
|
+
_mm256_maskz_add_epi8 (__mmask32 __U, __m256i __A, __m256i __B) {
|
622
|
+
return (__m256i) __builtin_ia32_paddb256_mask ((__v32qi) __A,
|
623
|
+
(__v32qi) __B,
|
624
|
+
(__v32qi)
|
625
|
+
_mm256_setzero_si256 (),
|
626
|
+
(__mmask32) __U);
|
627
|
+
}
|
628
|
+
|
629
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
630
|
+
_mm256_mask_add_epi16 (__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
|
631
|
+
return (__m256i) __builtin_ia32_paddw256_mask ((__v16hi) __A,
|
632
|
+
(__v16hi) __B,
|
633
|
+
(__v16hi) __W,
|
634
|
+
(__mmask16) __U);
|
635
|
+
}
|
636
|
+
|
637
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
638
|
+
_mm256_maskz_add_epi16 (__mmask16 __U, __m256i __A, __m256i __B) {
|
639
|
+
return (__m256i) __builtin_ia32_paddw256_mask ((__v16hi) __A,
|
640
|
+
(__v16hi) __B,
|
641
|
+
(__v16hi)
|
642
|
+
_mm256_setzero_si256 (),
|
643
|
+
(__mmask16) __U);
|
644
|
+
}
|
645
|
+
|
646
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
647
|
+
_mm256_mask_sub_epi8 (__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
|
648
|
+
return (__m256i) __builtin_ia32_psubb256_mask ((__v32qi) __A,
|
649
|
+
(__v32qi) __B,
|
650
|
+
(__v32qi) __W,
|
651
|
+
(__mmask32) __U);
|
652
|
+
}
|
653
|
+
|
654
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
655
|
+
_mm256_maskz_sub_epi8 (__mmask32 __U, __m256i __A, __m256i __B) {
|
656
|
+
return (__m256i) __builtin_ia32_psubb256_mask ((__v32qi) __A,
|
657
|
+
(__v32qi) __B,
|
658
|
+
(__v32qi)
|
659
|
+
_mm256_setzero_si256 (),
|
660
|
+
(__mmask32) __U);
|
661
|
+
}
|
662
|
+
|
663
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
664
|
+
_mm256_mask_sub_epi16 (__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
|
665
|
+
return (__m256i) __builtin_ia32_psubw256_mask ((__v16hi) __A,
|
666
|
+
(__v16hi) __B,
|
667
|
+
(__v16hi) __W,
|
668
|
+
(__mmask16) __U);
|
669
|
+
}
|
670
|
+
|
671
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
672
|
+
_mm256_maskz_sub_epi16 (__mmask16 __U, __m256i __A, __m256i __B) {
|
673
|
+
return (__m256i) __builtin_ia32_psubw256_mask ((__v16hi) __A,
|
674
|
+
(__v16hi) __B,
|
675
|
+
(__v16hi)
|
676
|
+
_mm256_setzero_si256 (),
|
677
|
+
(__mmask16) __U);
|
678
|
+
}
|
679
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
680
|
+
_mm_mask_add_epi8 (__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
|
681
|
+
return (__m128i) __builtin_ia32_paddb128_mask ((__v16qi) __A,
|
682
|
+
(__v16qi) __B,
|
683
|
+
(__v16qi) __W,
|
684
|
+
(__mmask16) __U);
|
685
|
+
}
|
686
|
+
|
687
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
688
|
+
_mm_maskz_add_epi8 (__mmask16 __U, __m128i __A, __m128i __B) {
|
689
|
+
return (__m128i) __builtin_ia32_paddb128_mask ((__v16qi) __A,
|
690
|
+
(__v16qi) __B,
|
691
|
+
(__v16qi)
|
692
|
+
_mm_setzero_si128 (),
|
693
|
+
(__mmask16) __U);
|
694
|
+
}
|
695
|
+
|
696
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
697
|
+
_mm_mask_add_epi16 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
|
698
|
+
return (__m128i) __builtin_ia32_paddw128_mask ((__v8hi) __A,
|
699
|
+
(__v8hi) __B,
|
700
|
+
(__v8hi) __W,
|
701
|
+
(__mmask8) __U);
|
702
|
+
}
|
703
|
+
|
704
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
705
|
+
_mm_maskz_add_epi16 (__mmask8 __U, __m128i __A, __m128i __B) {
|
706
|
+
return (__m128i) __builtin_ia32_paddw128_mask ((__v8hi) __A,
|
707
|
+
(__v8hi) __B,
|
708
|
+
(__v8hi)
|
709
|
+
_mm_setzero_si128 (),
|
710
|
+
(__mmask8) __U);
|
711
|
+
}
|
712
|
+
|
713
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
714
|
+
_mm_mask_sub_epi8 (__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
|
715
|
+
return (__m128i) __builtin_ia32_psubb128_mask ((__v16qi) __A,
|
716
|
+
(__v16qi) __B,
|
717
|
+
(__v16qi) __W,
|
718
|
+
(__mmask16) __U);
|
719
|
+
}
|
720
|
+
|
721
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
722
|
+
_mm_maskz_sub_epi8 (__mmask16 __U, __m128i __A, __m128i __B) {
|
723
|
+
return (__m128i) __builtin_ia32_psubb128_mask ((__v16qi) __A,
|
724
|
+
(__v16qi) __B,
|
725
|
+
(__v16qi)
|
726
|
+
_mm_setzero_si128 (),
|
727
|
+
(__mmask16) __U);
|
728
|
+
}
|
729
|
+
|
730
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
731
|
+
_mm_mask_sub_epi16 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
|
732
|
+
return (__m128i) __builtin_ia32_psubw128_mask ((__v8hi) __A,
|
733
|
+
(__v8hi) __B,
|
734
|
+
(__v8hi) __W,
|
735
|
+
(__mmask8) __U);
|
736
|
+
}
|
737
|
+
|
738
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
739
|
+
_mm_maskz_sub_epi16 (__mmask8 __U, __m128i __A, __m128i __B) {
|
740
|
+
return (__m128i) __builtin_ia32_psubw128_mask ((__v8hi) __A,
|
741
|
+
(__v8hi) __B,
|
742
|
+
(__v8hi)
|
743
|
+
_mm_setzero_si128 (),
|
744
|
+
(__mmask8) __U);
|
745
|
+
}
|
746
|
+
|
747
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
748
|
+
_mm256_mask_mullo_epi16 (__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
|
749
|
+
return (__m256i) __builtin_ia32_pmullw256_mask ((__v16hi) __A,
|
750
|
+
(__v16hi) __B,
|
751
|
+
(__v16hi) __W,
|
752
|
+
(__mmask16) __U);
|
753
|
+
}
|
754
|
+
|
755
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
756
|
+
_mm256_maskz_mullo_epi16 (__mmask16 __U, __m256i __A, __m256i __B) {
|
757
|
+
return (__m256i) __builtin_ia32_pmullw256_mask ((__v16hi) __A,
|
758
|
+
(__v16hi) __B,
|
759
|
+
(__v16hi)
|
760
|
+
_mm256_setzero_si256 (),
|
761
|
+
(__mmask16) __U);
|
762
|
+
}
|
763
|
+
|
764
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
765
|
+
_mm_mask_mullo_epi16 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
|
766
|
+
return (__m128i) __builtin_ia32_pmullw128_mask ((__v8hi) __A,
|
767
|
+
(__v8hi) __B,
|
768
|
+
(__v8hi) __W,
|
769
|
+
(__mmask8) __U);
|
770
|
+
}
|
771
|
+
|
772
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
773
|
+
_mm_maskz_mullo_epi16 (__mmask8 __U, __m128i __A, __m128i __B) {
|
774
|
+
return (__m128i) __builtin_ia32_pmullw128_mask ((__v8hi) __A,
|
775
|
+
(__v8hi) __B,
|
776
|
+
(__v8hi)
|
777
|
+
_mm_setzero_si128 (),
|
778
|
+
(__mmask8) __U);
|
779
|
+
}
|
780
|
+
|
781
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
782
|
+
_mm_mask_blend_epi8 (__mmask16 __U, __m128i __A, __m128i __W)
|
783
|
+
{
|
784
|
+
return (__m128i) __builtin_ia32_blendmb_128_mask ((__v16qi) __A,
|
785
|
+
(__v16qi) __W,
|
786
|
+
(__mmask16) __U);
|
787
|
+
}
|
788
|
+
|
789
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
790
|
+
_mm256_mask_blend_epi8 (__mmask32 __U, __m256i __A, __m256i __W)
|
791
|
+
{
|
792
|
+
return (__m256i) __builtin_ia32_blendmb_256_mask ((__v32qi) __A,
|
793
|
+
(__v32qi) __W,
|
794
|
+
(__mmask32) __U);
|
795
|
+
}
|
796
|
+
|
797
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
798
|
+
_mm_mask_blend_epi16 (__mmask8 __U, __m128i __A, __m128i __W)
|
799
|
+
{
|
800
|
+
return (__m128i) __builtin_ia32_blendmw_128_mask ((__v8hi) __A,
|
801
|
+
(__v8hi) __W,
|
802
|
+
(__mmask8) __U);
|
803
|
+
}
|
804
|
+
|
805
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
806
|
+
_mm256_mask_blend_epi16 (__mmask16 __U, __m256i __A, __m256i __W)
|
807
|
+
{
|
808
|
+
return (__m256i) __builtin_ia32_blendmw_256_mask ((__v16hi) __A,
|
809
|
+
(__v16hi) __W,
|
810
|
+
(__mmask16) __U);
|
811
|
+
}
|
812
|
+
|
813
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
814
|
+
_mm_mask_abs_epi8 (__m128i __W, __mmask16 __U, __m128i __A)
|
815
|
+
{
|
816
|
+
return (__m128i) __builtin_ia32_pabsb128_mask ((__v16qi) __A,
|
817
|
+
(__v16qi) __W,
|
818
|
+
(__mmask16) __U);
|
819
|
+
}
|
820
|
+
|
821
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
822
|
+
_mm_maskz_abs_epi8 (__mmask16 __U, __m128i __A)
|
823
|
+
{
|
824
|
+
return (__m128i) __builtin_ia32_pabsb128_mask ((__v16qi) __A,
|
825
|
+
(__v16qi) _mm_setzero_si128 (),
|
826
|
+
(__mmask16) __U);
|
827
|
+
}
|
828
|
+
|
829
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
830
|
+
_mm256_mask_abs_epi8 (__m256i __W, __mmask32 __U, __m256i __A)
|
831
|
+
{
|
832
|
+
return (__m256i) __builtin_ia32_pabsb256_mask ((__v32qi) __A,
|
833
|
+
(__v32qi) __W,
|
834
|
+
(__mmask32) __U);
|
835
|
+
}
|
836
|
+
|
837
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
838
|
+
_mm256_maskz_abs_epi8 (__mmask32 __U, __m256i __A)
|
839
|
+
{
|
840
|
+
return (__m256i) __builtin_ia32_pabsb256_mask ((__v32qi) __A,
|
841
|
+
(__v32qi) _mm256_setzero_si256 (),
|
842
|
+
(__mmask32) __U);
|
843
|
+
}
|
844
|
+
|
845
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
846
|
+
_mm_mask_abs_epi16 (__m128i __W, __mmask8 __U, __m128i __A)
|
847
|
+
{
|
848
|
+
return (__m128i) __builtin_ia32_pabsw128_mask ((__v8hi) __A,
|
849
|
+
(__v8hi) __W,
|
850
|
+
(__mmask8) __U);
|
851
|
+
}
|
852
|
+
|
853
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
854
|
+
_mm_maskz_abs_epi16 (__mmask8 __U, __m128i __A)
|
855
|
+
{
|
856
|
+
return (__m128i) __builtin_ia32_pabsw128_mask ((__v8hi) __A,
|
857
|
+
(__v8hi) _mm_setzero_si128 (),
|
858
|
+
(__mmask8) __U);
|
859
|
+
}
|
860
|
+
|
861
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
862
|
+
_mm256_mask_abs_epi16 (__m256i __W, __mmask16 __U, __m256i __A)
|
863
|
+
{
|
864
|
+
return (__m256i) __builtin_ia32_pabsw256_mask ((__v16hi) __A,
|
865
|
+
(__v16hi) __W,
|
866
|
+
(__mmask16) __U);
|
867
|
+
}
|
868
|
+
|
869
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
870
|
+
_mm256_maskz_abs_epi16 (__mmask16 __U, __m256i __A)
|
871
|
+
{
|
872
|
+
return (__m256i) __builtin_ia32_pabsw256_mask ((__v16hi) __A,
|
873
|
+
(__v16hi) _mm256_setzero_si256 (),
|
874
|
+
(__mmask16) __U);
|
875
|
+
}
|
876
|
+
|
877
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
878
|
+
_mm_maskz_packs_epi32 (__mmask8 __M, __m128i __A, __m128i __B)
|
879
|
+
{
|
880
|
+
return (__m128i) __builtin_ia32_packssdw128_mask ((__v4si) __A,
|
881
|
+
(__v4si) __B,
|
882
|
+
(__v8hi) _mm_setzero_si128 (), __M);
|
883
|
+
}
|
884
|
+
|
885
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
886
|
+
_mm_mask_packs_epi32 (__m128i __W, __mmask16 __M, __m128i __A,
|
887
|
+
__m128i __B)
|
888
|
+
{
|
889
|
+
return (__m128i) __builtin_ia32_packssdw128_mask ((__v4si) __A,
|
890
|
+
(__v4si) __B,
|
891
|
+
(__v8hi) __W, __M);
|
892
|
+
}
|
893
|
+
|
894
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
895
|
+
_mm256_maskz_packs_epi32 (__mmask16 __M, __m256i __A, __m256i __B)
|
896
|
+
{
|
897
|
+
return (__m256i) __builtin_ia32_packssdw256_mask ((__v8si) __A,
|
898
|
+
(__v8si) __B,
|
899
|
+
(__v16hi) _mm256_setzero_si256 (),
|
900
|
+
__M);
|
901
|
+
}
|
902
|
+
|
903
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
904
|
+
_mm256_mask_packs_epi32 (__m256i __W, __mmask16 __M, __m256i __A,
|
905
|
+
__m256i __B)
|
906
|
+
{
|
907
|
+
return (__m256i) __builtin_ia32_packssdw256_mask ((__v8si) __A,
|
908
|
+
(__v8si) __B,
|
909
|
+
(__v16hi) __W, __M);
|
910
|
+
}
|
911
|
+
|
912
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
913
|
+
_mm_maskz_packs_epi16 (__mmask16 __M, __m128i __A, __m128i __B)
|
914
|
+
{
|
915
|
+
return (__m128i) __builtin_ia32_packsswb128_mask ((__v8hi) __A,
|
916
|
+
(__v8hi) __B,
|
917
|
+
(__v16qi) _mm_setzero_si128 (),
|
918
|
+
__M);
|
919
|
+
}
|
920
|
+
|
921
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
922
|
+
_mm_mask_packs_epi16 (__m128i __W, __mmask16 __M, __m128i __A,
|
923
|
+
__m128i __B)
|
924
|
+
{
|
925
|
+
return (__m128i) __builtin_ia32_packsswb128_mask ((__v8hi) __A,
|
926
|
+
(__v8hi) __B,
|
927
|
+
(__v16qi) __W,
|
928
|
+
__M);
|
929
|
+
}
|
930
|
+
|
931
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
932
|
+
_mm256_maskz_packs_epi16 (__mmask32 __M, __m256i __A, __m256i __B)
|
933
|
+
{
|
934
|
+
return (__m256i) __builtin_ia32_packsswb256_mask ((__v16hi) __A,
|
935
|
+
(__v16hi) __B,
|
936
|
+
(__v32qi) _mm256_setzero_si256 (),
|
937
|
+
__M);
|
938
|
+
}
|
939
|
+
|
940
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
941
|
+
_mm256_mask_packs_epi16 (__m256i __W, __mmask32 __M, __m256i __A,
|
942
|
+
__m256i __B)
|
943
|
+
{
|
944
|
+
return (__m256i) __builtin_ia32_packsswb256_mask ((__v16hi) __A,
|
945
|
+
(__v16hi) __B,
|
946
|
+
(__v32qi) __W,
|
947
|
+
__M);
|
948
|
+
}
|
949
|
+
|
950
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
951
|
+
_mm_maskz_packus_epi32 (__mmask8 __M, __m128i __A, __m128i __B)
|
952
|
+
{
|
953
|
+
return (__m128i) __builtin_ia32_packusdw128_mask ((__v4si) __A,
|
954
|
+
(__v4si) __B,
|
955
|
+
(__v8hi) _mm_setzero_si128 (),
|
956
|
+
__M);
|
957
|
+
}
|
958
|
+
|
959
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
960
|
+
_mm_mask_packus_epi32 (__m128i __W, __mmask16 __M, __m128i __A,
|
961
|
+
__m128i __B)
|
962
|
+
{
|
963
|
+
return (__m128i) __builtin_ia32_packusdw128_mask ((__v4si) __A,
|
964
|
+
(__v4si) __B,
|
965
|
+
(__v8hi) __W, __M);
|
966
|
+
}
|
967
|
+
|
968
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
969
|
+
_mm256_maskz_packus_epi32 (__mmask16 __M, __m256i __A, __m256i __B)
|
970
|
+
{
|
971
|
+
return (__m256i) __builtin_ia32_packusdw256_mask ((__v8si) __A,
|
972
|
+
(__v8si) __B,
|
973
|
+
(__v16hi) _mm256_setzero_si256 (),
|
974
|
+
__M);
|
975
|
+
}
|
976
|
+
|
977
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
978
|
+
_mm256_mask_packus_epi32 (__m256i __W, __mmask16 __M, __m256i __A,
|
979
|
+
__m256i __B)
|
980
|
+
{
|
981
|
+
return (__m256i) __builtin_ia32_packusdw256_mask ((__v8si) __A,
|
982
|
+
(__v8si) __B,
|
983
|
+
(__v16hi) __W,
|
984
|
+
__M);
|
985
|
+
}
|
986
|
+
|
987
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
988
|
+
_mm_maskz_packus_epi16 (__mmask16 __M, __m128i __A, __m128i __B)
|
989
|
+
{
|
990
|
+
return (__m128i) __builtin_ia32_packuswb128_mask ((__v8hi) __A,
|
991
|
+
(__v8hi) __B,
|
992
|
+
(__v16qi) _mm_setzero_si128 (),
|
993
|
+
__M);
|
994
|
+
}
|
995
|
+
|
996
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
997
|
+
_mm_mask_packus_epi16 (__m128i __W, __mmask16 __M, __m128i __A,
|
998
|
+
__m128i __B)
|
999
|
+
{
|
1000
|
+
return (__m128i) __builtin_ia32_packuswb128_mask ((__v8hi) __A,
|
1001
|
+
(__v8hi) __B,
|
1002
|
+
(__v16qi) __W,
|
1003
|
+
__M);
|
1004
|
+
}
|
1005
|
+
|
1006
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1007
|
+
_mm256_maskz_packus_epi16 (__mmask32 __M, __m256i __A, __m256i __B)
|
1008
|
+
{
|
1009
|
+
return (__m256i) __builtin_ia32_packuswb256_mask ((__v16hi) __A,
|
1010
|
+
(__v16hi) __B,
|
1011
|
+
(__v32qi) _mm256_setzero_si256 (),
|
1012
|
+
__M);
|
1013
|
+
}
|
1014
|
+
|
1015
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1016
|
+
_mm256_mask_packus_epi16 (__m256i __W, __mmask32 __M, __m256i __A,
|
1017
|
+
__m256i __B)
|
1018
|
+
{
|
1019
|
+
return (__m256i) __builtin_ia32_packuswb256_mask ((__v16hi) __A,
|
1020
|
+
(__v16hi) __B,
|
1021
|
+
(__v32qi) __W,
|
1022
|
+
__M);
|
1023
|
+
}
|
1024
|
+
|
1025
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1026
|
+
_mm_mask_adds_epi8 (__m128i __W, __mmask16 __U, __m128i __A,
|
1027
|
+
__m128i __B)
|
1028
|
+
{
|
1029
|
+
return (__m128i) __builtin_ia32_paddsb128_mask ((__v16qi) __A,
|
1030
|
+
(__v16qi) __B,
|
1031
|
+
(__v16qi) __W,
|
1032
|
+
(__mmask16) __U);
|
1033
|
+
}
|
1034
|
+
|
1035
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1036
|
+
_mm_maskz_adds_epi8 (__mmask16 __U, __m128i __A, __m128i __B)
|
1037
|
+
{
|
1038
|
+
return (__m128i) __builtin_ia32_paddsb128_mask ((__v16qi) __A,
|
1039
|
+
(__v16qi) __B,
|
1040
|
+
(__v16qi) _mm_setzero_si128 (),
|
1041
|
+
(__mmask16) __U);
|
1042
|
+
}
|
1043
|
+
|
1044
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1045
|
+
_mm256_mask_adds_epi8 (__m256i __W, __mmask32 __U, __m256i __A,
|
1046
|
+
__m256i __B)
|
1047
|
+
{
|
1048
|
+
return (__m256i) __builtin_ia32_paddsb256_mask ((__v32qi) __A,
|
1049
|
+
(__v32qi) __B,
|
1050
|
+
(__v32qi) __W,
|
1051
|
+
(__mmask32) __U);
|
1052
|
+
}
|
1053
|
+
|
1054
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1055
|
+
_mm256_maskz_adds_epi8 (__mmask32 __U, __m256i __A, __m256i __B)
|
1056
|
+
{
|
1057
|
+
return (__m256i) __builtin_ia32_paddsb256_mask ((__v32qi) __A,
|
1058
|
+
(__v32qi) __B,
|
1059
|
+
(__v32qi) _mm256_setzero_si256 (),
|
1060
|
+
(__mmask32) __U);
|
1061
|
+
}
|
1062
|
+
|
1063
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1064
|
+
_mm_mask_adds_epi16 (__m128i __W, __mmask8 __U, __m128i __A,
|
1065
|
+
__m128i __B)
|
1066
|
+
{
|
1067
|
+
return (__m128i) __builtin_ia32_paddsw128_mask ((__v8hi) __A,
|
1068
|
+
(__v8hi) __B,
|
1069
|
+
(__v8hi) __W,
|
1070
|
+
(__mmask8) __U);
|
1071
|
+
}
|
1072
|
+
|
1073
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1074
|
+
_mm_maskz_adds_epi16 (__mmask8 __U, __m128i __A, __m128i __B)
|
1075
|
+
{
|
1076
|
+
return (__m128i) __builtin_ia32_paddsw128_mask ((__v8hi) __A,
|
1077
|
+
(__v8hi) __B,
|
1078
|
+
(__v8hi) _mm_setzero_si128 (),
|
1079
|
+
(__mmask8) __U);
|
1080
|
+
}
|
1081
|
+
|
1082
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1083
|
+
_mm256_mask_adds_epi16 (__m256i __W, __mmask16 __U, __m256i __A,
|
1084
|
+
__m256i __B)
|
1085
|
+
{
|
1086
|
+
return (__m256i) __builtin_ia32_paddsw256_mask ((__v16hi) __A,
|
1087
|
+
(__v16hi) __B,
|
1088
|
+
(__v16hi) __W,
|
1089
|
+
(__mmask16) __U);
|
1090
|
+
}
|
1091
|
+
|
1092
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1093
|
+
_mm256_maskz_adds_epi16 (__mmask16 __U, __m256i __A, __m256i __B)
|
1094
|
+
{
|
1095
|
+
return (__m256i) __builtin_ia32_paddsw256_mask ((__v16hi) __A,
|
1096
|
+
(__v16hi) __B,
|
1097
|
+
(__v16hi) _mm256_setzero_si256 (),
|
1098
|
+
(__mmask16) __U);
|
1099
|
+
}
|
1100
|
+
|
1101
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1102
|
+
_mm_mask_adds_epu8 (__m128i __W, __mmask16 __U, __m128i __A,
|
1103
|
+
__m128i __B)
|
1104
|
+
{
|
1105
|
+
return (__m128i) __builtin_ia32_paddusb128_mask ((__v16qi) __A,
|
1106
|
+
(__v16qi) __B,
|
1107
|
+
(__v16qi) __W,
|
1108
|
+
(__mmask16) __U);
|
1109
|
+
}
|
1110
|
+
|
1111
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1112
|
+
_mm_maskz_adds_epu8 (__mmask16 __U, __m128i __A, __m128i __B)
|
1113
|
+
{
|
1114
|
+
return (__m128i) __builtin_ia32_paddusb128_mask ((__v16qi) __A,
|
1115
|
+
(__v16qi) __B,
|
1116
|
+
(__v16qi) _mm_setzero_si128 (),
|
1117
|
+
(__mmask16) __U);
|
1118
|
+
}
|
1119
|
+
|
1120
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1121
|
+
_mm256_mask_adds_epu8 (__m256i __W, __mmask32 __U, __m256i __A,
|
1122
|
+
__m256i __B)
|
1123
|
+
{
|
1124
|
+
return (__m256i) __builtin_ia32_paddusb256_mask ((__v32qi) __A,
|
1125
|
+
(__v32qi) __B,
|
1126
|
+
(__v32qi) __W,
|
1127
|
+
(__mmask32) __U);
|
1128
|
+
}
|
1129
|
+
|
1130
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1131
|
+
_mm256_maskz_adds_epu8 (__mmask32 __U, __m256i __A, __m256i __B)
|
1132
|
+
{
|
1133
|
+
return (__m256i) __builtin_ia32_paddusb256_mask ((__v32qi) __A,
|
1134
|
+
(__v32qi) __B,
|
1135
|
+
(__v32qi) _mm256_setzero_si256 (),
|
1136
|
+
(__mmask32) __U);
|
1137
|
+
}
|
1138
|
+
|
1139
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1140
|
+
_mm_mask_adds_epu16 (__m128i __W, __mmask8 __U, __m128i __A,
|
1141
|
+
__m128i __B)
|
1142
|
+
{
|
1143
|
+
return (__m128i) __builtin_ia32_paddusw128_mask ((__v8hi) __A,
|
1144
|
+
(__v8hi) __B,
|
1145
|
+
(__v8hi) __W,
|
1146
|
+
(__mmask8) __U);
|
1147
|
+
}
|
1148
|
+
|
1149
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1150
|
+
_mm_maskz_adds_epu16 (__mmask8 __U, __m128i __A, __m128i __B)
|
1151
|
+
{
|
1152
|
+
return (__m128i) __builtin_ia32_paddusw128_mask ((__v8hi) __A,
|
1153
|
+
(__v8hi) __B,
|
1154
|
+
(__v8hi) _mm_setzero_si128 (),
|
1155
|
+
(__mmask8) __U);
|
1156
|
+
}
|
1157
|
+
|
1158
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1159
|
+
_mm256_mask_adds_epu16 (__m256i __W, __mmask16 __U, __m256i __A,
|
1160
|
+
__m256i __B)
|
1161
|
+
{
|
1162
|
+
return (__m256i) __builtin_ia32_paddusw256_mask ((__v16hi) __A,
|
1163
|
+
(__v16hi) __B,
|
1164
|
+
(__v16hi) __W,
|
1165
|
+
(__mmask16) __U);
|
1166
|
+
}
|
1167
|
+
|
1168
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1169
|
+
_mm256_maskz_adds_epu16 (__mmask16 __U, __m256i __A, __m256i __B)
|
1170
|
+
{
|
1171
|
+
return (__m256i) __builtin_ia32_paddusw256_mask ((__v16hi) __A,
|
1172
|
+
(__v16hi) __B,
|
1173
|
+
(__v16hi) _mm256_setzero_si256 (),
|
1174
|
+
(__mmask16) __U);
|
1175
|
+
}
|
1176
|
+
|
1177
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1178
|
+
_mm_mask_avg_epu8 (__m128i __W, __mmask16 __U, __m128i __A,
|
1179
|
+
__m128i __B)
|
1180
|
+
{
|
1181
|
+
return (__m128i) __builtin_ia32_pavgb128_mask ((__v16qi) __A,
|
1182
|
+
(__v16qi) __B,
|
1183
|
+
(__v16qi) __W,
|
1184
|
+
(__mmask16) __U);
|
1185
|
+
}
|
1186
|
+
|
1187
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1188
|
+
_mm_maskz_avg_epu8 (__mmask16 __U, __m128i __A, __m128i __B)
|
1189
|
+
{
|
1190
|
+
return (__m128i) __builtin_ia32_pavgb128_mask ((__v16qi) __A,
|
1191
|
+
(__v16qi) __B,
|
1192
|
+
(__v16qi) _mm_setzero_si128 (),
|
1193
|
+
(__mmask16) __U);
|
1194
|
+
}
|
1195
|
+
|
1196
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1197
|
+
_mm256_mask_avg_epu8 (__m256i __W, __mmask32 __U, __m256i __A,
|
1198
|
+
__m256i __B)
|
1199
|
+
{
|
1200
|
+
return (__m256i) __builtin_ia32_pavgb256_mask ((__v32qi) __A,
|
1201
|
+
(__v32qi) __B,
|
1202
|
+
(__v32qi) __W,
|
1203
|
+
(__mmask32) __U);
|
1204
|
+
}
|
1205
|
+
|
1206
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1207
|
+
_mm256_maskz_avg_epu8 (__mmask32 __U, __m256i __A, __m256i __B)
|
1208
|
+
{
|
1209
|
+
return (__m256i) __builtin_ia32_pavgb256_mask ((__v32qi) __A,
|
1210
|
+
(__v32qi) __B,
|
1211
|
+
(__v32qi) _mm256_setzero_si256 (),
|
1212
|
+
(__mmask32) __U);
|
1213
|
+
}
|
1214
|
+
|
1215
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1216
|
+
_mm_mask_avg_epu16 (__m128i __W, __mmask8 __U, __m128i __A,
|
1217
|
+
__m128i __B)
|
1218
|
+
{
|
1219
|
+
return (__m128i) __builtin_ia32_pavgw128_mask ((__v8hi) __A,
|
1220
|
+
(__v8hi) __B,
|
1221
|
+
(__v8hi) __W,
|
1222
|
+
(__mmask8) __U);
|
1223
|
+
}
|
1224
|
+
|
1225
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1226
|
+
_mm_maskz_avg_epu16 (__mmask8 __U, __m128i __A, __m128i __B)
|
1227
|
+
{
|
1228
|
+
return (__m128i) __builtin_ia32_pavgw128_mask ((__v8hi) __A,
|
1229
|
+
(__v8hi) __B,
|
1230
|
+
(__v8hi) _mm_setzero_si128 (),
|
1231
|
+
(__mmask8) __U);
|
1232
|
+
}
|
1233
|
+
|
1234
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1235
|
+
_mm256_mask_avg_epu16 (__m256i __W, __mmask16 __U, __m256i __A,
|
1236
|
+
__m256i __B)
|
1237
|
+
{
|
1238
|
+
return (__m256i) __builtin_ia32_pavgw256_mask ((__v16hi) __A,
|
1239
|
+
(__v16hi) __B,
|
1240
|
+
(__v16hi) __W,
|
1241
|
+
(__mmask16) __U);
|
1242
|
+
}
|
1243
|
+
|
1244
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1245
|
+
_mm256_maskz_avg_epu16 (__mmask16 __U, __m256i __A, __m256i __B)
|
1246
|
+
{
|
1247
|
+
return (__m256i) __builtin_ia32_pavgw256_mask ((__v16hi) __A,
|
1248
|
+
(__v16hi) __B,
|
1249
|
+
(__v16hi) _mm256_setzero_si256 (),
|
1250
|
+
(__mmask16) __U);
|
1251
|
+
}
|
1252
|
+
|
1253
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1254
|
+
_mm_maskz_max_epi8 (__mmask16 __M, __m128i __A, __m128i __B)
|
1255
|
+
{
|
1256
|
+
return (__m128i) __builtin_ia32_pmaxsb128_mask ((__v16qi) __A,
|
1257
|
+
(__v16qi) __B,
|
1258
|
+
(__v16qi) _mm_setzero_si128 (),
|
1259
|
+
(__mmask16) __M);
|
1260
|
+
}
|
1261
|
+
|
1262
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1263
|
+
_mm_mask_max_epi8 (__m128i __W, __mmask16 __M, __m128i __A,
|
1264
|
+
__m128i __B)
|
1265
|
+
{
|
1266
|
+
return (__m128i) __builtin_ia32_pmaxsb128_mask ((__v16qi) __A,
|
1267
|
+
(__v16qi) __B,
|
1268
|
+
(__v16qi) __W,
|
1269
|
+
(__mmask16) __M);
|
1270
|
+
}
|
1271
|
+
|
1272
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1273
|
+
_mm256_maskz_max_epi8 (__mmask32 __M, __m256i __A, __m256i __B)
|
1274
|
+
{
|
1275
|
+
return (__m256i) __builtin_ia32_pmaxsb256_mask ((__v32qi) __A,
|
1276
|
+
(__v32qi) __B,
|
1277
|
+
(__v32qi) _mm256_setzero_si256 (),
|
1278
|
+
(__mmask32) __M);
|
1279
|
+
}
|
1280
|
+
|
1281
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1282
|
+
_mm256_mask_max_epi8 (__m256i __W, __mmask32 __M, __m256i __A,
|
1283
|
+
__m256i __B)
|
1284
|
+
{
|
1285
|
+
return (__m256i) __builtin_ia32_pmaxsb256_mask ((__v32qi) __A,
|
1286
|
+
(__v32qi) __B,
|
1287
|
+
(__v32qi) __W,
|
1288
|
+
(__mmask32) __M);
|
1289
|
+
}
|
1290
|
+
|
1291
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1292
|
+
_mm_maskz_max_epi16 (__mmask8 __M, __m128i __A, __m128i __B)
|
1293
|
+
{
|
1294
|
+
return (__m128i) __builtin_ia32_pmaxsw128_mask ((__v8hi) __A,
|
1295
|
+
(__v8hi) __B,
|
1296
|
+
(__v8hi) _mm_setzero_si128 (),
|
1297
|
+
(__mmask8) __M);
|
1298
|
+
}
|
1299
|
+
|
1300
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1301
|
+
_mm_mask_max_epi16 (__m128i __W, __mmask8 __M, __m128i __A,
|
1302
|
+
__m128i __B)
|
1303
|
+
{
|
1304
|
+
return (__m128i) __builtin_ia32_pmaxsw128_mask ((__v8hi) __A,
|
1305
|
+
(__v8hi) __B,
|
1306
|
+
(__v8hi) __W,
|
1307
|
+
(__mmask8) __M);
|
1308
|
+
}
|
1309
|
+
|
1310
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1311
|
+
_mm256_maskz_max_epi16 (__mmask16 __M, __m256i __A, __m256i __B)
|
1312
|
+
{
|
1313
|
+
return (__m256i) __builtin_ia32_pmaxsw256_mask ((__v16hi) __A,
|
1314
|
+
(__v16hi) __B,
|
1315
|
+
(__v16hi) _mm256_setzero_si256 (),
|
1316
|
+
(__mmask16) __M);
|
1317
|
+
}
|
1318
|
+
|
1319
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1320
|
+
_mm256_mask_max_epi16 (__m256i __W, __mmask16 __M, __m256i __A,
|
1321
|
+
__m256i __B)
|
1322
|
+
{
|
1323
|
+
return (__m256i) __builtin_ia32_pmaxsw256_mask ((__v16hi) __A,
|
1324
|
+
(__v16hi) __B,
|
1325
|
+
(__v16hi) __W,
|
1326
|
+
(__mmask16) __M);
|
1327
|
+
}
|
1328
|
+
|
1329
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1330
|
+
_mm_maskz_max_epu8 (__mmask16 __M, __m128i __A, __m128i __B)
|
1331
|
+
{
|
1332
|
+
return (__m128i) __builtin_ia32_pmaxub128_mask ((__v16qi) __A,
|
1333
|
+
(__v16qi) __B,
|
1334
|
+
(__v16qi) _mm_setzero_si128 (),
|
1335
|
+
(__mmask16) __M);
|
1336
|
+
}
|
1337
|
+
|
1338
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1339
|
+
_mm_mask_max_epu8 (__m128i __W, __mmask16 __M, __m128i __A,
|
1340
|
+
__m128i __B)
|
1341
|
+
{
|
1342
|
+
return (__m128i) __builtin_ia32_pmaxub128_mask ((__v16qi) __A,
|
1343
|
+
(__v16qi) __B,
|
1344
|
+
(__v16qi) __W,
|
1345
|
+
(__mmask16) __M);
|
1346
|
+
}
|
1347
|
+
|
1348
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1349
|
+
_mm256_maskz_max_epu8 (__mmask32 __M, __m256i __A, __m256i __B)
|
1350
|
+
{
|
1351
|
+
return (__m256i) __builtin_ia32_pmaxub256_mask ((__v32qi) __A,
|
1352
|
+
(__v32qi) __B,
|
1353
|
+
(__v32qi) _mm256_setzero_si256 (),
|
1354
|
+
(__mmask32) __M);
|
1355
|
+
}
|
1356
|
+
|
1357
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1358
|
+
_mm256_mask_max_epu8 (__m256i __W, __mmask32 __M, __m256i __A,
|
1359
|
+
__m256i __B)
|
1360
|
+
{
|
1361
|
+
return (__m256i) __builtin_ia32_pmaxub256_mask ((__v32qi) __A,
|
1362
|
+
(__v32qi) __B,
|
1363
|
+
(__v32qi) __W,
|
1364
|
+
(__mmask32) __M);
|
1365
|
+
}
|
1366
|
+
|
1367
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1368
|
+
_mm_maskz_max_epu16 (__mmask8 __M, __m128i __A, __m128i __B)
|
1369
|
+
{
|
1370
|
+
return (__m128i) __builtin_ia32_pmaxuw128_mask ((__v8hi) __A,
|
1371
|
+
(__v8hi) __B,
|
1372
|
+
(__v8hi) _mm_setzero_si128 (),
|
1373
|
+
(__mmask8) __M);
|
1374
|
+
}
|
1375
|
+
|
1376
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1377
|
+
_mm_mask_max_epu16 (__m128i __W, __mmask8 __M, __m128i __A,
|
1378
|
+
__m128i __B)
|
1379
|
+
{
|
1380
|
+
return (__m128i) __builtin_ia32_pmaxuw128_mask ((__v8hi) __A,
|
1381
|
+
(__v8hi) __B,
|
1382
|
+
(__v8hi) __W,
|
1383
|
+
(__mmask8) __M);
|
1384
|
+
}
|
1385
|
+
|
1386
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1387
|
+
_mm256_maskz_max_epu16 (__mmask16 __M, __m256i __A, __m256i __B)
|
1388
|
+
{
|
1389
|
+
return (__m256i) __builtin_ia32_pmaxuw256_mask ((__v16hi) __A,
|
1390
|
+
(__v16hi) __B,
|
1391
|
+
(__v16hi) _mm256_setzero_si256 (),
|
1392
|
+
(__mmask16) __M);
|
1393
|
+
}
|
1394
|
+
|
1395
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1396
|
+
_mm256_mask_max_epu16 (__m256i __W, __mmask16 __M, __m256i __A,
|
1397
|
+
__m256i __B)
|
1398
|
+
{
|
1399
|
+
return (__m256i) __builtin_ia32_pmaxuw256_mask ((__v16hi) __A,
|
1400
|
+
(__v16hi) __B,
|
1401
|
+
(__v16hi) __W,
|
1402
|
+
(__mmask16) __M);
|
1403
|
+
}
|
1404
|
+
|
1405
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1406
|
+
_mm_maskz_min_epi8 (__mmask16 __M, __m128i __A, __m128i __B)
|
1407
|
+
{
|
1408
|
+
return (__m128i) __builtin_ia32_pminsb128_mask ((__v16qi) __A,
|
1409
|
+
(__v16qi) __B,
|
1410
|
+
(__v16qi) _mm_setzero_si128 (),
|
1411
|
+
(__mmask16) __M);
|
1412
|
+
}
|
1413
|
+
|
1414
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1415
|
+
_mm_mask_min_epi8 (__m128i __W, __mmask16 __M, __m128i __A,
|
1416
|
+
__m128i __B)
|
1417
|
+
{
|
1418
|
+
return (__m128i) __builtin_ia32_pminsb128_mask ((__v16qi) __A,
|
1419
|
+
(__v16qi) __B,
|
1420
|
+
(__v16qi) __W,
|
1421
|
+
(__mmask16) __M);
|
1422
|
+
}
|
1423
|
+
|
1424
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1425
|
+
_mm256_maskz_min_epi8 (__mmask32 __M, __m256i __A, __m256i __B)
|
1426
|
+
{
|
1427
|
+
return (__m256i) __builtin_ia32_pminsb256_mask ((__v32qi) __A,
|
1428
|
+
(__v32qi) __B,
|
1429
|
+
(__v32qi) _mm256_setzero_si256 (),
|
1430
|
+
(__mmask32) __M);
|
1431
|
+
}
|
1432
|
+
|
1433
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1434
|
+
_mm256_mask_min_epi8 (__m256i __W, __mmask32 __M, __m256i __A,
|
1435
|
+
__m256i __B)
|
1436
|
+
{
|
1437
|
+
return (__m256i) __builtin_ia32_pminsb256_mask ((__v32qi) __A,
|
1438
|
+
(__v32qi) __B,
|
1439
|
+
(__v32qi) __W,
|
1440
|
+
(__mmask32) __M);
|
1441
|
+
}
|
1442
|
+
|
1443
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1444
|
+
_mm_maskz_min_epi16 (__mmask8 __M, __m128i __A, __m128i __B)
|
1445
|
+
{
|
1446
|
+
return (__m128i) __builtin_ia32_pminsw128_mask ((__v8hi) __A,
|
1447
|
+
(__v8hi) __B,
|
1448
|
+
(__v8hi) _mm_setzero_si128 (),
|
1449
|
+
(__mmask8) __M);
|
1450
|
+
}
|
1451
|
+
|
1452
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1453
|
+
_mm_mask_min_epi16 (__m128i __W, __mmask8 __M, __m128i __A,
|
1454
|
+
__m128i __B)
|
1455
|
+
{
|
1456
|
+
return (__m128i) __builtin_ia32_pminsw128_mask ((__v8hi) __A,
|
1457
|
+
(__v8hi) __B,
|
1458
|
+
(__v8hi) __W,
|
1459
|
+
(__mmask8) __M);
|
1460
|
+
}
|
1461
|
+
|
1462
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1463
|
+
_mm256_maskz_min_epi16 (__mmask16 __M, __m256i __A, __m256i __B)
|
1464
|
+
{
|
1465
|
+
return (__m256i) __builtin_ia32_pminsw256_mask ((__v16hi) __A,
|
1466
|
+
(__v16hi) __B,
|
1467
|
+
(__v16hi) _mm256_setzero_si256 (),
|
1468
|
+
(__mmask16) __M);
|
1469
|
+
}
|
1470
|
+
|
1471
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1472
|
+
_mm256_mask_min_epi16 (__m256i __W, __mmask16 __M, __m256i __A,
|
1473
|
+
__m256i __B)
|
1474
|
+
{
|
1475
|
+
return (__m256i) __builtin_ia32_pminsw256_mask ((__v16hi) __A,
|
1476
|
+
(__v16hi) __B,
|
1477
|
+
(__v16hi) __W,
|
1478
|
+
(__mmask16) __M);
|
1479
|
+
}
|
1480
|
+
|
1481
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1482
|
+
_mm_maskz_min_epu8 (__mmask16 __M, __m128i __A, __m128i __B)
|
1483
|
+
{
|
1484
|
+
return (__m128i) __builtin_ia32_pminub128_mask ((__v16qi) __A,
|
1485
|
+
(__v16qi) __B,
|
1486
|
+
(__v16qi) _mm_setzero_si128 (),
|
1487
|
+
(__mmask16) __M);
|
1488
|
+
}
|
1489
|
+
|
1490
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1491
|
+
_mm_mask_min_epu8 (__m128i __W, __mmask16 __M, __m128i __A,
|
1492
|
+
__m128i __B)
|
1493
|
+
{
|
1494
|
+
return (__m128i) __builtin_ia32_pminub128_mask ((__v16qi) __A,
|
1495
|
+
(__v16qi) __B,
|
1496
|
+
(__v16qi) __W,
|
1497
|
+
(__mmask16) __M);
|
1498
|
+
}
|
1499
|
+
|
1500
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1501
|
+
_mm256_maskz_min_epu8 (__mmask32 __M, __m256i __A, __m256i __B)
|
1502
|
+
{
|
1503
|
+
return (__m256i) __builtin_ia32_pminub256_mask ((__v32qi) __A,
|
1504
|
+
(__v32qi) __B,
|
1505
|
+
(__v32qi) _mm256_setzero_si256 (),
|
1506
|
+
(__mmask32) __M);
|
1507
|
+
}
|
1508
|
+
|
1509
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1510
|
+
_mm256_mask_min_epu8 (__m256i __W, __mmask32 __M, __m256i __A,
|
1511
|
+
__m256i __B)
|
1512
|
+
{
|
1513
|
+
return (__m256i) __builtin_ia32_pminub256_mask ((__v32qi) __A,
|
1514
|
+
(__v32qi) __B,
|
1515
|
+
(__v32qi) __W,
|
1516
|
+
(__mmask32) __M);
|
1517
|
+
}
|
1518
|
+
|
1519
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1520
|
+
_mm_maskz_min_epu16 (__mmask8 __M, __m128i __A, __m128i __B)
|
1521
|
+
{
|
1522
|
+
return (__m128i) __builtin_ia32_pminuw128_mask ((__v8hi) __A,
|
1523
|
+
(__v8hi) __B,
|
1524
|
+
(__v8hi) _mm_setzero_si128 (),
|
1525
|
+
(__mmask8) __M);
|
1526
|
+
}
|
1527
|
+
|
1528
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1529
|
+
_mm_mask_min_epu16 (__m128i __W, __mmask8 __M, __m128i __A,
|
1530
|
+
__m128i __B)
|
1531
|
+
{
|
1532
|
+
return (__m128i) __builtin_ia32_pminuw128_mask ((__v8hi) __A,
|
1533
|
+
(__v8hi) __B,
|
1534
|
+
(__v8hi) __W,
|
1535
|
+
(__mmask8) __M);
|
1536
|
+
}
|
1537
|
+
|
1538
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1539
|
+
_mm256_maskz_min_epu16 (__mmask16 __M, __m256i __A, __m256i __B)
|
1540
|
+
{
|
1541
|
+
return (__m256i) __builtin_ia32_pminuw256_mask ((__v16hi) __A,
|
1542
|
+
(__v16hi) __B,
|
1543
|
+
(__v16hi) _mm256_setzero_si256 (),
|
1544
|
+
(__mmask16) __M);
|
1545
|
+
}
|
1546
|
+
|
1547
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1548
|
+
_mm256_mask_min_epu16 (__m256i __W, __mmask16 __M, __m256i __A,
|
1549
|
+
__m256i __B)
|
1550
|
+
{
|
1551
|
+
return (__m256i) __builtin_ia32_pminuw256_mask ((__v16hi) __A,
|
1552
|
+
(__v16hi) __B,
|
1553
|
+
(__v16hi) __W,
|
1554
|
+
(__mmask16) __M);
|
1555
|
+
}
|
1556
|
+
|
1557
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1558
|
+
_mm_mask_shuffle_epi8 (__m128i __W, __mmask16 __U, __m128i __A,
|
1559
|
+
__m128i __B)
|
1560
|
+
{
|
1561
|
+
return (__m128i) __builtin_ia32_pshufb128_mask ((__v16qi) __A,
|
1562
|
+
(__v16qi) __B,
|
1563
|
+
(__v16qi) __W,
|
1564
|
+
(__mmask16) __U);
|
1565
|
+
}
|
1566
|
+
|
1567
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1568
|
+
_mm_maskz_shuffle_epi8 (__mmask16 __U, __m128i __A, __m128i __B)
|
1569
|
+
{
|
1570
|
+
return (__m128i) __builtin_ia32_pshufb128_mask ((__v16qi) __A,
|
1571
|
+
(__v16qi) __B,
|
1572
|
+
(__v16qi) _mm_setzero_si128 (),
|
1573
|
+
(__mmask16) __U);
|
1574
|
+
}
|
1575
|
+
|
1576
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1577
|
+
_mm256_mask_shuffle_epi8 (__m256i __W, __mmask32 __U, __m256i __A,
|
1578
|
+
__m256i __B)
|
1579
|
+
{
|
1580
|
+
return (__m256i) __builtin_ia32_pshufb256_mask ((__v32qi) __A,
|
1581
|
+
(__v32qi) __B,
|
1582
|
+
(__v32qi) __W,
|
1583
|
+
(__mmask32) __U);
|
1584
|
+
}
|
1585
|
+
|
1586
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1587
|
+
_mm256_maskz_shuffle_epi8 (__mmask32 __U, __m256i __A, __m256i __B)
|
1588
|
+
{
|
1589
|
+
return (__m256i) __builtin_ia32_pshufb256_mask ((__v32qi) __A,
|
1590
|
+
(__v32qi) __B,
|
1591
|
+
(__v32qi) _mm256_setzero_si256 (),
|
1592
|
+
(__mmask32) __U);
|
1593
|
+
}
|
1594
|
+
|
1595
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1596
|
+
_mm_mask_subs_epi8 (__m128i __W, __mmask16 __U, __m128i __A,
|
1597
|
+
__m128i __B)
|
1598
|
+
{
|
1599
|
+
return (__m128i) __builtin_ia32_psubsb128_mask ((__v16qi) __A,
|
1600
|
+
(__v16qi) __B,
|
1601
|
+
(__v16qi) __W,
|
1602
|
+
(__mmask16) __U);
|
1603
|
+
}
|
1604
|
+
|
1605
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1606
|
+
_mm_maskz_subs_epi8 (__mmask16 __U, __m128i __A, __m128i __B)
|
1607
|
+
{
|
1608
|
+
return (__m128i) __builtin_ia32_psubsb128_mask ((__v16qi) __A,
|
1609
|
+
(__v16qi) __B,
|
1610
|
+
(__v16qi) _mm_setzero_si128 (),
|
1611
|
+
(__mmask16) __U);
|
1612
|
+
}
|
1613
|
+
|
1614
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1615
|
+
_mm256_mask_subs_epi8 (__m256i __W, __mmask32 __U, __m256i __A,
|
1616
|
+
__m256i __B)
|
1617
|
+
{
|
1618
|
+
return (__m256i) __builtin_ia32_psubsb256_mask ((__v32qi) __A,
|
1619
|
+
(__v32qi) __B,
|
1620
|
+
(__v32qi) __W,
|
1621
|
+
(__mmask32) __U);
|
1622
|
+
}
|
1623
|
+
|
1624
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1625
|
+
_mm256_maskz_subs_epi8 (__mmask32 __U, __m256i __A, __m256i __B)
|
1626
|
+
{
|
1627
|
+
return (__m256i) __builtin_ia32_psubsb256_mask ((__v32qi) __A,
|
1628
|
+
(__v32qi) __B,
|
1629
|
+
(__v32qi) _mm256_setzero_si256 (),
|
1630
|
+
(__mmask32) __U);
|
1631
|
+
}
|
1632
|
+
|
1633
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1634
|
+
_mm_mask_subs_epi16 (__m128i __W, __mmask8 __U, __m128i __A,
|
1635
|
+
__m128i __B)
|
1636
|
+
{
|
1637
|
+
return (__m128i) __builtin_ia32_psubsw128_mask ((__v8hi) __A,
|
1638
|
+
(__v8hi) __B,
|
1639
|
+
(__v8hi) __W,
|
1640
|
+
(__mmask8) __U);
|
1641
|
+
}
|
1642
|
+
|
1643
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1644
|
+
_mm_maskz_subs_epi16 (__mmask8 __U, __m128i __A, __m128i __B)
|
1645
|
+
{
|
1646
|
+
return (__m128i) __builtin_ia32_psubsw128_mask ((__v8hi) __A,
|
1647
|
+
(__v8hi) __B,
|
1648
|
+
(__v8hi) _mm_setzero_si128 (),
|
1649
|
+
(__mmask8) __U);
|
1650
|
+
}
|
1651
|
+
|
1652
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1653
|
+
_mm256_mask_subs_epi16 (__m256i __W, __mmask16 __U, __m256i __A,
|
1654
|
+
__m256i __B)
|
1655
|
+
{
|
1656
|
+
return (__m256i) __builtin_ia32_psubsw256_mask ((__v16hi) __A,
|
1657
|
+
(__v16hi) __B,
|
1658
|
+
(__v16hi) __W,
|
1659
|
+
(__mmask16) __U);
|
1660
|
+
}
|
1661
|
+
|
1662
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1663
|
+
_mm256_maskz_subs_epi16 (__mmask16 __U, __m256i __A, __m256i __B)
|
1664
|
+
{
|
1665
|
+
return (__m256i) __builtin_ia32_psubsw256_mask ((__v16hi) __A,
|
1666
|
+
(__v16hi) __B,
|
1667
|
+
(__v16hi) _mm256_setzero_si256 (),
|
1668
|
+
(__mmask16) __U);
|
1669
|
+
}
|
1670
|
+
|
1671
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1672
|
+
_mm_mask_subs_epu8 (__m128i __W, __mmask16 __U, __m128i __A,
|
1673
|
+
__m128i __B)
|
1674
|
+
{
|
1675
|
+
return (__m128i) __builtin_ia32_psubusb128_mask ((__v16qi) __A,
|
1676
|
+
(__v16qi) __B,
|
1677
|
+
(__v16qi) __W,
|
1678
|
+
(__mmask16) __U);
|
1679
|
+
}
|
1680
|
+
|
1681
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1682
|
+
_mm_maskz_subs_epu8 (__mmask16 __U, __m128i __A, __m128i __B)
|
1683
|
+
{
|
1684
|
+
return (__m128i) __builtin_ia32_psubusb128_mask ((__v16qi) __A,
|
1685
|
+
(__v16qi) __B,
|
1686
|
+
(__v16qi) _mm_setzero_si128 (),
|
1687
|
+
(__mmask16) __U);
|
1688
|
+
}
|
1689
|
+
|
1690
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1691
|
+
_mm256_mask_subs_epu8 (__m256i __W, __mmask32 __U, __m256i __A,
|
1692
|
+
__m256i __B)
|
1693
|
+
{
|
1694
|
+
return (__m256i) __builtin_ia32_psubusb256_mask ((__v32qi) __A,
|
1695
|
+
(__v32qi) __B,
|
1696
|
+
(__v32qi) __W,
|
1697
|
+
(__mmask32) __U);
|
1698
|
+
}
|
1699
|
+
|
1700
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1701
|
+
_mm256_maskz_subs_epu8 (__mmask32 __U, __m256i __A, __m256i __B)
|
1702
|
+
{
|
1703
|
+
return (__m256i) __builtin_ia32_psubusb256_mask ((__v32qi) __A,
|
1704
|
+
(__v32qi) __B,
|
1705
|
+
(__v32qi) _mm256_setzero_si256 (),
|
1706
|
+
(__mmask32) __U);
|
1707
|
+
}
|
1708
|
+
|
1709
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1710
|
+
_mm_mask_subs_epu16 (__m128i __W, __mmask8 __U, __m128i __A,
|
1711
|
+
__m128i __B)
|
1712
|
+
{
|
1713
|
+
return (__m128i) __builtin_ia32_psubusw128_mask ((__v8hi) __A,
|
1714
|
+
(__v8hi) __B,
|
1715
|
+
(__v8hi) __W,
|
1716
|
+
(__mmask8) __U);
|
1717
|
+
}
|
1718
|
+
|
1719
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1720
|
+
_mm_maskz_subs_epu16 (__mmask8 __U, __m128i __A, __m128i __B)
|
1721
|
+
{
|
1722
|
+
return (__m128i) __builtin_ia32_psubusw128_mask ((__v8hi) __A,
|
1723
|
+
(__v8hi) __B,
|
1724
|
+
(__v8hi) _mm_setzero_si128 (),
|
1725
|
+
(__mmask8) __U);
|
1726
|
+
}
|
1727
|
+
|
1728
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1729
|
+
_mm256_mask_subs_epu16 (__m256i __W, __mmask16 __U, __m256i __A,
|
1730
|
+
__m256i __B)
|
1731
|
+
{
|
1732
|
+
return (__m256i) __builtin_ia32_psubusw256_mask ((__v16hi) __A,
|
1733
|
+
(__v16hi) __B,
|
1734
|
+
(__v16hi) __W,
|
1735
|
+
(__mmask16) __U);
|
1736
|
+
}
|
1737
|
+
|
1738
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1739
|
+
_mm256_maskz_subs_epu16 (__mmask16 __U, __m256i __A, __m256i __B)
|
1740
|
+
{
|
1741
|
+
return (__m256i) __builtin_ia32_psubusw256_mask ((__v16hi) __A,
|
1742
|
+
(__v16hi) __B,
|
1743
|
+
(__v16hi) _mm256_setzero_si256 (),
|
1744
|
+
(__mmask16) __U);
|
1745
|
+
}
|
1746
|
+
|
1747
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1748
|
+
_mm_mask2_permutex2var_epi16 (__m128i __A, __m128i __I, __mmask8 __U,
|
1749
|
+
__m128i __B)
|
1750
|
+
{
|
1751
|
+
return (__m128i) __builtin_ia32_vpermi2varhi128_mask ((__v8hi) __A,
|
1752
|
+
(__v8hi) __I /* idx */ ,
|
1753
|
+
(__v8hi) __B,
|
1754
|
+
(__mmask8) __U);
|
1755
|
+
}
|
1756
|
+
|
1757
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1758
|
+
_mm256_mask2_permutex2var_epi16 (__m256i __A, __m256i __I,
|
1759
|
+
__mmask16 __U, __m256i __B)
|
1760
|
+
{
|
1761
|
+
return (__m256i) __builtin_ia32_vpermi2varhi256_mask ((__v16hi) __A,
|
1762
|
+
(__v16hi) __I /* idx */ ,
|
1763
|
+
(__v16hi) __B,
|
1764
|
+
(__mmask16) __U);
|
1765
|
+
}
|
1766
|
+
|
1767
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1768
|
+
_mm_permutex2var_epi16 (__m128i __A, __m128i __I, __m128i __B)
|
1769
|
+
{
|
1770
|
+
return (__m128i) __builtin_ia32_vpermt2varhi128_mask ((__v8hi) __I/* idx */,
|
1771
|
+
(__v8hi) __A,
|
1772
|
+
(__v8hi) __B,
|
1773
|
+
(__mmask8) -1);
|
1774
|
+
}
|
1775
|
+
|
1776
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1777
|
+
_mm_mask_permutex2var_epi16 (__m128i __A, __mmask8 __U, __m128i __I,
|
1778
|
+
__m128i __B)
|
1779
|
+
{
|
1780
|
+
return (__m128i) __builtin_ia32_vpermt2varhi128_mask ((__v8hi) __I/* idx */,
|
1781
|
+
(__v8hi) __A,
|
1782
|
+
(__v8hi) __B,
|
1783
|
+
(__mmask8) __U);
|
1784
|
+
}
|
1785
|
+
|
1786
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
1787
|
+
_mm_maskz_permutex2var_epi16 (__mmask8 __U, __m128i __A, __m128i __I,
|
1788
|
+
__m128i __B)
|
1789
|
+
{
|
1790
|
+
return (__m128i) __builtin_ia32_vpermt2varhi128_maskz ((__v8hi) __I/* idx */,
|
1791
|
+
(__v8hi) __A,
|
1792
|
+
(__v8hi) __B,
|
1793
|
+
(__mmask8) __U);
|
1794
|
+
}
|
1795
|
+
|
1796
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1797
|
+
_mm256_permutex2var_epi16 (__m256i __A, __m256i __I, __m256i __B)
|
1798
|
+
{
|
1799
|
+
return (__m256i) __builtin_ia32_vpermt2varhi256_mask ((__v16hi) __I/* idx */,
|
1800
|
+
(__v16hi) __A,
|
1801
|
+
(__v16hi) __B,
|
1802
|
+
(__mmask16) -1);
|
1803
|
+
}
|
1804
|
+
|
1805
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1806
|
+
_mm256_mask_permutex2var_epi16 (__m256i __A, __mmask16 __U,
|
1807
|
+
__m256i __I, __m256i __B)
|
1808
|
+
{
|
1809
|
+
return (__m256i) __builtin_ia32_vpermt2varhi256_mask ((__v16hi) __I/* idx */,
|
1810
|
+
(__v16hi) __A,
|
1811
|
+
(__v16hi) __B,
|
1812
|
+
(__mmask16) __U);
|
1813
|
+
}
|
1814
|
+
|
1815
|
+
static __inline__ __m256i __DEFAULT_FN_ATTRS
|
1816
|
+
_mm256_maskz_permutex2var_epi16 (__mmask16 __U, __m256i __A,
|
1817
|
+
__m256i __I, __m256i __B)
|
1818
|
+
{
|
1819
|
+
return (__m256i) __builtin_ia32_vpermt2varhi256_maskz ((__v16hi) __I/* idx */,
|
1820
|
+
(__v16hi) __A,
|
1821
|
+
(__v16hi) __B,
|
1822
|
+
(__mmask16) __U);
|
1823
|
+
}
|
1824
|
+
|
1825
|
+
#define _mm_cmp_epi8_mask(a, b, p) __extension__ ({ \
|
1826
|
+
(__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)(__m128i)(a), \
|
1827
|
+
(__v16qi)(__m128i)(b), \
|
1828
|
+
(p), (__mmask16)-1); })
|
1829
|
+
|
1830
|
+
#define _mm_mask_cmp_epi8_mask(m, a, b, p) __extension__ ({ \
|
1831
|
+
(__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)(__m128i)(a), \
|
1832
|
+
(__v16qi)(__m128i)(b), \
|
1833
|
+
(p), (__mmask16)(m)); })
|
1834
|
+
|
1835
|
+
#define _mm_cmp_epu8_mask(a, b, p) __extension__ ({ \
|
1836
|
+
(__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)(__m128i)(a), \
|
1837
|
+
(__v16qi)(__m128i)(b), \
|
1838
|
+
(p), (__mmask16)-1); })
|
1839
|
+
|
1840
|
+
#define _mm_mask_cmp_epu8_mask(m, a, b, p) __extension__ ({ \
|
1841
|
+
(__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)(__m128i)(a), \
|
1842
|
+
(__v16qi)(__m128i)(b), \
|
1843
|
+
(p), (__mmask16)(m)); })
|
1844
|
+
|
1845
|
+
#define _mm256_cmp_epi8_mask(a, b, p) __extension__ ({ \
|
1846
|
+
(__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)(__m256i)(a), \
|
1847
|
+
(__v32qi)(__m256i)(b), \
|
1848
|
+
(p), (__mmask32)-1); })
|
1849
|
+
|
1850
|
+
#define _mm256_mask_cmp_epi8_mask(m, a, b, p) __extension__ ({ \
|
1851
|
+
(__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)(__m256i)(a), \
|
1852
|
+
(__v32qi)(__m256i)(b), \
|
1853
|
+
(p), (__mmask32)(m)); })
|
1854
|
+
|
1855
|
+
#define _mm256_cmp_epu8_mask(a, b, p) __extension__ ({ \
|
1856
|
+
(__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)(__m256i)(a), \
|
1857
|
+
(__v32qi)(__m256i)(b), \
|
1858
|
+
(p), (__mmask32)-1); })
|
1859
|
+
|
1860
|
+
#define _mm256_mask_cmp_epu8_mask(m, a, b, p) __extension__ ({ \
|
1861
|
+
(__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)(__m256i)(a), \
|
1862
|
+
(__v32qi)(__m256i)(b), \
|
1863
|
+
(p), (__mmask32)(m)); })
|
1864
|
+
|
1865
|
+
#define _mm_cmp_epi16_mask(a, b, p) __extension__ ({ \
|
1866
|
+
(__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)(__m128i)(a), \
|
1867
|
+
(__v8hi)(__m128i)(b), \
|
1868
|
+
(p), (__mmask8)-1); })
|
1869
|
+
|
1870
|
+
#define _mm_mask_cmp_epi16_mask(m, a, b, p) __extension__ ({ \
|
1871
|
+
(__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)(__m128i)(a), \
|
1872
|
+
(__v8hi)(__m128i)(b), \
|
1873
|
+
(p), (__mmask8)(m)); })
|
1874
|
+
|
1875
|
+
#define _mm_cmp_epu16_mask(a, b, p) __extension__ ({ \
|
1876
|
+
(__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)(__m128i)(a), \
|
1877
|
+
(__v8hi)(__m128i)(b), \
|
1878
|
+
(p), (__mmask8)-1); })
|
1879
|
+
|
1880
|
+
#define _mm_mask_cmp_epu16_mask(m, a, b, p) __extension__ ({ \
|
1881
|
+
(__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)(__m128i)(a), \
|
1882
|
+
(__v8hi)(__m128i)(b), \
|
1883
|
+
(p), (__mmask8)(m)); })
|
1884
|
+
|
1885
|
+
#define _mm256_cmp_epi16_mask(a, b, p) __extension__ ({ \
|
1886
|
+
(__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)(__m256i)(a), \
|
1887
|
+
(__v16hi)(__m256i)(b), \
|
1888
|
+
(p), (__mmask16)-1); })
|
1889
|
+
|
1890
|
+
#define _mm256_mask_cmp_epi16_mask(m, a, b, p) __extension__ ({ \
|
1891
|
+
(__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)(__m256i)(a), \
|
1892
|
+
(__v16hi)(__m256i)(b), \
|
1893
|
+
(p), (__mmask16)(m)); })
|
1894
|
+
|
1895
|
+
#define _mm256_cmp_epu16_mask(a, b, p) __extension__ ({ \
|
1896
|
+
(__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)(__m256i)(a), \
|
1897
|
+
(__v16hi)(__m256i)(b), \
|
1898
|
+
(p), (__mmask16)-1); })
|
1899
|
+
|
1900
|
+
#define _mm256_mask_cmp_epu16_mask(m, a, b, p) __extension__ ({ \
|
1901
|
+
(__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)(__m256i)(a), \
|
1902
|
+
(__v16hi)(__m256i)(b), \
|
1903
|
+
(p), (__mmask16)(m)); })
|
1904
|
+
|
1905
|
+
#undef __DEFAULT_FN_ATTRS
|
1906
|
+
|
1907
|
+
#endif /* __AVX512VLBWINTRIN_H */
|