scs 0.2.0
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- checksums.yaml +7 -0
- data/CHANGELOG.md +3 -0
- data/LICENSE.txt +22 -0
- data/README.md +84 -0
- data/ext/scs/Rakefile +11 -0
- data/lib/scs/ffi.rb +117 -0
- data/lib/scs/solver.rb +178 -0
- data/lib/scs/version.rb +3 -0
- data/lib/scs.rb +17 -0
- data/vendor/scs/LICENSE.txt +21 -0
- data/vendor/scs/Makefile +164 -0
- data/vendor/scs/README.md +220 -0
- data/vendor/scs/include/aa.h +56 -0
- data/vendor/scs/include/cones.h +46 -0
- data/vendor/scs/include/ctrlc.h +33 -0
- data/vendor/scs/include/glbopts.h +177 -0
- data/vendor/scs/include/linalg.h +26 -0
- data/vendor/scs/include/linsys.h +64 -0
- data/vendor/scs/include/normalize.h +18 -0
- data/vendor/scs/include/rw.h +17 -0
- data/vendor/scs/include/scs.h +161 -0
- data/vendor/scs/include/scs_blas.h +51 -0
- data/vendor/scs/include/util.h +65 -0
- data/vendor/scs/linsys/amatrix.c +305 -0
- data/vendor/scs/linsys/amatrix.h +36 -0
- data/vendor/scs/linsys/amatrix.o +0 -0
- data/vendor/scs/linsys/cpu/direct/private.c +366 -0
- data/vendor/scs/linsys/cpu/direct/private.h +26 -0
- data/vendor/scs/linsys/cpu/direct/private.o +0 -0
- data/vendor/scs/linsys/cpu/indirect/private.c +256 -0
- data/vendor/scs/linsys/cpu/indirect/private.h +31 -0
- data/vendor/scs/linsys/cpu/indirect/private.o +0 -0
- data/vendor/scs/linsys/external/amd/LICENSE.txt +934 -0
- data/vendor/scs/linsys/external/amd/SuiteSparse_config.c +469 -0
- data/vendor/scs/linsys/external/amd/SuiteSparse_config.h +254 -0
- data/vendor/scs/linsys/external/amd/SuiteSparse_config.o +0 -0
- data/vendor/scs/linsys/external/amd/amd.h +400 -0
- data/vendor/scs/linsys/external/amd/amd_1.c +180 -0
- data/vendor/scs/linsys/external/amd/amd_1.o +0 -0
- data/vendor/scs/linsys/external/amd/amd_2.c +1842 -0
- data/vendor/scs/linsys/external/amd/amd_2.o +0 -0
- data/vendor/scs/linsys/external/amd/amd_aat.c +184 -0
- data/vendor/scs/linsys/external/amd/amd_aat.o +0 -0
- data/vendor/scs/linsys/external/amd/amd_control.c +64 -0
- data/vendor/scs/linsys/external/amd/amd_control.o +0 -0
- data/vendor/scs/linsys/external/amd/amd_defaults.c +37 -0
- data/vendor/scs/linsys/external/amd/amd_defaults.o +0 -0
- data/vendor/scs/linsys/external/amd/amd_dump.c +179 -0
- data/vendor/scs/linsys/external/amd/amd_dump.o +0 -0
- data/vendor/scs/linsys/external/amd/amd_global.c +16 -0
- data/vendor/scs/linsys/external/amd/amd_global.o +0 -0
- data/vendor/scs/linsys/external/amd/amd_info.c +119 -0
- data/vendor/scs/linsys/external/amd/amd_info.o +0 -0
- data/vendor/scs/linsys/external/amd/amd_internal.h +304 -0
- data/vendor/scs/linsys/external/amd/amd_order.c +199 -0
- data/vendor/scs/linsys/external/amd/amd_order.o +0 -0
- data/vendor/scs/linsys/external/amd/amd_post_tree.c +120 -0
- data/vendor/scs/linsys/external/amd/amd_post_tree.o +0 -0
- data/vendor/scs/linsys/external/amd/amd_postorder.c +206 -0
- data/vendor/scs/linsys/external/amd/amd_postorder.o +0 -0
- data/vendor/scs/linsys/external/amd/amd_preprocess.c +118 -0
- data/vendor/scs/linsys/external/amd/amd_preprocess.o +0 -0
- data/vendor/scs/linsys/external/amd/amd_valid.c +92 -0
- data/vendor/scs/linsys/external/amd/amd_valid.o +0 -0
- data/vendor/scs/linsys/external/amd/changes +11 -0
- data/vendor/scs/linsys/external/qdldl/LICENSE +201 -0
- data/vendor/scs/linsys/external/qdldl/README.md +120 -0
- data/vendor/scs/linsys/external/qdldl/changes +4 -0
- data/vendor/scs/linsys/external/qdldl/qdldl.c +298 -0
- data/vendor/scs/linsys/external/qdldl/qdldl.h +177 -0
- data/vendor/scs/linsys/external/qdldl/qdldl.o +0 -0
- data/vendor/scs/linsys/external/qdldl/qdldl_types.h +21 -0
- data/vendor/scs/linsys/gpu/gpu.c +41 -0
- data/vendor/scs/linsys/gpu/gpu.h +85 -0
- data/vendor/scs/linsys/gpu/indirect/private.c +304 -0
- data/vendor/scs/linsys/gpu/indirect/private.h +36 -0
- data/vendor/scs/scs.mk +181 -0
- data/vendor/scs/src/aa.c +224 -0
- data/vendor/scs/src/aa.o +0 -0
- data/vendor/scs/src/cones.c +802 -0
- data/vendor/scs/src/cones.o +0 -0
- data/vendor/scs/src/ctrlc.c +77 -0
- data/vendor/scs/src/ctrlc.o +0 -0
- data/vendor/scs/src/linalg.c +84 -0
- data/vendor/scs/src/linalg.o +0 -0
- data/vendor/scs/src/normalize.c +93 -0
- data/vendor/scs/src/normalize.o +0 -0
- data/vendor/scs/src/rw.c +167 -0
- data/vendor/scs/src/rw.o +0 -0
- data/vendor/scs/src/scs.c +975 -0
- data/vendor/scs/src/scs.o +0 -0
- data/vendor/scs/src/scs_version.c +5 -0
- data/vendor/scs/src/scs_version.o +0 -0
- data/vendor/scs/src/util.c +196 -0
- data/vendor/scs/src/util.o +0 -0
- data/vendor/scs/test/data/small_random_socp +0 -0
- data/vendor/scs/test/minunit.h +13 -0
- data/vendor/scs/test/problem_utils.h +93 -0
- data/vendor/scs/test/problems/rob_gauss_cov_est.h +85 -0
- data/vendor/scs/test/problems/small_lp.h +50 -0
- data/vendor/scs/test/problems/small_random_socp.h +33 -0
- data/vendor/scs/test/random_socp_prob.c +171 -0
- data/vendor/scs/test/run_from_file.c +69 -0
- data/vendor/scs/test/run_tests +2 -0
- data/vendor/scs/test/run_tests.c +32 -0
- metadata +203 -0
@@ -0,0 +1,206 @@
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/* ========================================================================= */
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/* === AMD_postorder ======================================================= */
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/* ========================================================================= */
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/* ------------------------------------------------------------------------- */
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/* AMD, Copyright (c) Timothy A. Davis, */
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/* Patrick R. Amestoy, and Iain S. Duff. See ../README.txt for License. */
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/* email: DrTimothyAldenDavis@gmail.com */
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/* ------------------------------------------------------------------------- */
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/* Perform a postordering (via depth-first search) of an assembly tree. */
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#include "amd_internal.h"
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GLOBAL void AMD_postorder
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(
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/* inputs, not modified on output: */
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Int nn, /* nodes are in the range 0..nn-1 */
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Int Parent [ ], /* Parent [j] is the parent of j, or EMPTY if root */
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Int Nv [ ], /* Nv [j] > 0 number of pivots represented by node j,
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* or zero if j is not a node. */
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Int Fsize [ ], /* Fsize [j]: size of node j */
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/* output, not defined on input: */
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Int Order [ ], /* output post-order */
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/* workspaces of size nn: */
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Int Child [ ],
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Int Sibling [ ],
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Int Stack [ ]
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)
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{
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Int i, j, k, parent, frsize, f, fprev, maxfrsize, bigfprev, bigf, fnext ;
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for (j = 0 ; j < nn ; j++)
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{
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Child [j] = EMPTY ;
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Sibling [j] = EMPTY ;
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}
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/* --------------------------------------------------------------------- */
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/* place the children in link lists - bigger elements tend to be last */
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/* --------------------------------------------------------------------- */
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for (j = nn-1 ; j >= 0 ; j--)
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{
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if (Nv [j] > 0)
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{
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/* this is an element */
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parent = Parent [j] ;
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if (parent != EMPTY)
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{
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/* place the element in link list of the children its parent */
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/* bigger elements will tend to be at the end of the list */
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Sibling [j] = Child [parent] ;
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Child [parent] = j ;
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}
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}
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}
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#ifndef NDEBUG
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{
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Int nels, ff, nchild ;
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AMD_DEBUG1 (("\n\n================================ AMD_postorder:\n"));
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nels = 0 ;
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for (j = 0 ; j < nn ; j++)
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{
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if (Nv [j] > 0)
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{
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AMD_DEBUG1 (( ""ID" : nels "ID" npiv "ID" size "ID
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" parent "ID" maxfr "ID"\n", j, nels,
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Nv [j], Fsize [j], Parent [j], Fsize [j])) ;
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/* this is an element */
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/* dump the link list of children */
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nchild = 0 ;
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AMD_DEBUG1 ((" Children: ")) ;
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for (ff = Child [j] ; ff != EMPTY ; ff = Sibling [ff])
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{
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AMD_DEBUG1 ((ID" ", ff)) ;
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ASSERT (Parent [ff] == j) ;
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nchild++ ;
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ASSERT (nchild < nn) ;
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}
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AMD_DEBUG1 (("\n")) ;
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parent = Parent [j] ;
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if (parent != EMPTY)
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{
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ASSERT (Nv [parent] > 0) ;
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}
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nels++ ;
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}
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}
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}
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AMD_DEBUG1 (("\n\nGo through the children of each node, and put\n"
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"the biggest child last in each list:\n")) ;
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#endif
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/* --------------------------------------------------------------------- */
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/* place the largest child last in the list of children for each node */
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/* --------------------------------------------------------------------- */
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for (i = 0 ; i < nn ; i++)
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{
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if (Nv [i] > 0 && Child [i] != EMPTY)
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{
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#ifndef NDEBUG
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Int nchild ;
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AMD_DEBUG1 (("Before partial sort, element "ID"\n", i)) ;
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nchild = 0 ;
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for (f = Child [i] ; f != EMPTY ; f = Sibling [f])
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{
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ASSERT (f >= 0 && f < nn) ;
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AMD_DEBUG1 ((" f: "ID" size: "ID"\n", f, Fsize [f])) ;
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nchild++ ;
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ASSERT (nchild <= nn) ;
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}
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#endif
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/* find the biggest element in the child list */
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fprev = EMPTY ;
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maxfrsize = EMPTY ;
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bigfprev = EMPTY ;
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bigf = EMPTY ;
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for (f = Child [i] ; f != EMPTY ; f = Sibling [f])
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{
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ASSERT (f >= 0 && f < nn) ;
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frsize = Fsize [f] ;
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if (frsize >= maxfrsize)
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{
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/* this is the biggest seen so far */
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maxfrsize = frsize ;
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bigfprev = fprev ;
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bigf = f ;
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}
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fprev = f ;
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}
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ASSERT (bigf != EMPTY) ;
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fnext = Sibling [bigf] ;
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AMD_DEBUG1 (("bigf "ID" maxfrsize "ID" bigfprev "ID" fnext "ID
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" fprev " ID"\n", bigf, maxfrsize, bigfprev, fnext, fprev)) ;
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if (fnext != EMPTY)
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{
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/* if fnext is EMPTY then bigf is already at the end of list */
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if (bigfprev == EMPTY)
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{
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/* delete bigf from the element of the list */
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Child [i] = fnext ;
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}
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else
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{
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/* delete bigf from the middle of the list */
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Sibling [bigfprev] = fnext ;
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}
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/* put bigf at the end of the list */
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Sibling [bigf] = EMPTY ;
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ASSERT (Child [i] != EMPTY) ;
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ASSERT (fprev != bigf) ;
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ASSERT (fprev != EMPTY) ;
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Sibling [fprev] = bigf ;
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}
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#ifndef NDEBUG
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AMD_DEBUG1 (("After partial sort, element "ID"\n", i)) ;
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for (f = Child [i] ; f != EMPTY ; f = Sibling [f])
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{
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ASSERT (f >= 0 && f < nn) ;
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AMD_DEBUG1 ((" "ID" "ID"\n", f, Fsize [f])) ;
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ASSERT (Nv [f] > 0) ;
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nchild-- ;
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}
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ASSERT (nchild == 0) ;
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#endif
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}
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}
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/* --------------------------------------------------------------------- */
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/* postorder the assembly tree */
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/* --------------------------------------------------------------------- */
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for (i = 0 ; i < nn ; i++)
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{
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Order [i] = EMPTY ;
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}
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k = 0 ;
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for (i = 0 ; i < nn ; i++)
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{
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if (Parent [i] == EMPTY && Nv [i] > 0)
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{
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AMD_DEBUG1 (("Root of assembly tree "ID"\n", i)) ;
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k = AMD_post_tree (i, k, Child, Sibling, Order, Stack
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#ifndef NDEBUG
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, nn
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#endif
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) ;
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}
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}
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}
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Binary file
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@@ -0,0 +1,118 @@
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/* ========================================================================= */
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/* === AMD_preprocess ====================================================== */
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/* ========================================================================= */
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/* ------------------------------------------------------------------------- */
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/* AMD, Copyright (c) Timothy A. Davis, */
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/* Patrick R. Amestoy, and Iain S. Duff. See ../README.txt for License. */
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/* email: DrTimothyAldenDavis@gmail.com */
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/* ------------------------------------------------------------------------- */
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/* Sorts, removes duplicate entries, and transposes from the nonzero pattern of
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* a column-form matrix A, to obtain the matrix R. The input matrix can have
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* duplicate entries and/or unsorted columns (AMD_valid (n,Ap,Ai) must not be
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* AMD_INVALID).
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*
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* This input condition is NOT checked. This routine is not user-callable.
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*/
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#include "amd_internal.h"
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/* ========================================================================= */
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/* === AMD_preprocess ====================================================== */
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/* ========================================================================= */
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/* AMD_preprocess does not check its input for errors or allocate workspace.
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* On input, the condition (AMD_valid (n,n,Ap,Ai) != AMD_INVALID) must hold.
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*/
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GLOBAL void AMD_preprocess
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(
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Int n, /* input matrix: A is n-by-n */
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const Int Ap [ ], /* size n+1 */
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const Int Ai [ ], /* size nz = Ap [n] */
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/* output matrix R: */
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Int Rp [ ], /* size n+1 */
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Int Ri [ ], /* size nz (or less, if duplicates present) */
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Int W [ ], /* workspace of size n */
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Int Flag [ ] /* workspace of size n */
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)
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{
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/* --------------------------------------------------------------------- */
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/* local variables */
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/* --------------------------------------------------------------------- */
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Int i, j, p, p2 ;
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ASSERT (AMD_valid (n, n, Ap, Ai) != AMD_INVALID) ;
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/* --------------------------------------------------------------------- */
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/* count the entries in each row of A (excluding duplicates) */
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/* --------------------------------------------------------------------- */
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for (i = 0 ; i < n ; i++)
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{
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W [i] = 0 ; /* # of nonzeros in row i (excl duplicates) */
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Flag [i] = EMPTY ; /* Flag [i] = j if i appears in column j */
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}
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for (j = 0 ; j < n ; j++)
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{
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p2 = Ap [j+1] ;
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+
for (p = Ap [j] ; p < p2 ; p++)
|
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+
{
|
66
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+
i = Ai [p] ;
|
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+
if (Flag [i] != j)
|
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+
{
|
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+
/* row index i has not yet appeared in column j */
|
70
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+
W [i]++ ; /* one more entry in row i */
|
71
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+
Flag [i] = j ; /* flag row index i as appearing in col j*/
|
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+
}
|
73
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+
}
|
74
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+
}
|
75
|
+
|
76
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+
/* --------------------------------------------------------------------- */
|
77
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+
/* compute the row pointers for R */
|
78
|
+
/* --------------------------------------------------------------------- */
|
79
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+
|
80
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+
Rp [0] = 0 ;
|
81
|
+
for (i = 0 ; i < n ; i++)
|
82
|
+
{
|
83
|
+
Rp [i+1] = Rp [i] + W [i] ;
|
84
|
+
}
|
85
|
+
for (i = 0 ; i < n ; i++)
|
86
|
+
{
|
87
|
+
W [i] = Rp [i] ;
|
88
|
+
Flag [i] = EMPTY ;
|
89
|
+
}
|
90
|
+
|
91
|
+
/* --------------------------------------------------------------------- */
|
92
|
+
/* construct the row form matrix R */
|
93
|
+
/* --------------------------------------------------------------------- */
|
94
|
+
|
95
|
+
/* R = row form of pattern of A */
|
96
|
+
for (j = 0 ; j < n ; j++)
|
97
|
+
{
|
98
|
+
p2 = Ap [j+1] ;
|
99
|
+
for (p = Ap [j] ; p < p2 ; p++)
|
100
|
+
{
|
101
|
+
i = Ai [p] ;
|
102
|
+
if (Flag [i] != j)
|
103
|
+
{
|
104
|
+
/* row index i has not yet appeared in column j */
|
105
|
+
Ri [W [i]++] = j ; /* put col j in row i */
|
106
|
+
Flag [i] = j ; /* flag row index i as appearing in col j*/
|
107
|
+
}
|
108
|
+
}
|
109
|
+
}
|
110
|
+
|
111
|
+
#ifndef NDEBUG
|
112
|
+
ASSERT (AMD_valid (n, n, Rp, Ri) == AMD_OK) ;
|
113
|
+
for (j = 0 ; j < n ; j++)
|
114
|
+
{
|
115
|
+
ASSERT (W [j] == Rp [j+1]) ;
|
116
|
+
}
|
117
|
+
#endif
|
118
|
+
}
|
Binary file
|
@@ -0,0 +1,92 @@
|
|
1
|
+
/* ========================================================================= */
|
2
|
+
/* === AMD_valid =========================================================== */
|
3
|
+
/* ========================================================================= */
|
4
|
+
|
5
|
+
/* ------------------------------------------------------------------------- */
|
6
|
+
/* AMD, Copyright (c) Timothy A. Davis, */
|
7
|
+
/* Patrick R. Amestoy, and Iain S. Duff. See ../README.txt for License. */
|
8
|
+
/* email: DrTimothyAldenDavis@gmail.com */
|
9
|
+
/* ------------------------------------------------------------------------- */
|
10
|
+
|
11
|
+
/* Check if a column-form matrix is valid or not. The matrix A is
|
12
|
+
* n_row-by-n_col. The row indices of entries in column j are in
|
13
|
+
* Ai [Ap [j] ... Ap [j+1]-1]. Required conditions are:
|
14
|
+
*
|
15
|
+
* n_row >= 0
|
16
|
+
* n_col >= 0
|
17
|
+
* nz = Ap [n_col] >= 0 number of entries in the matrix
|
18
|
+
* Ap [0] == 0
|
19
|
+
* Ap [j] <= Ap [j+1] for all j in the range 0 to n_col.
|
20
|
+
* Ai [0 ... nz-1] must be in the range 0 to n_row-1.
|
21
|
+
*
|
22
|
+
* If any of the above conditions hold, AMD_INVALID is returned. If the
|
23
|
+
* following condition holds, AMD_OK_BUT_JUMBLED is returned (a warning,
|
24
|
+
* not an error):
|
25
|
+
*
|
26
|
+
* row indices in Ai [Ap [j] ... Ap [j+1]-1] are not sorted in ascending
|
27
|
+
* order, and/or duplicate entries exist.
|
28
|
+
*
|
29
|
+
* Otherwise, AMD_OK is returned.
|
30
|
+
*
|
31
|
+
* In v1.2 and earlier, this function returned TRUE if the matrix was valid
|
32
|
+
* (now returns AMD_OK), or FALSE otherwise (now returns AMD_INVALID or
|
33
|
+
* AMD_OK_BUT_JUMBLED).
|
34
|
+
*/
|
35
|
+
|
36
|
+
#include "amd_internal.h"
|
37
|
+
|
38
|
+
GLOBAL Int AMD_valid
|
39
|
+
(
|
40
|
+
/* inputs, not modified on output: */
|
41
|
+
Int n_row, /* A is n_row-by-n_col */
|
42
|
+
Int n_col,
|
43
|
+
const Int Ap [ ], /* column pointers of A, of size n_col+1 */
|
44
|
+
const Int Ai [ ] /* row indices of A, of size nz = Ap [n_col] */
|
45
|
+
)
|
46
|
+
{
|
47
|
+
Int nz, j, p1, p2, ilast, i, p, result = AMD_OK ;
|
48
|
+
|
49
|
+
if (n_row < 0 || n_col < 0 || Ap == NULL || Ai == NULL)
|
50
|
+
{
|
51
|
+
return (AMD_INVALID) ;
|
52
|
+
}
|
53
|
+
nz = Ap [n_col] ;
|
54
|
+
if (Ap [0] != 0 || nz < 0)
|
55
|
+
{
|
56
|
+
/* column pointers must start at Ap [0] = 0, and Ap [n] must be >= 0 */
|
57
|
+
AMD_DEBUG0 (("column 0 pointer bad or nz < 0\n")) ;
|
58
|
+
return (AMD_INVALID) ;
|
59
|
+
}
|
60
|
+
for (j = 0 ; j < n_col ; j++)
|
61
|
+
{
|
62
|
+
p1 = Ap [j] ;
|
63
|
+
p2 = Ap [j+1] ;
|
64
|
+
AMD_DEBUG2 (("\nColumn: "ID" p1: "ID" p2: "ID"\n", j, p1, p2)) ;
|
65
|
+
if (p1 > p2)
|
66
|
+
{
|
67
|
+
/* column pointers must be ascending */
|
68
|
+
AMD_DEBUG0 (("column "ID" pointer bad\n", j)) ;
|
69
|
+
return (AMD_INVALID) ;
|
70
|
+
}
|
71
|
+
ilast = EMPTY ;
|
72
|
+
for (p = p1 ; p < p2 ; p++)
|
73
|
+
{
|
74
|
+
i = Ai [p] ;
|
75
|
+
AMD_DEBUG3 (("row: "ID"\n", i)) ;
|
76
|
+
if (i < 0 || i >= n_row)
|
77
|
+
{
|
78
|
+
/* row index out of range */
|
79
|
+
AMD_DEBUG0 (("index out of range, col "ID" row "ID"\n", j, i));
|
80
|
+
return (AMD_INVALID) ;
|
81
|
+
}
|
82
|
+
if (i <= ilast)
|
83
|
+
{
|
84
|
+
/* row index unsorted, or duplicate entry present */
|
85
|
+
AMD_DEBUG1 (("index unsorted/dupl col "ID" row "ID"\n", j, i));
|
86
|
+
result = AMD_OK_BUT_JUMBLED ;
|
87
|
+
}
|
88
|
+
ilast = i ;
|
89
|
+
}
|
90
|
+
}
|
91
|
+
return (result) ;
|
92
|
+
}
|
Binary file
|
@@ -0,0 +1,11 @@
|
|
1
|
+
Flatten out all .c and .h to single dir.
|
2
|
+
All files: double -> scs_float.
|
3
|
+
git grep -l 'double' | xargs sed -i 's/double/scs_float/g'
|
4
|
+
SuiteSparse_config.h: add '#include "scs.h"'
|
5
|
+
add '#include "ctrlc.h"'
|
6
|
+
add '#define SuiteSparse_long scs_int'
|
7
|
+
disable timer #define NTIMER
|
8
|
+
SuiteSparse_config.c: replace *alloc and printf in 2 structs.
|
9
|
+
amd_internal.h: remove all refs to long version, int -> scs_int
|
10
|
+
amd_global.c: add typedef to rm warning
|
11
|
+
amd.h: int -> scs_int.h
|
@@ -0,0 +1,201 @@
|
|
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|
+
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Copyright [yyyy] [name of copyright owner]
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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