rubygb 0.1.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (56) hide show
  1. checksums.yaml +7 -0
  2. data/.DS_Store +0 -0
  3. data/.gitignore +5 -0
  4. data/.travis.yml +20 -0
  5. data/CHANGELOG.md +6 -0
  6. data/Gemfile +5 -0
  7. data/Gemfile.lock +23 -0
  8. data/MIT-LICENSE.txt +53 -0
  9. data/README.md +30 -0
  10. data/Rakefile +30 -0
  11. data/bin/rubygb +5 -0
  12. data/lib/galp/AND.GIF +0 -0
  13. data/lib/galp/ARROW.GIF +0 -0
  14. data/lib/galp/C.BAT +5 -0
  15. data/lib/galp/CHANGES.TXT +5 -0
  16. data/lib/galp/EXAMPLE.LNK +7 -0
  17. data/lib/galp/EXAMPLE1.TXT +266 -0
  18. data/lib/galp/GBHW.TXT +645 -0
  19. data/lib/galp/GBSPEC.TXT +1761 -0
  20. data/lib/galp/IBMPC1.TXT +2400 -0
  21. data/lib/galp/INDEX.HTM +23 -0
  22. data/lib/galp/INSTR.HTM +563 -0
  23. data/lib/galp/MEM1.HTM +199 -0
  24. data/lib/galp/MEMORY.TXT +160 -0
  25. data/lib/galp/OPCODES.HTM +351 -0
  26. data/lib/galp/OR.GIF +0 -0
  27. data/lib/galp/README.TXT +4 -0
  28. data/lib/galp/REGS.HTM +77 -0
  29. data/lib/galp/RL.GIF +0 -0
  30. data/lib/galp/RLC.GIF +0 -0
  31. data/lib/galp/RR.GIF +0 -0
  32. data/lib/galp/RRC.GIF +0 -0
  33. data/lib/galp/SETUP.BAT +7 -0
  34. data/lib/galp/SLA.GIF +0 -0
  35. data/lib/galp/SRA.GIF +0 -0
  36. data/lib/galp/SRL.GIF +0 -0
  37. data/lib/galp/START.HTM +24 -0
  38. data/lib/galp/SWAP.GIF +0 -0
  39. data/lib/galp/VID1.HTM +34 -0
  40. data/lib/galp/XOR.GIF +0 -0
  41. data/lib/rgbds/rgbasm +0 -0
  42. data/lib/rgbds/rgbfix +0 -0
  43. data/lib/rgbds/rgblink +0 -0
  44. data/lib/rubygb/cli.rb +11 -0
  45. data/lib/rubygb/rubygb.rb +15 -0
  46. data/lib/rubygb/version.rb +4 -0
  47. data/lib/rubygb.rb +7 -0
  48. data/rubygb.gemspec +23 -0
  49. data/scrap/basic.gb +0 -0
  50. data/scrap/basic.map +55 -0
  51. data/scrap/basic.obj +0 -0
  52. data/scrap/basic.s +176 -0
  53. data/scrap/basic.sym +8 -0
  54. data/spec/basic.s +176 -0
  55. data/spec/rubygb_spec.rb +19 -0
  56. metadata +129 -0
data/lib/galp/MEM1.HTM ADDED
@@ -0,0 +1,199 @@
1
+ <!DOCTYPE HTML PUBLIC "-//SQ//DTD HTML 2.0 HoTMetaL + extensions//EN">
2
+ <HTML><HEAD><TITLE>GameBoy Assembly Language Primer - Registers</TITLE></HEAD>
3
+ <BODY><CENTER><H2>GameBoy Assembly Language Primer</H2></CENTER>
4
+ <HR>
5
+ <CENTER><H2>GameBoy Memory Map</H2></CENTER>
6
+ <CENTER><P>The GameBoy has physical memory space from $0000 to $FFFF:</P><TABLE
7
+ BORDER="1"><TR><TD COLSTART="1" ALIGN="CENTER">Memory Read</TD><TD
8
+ COLSTART="2">Address Space</TD><TD COLSTART="3" ALIGN="CENTER">Memory Write</TD></TR>
9
+ <TR><TD COLSTART="1"></TD><TD COLSTART="2"></TD><TD COLSTART="3"></TD></TR><TR><TD
10
+ COLSTART="1" ALIGN="CENTER">Interrupt Enable Register</TD><TD
11
+ COLSTART="2" ALIGN="CENTER">FFFF</TD><TD COLSTART="3" ALIGN="CENTER">Interrupt
12
+ Enable Register</TD></TR><TR><TD COLSTART="1" ROWSPAN="2" ALIGN="CENTER">High
13
+ RAM</TD><TD COLSTART="2" ALIGN="CENTER">FFFE</TD><TD
14
+ COLSTART="3" ROWSPAN="2" ALIGN="CENTER">High RAM</TD></TR><TR><TD
15
+ COLSTART="2" ALIGN="CENTER">FF80</TD></TR><TR><TD
16
+ COLSTART="1" ROWSPAN="2" ALIGN="CENTER">I/O Registers</TD><TD
17
+ COLSTART="2" ALIGN="CENTER">FF7F</TD><TD
18
+ COLSTART="3" ROWSPAN="2" ALIGN="CENTER">I/O Registers</TD></TR><TR><TD
19
+ COLSTART="2" ALIGN="CENTER">FF00</TD></TR><TR><TD COLSTART="1" ROWSPAN="2">.</TD><TD
20
+ COLSTART="2" ALIGN="CENTER">FEFF</TD><TD COLSTART="3" ROWSPAN="2">.</TD></TR><TR>
21
+ <TD COLSTART="2" ALIGN="CENTER">FEA0</TD></TR><TR><TD COLSTART="1" ROWSPAN="2">Object
22
+ Attribute Memory</TD><TD COLSTART="2" ALIGN="CENTER">FE9F</TD><TD
23
+ COLSTART="3" ROWSPAN="2" ALIGN="CENTER">Object Attribute Memory</TD></TR><TR><TD
24
+ COLSTART="2" ALIGN="CENTER">FE00</TD></TR><TR><TD COLSTART="1" ROWSPAN="2">.</TD><TD
25
+ COLSTART="2" ALIGN="CENTER">FDFF</TD><TD COLSTART="3" ROWSPAN="2">.</TD></TR><TR>
26
+ <TD COLSTART="2" ALIGN="CENTER">E000</TD></TR><TR><TD
27
+ COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Low RAM</TD><TD
28
+ COLSTART="2" ALIGN="CENTER">DFFF</TD><TD
29
+ COLSTART="3" ROWSPAN="2" ALIGN="CENTER">Low RAM</TD></TR><TR><TD
30
+ COLSTART="2" ALIGN="CENTER">C000</TD></TR><TR><TD
31
+ COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Cart RAM (Optional)</TD><TD
32
+ COLSTART="2" ALIGN="CENTER">BFFF</TD><TD
33
+ COLSTART="3" ROWSPAN="2" ALIGN="CENTER">Cart RAM (Optional)</TD></TR><TR><TD
34
+ COLSTART="2" ALIGN="CENTER">A000</TD></TR><TR><TD
35
+ COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Video RAM</TD><TD
36
+ COLSTART="2" ALIGN="CENTER">9FFF</TD><TD
37
+ COLSTART="3" ROWSPAN="2" ALIGN="CENTER">Video RAM</TD></TR><TR><TD
38
+ COLSTART="2" ALIGN="CENTER">8000</TD></TR><TR><TD
39
+ COLSTART="1" ROWSPAN="4" ALIGN="CENTER">ROM Bank 1-XXX</TD><TD
40
+ COLSTART="2" ALIGN="CENTER">7FFF</TD><TD
41
+ COLSTART="3" ROWSPAN="2" ALIGN="CENTER">RAM/ROM Select (MBC1 Only)</TD></TR><TR><TD
42
+ COLSTART="2" ALIGN="CENTER">6000</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">5FFF</TD>
43
+ <TD COLSTART="3" ROWSPAN="2" ALIGN="CENTER">RAM Bank Select</TD></TR><TR><TD
44
+ COLSTART="2" ALIGN="CENTER">4000</TD></TR><TR><TD
45
+ COLSTART="1" ROWSPAN="6" ALIGN="CENTER">ROM Bank 0</TD><TD
46
+ COLSTART="2" ALIGN="CENTER">3FFF</TD><TD COLSTART="3" ROWSPAN="2">ROM Bank
47
+ Select MS Byte (MBC5 Only)</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">3000</TD></TR>
48
+ <TR><TD COLSTART="2" ALIGN="CENTER">2FFF</TD><TD
49
+ COLSTART="3" ROWSPAN="2" ALIGN="CENTER">ROM Bank Select LS Byte</TD></TR><TR><TD
50
+ COLSTART="2" ALIGN="CENTER">2000</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">1FFF</TD>
51
+ <TD COLSTART="3" ROWSPAN="2" ALIGN="CENTER">RAM Bank Enable</TD></TR><TR><TD
52
+ COLSTART="2" ALIGN="CENTER">0000</TD></TR></TABLE></CENTER>
53
+ <HR>
54
+ <CENTER><H2>Video RAM Map</H2></CENTER>
55
+ <CENTER><P>Here is the layout of the Video RAM:</P><TABLE BORDER="1"><TR><TD
56
+ COLSTART="1" ALIGN="CENTER">Memory Read/Write</TD><TD COLSTART="2">Address
57
+ Space</TD></TR><TR><TD COLSTART="1"></TD><TD COLSTART="2"></TD></TR><TR><TD
58
+ COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Tile Map 2</TD><TD
59
+ COLSTART="2" ALIGN="CENTER">9FFF</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">9C00</TD></TR>
60
+ <TR><TD COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Tile Map 1</TD><TD
61
+ COLSTART="2" ALIGN="CENTER">9BFF</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">9800</TD></TR>
62
+ <TR><TD COLSTART="1" ROWSPAN="2">Tiles $00-$7F (FF40:Bit4=0)</TD><TD
63
+ COLSTART="2" ALIGN="CENTER">97FF</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">9000</TD></TR>
64
+ <TR><TD COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Tiles $80-$FF</TD><TD
65
+ COLSTART="2" ALIGN="CENTER">8FFF</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">8800</TD></TR>
66
+ <TR><TD COLSTART="1" ROWSPAN="2">Tiles $00-$7F (FF40:Bit4=1)</TD><TD
67
+ COLSTART="2" ALIGN="CENTER">87FF</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">8000</TD></TR></TABLE></CENTER>
68
+ <HR>
69
+ <CENTER><H2>ROM Bank 0 Read Map</H2></CENTER>
70
+ <CENTER><P>The lower part of ROM bank 0 Read is setup like the following:</P><TABLE
71
+ BORDER="1"><TR><TD COLSTART="1" ALIGN="CENTER">Memory Read</TD><TD
72
+ COLSTART="2">Address Space</TD></TR><TR><TD COLSTART="1"></TD><TD
73
+ COLSTART="2"></TD></TR><TR><TD COLSTART="1"></TD><TD COLSTART="2"></TD></TR><TR>
74
+ <TD COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Cart Header Info Area</TD><TD
75
+ COLSTART="2" ALIGN="CENTER">014F</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">0100</TD></TR>
76
+ <TR><TD COLSTART="1"></TD><TD COLSTART="2"></TD></TR><TR><TD
77
+ COLSTART="1" ALIGN="CENTER">Hi-to-Lo Interrupt Vector</TD><TD
78
+ COLSTART="2" ALIGN="CENTER">0060</TD></TR><TR><TD COLSTART="1">Serial
79
+ Transfer Complete Interrupt Vector</TD><TD COLSTART="2" ALIGN="CENTER">0058</TD></TR>
80
+ <TR><TD COLSTART="1" ALIGN="CENTER">Timer Overflow Interrupt Vector</TD><TD
81
+ COLSTART="2" ALIGN="CENTER">0050</TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">LCDC
82
+ Interrupt Vector</TD><TD COLSTART="2" ALIGN="CENTER">0048</TD></TR><TR><TD
83
+ COLSTART="1" ALIGN="CENTER">Vertical Blank Interrupt Vector</TD><TD
84
+ COLSTART="2" ALIGN="CENTER">0040</TD></TR><TR><TD COLSTART="1"></TD><TD
85
+ COLSTART="2"></TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Restart Vector $38</TD>
86
+ <TD COLSTART="2" ALIGN="CENTER">0038</TD></TR><TR><TD
87
+ COLSTART="1" ALIGN="CENTER">Restart Vector $30</TD><TD
88
+ COLSTART="2" ALIGN="CENTER">0030</TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Restart
89
+ Vector $28</TD><TD COLSTART="2" ALIGN="CENTER">0028</TD></TR><TR><TD
90
+ COLSTART="1" ALIGN="CENTER">Restart Vector $20</TD><TD
91
+ COLSTART="2" ALIGN="CENTER">0020</TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Restart
92
+ Vector $18</TD><TD COLSTART="2" ALIGN="CENTER">0018</TD></TR><TR><TD
93
+ COLSTART="1" ALIGN="CENTER">Restart Vector $10</TD><TD
94
+ COLSTART="2" ALIGN="CENTER">0010</TD></TR><TR><TD
95
+ COLSTART="1" ROWSPAN="1" ALIGN="CENTER">Restart Vector $08</TD><TD
96
+ COLSTART="2" ALIGN="CENTER">0008</TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Restart
97
+ Vector $00</TD><TD COLSTART="2" ALIGN="CENTER">0000</TD></TR></TABLE></CENTER>
98
+ <HR>
99
+ <CENTER><H2>Cart Header Info Area Map</H2></CENTER>
100
+ <CENTER><TABLE BORDER="1"><TR><TD COLSTART="1" ALIGN="CENTER">Memory Read</TD><TD
101
+ COLSTART="2">Address Space</TD><TD COLSTART="3" ALIGN="CENTER">Format</TD><TD
102
+ COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="1"></TD><TD
103
+ COLSTART="2"></TD><TD COLSTART="3"></TD><TD COLSTART="4"></TD></TR><TR><TD
104
+ COLSTART="1" ALIGN="CENTER">Checksum L</TD><TD COLSTART="2" ALIGN="CENTER">014F</TD>
105
+ <TD COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR
106
+ ><TD COLSTART="1" ALIGN="CENTER">Checksum H</TD><TD
107
+ COLSTART="2" ALIGN="CENTER">014E</TD><TD COLSTART="3" ALIGN="CENTER"></TD><TD
108
+ COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Complement
109
+ Check</TD><TD COLSTART="2" ALIGN="CENTER">014D</TD><TD
110
+ COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD
111
+ COLSTART="1" ALIGN="CENTER">Mask ROM Version</TD><TD
112
+ COLSTART="2" ALIGN="CENTER">014C</TD><TD COLSTART="3" ALIGN="CENTER"></TD><TD
113
+ COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD
114
+ COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Old Maker Code</TD><TD
115
+ COLSTART="2" ALIGN="CENTER" ROWSPAN="2">014B</TD><TD
116
+ COLSTART="3" ALIGN="CENTER" ROWSPAN="2">$33</TD><TD
117
+ COLSTART="4" ALIGN="CENTER" ROWSPAN="1"></TD></TR><TR><TD
118
+ COLSTART="4" ALIGN="CENTER" ROWSPAN="1"></TD></TR><TR><TD
119
+ COLSTART="1" ALIGN="CENTER">Destination Code</TD><TD
120
+ COLSTART="2" ALIGN="CENTER">014A</TD><TD COLSTART="3" ALIGN="CENTER">0 = Jap,
121
+ 1 = non-Jap</TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD
122
+ COLSTART="1" ALIGN="CENTER">Cart RAM Size</TD><TD COLSTART="2" ALIGN="CENTER">0149</TD>
123
+ <TD COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR
124
+ ><TD COLSTART="1" ALIGN="CENTER">ROM Size</TD><TD COLSTART="2" ALIGN="CENTER">0148</TD>
125
+ <TD COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR
126
+ ><TD COLSTART="1" ALIGN="CENTER">Cartridge Type</TD><TD
127
+ COLSTART="2" ALIGN="CENTER">0147</TD><TD COLSTART="3" ALIGN="CENTER"></TD><TD
128
+ COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Game
129
+ Unit Code</TD><TD COLSTART="2" ALIGN="CENTER">0146</TD><TD
130
+ COLSTART="3" ALIGN="CENTER">$03=SGB Features</TD><TD
131
+ COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Maker
132
+ Code L (ascii hex)</TD><TD COLSTART="2" ALIGN="CENTER">0145</TD><TD
133
+ COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD
134
+ COLSTART="1" ALIGN="CENTER">Maker Code H (ascii hex)</TD><TD
135
+ COLSTART="2" ALIGN="CENTER">0144</TD><TD COLSTART="3" ALIGN="CENTER"></TD><TD
136
+ COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Color
137
+ Compatibility</TD><TD COLSTART="2" ALIGN="CENTER">0143</TD><TD
138
+ COLSTART="3" ALIGN="CENTER">$80=GBC Support</TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR>
139
+ <TR><TD COLSTART="1" ALIGN="CENTER" ROWSPAN="2">Game Title (uppercase ascii)</TD><TD
140
+ COLSTART="2" ALIGN="CENTER">0142</TD><TD COLSTART="3" ALIGN="CENTER"></TD><TD
141
+ COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">0134</TD>
142
+ <TD COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR
143
+ ><TD COLSTART="1" ALIGN="CENTER" ROWSPAN="2">Nintendo Graphic</TD><TD
144
+ COLSTART="2" ALIGN="CENTER">0133</TD><TD COLSTART="3" ALIGN="CENTER"></TD><TD
145
+ COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">0104</TD>
146
+ <TD COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR
147
+ ><TD COLSTART="1" ROWSPAN="2" ALIGN="CENTER">JP $XXXX</TD><TD
148
+ COLSTART="2" ALIGN="CENTER">0103</TD><TD COLSTART="3" ALIGN="CENTER"></TD><TD
149
+ COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">0101</TD>
150
+ <TD COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR
151
+ ><TD COLSTART="1" ALIGN="CENTER">NOP ($00)</TD><TD COLSTART="2" ALIGN="CENTER">0100</TD>
152
+ <TD COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR></TABLE></CENTER>
153
+ <HR>
154
+ <CENTER><H2>RAM Size</H2><TABLE BORDER="1"><TR><TD COLSTART="1">00</TD><TD
155
+ COLSTART="2">None</TD><TD COLSTART="3"></TD></TR><TR><TD COLSTART="1">01</TD><TD
156
+ COLSTART="2">2K Bytes</TD><TD COLSTART="3">1 Bank</TD></TR><TR><TD
157
+ COLSTART="1">02</TD><TD COLSTART="2">8K Bytes</TD><TD COLSTART="3">1 Bank</TD></TR>
158
+ <TR><TD COLSTART="1">03</TD><TD COLSTART="2">32K Bytes</TD><TD COLSTART="3">4
159
+ Banks</TD></TR><TR><TD COLSTART="1">05</TD><TD COLSTART="2">128K Bytes</TD><TD
160
+ COLSTART="3">16 Banks</TD></TR></TABLE></CENTER>
161
+ <HR>
162
+ <CENTER><H2>ROM Size</H2><TABLE BORDER="1"><TR><TD COLSTART="1"></TD><TD
163
+ COLSTART="2">Bits</TD><TD COLSTART="3">Bytes</TD></TR><TR><TD COLSTART="1">00</TD>
164
+ <TD COLSTART="2">256K</TD><TD COLSTART="3">32K</TD></TR><TR><TD COLSTART="1">01</TD>
165
+ <TD COLSTART="2">512K</TD><TD COLSTART="3">64K</TD></TR><TR><TD COLSTART="1">02</TD>
166
+ <TD COLSTART="2">1M</TD><TD COLSTART="3">128K</TD></TR><TR><TD COLSTART="1">03</TD>
167
+ <TD COLSTART="2">2M</TD><TD COLSTART="3">256K</TD></TR><TR><TD COLSTART="1">04</TD>
168
+ <TD COLSTART="2">4M</TD><TD COLSTART="3">512K</TD></TR><TR><TD COLSTART="1">05</TD>
169
+ <TD COLSTART="2">8M</TD><TD COLSTART="3">1M</TD></TR><TR><TD COLSTART="1">06</TD>
170
+ <TD COLSTART="2">16M</TD><TD COLSTART="3">2M</TD></TR><TR><TD COLSTART="1">52</TD>
171
+ <TD COLSTART="2">9M</TD><TD COLSTART="3">1.1M</TD></TR><TR><TD COLSTART="1">53</TD>
172
+ <TD COLSTART="2">10M</TD><TD COLSTART="3">1.2M</TD></TR><TR><TD COLSTART="1">54</TD>
173
+ <TD COLSTART="2">12M</TD><TD COLSTART="3">1.5M</TD></TR></TABLE></CENTER>
174
+ <HR>
175
+ <CENTER><H2>Cartridge Type</H2><TABLE BORDER="1"><TR><TD COLSTART="1">00</TD><TD
176
+ COLSTART="2">ROM Only</TD></TR><TR><TD COLSTART="1">01</TD><TD COLSTART="2">ROM+MBC1</TD></TR>
177
+ <TR><TD COLSTART="1">02</TD><TD COLSTART="2">ROM+MBC1+RAM</TD></TR><TR><TD
178
+ COLSTART="1">03</TD><TD COLSTART="2">ROM+MBC1+RAM+Batt</TD></TR><TR><TD
179
+ COLSTART="1">05</TD><TD COLSTART="2">ROM+MBC</TD></TR><TR><TD COLSTART="1">06</TD>
180
+ <TD COLSTART="2">ROM+MBC2+Batt</TD></TR><TR><TD COLSTART="1">08</TD><TD
181
+ COLSTART="2">ROM+RAM</TD></TR><TR><TD COLSTART="1">09</TD><TD COLSTART="2">ROM+RAM+Batt</TD></TR>
182
+ <TR><TD COLSTART="1">0B</TD><TD COLSTART="2">ROM+MMM01</TD></TR><TR><TD
183
+ COLSTART="1">0C</TD><TD COLSTART="2">ROM+MMM01+RAM</TD></TR><TR><TD
184
+ COLSTART="1">0D</TD><TD COLSTART="2">ROM+MMM01+RAM+Batt</TD></TR><TR><TD
185
+ COLSTART="1">0F</TD><TD COLSTART="2">ROM+MBC3+Timer+Batt</TD></TR><TR><TD
186
+ COLSTART="1">10</TD><TD COLSTART="2">ROM+MBC3+Timer+RAM+Batt</TD></TR><TR><TD
187
+ COLSTART="1">11</TD><TD COLSTART="2">ROM+MBC3</TD></TR><TR><TD COLSTART="1">12</TD>
188
+ <TD COLSTART="2">ROM+MBC3+RAM</TD></TR><TR><TD COLSTART="1">13</TD><TD
189
+ COLSTART="2">ROM+MBC3+RAM+Batt</TD></TR><TR><TD COLSTART="1">19</TD><TD
190
+ COLSTART="2">ROM+MBC5</TD></TR><TR><TD COLSTART="1">1A</TD><TD COLSTART="2">ROM+MBC5+RAM</TD></TR>
191
+ <TR><TD COLSTART="1">1B</TD><TD COLSTART="2">ROM+MBC5+RAM+Batt</TD></TR><TR><TD
192
+ COLSTART="1">1C</TD><TD COLSTART="2">ROM+MBC5+Rumble</TD></TR><TR><TD
193
+ COLSTART="1">1D</TD><TD COLSTART="2">ROM+MBC5+Rumble+RAM</TD></TR><TR><TD
194
+ COLSTART="1">1E</TD><TD COLSTART="2">ROM+MBC5+Rumble+RAM+Batt</TD></TR><TR><TD
195
+ COLSTART="1">1F</TD><TD COLSTART="2">Pocket Camera</TD></TR><TR><TD
196
+ COLSTART="1">FD</TD><TD COLSTART="2">Bandai TAMA5</TD></TR><TR><TD
197
+ COLSTART="1">FE</TD><TD COLSTART="2">Hudson HuC-3</TD></TR><TR><TD
198
+ COLSTART="1">FF</TD><TD COLSTART="2">Hudson HuC-1</TD></TR></TABLE></CENTER>
199
+ <HR></BODY></HTML>
@@ -0,0 +1,160 @@
1
+ ;*
2
+ ;* MEMORY.ASM - Memory Manipulation Code
3
+ ;* by GABY. Inspired by Carsten Sorensen & others.
4
+ ;*
5
+ ;* V1.0 - Original release
6
+ ;*
7
+
8
+ ;If all of these are already defined, don't do it again.
9
+
10
+ IF !DEF(MEMORY1_ASM)
11
+ MEMORY1_ASM SET 1
12
+
13
+ rev_Check_memory1_asm: MACRO
14
+ ;NOTE: REVISION NUMBER CHANGES MUST BE ADDED
15
+ ;TO SECOND PARAMETER IN FOLLOWING LINE.
16
+ IF \1 > 1.0 ; <---- NOTE!!! PUT FILE REVISION NUMBER HERE
17
+ WARN "Version \1 or later of 'memory.asm' is required."
18
+ ENDC
19
+ ENDM
20
+
21
+ INCLUDE "gbhw.inc"
22
+
23
+ ; Macro that pauses until VRAM available.
24
+
25
+ lcd_WaitVRAM: MACRO
26
+ ld a,[rSTAT] ; <---+
27
+ and STATF_BUSY ; |
28
+ jr nz,@-4 ; ----+
29
+ ENDM
30
+
31
+ PUSHS ; Push the current section onto assember stack.
32
+
33
+ SECTION "Memory1 Code",HOME
34
+
35
+ ;***************************************************************************
36
+ ;*
37
+ ;* mem_Set - "Set" a memory region
38
+ ;*
39
+ ;* input:
40
+ ;* a - value
41
+ ;* hl - pMem
42
+ ;* bc - bytecount
43
+ ;*
44
+ ;***************************************************************************
45
+ mem_Set::
46
+ inc b
47
+ inc c
48
+ jr .skip
49
+ .loop ld [hl+],a
50
+ .skip dec c
51
+ jr nz,.loop
52
+ dec b
53
+ jr nz,.loop
54
+ ret
55
+
56
+ ;***************************************************************************
57
+ ;*
58
+ ;* mem_Copy - "Copy" a memory region
59
+ ;*
60
+ ;* input:
61
+ ;* hl - pSource
62
+ ;* de - pDest
63
+ ;* bc - bytecount
64
+ ;*
65
+ ;***************************************************************************
66
+ mem_Copy::
67
+ inc b
68
+ inc c
69
+ jr .skip
70
+ .loop ld a,[hl+]
71
+ ld [de],a
72
+ inc de
73
+ .skip dec c
74
+ jr nz,.loop
75
+ dec b
76
+ jr nz,.loop
77
+ ret
78
+
79
+ ;***************************************************************************
80
+ ;*
81
+ ;* mem_Copy - "Copy" a monochrome font from ROM to RAM
82
+ ;*
83
+ ;* input:
84
+ ;* hl - pSource
85
+ ;* de - pDest
86
+ ;* bc - bytecount of Source
87
+ ;*
88
+ ;***************************************************************************
89
+ mem_CopyMono::
90
+ inc b
91
+ inc c
92
+ jr .skip
93
+ .loop ld a,[hl+]
94
+ ld [de],a
95
+ inc de
96
+ ld [de],a
97
+ inc de
98
+ .skip dec c
99
+ jr nz,.loop
100
+ dec b
101
+ jr nz,.loop
102
+ ret
103
+
104
+
105
+ ;***************************************************************************
106
+ ;*
107
+ ;* mem_SetVRAM - "Set" a memory region in VRAM
108
+ ;*
109
+ ;* input:
110
+ ;* a - value
111
+ ;* hl - pMem
112
+ ;* bc - bytecount
113
+ ;*
114
+ ;***************************************************************************
115
+ mem_SetVRAM::
116
+ inc b
117
+ inc c
118
+ jr .skip
119
+ .loop push af
120
+ di
121
+ lcd_WaitVRAM
122
+ pop af
123
+ ld [hl+],a
124
+ ei
125
+ .skip dec c
126
+ jr nz,.loop
127
+ dec b
128
+ jr nz,.loop
129
+ ret
130
+
131
+ ;***************************************************************************
132
+ ;*
133
+ ;* mem_CopyVRAM - "Copy" a memory region to or from VRAM
134
+ ;*
135
+ ;* input:
136
+ ;* hl - pSource
137
+ ;* de - pDest
138
+ ;* bc - bytecount
139
+ ;*
140
+ ;***************************************************************************
141
+ mem_CopyVRAM::
142
+ inc b
143
+ inc c
144
+ jr .skip
145
+ .loop di
146
+ lcd_WaitVRAM
147
+ ld a,[hl+]
148
+ ld [de],a
149
+ ei
150
+ inc de
151
+ .skip dec c
152
+ jr nz,.loop
153
+ dec b
154
+ jr nz,.loop
155
+ ret
156
+
157
+ POPS ; Pop the current section off of assember stack.
158
+
159
+ ENDC ;MEMORY1_ASM
160
+