rubygb 0.1.0 → 0.2.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (55) hide show
  1. checksums.yaml +4 -4
  2. data/.DS_Store +0 -0
  3. data/Gemfile.lock +13 -1
  4. data/README.md +3 -3
  5. data/lib/galp/memory.inc +153 -0
  6. data/lib/rgbds/LICENSE +32 -0
  7. data/lib/rubygb/cli.rb +26 -2
  8. data/lib/rubygb/template/template.rb +99 -0
  9. data/lib/rubygb/version.rb +1 -1
  10. data/lib/rubygb.rb +1 -0
  11. data/rubygb.gemspec +2 -0
  12. data/scrap/example/gbhw.inc +645 -0
  13. data/{lib/galp/EXAMPLE1.TXT → scrap/example/hello-world-with-comments.asm} +123 -113
  14. data/scrap/example/hello-world-with-comments.gb +0 -0
  15. data/scrap/example/hello-world-with-comments.map +65 -0
  16. data/scrap/example/hello-world-with-comments.obj +0 -0
  17. data/scrap/example/hello-world-with-comments.sym +12 -0
  18. data/scrap/example/ibmpc1.inc +2400 -0
  19. data/scrap/test/lib/gbhw.inc +645 -0
  20. data/scrap/test/lib/ibmpx1.inc +2400 -0
  21. data/scrap/test/lib/memory.inc +153 -0
  22. data/scrap/test/test.gb +0 -0
  23. data/scrap/test/test.map +65 -0
  24. data/scrap/test/test.obj +0 -0
  25. data/scrap/test/test.s +91 -0
  26. data/scrap/test/test.sym +12 -0
  27. metadata +37 -31
  28. data/lib/galp/AND.GIF +0 -0
  29. data/lib/galp/ARROW.GIF +0 -0
  30. data/lib/galp/C.BAT +0 -5
  31. data/lib/galp/CHANGES.TXT +0 -5
  32. data/lib/galp/EXAMPLE.LNK +0 -7
  33. data/lib/galp/GBSPEC.TXT +0 -1761
  34. data/lib/galp/INDEX.HTM +0 -23
  35. data/lib/galp/INSTR.HTM +0 -563
  36. data/lib/galp/MEM1.HTM +0 -199
  37. data/lib/galp/OPCODES.HTM +0 -351
  38. data/lib/galp/OR.GIF +0 -0
  39. data/lib/galp/README.TXT +0 -4
  40. data/lib/galp/REGS.HTM +0 -77
  41. data/lib/galp/RL.GIF +0 -0
  42. data/lib/galp/RLC.GIF +0 -0
  43. data/lib/galp/RR.GIF +0 -0
  44. data/lib/galp/RRC.GIF +0 -0
  45. data/lib/galp/SETUP.BAT +0 -7
  46. data/lib/galp/SLA.GIF +0 -0
  47. data/lib/galp/SRA.GIF +0 -0
  48. data/lib/galp/SRL.GIF +0 -0
  49. data/lib/galp/START.HTM +0 -24
  50. data/lib/galp/SWAP.GIF +0 -0
  51. data/lib/galp/VID1.HTM +0 -34
  52. data/lib/galp/XOR.GIF +0 -0
  53. /data/lib/galp/{GBHW.TXT → gbhw.inc} +0 -0
  54. /data/lib/galp/{IBMPC1.TXT → ibmpx1.inc} +0 -0
  55. /data/{lib/galp/MEMORY.TXT → scrap/example/memory.asm} +0 -0
data/lib/galp/MEM1.HTM DELETED
@@ -1,199 +0,0 @@
1
- <!DOCTYPE HTML PUBLIC "-//SQ//DTD HTML 2.0 HoTMetaL + extensions//EN">
2
- <HTML><HEAD><TITLE>GameBoy Assembly Language Primer - Registers</TITLE></HEAD>
3
- <BODY><CENTER><H2>GameBoy Assembly Language Primer</H2></CENTER>
4
- <HR>
5
- <CENTER><H2>GameBoy Memory Map</H2></CENTER>
6
- <CENTER><P>The GameBoy has physical memory space from $0000 to $FFFF:</P><TABLE
7
- BORDER="1"><TR><TD COLSTART="1" ALIGN="CENTER">Memory Read</TD><TD
8
- COLSTART="2">Address Space</TD><TD COLSTART="3" ALIGN="CENTER">Memory Write</TD></TR>
9
- <TR><TD COLSTART="1"></TD><TD COLSTART="2"></TD><TD COLSTART="3"></TD></TR><TR><TD
10
- COLSTART="1" ALIGN="CENTER">Interrupt Enable Register</TD><TD
11
- COLSTART="2" ALIGN="CENTER">FFFF</TD><TD COLSTART="3" ALIGN="CENTER">Interrupt
12
- Enable Register</TD></TR><TR><TD COLSTART="1" ROWSPAN="2" ALIGN="CENTER">High
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- RAM</TD><TD COLSTART="2" ALIGN="CENTER">FFFE</TD><TD
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- COLSTART="3" ROWSPAN="2" ALIGN="CENTER">High RAM</TD></TR><TR><TD
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- COLSTART="2" ALIGN="CENTER">FF80</TD></TR><TR><TD
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- COLSTART="1" ROWSPAN="2" ALIGN="CENTER">I/O Registers</TD><TD
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- COLSTART="2" ALIGN="CENTER">FF7F</TD><TD
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- COLSTART="3" ROWSPAN="2" ALIGN="CENTER">I/O Registers</TD></TR><TR><TD
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- COLSTART="2" ALIGN="CENTER">FF00</TD></TR><TR><TD COLSTART="1" ROWSPAN="2">.</TD><TD
20
- COLSTART="2" ALIGN="CENTER">FEFF</TD><TD COLSTART="3" ROWSPAN="2">.</TD></TR><TR>
21
- <TD COLSTART="2" ALIGN="CENTER">FEA0</TD></TR><TR><TD COLSTART="1" ROWSPAN="2">Object
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- Attribute Memory</TD><TD COLSTART="2" ALIGN="CENTER">FE9F</TD><TD
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- COLSTART="3" ROWSPAN="2" ALIGN="CENTER">Object Attribute Memory</TD></TR><TR><TD
24
- COLSTART="2" ALIGN="CENTER">FE00</TD></TR><TR><TD COLSTART="1" ROWSPAN="2">.</TD><TD
25
- COLSTART="2" ALIGN="CENTER">FDFF</TD><TD COLSTART="3" ROWSPAN="2">.</TD></TR><TR>
26
- <TD COLSTART="2" ALIGN="CENTER">E000</TD></TR><TR><TD
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- COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Low RAM</TD><TD
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- COLSTART="2" ALIGN="CENTER">DFFF</TD><TD
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- COLSTART="3" ROWSPAN="2" ALIGN="CENTER">Low RAM</TD></TR><TR><TD
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- COLSTART="2" ALIGN="CENTER">C000</TD></TR><TR><TD
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- COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Cart RAM (Optional)</TD><TD
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- COLSTART="2" ALIGN="CENTER">BFFF</TD><TD
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- COLSTART="3" ROWSPAN="2" ALIGN="CENTER">Cart RAM (Optional)</TD></TR><TR><TD
34
- COLSTART="2" ALIGN="CENTER">A000</TD></TR><TR><TD
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- COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Video RAM</TD><TD
36
- COLSTART="2" ALIGN="CENTER">9FFF</TD><TD
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- COLSTART="3" ROWSPAN="2" ALIGN="CENTER">Video RAM</TD></TR><TR><TD
38
- COLSTART="2" ALIGN="CENTER">8000</TD></TR><TR><TD
39
- COLSTART="1" ROWSPAN="4" ALIGN="CENTER">ROM Bank 1-XXX</TD><TD
40
- COLSTART="2" ALIGN="CENTER">7FFF</TD><TD
41
- COLSTART="3" ROWSPAN="2" ALIGN="CENTER">RAM/ROM Select (MBC1 Only)</TD></TR><TR><TD
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- COLSTART="2" ALIGN="CENTER">6000</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">5FFF</TD>
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- <TD COLSTART="3" ROWSPAN="2" ALIGN="CENTER">RAM Bank Select</TD></TR><TR><TD
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- COLSTART="2" ALIGN="CENTER">4000</TD></TR><TR><TD
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- COLSTART="1" ROWSPAN="6" ALIGN="CENTER">ROM Bank 0</TD><TD
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- COLSTART="2" ALIGN="CENTER">3FFF</TD><TD COLSTART="3" ROWSPAN="2">ROM Bank
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- Select MS Byte (MBC5 Only)</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">3000</TD></TR>
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- <TR><TD COLSTART="2" ALIGN="CENTER">2FFF</TD><TD
49
- COLSTART="3" ROWSPAN="2" ALIGN="CENTER">ROM Bank Select LS Byte</TD></TR><TR><TD
50
- COLSTART="2" ALIGN="CENTER">2000</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">1FFF</TD>
51
- <TD COLSTART="3" ROWSPAN="2" ALIGN="CENTER">RAM Bank Enable</TD></TR><TR><TD
52
- COLSTART="2" ALIGN="CENTER">0000</TD></TR></TABLE></CENTER>
53
- <HR>
54
- <CENTER><H2>Video RAM Map</H2></CENTER>
55
- <CENTER><P>Here is the layout of the Video RAM:</P><TABLE BORDER="1"><TR><TD
56
- COLSTART="1" ALIGN="CENTER">Memory Read/Write</TD><TD COLSTART="2">Address
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- Space</TD></TR><TR><TD COLSTART="1"></TD><TD COLSTART="2"></TD></TR><TR><TD
58
- COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Tile Map 2</TD><TD
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- COLSTART="2" ALIGN="CENTER">9FFF</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">9C00</TD></TR>
60
- <TR><TD COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Tile Map 1</TD><TD
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- COLSTART="2" ALIGN="CENTER">9BFF</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">9800</TD></TR>
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- <TR><TD COLSTART="1" ROWSPAN="2">Tiles $00-$7F (FF40:Bit4=0)</TD><TD
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- COLSTART="2" ALIGN="CENTER">97FF</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">9000</TD></TR>
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- <TR><TD COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Tiles $80-$FF</TD><TD
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- COLSTART="2" ALIGN="CENTER">8FFF</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">8800</TD></TR>
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- <TR><TD COLSTART="1" ROWSPAN="2">Tiles $00-$7F (FF40:Bit4=1)</TD><TD
67
- COLSTART="2" ALIGN="CENTER">87FF</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">8000</TD></TR></TABLE></CENTER>
68
- <HR>
69
- <CENTER><H2>ROM Bank 0 Read Map</H2></CENTER>
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- <CENTER><P>The lower part of ROM bank 0 Read is setup like the following:</P><TABLE
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- BORDER="1"><TR><TD COLSTART="1" ALIGN="CENTER">Memory Read</TD><TD
72
- COLSTART="2">Address Space</TD></TR><TR><TD COLSTART="1"></TD><TD
73
- COLSTART="2"></TD></TR><TR><TD COLSTART="1"></TD><TD COLSTART="2"></TD></TR><TR>
74
- <TD COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Cart Header Info Area</TD><TD
75
- COLSTART="2" ALIGN="CENTER">014F</TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">0100</TD></TR>
76
- <TR><TD COLSTART="1"></TD><TD COLSTART="2"></TD></TR><TR><TD
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- COLSTART="1" ALIGN="CENTER">Hi-to-Lo Interrupt Vector</TD><TD
78
- COLSTART="2" ALIGN="CENTER">0060</TD></TR><TR><TD COLSTART="1">Serial
79
- Transfer Complete Interrupt Vector</TD><TD COLSTART="2" ALIGN="CENTER">0058</TD></TR>
80
- <TR><TD COLSTART="1" ALIGN="CENTER">Timer Overflow Interrupt Vector</TD><TD
81
- COLSTART="2" ALIGN="CENTER">0050</TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">LCDC
82
- Interrupt Vector</TD><TD COLSTART="2" ALIGN="CENTER">0048</TD></TR><TR><TD
83
- COLSTART="1" ALIGN="CENTER">Vertical Blank Interrupt Vector</TD><TD
84
- COLSTART="2" ALIGN="CENTER">0040</TD></TR><TR><TD COLSTART="1"></TD><TD
85
- COLSTART="2"></TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Restart Vector $38</TD>
86
- <TD COLSTART="2" ALIGN="CENTER">0038</TD></TR><TR><TD
87
- COLSTART="1" ALIGN="CENTER">Restart Vector $30</TD><TD
88
- COLSTART="2" ALIGN="CENTER">0030</TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Restart
89
- Vector $28</TD><TD COLSTART="2" ALIGN="CENTER">0028</TD></TR><TR><TD
90
- COLSTART="1" ALIGN="CENTER">Restart Vector $20</TD><TD
91
- COLSTART="2" ALIGN="CENTER">0020</TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Restart
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- Vector $18</TD><TD COLSTART="2" ALIGN="CENTER">0018</TD></TR><TR><TD
93
- COLSTART="1" ALIGN="CENTER">Restart Vector $10</TD><TD
94
- COLSTART="2" ALIGN="CENTER">0010</TD></TR><TR><TD
95
- COLSTART="1" ROWSPAN="1" ALIGN="CENTER">Restart Vector $08</TD><TD
96
- COLSTART="2" ALIGN="CENTER">0008</TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Restart
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- Vector $00</TD><TD COLSTART="2" ALIGN="CENTER">0000</TD></TR></TABLE></CENTER>
98
- <HR>
99
- <CENTER><H2>Cart Header Info Area Map</H2></CENTER>
100
- <CENTER><TABLE BORDER="1"><TR><TD COLSTART="1" ALIGN="CENTER">Memory Read</TD><TD
101
- COLSTART="2">Address Space</TD><TD COLSTART="3" ALIGN="CENTER">Format</TD><TD
102
- COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="1"></TD><TD
103
- COLSTART="2"></TD><TD COLSTART="3"></TD><TD COLSTART="4"></TD></TR><TR><TD
104
- COLSTART="1" ALIGN="CENTER">Checksum L</TD><TD COLSTART="2" ALIGN="CENTER">014F</TD>
105
- <TD COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR
106
- ><TD COLSTART="1" ALIGN="CENTER">Checksum H</TD><TD
107
- COLSTART="2" ALIGN="CENTER">014E</TD><TD COLSTART="3" ALIGN="CENTER"></TD><TD
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- COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Complement
109
- Check</TD><TD COLSTART="2" ALIGN="CENTER">014D</TD><TD
110
- COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD
111
- COLSTART="1" ALIGN="CENTER">Mask ROM Version</TD><TD
112
- COLSTART="2" ALIGN="CENTER">014C</TD><TD COLSTART="3" ALIGN="CENTER"></TD><TD
113
- COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD
114
- COLSTART="1" ROWSPAN="2" ALIGN="CENTER">Old Maker Code</TD><TD
115
- COLSTART="2" ALIGN="CENTER" ROWSPAN="2">014B</TD><TD
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- COLSTART="3" ALIGN="CENTER" ROWSPAN="2">$33</TD><TD
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- COLSTART="4" ALIGN="CENTER" ROWSPAN="1"></TD></TR><TR><TD
118
- COLSTART="4" ALIGN="CENTER" ROWSPAN="1"></TD></TR><TR><TD
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- COLSTART="1" ALIGN="CENTER">Destination Code</TD><TD
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- COLSTART="2" ALIGN="CENTER">014A</TD><TD COLSTART="3" ALIGN="CENTER">0 = Jap,
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- 1 = non-Jap</TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD
122
- COLSTART="1" ALIGN="CENTER">Cart RAM Size</TD><TD COLSTART="2" ALIGN="CENTER">0149</TD>
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- <TD COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR
124
- ><TD COLSTART="1" ALIGN="CENTER">ROM Size</TD><TD COLSTART="2" ALIGN="CENTER">0148</TD>
125
- <TD COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR
126
- ><TD COLSTART="1" ALIGN="CENTER">Cartridge Type</TD><TD
127
- COLSTART="2" ALIGN="CENTER">0147</TD><TD COLSTART="3" ALIGN="CENTER"></TD><TD
128
- COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Game
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- Unit Code</TD><TD COLSTART="2" ALIGN="CENTER">0146</TD><TD
130
- COLSTART="3" ALIGN="CENTER">$03=SGB Features</TD><TD
131
- COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Maker
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- Code L (ascii hex)</TD><TD COLSTART="2" ALIGN="CENTER">0145</TD><TD
133
- COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD
134
- COLSTART="1" ALIGN="CENTER">Maker Code H (ascii hex)</TD><TD
135
- COLSTART="2" ALIGN="CENTER">0144</TD><TD COLSTART="3" ALIGN="CENTER"></TD><TD
136
- COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="1" ALIGN="CENTER">Color
137
- Compatibility</TD><TD COLSTART="2" ALIGN="CENTER">0143</TD><TD
138
- COLSTART="3" ALIGN="CENTER">$80=GBC Support</TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR>
139
- <TR><TD COLSTART="1" ALIGN="CENTER" ROWSPAN="2">Game Title (uppercase ascii)</TD><TD
140
- COLSTART="2" ALIGN="CENTER">0142</TD><TD COLSTART="3" ALIGN="CENTER"></TD><TD
141
- COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">0134</TD>
142
- <TD COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR
143
- ><TD COLSTART="1" ALIGN="CENTER" ROWSPAN="2">Nintendo Graphic</TD><TD
144
- COLSTART="2" ALIGN="CENTER">0133</TD><TD COLSTART="3" ALIGN="CENTER"></TD><TD
145
- COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">0104</TD>
146
- <TD COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR
147
- ><TD COLSTART="1" ROWSPAN="2" ALIGN="CENTER">JP $XXXX</TD><TD
148
- COLSTART="2" ALIGN="CENTER">0103</TD><TD COLSTART="3" ALIGN="CENTER"></TD><TD
149
- COLSTART="4" ALIGN="CENTER"></TD></TR><TR><TD COLSTART="2" ALIGN="CENTER">0101</TD>
150
- <TD COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR><TR
151
- ><TD COLSTART="1" ALIGN="CENTER">NOP ($00)</TD><TD COLSTART="2" ALIGN="CENTER">0100</TD>
152
- <TD COLSTART="3" ALIGN="CENTER"></TD><TD COLSTART="4" ALIGN="CENTER"></TD></TR></TABLE></CENTER>
153
- <HR>
154
- <CENTER><H2>RAM Size</H2><TABLE BORDER="1"><TR><TD COLSTART="1">00</TD><TD
155
- COLSTART="2">None</TD><TD COLSTART="3"></TD></TR><TR><TD COLSTART="1">01</TD><TD
156
- COLSTART="2">2K Bytes</TD><TD COLSTART="3">1 Bank</TD></TR><TR><TD
157
- COLSTART="1">02</TD><TD COLSTART="2">8K Bytes</TD><TD COLSTART="3">1 Bank</TD></TR>
158
- <TR><TD COLSTART="1">03</TD><TD COLSTART="2">32K Bytes</TD><TD COLSTART="3">4
159
- Banks</TD></TR><TR><TD COLSTART="1">05</TD><TD COLSTART="2">128K Bytes</TD><TD
160
- COLSTART="3">16 Banks</TD></TR></TABLE></CENTER>
161
- <HR>
162
- <CENTER><H2>ROM Size</H2><TABLE BORDER="1"><TR><TD COLSTART="1"></TD><TD
163
- COLSTART="2">Bits</TD><TD COLSTART="3">Bytes</TD></TR><TR><TD COLSTART="1">00</TD>
164
- <TD COLSTART="2">256K</TD><TD COLSTART="3">32K</TD></TR><TR><TD COLSTART="1">01</TD>
165
- <TD COLSTART="2">512K</TD><TD COLSTART="3">64K</TD></TR><TR><TD COLSTART="1">02</TD>
166
- <TD COLSTART="2">1M</TD><TD COLSTART="3">128K</TD></TR><TR><TD COLSTART="1">03</TD>
167
- <TD COLSTART="2">2M</TD><TD COLSTART="3">256K</TD></TR><TR><TD COLSTART="1">04</TD>
168
- <TD COLSTART="2">4M</TD><TD COLSTART="3">512K</TD></TR><TR><TD COLSTART="1">05</TD>
169
- <TD COLSTART="2">8M</TD><TD COLSTART="3">1M</TD></TR><TR><TD COLSTART="1">06</TD>
170
- <TD COLSTART="2">16M</TD><TD COLSTART="3">2M</TD></TR><TR><TD COLSTART="1">52</TD>
171
- <TD COLSTART="2">9M</TD><TD COLSTART="3">1.1M</TD></TR><TR><TD COLSTART="1">53</TD>
172
- <TD COLSTART="2">10M</TD><TD COLSTART="3">1.2M</TD></TR><TR><TD COLSTART="1">54</TD>
173
- <TD COLSTART="2">12M</TD><TD COLSTART="3">1.5M</TD></TR></TABLE></CENTER>
174
- <HR>
175
- <CENTER><H2>Cartridge Type</H2><TABLE BORDER="1"><TR><TD COLSTART="1">00</TD><TD
176
- COLSTART="2">ROM Only</TD></TR><TR><TD COLSTART="1">01</TD><TD COLSTART="2">ROM+MBC1</TD></TR>
177
- <TR><TD COLSTART="1">02</TD><TD COLSTART="2">ROM+MBC1+RAM</TD></TR><TR><TD
178
- COLSTART="1">03</TD><TD COLSTART="2">ROM+MBC1+RAM+Batt</TD></TR><TR><TD
179
- COLSTART="1">05</TD><TD COLSTART="2">ROM+MBC</TD></TR><TR><TD COLSTART="1">06</TD>
180
- <TD COLSTART="2">ROM+MBC2+Batt</TD></TR><TR><TD COLSTART="1">08</TD><TD
181
- COLSTART="2">ROM+RAM</TD></TR><TR><TD COLSTART="1">09</TD><TD COLSTART="2">ROM+RAM+Batt</TD></TR>
182
- <TR><TD COLSTART="1">0B</TD><TD COLSTART="2">ROM+MMM01</TD></TR><TR><TD
183
- COLSTART="1">0C</TD><TD COLSTART="2">ROM+MMM01+RAM</TD></TR><TR><TD
184
- COLSTART="1">0D</TD><TD COLSTART="2">ROM+MMM01+RAM+Batt</TD></TR><TR><TD
185
- COLSTART="1">0F</TD><TD COLSTART="2">ROM+MBC3+Timer+Batt</TD></TR><TR><TD
186
- COLSTART="1">10</TD><TD COLSTART="2">ROM+MBC3+Timer+RAM+Batt</TD></TR><TR><TD
187
- COLSTART="1">11</TD><TD COLSTART="2">ROM+MBC3</TD></TR><TR><TD COLSTART="1">12</TD>
188
- <TD COLSTART="2">ROM+MBC3+RAM</TD></TR><TR><TD COLSTART="1">13</TD><TD
189
- COLSTART="2">ROM+MBC3+RAM+Batt</TD></TR><TR><TD COLSTART="1">19</TD><TD
190
- COLSTART="2">ROM+MBC5</TD></TR><TR><TD COLSTART="1">1A</TD><TD COLSTART="2">ROM+MBC5+RAM</TD></TR>
191
- <TR><TD COLSTART="1">1B</TD><TD COLSTART="2">ROM+MBC5+RAM+Batt</TD></TR><TR><TD
192
- COLSTART="1">1C</TD><TD COLSTART="2">ROM+MBC5+Rumble</TD></TR><TR><TD
193
- COLSTART="1">1D</TD><TD COLSTART="2">ROM+MBC5+Rumble+RAM</TD></TR><TR><TD
194
- COLSTART="1">1E</TD><TD COLSTART="2">ROM+MBC5+Rumble+RAM+Batt</TD></TR><TR><TD
195
- COLSTART="1">1F</TD><TD COLSTART="2">Pocket Camera</TD></TR><TR><TD
196
- COLSTART="1">FD</TD><TD COLSTART="2">Bandai TAMA5</TD></TR><TR><TD
197
- COLSTART="1">FE</TD><TD COLSTART="2">Hudson HuC-3</TD></TR><TR><TD
198
- COLSTART="1">FF</TD><TD COLSTART="2">Hudson HuC-1</TD></TR></TABLE></CENTER>
199
- <HR></BODY></HTML>
data/lib/galp/OPCODES.HTM DELETED
@@ -1,351 +0,0 @@
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- <!DOCTYPE HTML PUBLIC "-//SQ//DTD HTML 2.0 HoTMetaL + extensions//EN">
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- <HTML><HEAD><TITLE>GameBoy Opcodes Summary</TITLE></HEAD>
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- <BODY><H1>GameBoy Opcode Summary</H1>
4
- <P>The GameBoy has instructions &amp; registers similiar to the 8080, 8085, &amp;
5
- Z80 microprocessors. The internal 8-bit registers are A, B, C, D, E, F, H, &amp;
6
- L. Theses registers may be used in pairs for 16-bit operations as AF, BC, DE, &amp;
7
- HL. The two remaining 16-bit registers are the program counter (PC) and the
8
- stack pointer (SP).</P>
9
- <P>The F register holds the cpu flags. The operation of these flags is
10
- identical to their Z80 relative. The lower four bits of this register always
11
- read zero even if written with a one.</P>
12
- <TABLE BORDER="1"><TR><TD ALIGN="CENTER" COLSTART="1" COLSPAN="8">Flag
13
- Register</TD></TR><TR><TD COLSTART="1">7</TD><TD COLSTART="2">6</TD><TD
14
- COLSTART="3">5</TD><TD COLSTART="4">4</TD><TD COLSTART="5">3</TD><TD
15
- COLSTART="6">2</TD><TD COLSTART="7">1</TD><TD COLSTART="8">0</TD></TR><TR><TD
16
- COLSTART="1">Z</TD><TD COLSTART="2">N</TD><TD COLSTART="3">H</TD><TD
17
- COLSTART="4">C</TD><TD COLSTART="5">0</TD><TD COLSTART="6">0</TD><TD
18
- COLSTART="7">0</TD><TD COLSTART="8">0</TD></TR>
19
-
20
- </TABLE>
21
- <P>The GameBoy CPU is based on a subset of the Z80 microprocessor. A summary of
22
- these commands is given below.</P>
23
- <TABLE BORDER="3"><TR><TD COLSTART="1">Mnemonic</TD><TD COLSTART="2">Symbolic
24
- Operation</TD><TD COLSTART="3">Comments</TD><TD COLSTART="4">CPU Clocks</TD><TD
25
- COLSTART="5">Flags - Z,N,H,C</TD></TR>
26
-
27
- </TABLE>
28
- <H3>8-Bit Loads</H3>
29
- <TABLE BORDER="1"><TR><TD COLSTART="1">LD r,s</TD><TD COLSTART="2">r
30
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> s</TD><TD
31
- ALIGN="CENTER" COLSTART="3">s=r,n,(HL)</TD><TD ALIGN="CENTER" COLSTART="4">r=4,
32
- n=8, (HL)=8</TD><TD ALIGN="CENTER" COLSTART="5"></TD></TR><TR><TD COLSTART="1">LD
33
- d,r</TD><TD COLSTART="2">d
34
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> r</TD><TD
35
- ALIGN="CENTER" COLSTART="3" ROWSPAN="2">d=r,(HL)</TD><TD
36
- ALIGN="CENTER" COLSTART="4">r=4, (HL)=8</TD><TD ALIGN="CENTER" COLSTART="5"></TD></TR>
37
- <TR><TD COLSTART="1">LD d,n</TD><TD COLSTART="2">d
38
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> n</TD><TD
39
- ALIGN="CENTER" COLSTART="4">r=8, (HL)=12</TD><TD ALIGN="CENTER" COLSTART="5"></TD></TR>
40
- <TR><TD COLSTART="1">LD A,(ss)</TD><TD COLSTART="2">A
41
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> (ss)</TD><TD
42
- ALIGN="CENTER" COLSTART="3">ss=BC,DE,HL,nn</TD><TD COLSTART="4" ROWSPAN="2">[BC,DE,HL]=8,
43
- nn=16</TD><TD COLSTART="5" ROWSPAN="1"></TD></TR><TR><TD COLSTART="1">LD
44
- (dd),A</TD><TD COLSTART="2">(dd)
45
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> A</TD><TD
46
- COLSTART="3">dd=BC,DE,HL,nn</TD><TD COLSTART="5"></TD></TR><TR><TD
47
- COLSTART="1" ROWSPAN="2">LD A,(C)</TD><TD COLSTART="2" ROWSPAN="2">A
48
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> ($FF00+C)</TD><TD
49
- ALIGN="CENTER" COLSTART="3" ROWSPAN="9">-</TD><TD
50
- ALIGN="CENTER" COLSTART="4" ROWSPAN="2">8</TD><TD
51
- ALIGN="CENTER" COLSTART="5" ROWSPAN="1"></TD></TR><TR><TD
52
- ALIGN="CENTER" COLSTART="5" ROWSPAN="1"></TD></TR><TR><TD COLSTART="1">LD
53
- (C),A</TD><TD COLSTART="2">($FF00+C)
54
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> A</TD><TD
55
- ALIGN="CENTER" COLSTART="4">8</TD><TD ALIGN="CENTER" COLSTART="5"></TD></TR><TR><TD
56
- COLSTART="1">LDD A,(HL)</TD><TD COLSTART="2">A
57
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> (HL), HL
58
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> HL - 1</TD><TD
59
- ALIGN="CENTER" COLSTART="4">8</TD><TD ALIGN="CENTER" COLSTART="5"></TD></TR><TR><TD
60
- COLSTART="1">LDD (HL),A</TD><TD COLSTART="2">(HL)
61
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> A, HL
62
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> HL - 1</TD><TD
63
- ALIGN="CENTER" COLSTART="4">8</TD><TD ALIGN="CENTER" COLSTART="5"></TD></TR><TR><TD
64
- COLSTART="1">LDI A,(HL)</TD><TD COLSTART="2">A
65
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> (HL), HL
66
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> HL + 1</TD><TD
67
- ALIGN="CENTER" COLSTART="4">8</TD><TD ALIGN="CENTER" COLSTART="5"></TD></TR><TR><TD
68
- COLSTART="1">LDI (HL),A</TD><TD COLSTART="2">(HL)
69
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> A, HL
70
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> HL + 1</TD><TD
71
- ALIGN="CENTER" COLSTART="4">8</TD><TD ALIGN="CENTER" COLSTART="5"></TD></TR><TR><TD
72
- COLSTART="1">LDH (n),A</TD><TD COLSTART="2">($FF00+n)
73
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> A</TD><TD
74
- ALIGN="CENTER" COLSTART="4">12</TD><TD ALIGN="CENTER" COLSTART="5"></TD></TR><TR><TD
75
- COLSTART="1">LDH A,(n)</TD><TD COLSTART="2">A
76
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> ($FF00+n)</TD><TD
77
- ALIGN="CENTER" COLSTART="4">12</TD><TD ALIGN="CENTER" COLSTART="5"></TD></TR>
78
-
79
-
80
- </TABLE>
81
- <H3>16-Bit Loads</H3>
82
- <TABLE BORDER="1"><TR><TD COLSTART="1">LD dd,nn</TD><TD COLSTART="2">dd
83
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> nn</TD><TD
84
- COLSTART="3">dd=BC,DE,HL,SP</TD><TD COLSTART="4">12</TD><TD
85
- COLSTART="5" ROWSPAN="3">-</TD><TD COLSTART="6" ROWSPAN="3">-</TD><TD
86
- COLSTART="7" ROWSPAN="3">-</TD><TD COLSTART="8" ROWSPAN="3">-</TD><TD
87
- COLSTART="9" ROWSPAN="1"></TD></TR><TR><TD COLSTART="1">LD (nn),SP</TD><TD
88
- COLSTART="2">(nn)
89
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> SP
90
- </TD><TD ALIGN="CENTER" COLSTART="3" ROWSPAN="3">-</TD><TD COLSTART="4">20</TD><TD
91
- COLSTART="9"></TD></TR>
92
- <TR><TD COLSTART="1">LD SP,HL
93
- </TD><TD COLSTART="2">SP
94
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> HL</TD><TD
95
- ALIGN="CENTER" COLSTART="4">8</TD><TD ALIGN="CENTER" COLSTART="9"></TD></TR><TR><TD
96
- COLSTART="1">LD HL,(SP+e)</TD><TD COLSTART="2">HL
97
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> (SP+e)</TD><TD
98
- COLSTART="4">12</TD><TD COLSTART="5">0</TD><TD COLSTART="6">0</TD><TD
99
- COLSTART="7">*</TD><TD COLSTART="8">*</TD><TD COLSTART="9"></TD></TR><TR><TD
100
- COLSTART="1" ROWSPAN="2">PUSH ss</TD><TD COLSTART="2" ROWSPAN="2">
101
- (SP-1) <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> ssh,
102
- (SP-2) <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> ssl, SP<IMG
103
- ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7">SP-2
104
- </TD><TD COLSTART="3" ROWSPAN="2">ss=BC,DE,HL,AF</TD><TD
105
- COLSTART="4" ROWSPAN="2">16</TD><TD COLSTART="5" ROWSPAN="3">-</TD><TD
106
- COLSTART="6" ROWSPAN="3">-</TD><TD COLSTART="7" ROWSPAN="3">-</TD><TD
107
- COLSTART="8" ROWSPAN="3">-</TD><TD COLSTART="9" ROWSPAN="1"></TD></TR><TR><TD
108
- COLSTART="9" ROWSPAN="1"></TD></TR><TR><TD COLSTART="1">POP dd
109
- </TD><TD COLSTART="2">ddl
110
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> (SP), ddh
111
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> (SP+1), SP<IMG
112
- ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7">SP+2
113
- </TD><TD COLSTART="3">dd=BC,DE,HL,AF
114
- </TD><TD COLSTART="4">12</TD><TD COLSTART="9"></TD></TR>
115
-
116
-
117
- </TABLE>
118
- <H3>8-Bit ALU</H3>
119
- <TABLE BORDER="1"><TR><TD COLSTART="1">ADD A,s</TD><TD COLSTART="2">A
120
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> A + s
121
- </TD><TD COLSTART="3" ROWSPAN="8">CY is the carry flag. s=r,n,(HL)</TD><TD
122
- COLSTART="4" ROWSPAN="8">r=4, n=8, (HL)=8</TD><TD COLSTART="5" ROWSPAN="2">*</TD><TD
123
- COLSTART="6" ROWSPAN="2">0</TD><TD COLSTART="7" ROWSPAN="2">*</TD><TD
124
- COLSTART="8" ROWSPAN="2">*</TD>
125
- </TR><TR><TD COLSTART="1">ADC A,s</TD><TD COLSTART="2">A
126
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> A + s + CY
127
- </TD></TR><TR><TD COLSTART="1">SUB s</TD><TD COLSTART="2">A
128
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> A - s
129
- </TD><TD COLSTART="5" ROWSPAN="2">*</TD><TD COLSTART="6" ROWSPAN="2">1</TD><TD
130
- COLSTART="7" ROWSPAN="2">*</TD><TD COLSTART="8" ROWSPAN="2">*</TD>
131
- </TR><TR><TD COLSTART="1">SBC A,s</TD><TD COLSTART="2">A
132
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> A - s - CY
133
- </TD></TR><TR><TD COLSTART="1">AND s</TD><TD COLSTART="2">A
134
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> A
135
- <IMG ALIGN="BOTTOM" SRC="and.gif" WIDTH="8" HEIGHT="8"> s</TD><TD COLSTART="5">*</TD>
136
- <TD COLSTART="6">0</TD><TD COLSTART="7">1</TD><TD COLSTART="8">0</TD></TR><TR>
137
-
138
- <TD COLSTART="1">OR s</TD><TD COLSTART="2">A
139
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> A
140
- <IMG ALIGN="BOTTOM" SRC="or.gif" WIDTH="8" HEIGHT="8"> s
141
- </TD><TD COLSTART="5" ROWSPAN="2">*</TD><TD COLSTART="6" ROWSPAN="2">0</TD><TD
142
- COLSTART="7" ROWSPAN="2">0</TD><TD COLSTART="8" ROWSPAN="2">0</TD></TR><TR><TD
143
- COLSTART="1">XOR s</TD><TD COLSTART="2">A
144
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> A
145
- <IMG ALIGN="BOTTOM" SRC="xor.gif" WIDTH="7" HEIGHT="7"> s
146
- </TD></TR><TR><TD COLSTART="1">CP s</TD><TD COLSTART="2">A - s</TD><TD
147
- COLSTART="5">*</TD><TD COLSTART="6">1</TD><TD COLSTART="7">*</TD><TD
148
- COLSTART="8">*</TD></TR><TR><TD COLSTART="1">INC s</TD><TD COLSTART="2">s
149
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> s + 1
150
- </TD><TD ALIGN="CENTER" COLSTART="3" ROWSPAN="2">s=r,(HL)</TD><TD
151
- ALIGN="CENTER" COLSTART="4" ROWSPAN="2">r=4, (HL)=12</TD><TD
152
- ALIGN="CENTER" COLSTART="5">*</TD><TD ALIGN="CENTER" COLSTART="6">0</TD><TD
153
- ALIGN="CENTER" COLSTART="7">*</TD><TD ALIGN="CENTER" COLSTART="8">-</TD></TR><TR><TD
154
- COLSTART="1">DEC s</TD>
155
- <TD COLSTART="2">s
156
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> s - 1
157
- </TD><TD COLSTART="5">*</TD><TD COLSTART="6">1</TD><TD COLSTART="7">*</TD><TD
158
- ALIGN="CENTER" COLSTART="8">-</TD></TR>
159
-
160
- </TABLE>
161
- <H3>16-Bit Arithmetic</H3>
162
- <TABLE BORDER="1"><TR><TD COLSTART="1">ADD HL,ss</TD><TD COLSTART="2">HL
163
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> HL + ss
164
- </TD><TD COLSTART="3" ROWSPAN="4">ss=BC,DE,HL,SP</TD><TD
165
- ALIGN="CENTER" COLSTART="4">8</TD><TD ALIGN="CENTER" COLSTART="5">-</TD><TD
166
- ALIGN="CENTER" COLSTART="6">0</TD><TD ALIGN="CENTER" COLSTART="7">*</TD><TD
167
- ALIGN="CENTER" COLSTART="8">*</TD></TR><TR><TD COLSTART="1">ADD SP,e</TD><TD
168
- COLSTART="2">SP
169
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> SP + e
170
- </TD><TD COLSTART="4">16</TD><TD COLSTART="5">0</TD><TD COLSTART="6">0</TD><TD
171
- COLSTART="7">*</TD><TD COLSTART="8">*</TD></TR><TR><TD COLSTART="1">INC ss</TD><TD
172
- COLSTART="2">ss
173
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> ss + 1
174
- </TD><TD ALIGN="CENTER" COLSTART="4">8</TD><TD
175
- ALIGN="CENTER" COLSTART="5" ROWSPAN="2">-</TD><TD
176
- ALIGN="CENTER" COLSTART="6" ROWSPAN="2">-</TD><TD
177
- ALIGN="CENTER" COLSTART="7" ROWSPAN="2">-</TD><TD
178
- ALIGN="CENTER" COLSTART="8" ROWSPAN="2">-</TD></TR><TR><TD COLSTART="1">DEC
179
- ss</TD><TD COLSTART="2">ss
180
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> ss - 1
181
- </TD><TD ALIGN="CENTER" COLSTART="4">8</TD></TR>
182
-
183
- </TABLE>
184
- <H3>Miscellaneous</H3>
185
- <TABLE BORDER="1"><TR><TD COLSTART="1">SWAP s</TD><TD COLSTART="2"><IMG
186
- ALIGN="BOTTOM" SRC="swap.gif" WIDTH="70" HEIGHT="37"></TD><TD COLSTART="3">Swap
187
- nibbles. s=r,(HL)</TD><TD COLSTART="4">r=8, (HL)=16</TD><TD COLSTART="5">*</TD><TD
188
- COLSTART="6">0</TD><TD COLSTART="7">0</TD><TD COLSTART="8">0</TD></TR><TR><TD
189
- COLSTART="1">DAA</TD><TD COLSTART="2">Converts A into packed BCD.</TD><TD
190
- ALIGN="CENTER" COLSTART="3" ROWSPAN="2">-</TD><TD ALIGN="CENTER" COLSTART="4">4</TD>
191
- <TD ALIGN="CENTER" COLSTART="5">*</TD><TD ALIGN="CENTER" COLSTART="6">-</TD><TD
192
- ALIGN="CENTER" COLSTART="7">0</TD><TD ALIGN="CENTER" COLSTART="8">*</TD></TR>
193
- <TR><TD COLSTART="1">CPL</TD><TD COLSTART="2">A
194
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> /A</TD><TD
195
- ALIGN="CENTER" COLSTART="4">4</TD><TD ALIGN="CENTER" COLSTART="5">-</TD><TD
196
- ALIGN="CENTER" COLSTART="6">1</TD><TD ALIGN="CENTER" COLSTART="7">1</TD><TD
197
- ALIGN="CENTER" COLSTART="8">-</TD></TR><TR><TD COLSTART="1">CCF</TD><TD
198
- COLSTART="2">
199
- CY <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> /CY
200
- </TD><TD COLSTART="3" ROWSPAN="2">CY is the carry flag.</TD><TD
201
- ALIGN="CENTER" COLSTART="4">4</TD><TD ALIGN="CENTER" COLSTART="5">-</TD><TD
202
- ALIGN="CENTER" COLSTART="6">0</TD><TD ALIGN="CENTER" COLSTART="7">0</TD><TD
203
- ALIGN="CENTER" COLSTART="8">*</TD></TR>
204
- <TR><TD COLSTART="1">SCF</TD><TD COLSTART="2">CY
205
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> 1</TD><TD
206
- ALIGN="CENTER" COLSTART="4">4</TD><TD ALIGN="CENTER" COLSTART="5">-</TD><TD
207
- ALIGN="CENTER" COLSTART="6">0</TD><TD ALIGN="CENTER" COLSTART="7">0</TD><TD
208
- ALIGN="CENTER" COLSTART="8">1</TD></TR><TR><TD COLSTART="1">NOP</TD><TD
209
- COLSTART="2">No operation.</TD><TD ALIGN="CENTER" COLSTART="3" ROWSPAN="5">-</TD><TD
210
- ALIGN="CENTER" COLSTART="4">4</TD><TD ALIGN="CENTER" COLSTART="5" ROWSPAN="5">-</TD>
211
- <TD ALIGN="CENTER" COLSTART="6" ROWSPAN="5">-</TD><TD
212
- ALIGN="CENTER" COLSTART="7" ROWSPAN="5">-</TD><TD
213
- ALIGN="CENTER" COLSTART="8" ROWSPAN="5">-</TD></TR><TR><TD COLSTART="1">HALT</TD><TD
214
- COLSTART="2">Halt CPU until an interrupt occurs.</TD><TD
215
- ALIGN="CENTER" COLSTART="4">4</TD></TR><TR><TD COLSTART="1">STOP
216
- </TD><TD COLSTART="2">Halt CPU.</TD><TD ALIGN="CENTER" COLSTART="4">4</TD></TR><TR
217
- ><TD COLSTART="1">DI</TD><TD COLSTART="2">Disable Interrupts.</TD><TD
218
- ALIGN="CENTER" COLSTART="4">4</TD></TR>
219
- <TR><TD COLSTART="1">EI</TD><TD COLSTART="2">Enable Interrupts.
220
- </TD><TD ALIGN="CENTER" COLSTART="4">4</TD></TR>
221
-
222
- </TABLE>
223
- <H3>Rotates &amp; Shifts</H3>
224
- <TABLE BORDER="1"><TR><TD COLSTART="1">RLCA</TD><TD COLSTART="2"><IMG
225
- SRC="rlc.gif" WIDTH="92" HEIGHT="22"></TD><TD COLSTART="3" ROWSPAN="4"></TD><TD
226
- COLSTART="4" ROWSPAN="4">4</TD><TD COLSTART="5" ROWSPAN="4">0</TD><TD
227
- COLSTART="6" ROWSPAN="4">0</TD><TD COLSTART="7" ROWSPAN="4">0</TD><TD
228
- COLSTART="8" ROWSPAN="4">*</TD></TR><TR><TD COLSTART="1">RLA</TD><TD
229
- COLSTART="2"><IMG ALIGN="BOTTOM" SRC="rl.gif" WIDTH="92" HEIGHT="22"></TD></TR><TR
230
- ><TD COLSTART="1">RRCA</TD><TD COLSTART="2"><IMG
231
- ALIGN="BOTTOM" SRC="rrc.gif" WIDTH="92" HEIGHT="22"></TD></TR><TR><TD
232
- COLSTART="1">RRA</TD><TD COLSTART="2"><IMG
233
- ALIGN="BOTTOM" SRC="rr.gif" WIDTH="92" HEIGHT="22"></TD></TR><TR><TD
234
- COLSTART="1">RLC s</TD><TD COLSTART="2"><IMG
235
- SRC="rlc.gif" WIDTH="92" HEIGHT="22"></TD><TD COLSTART="3" ROWSPAN="4">s=A,r,(HL)</TD>
236
- <TD COLSTART="4" ROWSPAN="4">r=8, (HL)=16</TD><TD COLSTART="5" ROWSPAN="7">*</TD><TD
237
- COLSTART="6" ROWSPAN="7">0</TD><TD COLSTART="7" ROWSPAN="7">0</TD><TD
238
- COLSTART="8" ROWSPAN="7">*</TD>
239
- </TR><TR><TD COLSTART="1">RL s</TD><TD COLSTART="2"><IMG
240
- ALIGN="BOTTOM" SRC="rl.gif" WIDTH="92" HEIGHT="22"></TD></TR><TR><TD
241
- COLSTART="1">RRC s</TD><TD COLSTART="2"><IMG
242
- ALIGN="BOTTOM" SRC="rrc.gif" WIDTH="92" HEIGHT="22"></TD></TR><TR><TD
243
- COLSTART="1">RR s</TD><TD COLSTART="2"><IMG
244
- ALIGN="BOTTOM" SRC="rr.gif" WIDTH="92" HEIGHT="22"></TD></TR><TR><TD
245
- COLSTART="1">SLA s</TD><TD COLSTART="2"><IMG
246
- ALIGN="BOTTOM" SRC="sla.gif" WIDTH="92" HEIGHT="23"></TD><TD
247
- COLSTART="3" ROWSPAN="3">s=r,(HL)</TD><TD COLSTART="4" ROWSPAN="3">r=8,
248
- (HL)=16</TD></TR><TR><TD COLSTART="1">SRA s</TD><TD COLSTART="2"><IMG
249
- ALIGN="BOTTOM" SRC="sra.gif" WIDTH="92" HEIGHT="22"></TD></TR><TR><TD
250
- COLSTART="1">SRL s</TD><TD COLSTART="2"><IMG
251
- ALIGN="BOTTOM" SRC="srl.gif" WIDTH="92" HEIGHT="22"></TD></TR>
252
-
253
-
254
- </TABLE>
255
- <H3>Bit Opcodes</H3>
256
- <TABLE BORDER="1"><TR><TD COLSTART="1">BIT b,s</TD><TD COLSTART="2">Z
257
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> /sb</TD><TD
258
- COLSTART="3" ROWSPAN="3">Z is zero flag. s=r,(HL)</TD><TD COLSTART="4">r=8,
259
- (HL)=12</TD><TD COLSTART="5">*</TD><TD COLSTART="6">0</TD><TD COLSTART="7">1</TD><TD
260
- COLSTART="8">-</TD></TR><TR><TD COLSTART="1">SET b,s</TD><TD COLSTART="2">sb
261
- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> 1</TD><TD
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- COLSTART="4" ROWSPAN="2">r=8, (HL)=16</TD><TD COLSTART="5" ROWSPAN="2">-</TD><TD
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- COLSTART="6" ROWSPAN="2">-</TD><TD COLSTART="7" ROWSPAN="2">-</TD><TD
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- COLSTART="8" ROWSPAN="2">-</TD></TR><TR><TD COLSTART="1">RES b,s</TD><TD
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- COLSTART="2">sb
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> 0</TD>
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- </TR>
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-
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- </TABLE>
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- <H3>Jumps</H3>
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- <TABLE BORDER="1"><TR><TD COLSTART="1">JP nn</TD><TD COLSTART="2">PC
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> nn</TD><TD
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- ALIGN="CENTER" COLSTART="3" ROWSPAN="5">-</TD><TD ALIGN="CENTER" COLSTART="4">16</TD></TR>
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- <TR><TD COLSTART="1">JP cc,nn</TD><TD COLSTART="2">If cc is true, PC
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> nn, else continue.</TD><TD
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- COLSTART="4">If cc is true, 16 else 12.</TD></TR><TR><TD COLSTART="1">JP
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- (HL)</TD><TD COLSTART="2">PC
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> HL</TD><TD
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- ALIGN="CENTER" COLSTART="4">4</TD></TR><TR><TD COLSTART="1">JR e</TD><TD
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- COLSTART="2">PC
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> PC + e
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- </TD><TD ALIGN="CENTER" COLSTART="4">12</TD></TR><TR><TD COLSTART="1">JR cc,e</TD>
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- <TD COLSTART="2">if cc is true, PC
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> PC + e, else
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- continue.</TD><TD COLSTART="4">If cc is true, 12 else 8.</TD></TR>
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-
287
-
288
- </TABLE>
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- <H3>Calls</H3>
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- <TABLE BORDER="1"><TR><TD COLSTART="1">CALL nn</TD><TD COLSTART="2">(SP-1)
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> PCh, (SP-2)
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> PCl, PC
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> nn, SP<IMG
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- ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7">SP-2
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- </TD><TD ALIGN="CENTER" COLSTART="3" ROWSPAN="2">-</TD><TD
296
- ALIGN="CENTER" COLSTART="4">24</TD></TR><TR><TD COLSTART="1">CALL cc,nn</TD><TD
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- COLSTART="2">If condition cc is false continue, else same as CALL nn.</TD><TD
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- COLSTART="4">If cc is true, 24 else 12.</TD></TR>
299
-
300
- </TABLE>
301
- <H3>Restarts</H3>
302
- <TABLE BORDER="1"><TR><TD COLSTART="1">RST f</TD><TD COLSTART="2">(SP-1)
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> PCh, (SP-2)
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> PCl, PCh
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> 0, PCl
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> f, SP<IMG
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- ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7">SP-2
308
- </TD><TD ALIGN="CENTER" COLSTART="3">-
309
- </TD><TD ALIGN="CENTER" COLSTART="4">16</TD></TR>
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-
311
- </TABLE>
312
- <H3>Returns</H3>
313
- <TABLE BORDER="1"><TR><TD COLSTART="1">RET</TD><TD COLSTART="2">pcl
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> (SP), pch
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- <IMG ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7"> (SP+1), SP<IMG
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- ALIGN="BOTTOM" SRC="arrow.gif" WIDTH="15" HEIGHT="7">SP+2
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- </TD><TD ALIGN="CENTER" COLSTART="3" ROWSPAN="3">-</TD><TD
318
- ALIGN="CENTER" COLSTART="4">16</TD></TR><TR><TD COLSTART="1">RET cc</TD><TD
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- COLSTART="2">If cc is true, RET else continue.</TD><TD COLSTART="4">If cc is
320
- true, 20 else 8.</TD></TR><TR><TD COLSTART="1">RETI</TD><TD COLSTART="2">Return
321
- then enable interrupts.</TD><TD ALIGN="CENTER" COLSTART="4">16</TD></TR>
322
-
323
-
324
- </TABLE>
325
- <H3>Terminology</H3>
326
- <TABLE BORDER="1"><TR><TD COLSTART="1">-</TD><TD COLSTART="2">Flag is not
327
- affected by this operation.</TD></TR><TR><TD COLSTART="1">*</TD><TD
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- COLSTART="2">Flag is affected according to result of operation.</TD></TR><TR><TD
329
- COLSTART="1">b</TD><TD COLSTART="2">A bit number in any 8-bit register or
330
- memory location.</TD></TR><TR><TD COLSTART="1">C</TD><TD COLSTART="2">Carry
331
- flag.</TD></TR><TR><TD COLSTART="1">cc
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- </TD><TD COLSTART="2">Flag condition code: C,NC,NZ,Z</TD></TR><TR><TD
333
- COLSTART="1">d</TD><TD COLSTART="2">Any 8-bit destination register or memory
334
- location.</TD></TR><TR><TD COLSTART="1">dd</TD><TD COLSTART="2">Any 16-bit
335
- destination register or memory location.</TD></TR><TR><TD COLSTART="1">e</TD><TD
336
- COLSTART="2">8-bit signed 2's complement displacement.</TD></TR><TR><TD
337
- COLSTART="1">f</TD><TD COLSTART="2">8 special call locations in page zero.
338
- </TD></TR><TR><TD COLSTART="1">H</TD><TD COLSTART="2">Half-carry flag.</TD></TR><TR
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- ><TD COLSTART="1">N</TD><TD COLSTART="2">Subtraction flag.</TD></TR><TR><TD
340
- COLSTART="1">NC</TD><TD COLSTART="2">Not carry flag</TD></TR><TR><TD
341
- COLSTART="1">NZ</TD><TD COLSTART="2">Not zero flag.</TD></TR><TR><TD
342
- COLSTART="1">n</TD><TD COLSTART="2">Any 8-bit binary number.</TD></TR><TR><TD
343
- COLSTART="1">nn</TD><TD COLSTART="2">Any 16-bit binary number.</TD></TR><TR><TD
344
- COLSTART="1">r</TD><TD COLSTART="2">Any 8-bit register. (A,B,C,D,E,H, or L)</TD></TR>
345
- <TR><TD COLSTART="1">s</TD><TD COLSTART="2">Any 8-bit source register or
346
- memory location.</TD></TR><TR><TD COLSTART="1">sb</TD><TD COLSTART="2">A bit
347
- in a specific 8-bit register or memory location.</TD></TR><TR><TD COLSTART="1">ss</TD>
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- <TD COLSTART="2">Any 16-bit source register or memory location.</TD></TR><TR><TD
349
- COLSTART="1">Z</TD><TD COLSTART="2">Zero Flag.</TD></TR>
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- </TABLE></BODY>
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- </HTML>
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- To view these documents, open the file INDEX.HTM
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