ruby_rtl 0.0.1

checksums.yaml

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+SHA256:
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+  data.tar.gz: bc280eced9a72446d0418bcff3c2464e3c96904a4c69e85cd048d662ed74bdd8
+SHA512:
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+  data.tar.gz: 0e88200ee8bdea4380aade2b96fef117617c8de731d139796192c5324bd02f75312e9aed092b984f16b0300bb200b65036f3ba4957a80ff826d4633747f18b97

data/examples/adder.rb

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+require_relative '../lib/ruby_rtl'
+
+include RubyRTL
+
+require_relative 'test_3_full_adder'
+
+class Adder < Circuit
+
+  def initialize nbits
+    input  :a    => nbits
+    input  :b    => nbits
+    output :sum  => nbits
+    output :cout
+
+    # create  components
+    adders=[]
+    for i in 0..nbits-1
+      adders << component("fa_#{i}" => FullAdder)
+    end
+
+    # connect everything
+    for i in 0..nbits-1
+      assign(adders[i].a <= a[i])
+      assign(adders[i].b <= b[i])
+      if i==0
+        #assign(adders[0].cin <= Bit(0)) # no carry in for FA_0
+        assign(adders[0].cin <= 0)       # even better.
+      else
+        assign(adders[i].cin <= adders[i-1].cout)
+      end
+      # final sum
+      assign(sum[i]        <= adders[i].sum)
+    end
+  end
+end
+
+if $PROGRAM_NAME==__FILE__
+  pp adder=Adder.new(8)
+end

data/examples/and.rb

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+require_relative 'ruby_rtl'
+
+include RubyRTL
+
+class And < Circuit
+  def initialize
+    input :a => :bit # optional type for single :bit
+    input  :b         # default is :bit
+    output 'f'        # alternative syntax
+
+    comment("simple assignment")
+
+    assign(f <= a & b)
+
+  end
+end
+
+circuit=And.new
+Compiler.new.compile(circuit)

data/examples/counter.rb

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+require_relative '../lib/ruby_rtl'
+
+include RubyRTL
+
+class Counter < Circuit
+  def initialize
+    input  :do_count
+    output :count => :byte
+
+    sequential(:strange_counting){
+      If(do_count==1){
+        If(count==255){
+          assign(count <= 0)
+        }
+        Elsif(count==42){
+          assign(count <= count + 42)
+        }
+        Else{
+          assign(count <= count + 1)
+        }
+      }
+    }
+  end
+end
+
+circuit=Counter.new
+Compiler.new.compile(circuit)

data/examples/fsm.rb

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+require_relative '../lib/ruby_rtl.rb'
+
+include RubyRTL
+
+class FSM1 < Circuit
+  def initialize
+    input :go,:b
+    output :f => :bv2
+
+    fsm(:simple){
+
+      assign(f <= 0)
+
+      state(:s0){
+        assign(f <= 1)
+        If(go==1){
+          next_state :s1
+        }
+      }
+
+      state(:s1){
+        assign(f <= 2)
+        next_state :s2
+      }
+
+      state(:s2){
+        assign(f <= 3)
+        next_state :s0
+      }
+    }
+  end
+end
+
+circuit=FSM1.new
+
+compiler=Compiler.new
+compiler.compile(circuit)

data/examples/full_adder.rb

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+require_relative '../lib/ruby_rtl'
+
+include RubyRTL
+
+require_relative 'test_2_half_adder'
+
+class FullAdder < Circuit
+  def initialize
+    input  :a,:b,:cin
+    output :sum,:cout
+
+    component :ha1 => HalfAdder     # class...
+    component :ha2 => HalfAdder.new # or ...obj
+
+    assign(ha1.a <= a )
+    assign(ha1.b <= b )
+    assign(ha2.a <= cin)
+    assign(ha2.b <= ha1.sum)
+    assign(sum   <= ha1.sum)
+    assign(cout  <= ha1.cout | ha1.cout)
+
+  end
+end
+
+if $PROGRAM_NAME == __FILE__
+  pp fa=FullAdder.new
+end

data/examples/gcd.rb

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+require_relative '../lib/ruby_rtl'
+
+include RubyRTL
+
+class Gcd < Circuit
+  def initialize
+    input :go
+    output :done
+    input :valid_a,:valid_b
+    input :a => :uint32
+    input :b => :uint32
+    output :f => :uint32
+
+    wire :va => :uint32
+    wire :vb => :uint32
+
+    fsm(:gcd){
+      state(:s0){
+        If(go==1){
+          next_state :s1
+        }
+      }
+      state(:s1){
+        If(valid_a==1){
+          assign(va <= a)
+          next_state :s2
+        }
+      }
+      state(:s2){
+        If(valid_b==1){
+          assign(vb <= b)
+          next_state :s3
+        }
+      }
+      state(:s3){
+        If(va != vb){
+          If(va > vb){
+            assign(va <= va - vb)
+          }
+          Else{
+            assign(vb <= vb - va)
+          }
+        }
+        Else{
+          assign(f <= va)
+          assign(done <= 1)
+          next_state(:s0)
+        }
+      }
+    }
+  end
+end
+
+circuit=Gcd.new
+
+compiler=Compiler.new
+compiler.compile(circuit)

data/examples/half_adder.rb

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+require_relative '../lib/ruby_rtl'
+
+include RubyRTL
+
+class HalfAdder < Circuit
+  def initialize
+    input  :a,:b
+    output :sum
+    output :cout
+
+    assign(sum  <= a ^ b) #xor
+    assign(cout <= a & b) #cout
+
+  end
+end
+
+if $PROGRAM_NAME == __FILE__
+  pp ha=HalfAdder.new
+end

data/lib/ruby_rtl/ast.rb

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+require_relative 'ast_builder'
+# reopen native class
+class Integer
+  def accept(visitor, arg=nil)
+    name = "Integer"
+    visitor.send("visit#{name}".to_sym, self ,arg) # Metaprograming !
+  end
+end
+
+module RubyRTL
+
+  class Circuit < ASTBuilder
+    attr_accessor :has_sequential_statements
+  end
+
+  class Ast
+    attr_accessor :comments
+    def accept(visitor, arg=nil)
+      name = self.class.name.split(/::/)[1]
+      visitor.send("visit#{name}".to_sym, self ,arg) # Metaprograming !
+    end
+  end
+
+  class Root < Ast
+    #attr_accessor :ios,:decls,:body
+    attr_accessor :decls,:body
+    def initialize
+      @ios,@decls,@body=[],[],Body.new
+    end
+  end
+
+  class Comment < Ast
+    attr_accessor :str
+    def initialize str
+      @str=str
+    end
+  end
+
+  # further defined in dsl.rb
+  # attributes :
+  # - type
+  # - subscript_of
+  class Sig < Ast
+  end
+
+  class Port < Sig
+  end
+
+  class Input < Port
+  end
+
+  class Output < Port
+  end
+
+  class TypeDecl < Ast
+    attr_accessor :name,:definition
+    def initialize name,definition
+      @name,@definition=name,definition
+    end
+  end
+
+  class SigDecl < Ast
+    attr_accessor :name,:sig
+    def initialize name,sig
+      @name,@sig=name,sig
+    end
+  end
+
+  class CompDecl < Ast
+    attr_accessor :name,:comp
+    def initialize name,comp
+      @name,@comp=name,comp
+    end
+  end
+
+  class CircuitPart < Ast
+    attr_accessor :label,:body
+    def initialize label,body
+      @label,@body=label,body
+    end
+  end
+
+  class Combinatorial < CircuitPart
+  end
+
+  class Sequential < CircuitPart
+  end
+
+  # === statements ===
+  class Body < Ast
+    include Enumerable
+    attr_accessor :stmts
+    def initialize stmts=[]
+      @stmts=stmts
+    end
+
+    def <<(e)
+      @stmts << e
+      @stmts.flatten!
+    end
+
+    def each &block
+      stmts.each(&block)
+    end
+  end
+
+  class Statement  < Ast
+  end
+
+  class Assign < Statement
+    attr_accessor :lhs,:rhs
+    def initialize lhs,rhs
+      @lhs,@rhs=lhs,rhs
+    end
+  end
+
+  class If < Statement
+    attr_accessor :cond,:body
+    attr_accessor :elsifs # feeded by ContextualAnalyzer
+    attr_accessor :else   # idem
+    def initialize cond, body=nil
+      @cond=cond
+      @body=body
+      @elsifs=[]
+    end
+  end
+
+  class Else < Statement
+    attr_accessor :body
+    def initialize body=nil
+      @body=body
+    end
+  end
+
+  class Elsif < Statement
+    attr_accessor :cond,:body
+    def initialize cond, body=nil
+      @cond,@body=cond,body
+    end
+  end
+
+  # === FSM ===
+  class Fsm < Ast
+    attr_accessor :name,:body
+    attr_accessor :states # hash
+    attr_accessor :default_assigns
+    attr_accessor :assignments
+    def initialize name,body=nil
+      @name,@body=name,body
+      @default_assigns=[] # external to states structures
+      @assignments=[] # to generate VHDL
+    end
+  end
+
+  class State < Ast
+    attr_accessor :name,:body
+    def initialize name,body=nil
+      @name,@body=name,body
+    end
+  end
+
+  class Next < Ast
+    attr_accessor :name
+    def initialize name
+      @name=name
+    end
+  end
+  # case / switch
+  class Case < Ast
+    attr_accessor :cond,:body
+    def initialize condition,body=nil
+      @cond,@body=condition,body
+    end
+  end
+
+  class When < Ast
+    attr_accessor :value,:body
+    def initialize value,body
+      @value,@body=value,body
+    end
+  end
+  # === expressions ===
+  class Expr < Ast
+    attr_accessor :type
+  end
+
+  class Binary < Expr
+    attr_accessor :lhs,:op,:rhs
+    def initialize lhs,op,rhs
+      @lhs,@op,@rhs=lhs,op,rhs
+    end
+  end
+
+  class Unary < Expr
+  end
+
+  # func call
+  class FuncCall < Expr
+    attr_accessor :name,:args
+    def initialize name,args=[]
+      @name,@args=name,args
+    end
+  end
+
+
+  # ====== literals ===
+  class Literal < Ast
+    attr_accessor :val
+    attr_accessor :type
+
+    def initialize val,type=nil
+      @val,@type=val,type
+    end
+  end
+
+  class BitLit < Literal
+  end
+
+  class IntLit < Literal
+    def initialize val
+      val=val==0 ? 1 : val
+      bitwidth=Math.log2(val).floor+1
+      super(val,IntType.new)
+    end
+
+    def +(other)
+      ret=Binary.new(self,"+",other)
+      ret.type=@type
+      ret
+    end
+  end
+
+  class UIntLit < Literal
+    def initialize val
+      val=val==0 ? 1 : val
+      bitwidth=Math.log2(val).floor+1
+      super(val,UIntType.new(bitwidth))
+    end
+
+    def +(other)
+      ret=Binary.new(self,"+",other)
+      ret.type=@type
+      ret
+    end
+  end
+
+  class RIntLit < Literal
+    def initialize val
+      val=val==0 ? 1 : val
+      bitwidth=Math.log2(val).floor + 1
+      super(val,RIntType.new(bitwidth))
+    end
+  end
+
+  class RUIntLit < Literal
+    def initialize val
+      val=val==0 ? 1 : val
+      nbits=Math.log2(val).floor + 1
+      super(val,RUIntType.new(nbits))
+    end
+  end
+
+  # ====== types ======
+  class Type < Ast
+  end
+
+  class BitType < Type
+    def to_s
+      "bit"
+    end
+  end
+
+  class BitVectorType < Type
+    attr_accessor :bitwidth
+    def initialize bitwidth
+      @bitwidth=bitwidth
+    end
+    def to_s
+      "bv#{bitwidth}"
+    end
+  end
+
+  class RType < Type
+    attr_accessor :bitwidth
+    def initialize bitwidth
+      @bitwidth=bitwidth
+    end
+  end
+
+  class RIntType < RType # Ruby Int !
+    def to_s
+      "rint#{bitwidth}"
+    end
+  end
+
+  class RUIntType < RType # Ruby Int !
+    def to_s
+      "ruint#{bitwidth}"
+    end
+  end
+
+  class IntType < Type
+    attr_accessor :bitwidth
+    def initialize nbits=32
+      @bitwidth=nbits
+    end
+
+    def to_s
+      "int#{bitwidth}"
+    end
+  end
+
+  class UIntType < Type
+    attr_accessor :bitwidth
+    def initialize nbits
+      @bitwidth=nbits
+    end
+
+    def to_s
+      "uint#{bitwidth}"
+    end
+  end
+
+  class EnumType < Type
+    attr_accessor :items
+    def initialize items
+      @items=items
+    end
+  end
+
+  class RecordType < Type
+    attr_accessor :hash
+    def initialize h
+      @hash=h
+    end
+
+    def to_s
+      if (values=$typedefs.values).include?(self)
+        idx=values.index(self)
+        name=$typedefs.keys[idx]
+        "§#{name}"
+      end
+    end
+  end
+
+  class MemoryType < Type
+    attr_accessor :size,:type
+    def initialize size,type
+      @size,@type=size,type
+    end
+  end
+
+end