ruby-vpi 18.0.1 → 18.0.2

Sign up to get free protection for your applications and to get access to all the features.
Files changed (56) hide show
  1. data/doc/history.html +64 -41
  2. data/doc/history.inc +7 -1
  3. data/doc/history.yaml +14 -0
  4. data/doc/manual.html +129 -129
  5. data/doc/memo.html +4 -4
  6. data/doc/readme.html +11 -11
  7. data/doc/rss.erb +1 -2
  8. data/doc/rss.xml +7 -252
  9. data/lib/ruby-vpi/runner_boot_loader.rb +1 -1
  10. data/ref/c/annotated.html +1 -1
  11. data/ref/c/common_8h.html +1 -1
  12. data/ref/c/files.html +1 -1
  13. data/ref/c/functions.html +1 -1
  14. data/ref/c/functions_vars.html +1 -1
  15. data/ref/c/globals.html +1 -1
  16. data/ref/c/globals_0x63.html +1 -1
  17. data/ref/c/globals_0x65.html +1 -1
  18. data/ref/c/globals_0x66.html +1 -1
  19. data/ref/c/globals_0x6d.html +1 -1
  20. data/ref/c/globals_0x70.html +1 -1
  21. data/ref/c/globals_0x72.html +1 -1
  22. data/ref/c/globals_0x73.html +1 -1
  23. data/ref/c/globals_0x74.html +1 -1
  24. data/ref/c/globals_0x76.html +1 -1
  25. data/ref/c/globals_0x78.html +1 -1
  26. data/ref/c/globals_defs.html +1 -1
  27. data/ref/c/globals_defs_0x65.html +1 -1
  28. data/ref/c/globals_defs_0x70.html +1 -1
  29. data/ref/c/globals_defs_0x76.html +1 -1
  30. data/ref/c/globals_defs_0x78.html +1 -1
  31. data/ref/c/globals_enum.html +1 -1
  32. data/ref/c/globals_eval.html +1 -1
  33. data/ref/c/globals_func.html +1 -1
  34. data/ref/c/globals_type.html +1 -1
  35. data/ref/c/globals_vars.html +1 -1
  36. data/ref/c/index.html +1 -1
  37. data/ref/c/main_8c.html +1 -1
  38. data/ref/c/main_8h.html +1 -1
  39. data/ref/c/relay_8c.html +1 -1
  40. data/ref/c/relay_8h.html +1 -1
  41. data/ref/c/structt__cb__data.html +1 -1
  42. data/ref/c/structt__vpi__delay.html +1 -1
  43. data/ref/c/structt__vpi__error__info.html +1 -1
  44. data/ref/c/structt__vpi__strengthval.html +1 -1
  45. data/ref/c/structt__vpi__systf__data.html +1 -1
  46. data/ref/c/structt__vpi__time.html +1 -1
  47. data/ref/c/structt__vpi__value.html +1 -1
  48. data/ref/c/structt__vpi__vecval.html +1 -1
  49. data/ref/c/structt__vpi__vlog__info.html +1 -1
  50. data/ref/c/verilog_8h.html +1 -1
  51. data/ref/c/vlog_8c.html +1 -1
  52. data/ref/c/vlog_8h.html +1 -1
  53. data/ref/c/vpi__user_8h.html +1 -1
  54. data/ref/ruby/created.rid +1 -1
  55. data/ref/ruby/files/lib/ruby-vpi/runner_boot_loader_rb.html +1 -1
  56. metadata +2 -2
data/doc/manual.html CHANGED
@@ -5,7 +5,7 @@
5
5
  <link rel="stylesheet" type="text/css" href="common.css" media="screen" />
6
6
  <link rel="stylesheet" type="text/css" href="print.css" media="print" />
7
7
  <link rel="alternate" type="application/rss+xml" href="http://ruby-vpi.rubyforge.org/doc/rss.xml" title="RSS feed for this project." />
8
- <title>Ruby-VPI 18.0.1 user manual</title>
8
+ <title>Ruby-VPI 18.0.2 user manual</title>
9
9
  </head>
10
10
  <body>
11
11
  <div id="site-links">
@@ -23,13 +23,13 @@
23
23
  <div id="body">
24
24
  <hr style="display: none"/>
25
25
 
26
- <div id="Ruby-VPI_18.0.1_user_manual" class="front_cover">
27
- <h1 class="title"><big>Ruby-VPI 18.0.1 user manual</big></h1>
26
+ <div id="Ruby-VPI_18.0.2_user_manual" class="front_cover">
27
+ <h1 class="title"><big>Ruby-VPI 18.0.2 user manual</big></h1>
28
28
 
29
29
  <h2 class="author">Suraj N. Kurapati</h2>
30
30
 
31
31
 
32
- <h3 class="date">02 August 2007</h3>
32
+ <h3 class="date">03 August 2007</h3>
33
33
 
34
34
 
35
35
  <p>
@@ -64,7 +64,7 @@
64
64
 
65
65
  <div id="intro" class="chapter">
66
66
  <h1 class="title">
67
- Chapter <a href="#a-606978988">2</a>
67
+ Chapter <a href="#a-607321098">2</a>
68
68
 
69
69
  <br/><br/>
70
70
 
@@ -90,7 +90,7 @@
90
90
 
91
91
  <div id="resources" class="section">
92
92
  <h2 class="title">
93
- <a href="#a-606913148">2.1</a>
93
+ <a href="#a-607255258">2.1</a>
94
94
 
95
95
  &nbsp;
96
96
 
@@ -101,8 +101,8 @@
101
101
  <div id="Records" class="paragraph">
102
102
  <p class="title">Records</p>
103
103
  <ul>
104
- <li><a href="history.html#a18.0.1">What&#8217;s new</a>
105
- &#8211; release notes for version 18.0.1.
104
+ <li><a href="history.html#a18.0.2">What&#8217;s new</a>
105
+ &#8211; release notes for version 18.0.2.
106
106
  <ul>
107
107
  <li><a href="history.html">History</a>
108
108
  &#8211; a record of all release notes.</li>
@@ -170,7 +170,7 @@
170
170
 
171
171
  <div id="intro.features" class="section">
172
172
  <h2 class="title">
173
- <a href="#a-606925458">2.2</a>
173
+ <a href="#a-607267568">2.2</a>
174
174
 
175
175
  &nbsp;
176
176
 
@@ -241,7 +241,7 @@
241
241
 
242
242
  <div id="intro.reqs" class="section">
243
243
  <h2 class="title">
244
- <a href="#a-606937688">2.3</a>
244
+ <a href="#a-607279798">2.3</a>
245
245
 
246
246
  &nbsp;
247
247
 
@@ -339,7 +339,7 @@
339
339
 
340
340
  <div id="intro.applications" class="section">
341
341
  <h2 class="title">
342
- <a href="#a-606940248">2.4</a>
342
+ <a href="#a-607282358">2.4</a>
343
343
 
344
344
  &nbsp;
345
345
 
@@ -385,7 +385,7 @@
385
385
 
386
386
  <div id="intro.appetizers" class="section">
387
387
  <h2 class="title">
388
- <a href="#a-606942848">2.5</a>
388
+ <a href="#a-607284958">2.5</a>
389
389
 
390
390
  &nbsp;
391
391
 
@@ -453,7 +453,7 @@
453
453
 
454
454
  <div id="intro.license" class="section">
455
455
  <h2 class="title">
456
- <a href="#a-606945718">2.6</a>
456
+ <a href="#a-607287828">2.6</a>
457
457
 
458
458
  &nbsp;
459
459
 
@@ -499,7 +499,7 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
499
499
 
500
500
  <div id="intro.related-works" class="section">
501
501
  <h2 class="title">
502
- <a href="#a-606951108">2.7</a>
502
+ <a href="#a-607293218">2.7</a>
503
503
 
504
504
  &nbsp;
505
505
 
@@ -520,7 +520,7 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
520
520
 
521
521
  <div id="intro.related-works.pli" class="section">
522
522
  <h3 class="title">
523
- <a href="#a-606948168">2.7.1</a>
523
+ <a href="#a-607290278">2.7.1</a>
524
524
 
525
525
  &nbsp;
526
526
 
@@ -547,7 +547,7 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
547
547
 
548
548
  <div id="setup" class="chapter">
549
549
  <h1 class="title">
550
- Chapter <a href="#a-607019648">3</a>
550
+ Chapter <a href="#a-607361758">3</a>
551
551
 
552
552
  <br/><br/>
553
553
 
@@ -559,7 +559,7 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
559
559
 
560
560
  <div id="setup.manifest" class="section">
561
561
  <h2 class="title">
562
- <a href="#a-606982178">3.1</a>
562
+ <a href="#a-607324288">3.1</a>
563
563
 
564
564
  &nbsp;
565
565
 
@@ -585,7 +585,7 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
585
585
 
586
586
  <div id="setup.reqs" class="section">
587
587
  <h2 class="title">
588
- <a href="#a-606987618">3.2</a>
588
+ <a href="#a-607329728">3.2</a>
589
589
 
590
590
  &nbsp;
591
591
 
@@ -602,7 +602,7 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
602
602
  <div class="tip" id="Add_support_for_your_Verilog_simulator">
603
603
  <img src="images/tango/tip.png" alt="tip" class="icon"/>
604
604
 
605
- <p class="title"><a href="#a-606984648">Tip 1</a>. &nbsp; Add support for your Verilog simulator</p>
605
+ <p class="title"><a href="#a-607326758">Tip 1</a>. &nbsp; Add support for your Verilog simulator</p>
606
606
 
607
607
  Write a <a href="http://rubyforge.org/tracker/?group_id=1339">support request</a> for your simulator, while providing a sample transcript of the commands you use to run a test with your simulator, and I will add support for your simulator in the next release!
608
608
  </div>
@@ -616,7 +616,7 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
616
616
 
617
617
  <div id="setup.recom" class="section">
618
618
  <h2 class="title">
619
- <a href="#a-606993788">3.3</a>
619
+ <a href="#a-607335898">3.3</a>
620
620
 
621
621
  &nbsp;
622
622
 
@@ -631,7 +631,7 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
631
631
 
632
632
  <div id="setup.recom.merger" class="section">
633
633
  <h3 class="title">
634
- <a href="#a-606990448">3.3.1</a>
634
+ <a href="#a-607332558">3.3.1</a>
635
635
 
636
636
  &nbsp;
637
637
 
@@ -675,7 +675,7 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
675
675
 
676
676
  <div id="setup.inst" class="section">
677
677
  <h2 class="title">
678
- <a href="#a-607002928">3.4</a>
678
+ <a href="#a-607345038">3.4</a>
679
679
 
680
680
  &nbsp;
681
681
 
@@ -701,7 +701,7 @@ $ ls -d `gem env gemdir`/gems/ruby-vpi*
701
701
  <div class="tip" id="Tuning_for_maximum_performance">
702
702
  <img src="images/tango/tip.png" alt="tip" class="icon"/>
703
703
 
704
- <p class="title"><a href="#a-606996338">Tip 2</a>. &nbsp; Tuning for maximum performance</p>
704
+ <p class="title"><a href="#a-607338448">Tip 2</a>. &nbsp; Tuning for maximum performance</p>
705
705
 
706
706
  You can tune your installation of Ruby-VPI for maximum performance by adding your C compiler&#8217;s optimization flag to the <code class="code"><span style="color:#036; font-weight:bold">CFLAGS</span></code> environment variable <em>before</em> you run the <pre>gem install -y ruby-vpi</pre> command. For example, if your C compiler is GCC, then you can set <code class="code"><span style="color:#036; font-weight:bold">CFLAGS</span></code> to <tt>-O9</tt> for maximum optimization.
707
707
  </div>
@@ -712,7 +712,7 @@ $ ls -d `gem env gemdir`/gems/ruby-vpi*
712
712
 
713
713
  <div id="setup.inst.windows" class="section">
714
714
  <h3 class="title">
715
- <a href="#a-606998868">3.4.1</a>
715
+ <a href="#a-607340978">3.4.1</a>
716
716
 
717
717
  &nbsp;
718
718
 
@@ -763,7 +763,7 @@ $ ls -d `gem env gemdir`/gems/ruby-vpi*
763
763
 
764
764
  <div id="setup.maintenance" class="section">
765
765
  <h2 class="title">
766
- <a href="#a-607005208">3.5</a>
766
+ <a href="#a-607347318">3.5</a>
767
767
 
768
768
  &nbsp;
769
769
 
@@ -787,7 +787,7 @@ $ ls -d `gem env gemdir`/gems/ruby-vpi*
787
787
 
788
788
  <div id="organization" class="chapter">
789
789
  <h1 class="title">
790
- Chapter <a href="#a-607025428">4</a>
790
+ Chapter <a href="#a-607368998">4</a>
791
791
 
792
792
  <br/><br/>
793
793
 
@@ -807,7 +807,7 @@ $ ls -d `gem env gemdir`/gems/ruby-vpi*
807
807
  <div class="figure" id="fig:organization.detail">
808
808
 
809
809
 
810
- <p class="title"><a href="#a-607022248">Figure 1</a>. &nbsp; Where does Ruby-VPI fit in?</p>
810
+ <p class="title"><a href="#a-607364358">Figure 1</a>. &nbsp; Where does Ruby-VPI fit in?</p>
811
811
 
812
812
  <img src="figures/organization_detailed.png" alt="" />
813
813
  </div>
@@ -821,7 +821,7 @@ As <a href="#fig:organization.detail">Figure 1</a> shows, Ruby-VPI is composed o
821
821
 
822
822
  <div id="overview.relay" class="section">
823
823
  <h2 class="title">
824
- <a href="#a-607028538">4.1</a>
824
+ <a href="#a-607370648">4.1</a>
825
825
 
826
826
  &nbsp;
827
827
 
@@ -844,7 +844,7 @@ As <a href="#fig:organization.detail">Figure 1</a> shows, Ruby-VPI is composed o
844
844
  <div class="figure" id="fig:ruby_relay">
845
845
 
846
846
 
847
- <p class="title"><a href="#a-607025058">Figure 2</a>. &nbsp; Interaction between Ruby and Verilog</p>
847
+ <p class="title"><a href="#a-607367168">Figure 2</a>. &nbsp; Interaction between Ruby and Verilog</p>
848
848
 
849
849
  <img src="figures/ruby_relay.png" alt="" />
850
850
 
@@ -870,7 +870,7 @@ Another means of transferring control from the specification to the Verilog simu
870
870
 
871
871
  <div id="organization.tests" class="section">
872
872
  <h2 class="title">
873
- <a href="#a-607034108">4.2</a>
873
+ <a href="#a-607376218">4.2</a>
874
874
 
875
875
  &nbsp;
876
876
 
@@ -887,7 +887,7 @@ Another means of transferring control from the specification to the Verilog simu
887
887
  <div class="figure" id="fig:organization">
888
888
 
889
889
 
890
- <p class="title"><a href="#a-607031008">Figure 3</a>. &nbsp; Organization of a test in Ruby-VPI</p>
890
+ <p class="title"><a href="#a-607373118">Figure 3</a>. &nbsp; Organization of a test in Ruby-VPI</p>
891
891
 
892
892
  <img src="figures/organization.png" alt="" />
893
893
  </div>
@@ -910,7 +910,7 @@ Another means of transferring control from the specification to the Verilog simu
910
910
 
911
911
  <div id="VPI_in_Ruby" class="section">
912
912
  <h2 class="title">
913
- <a href="#a-606948098">4.3</a>
913
+ <a href="#a-607291858">4.3</a>
914
914
 
915
915
  &nbsp;
916
916
 
@@ -922,7 +922,7 @@ Another means of transferring control from the specification to the Verilog simu
922
922
 
923
923
  <div id="Deviations_from_the_VPI_standard" class="section">
924
924
  <h3 class="title">
925
- <a href="#a-607043028">4.3.1</a>
925
+ <a href="#a-607385138">4.3.1</a>
926
926
 
927
927
  &nbsp;
928
928
 
@@ -937,7 +937,7 @@ Another means of transferring control from the specification to the Verilog simu
937
937
 
938
938
  <div id="Names_are_capitalized" class="section">
939
939
  <h4 class="title">
940
- <a href="#a-607036598">4.3.1.1</a>
940
+ <a href="#a-607378708">4.3.1.1</a>
941
941
 
942
942
  &nbsp;
943
943
 
@@ -958,7 +958,7 @@ Another means of transferring control from the specification to the Verilog simu
958
958
 
959
959
  <div id="a_vprintf__is__printf_" class="section">
960
960
  <h4 class="title">
961
- <a href="#a-607039098">4.3.1.2</a>
961
+ <a href="#a-607381208">4.3.1.2</a>
962
962
 
963
963
  &nbsp;
964
964
 
@@ -995,7 +995,7 @@ Another means of transferring control from the specification to the Verilog simu
995
995
 
996
996
  <div id="vpi.handles" class="section">
997
997
  <h3 class="title">
998
- <a href="#a-607068568">4.3.2</a>
998
+ <a href="#a-607236168">4.3.2</a>
999
999
 
1000
1000
  &nbsp;
1001
1001
 
@@ -1024,7 +1024,7 @@ Another means of transferring control from the specification to the Verilog simu
1024
1024
 
1025
1025
  <div id="Accessing_a_handle_s_relatives" class="section">
1026
1026
  <h4 class="title">
1027
- <a href="#a-607048248">4.3.2.2</a>
1027
+ <a href="#a-607390358">4.3.2.2</a>
1028
1028
 
1029
1029
  &nbsp;
1030
1030
 
@@ -1061,7 +1061,7 @@ baz = vpi_handle_by_name( <span style="background-color:#fff0f0"><span style="co
1061
1061
 
1062
1062
  <div id="Accessing_a_handle_s_properties" class="section">
1063
1063
  <h4 class="title">
1064
- <a href="#a-607051188">4.3.2.3</a>
1064
+ <a href="#a-607393298">4.3.2.3</a>
1065
1065
 
1066
1066
  &nbsp;
1067
1067
 
@@ -1104,7 +1104,7 @@ result = wrapper.value.str.to_i( <span style="color:#00D; font-weight:bold">16</
1104
1104
  <div class="figure" id="fig:method_naming_format">
1105
1105
 
1106
1106
 
1107
- <p class="title"><a href="#a-607053988">Figure 4</a>. &nbsp; Method naming format for accessing a handle&#8217;s properties</p>
1107
+ <p class="title"><a href="#a-607396098">Figure 4</a>. &nbsp; Method naming format for accessing a handle&#8217;s properties</p>
1108
1108
 
1109
1109
  <table>
1110
1110
  <tr>
@@ -1157,7 +1157,7 @@ result = wrapper.value.str.to_i( <span style="color:#00D; font-weight:bold">16</
1157
1157
  <div class="table" id="tbl:accessors">
1158
1158
 
1159
1159
 
1160
- <p class="title"><a href="#a-607056418">Table 1</a>. &nbsp; Possible accessors and their implications</p>
1160
+ <p class="title"><a href="#a-607398528">Table 1</a>. &nbsp; Possible accessors and their implications</p>
1161
1161
 
1162
1162
  <table>
1163
1163
  <tr>
@@ -1211,7 +1211,7 @@ result = wrapper.value.str.to_i( <span style="color:#00D; font-weight:bold">16</
1211
1211
  <div class="table" id="ex:properties">
1212
1212
 
1213
1213
 
1214
- <p class="title"><a href="#a-607059358">Table 2</a>. &nbsp; Examples of accessing a handle&#8217;s properties</p>
1214
+ <p class="title"><a href="#a-607223948">Table 2</a>. &nbsp; Examples of accessing a handle&#8217;s properties</p>
1215
1215
 
1216
1216
  <table>
1217
1217
  <tr>
@@ -1536,7 +1536,7 @@ result = wrapper.value.str.to_i( <span style="color:#00D; font-weight:bold">16</
1536
1536
 
1537
1537
  <div id="vpi.callbacks" class="section">
1538
1538
  <h3 class="title">
1539
- <a href="#a-607076998">4.3.3</a>
1539
+ <a href="#a-607249768">4.3.3</a>
1540
1540
 
1541
1541
  &nbsp;
1542
1542
 
@@ -1556,7 +1556,7 @@ result = wrapper.value.str.to_i( <span style="color:#00D; font-weight:bold">16</
1556
1556
  <div class="example" id="ex:callback">
1557
1557
 
1558
1558
 
1559
- <p class="title"><a href="#a-607072518">Example 1</a>. &nbsp; Using a callback for value change notification</p>
1559
+ <p class="title"><a href="#a-607242918">Example 1</a>. &nbsp; Using a callback for value change notification</p>
1560
1560
 
1561
1561
  <p>This example shows how to use a callback for notification of changes in a handle&#8217;s <code class="code"><span style="color:#036; font-weight:bold">VpiIntVal</span></code> property. When you no longer need this callback, you can tear it down using <code class="code">vpi_remove_cb(cb_handle)</code>.</p>
1562
1562
 
@@ -1605,7 +1605,7 @@ cbHandle = vpi_register_cb(cbData) <span style="color:#080; font-weight:bold">do
1605
1605
 
1606
1606
  <div id="usage" class="chapter">
1607
1607
  <h1 class="title">
1608
- Chapter <a href="#a-607149688">5</a>
1608
+ Chapter <a href="#a-607488938">5</a>
1609
1609
 
1610
1610
  <br/><br/>
1611
1611
 
@@ -1617,7 +1617,7 @@ cbHandle = vpi_register_cb(cbData) <span style="color:#080; font-weight:bold">do
1617
1617
 
1618
1618
  <div id="usage.prototyping" class="section">
1619
1619
  <h2 class="title">
1620
- <a href="#a-607049328">5.1</a>
1620
+ <a href="#a-607395418">5.1</a>
1621
1621
 
1622
1622
  &nbsp;
1623
1623
 
@@ -1659,7 +1659,7 @@ cbHandle = vpi_register_cb(cbData) <span style="color:#080; font-weight:bold">do
1659
1659
 
1660
1660
  <div id="How_does_prototyping_work_" class="section">
1661
1661
  <h3 class="title">
1662
- <a href="#a-607039268">5.1.2</a>
1662
+ <a href="#a-607383008">5.1.2</a>
1663
1663
 
1664
1664
  &nbsp;
1665
1665
 
@@ -1681,7 +1681,7 @@ cbHandle = vpi_register_cb(cbData) <span style="color:#080; font-weight:bold">do
1681
1681
 
1682
1682
  <div id="usage.debugger" class="section">
1683
1683
  <h2 class="title">
1684
- <a href="#a-607058778">5.2</a>
1684
+ <a href="#a-607403488">5.2</a>
1685
1685
 
1686
1686
  &nbsp;
1687
1687
 
@@ -1702,7 +1702,7 @@ cbHandle = vpi_register_cb(cbData) <span style="color:#080; font-weight:bold">do
1702
1702
 
1703
1703
  <div id="usage.debugger.init" class="section">
1704
1704
  <h3 class="title">
1705
- <a href="#a-607053478">5.2.1</a>
1705
+ <a href="#a-607400418">5.2.1</a>
1706
1706
 
1707
1707
  &nbsp;
1708
1708
 
@@ -1727,7 +1727,7 @@ cbHandle = vpi_register_cb(cbData) <span style="color:#080; font-weight:bold">do
1727
1727
 
1728
1728
  <div id="usage.test-runner" class="section">
1729
1729
  <h2 class="title">
1730
- <a href="#a-607082308">5.3</a>
1730
+ <a href="#a-607420258">5.3</a>
1731
1731
 
1732
1732
  &nbsp;
1733
1733
 
@@ -1757,7 +1757,7 @@ rake vsim # Simulate with Mentor Modelsim.
1757
1757
 
1758
1758
  <div id="usage.test-runner.env-vars" class="section">
1759
1759
  <h3 class="title">
1760
- <a href="#a-607072228">5.3.1</a>
1760
+ <a href="#a-607413148">5.3.1</a>
1761
1761
 
1762
1762
  &nbsp;
1763
1763
 
@@ -1804,7 +1804,7 @@ rake
1804
1804
  <div class="example" id="Running_a_test_with_environment_variables">
1805
1805
 
1806
1806
 
1807
- <p class="title"><a href="#a-607065588">Example 2</a>. &nbsp; Running a test with environment variables</p>
1807
+ <p class="title"><a href="#a-607408978">Example 2</a>. &nbsp; Running a test with environment variables</p>
1808
1808
 
1809
1809
  <p>Below, we enable the prototype and code coverage analysis:
1810
1810
  <pre>rake -f your_test_runner.rake PROTOTYPE=1 COVERAGE=1</pre></p>
@@ -1828,7 +1828,7 @@ rake
1828
1828
 
1829
1829
  <div id="usage.tools" class="section">
1830
1830
  <h2 class="title">
1831
- <a href="#a-607101458">5.4</a>
1831
+ <a href="#a-607439408">5.4</a>
1832
1832
 
1833
1833
  &nbsp;
1834
1834
 
@@ -1864,7 +1864,7 @@ Simulators:
1864
1864
 
1865
1865
  <div id="usage.tools.generate" class="section">
1866
1866
  <h3 class="title">
1867
- <a href="#a-607091638">5.4.1</a>
1867
+ <a href="#a-607429588">5.4.1</a>
1868
1868
 
1869
1869
  &nbsp;
1870
1870
 
@@ -1894,7 +1894,7 @@ A Ruby-VPI test is composed of the following files:
1894
1894
  <div class="caution" id="Do_not_rename_generated_files">
1895
1895
  <img src="images/tango/caution.png" alt="caution" class="icon"/>
1896
1896
 
1897
- <p class="title"><a href="#a-607085068">Caution 1</a>. &nbsp; Do not rename generated files</p>
1897
+ <p class="title"><a href="#a-607423018">Caution 1</a>. &nbsp; Do not rename generated files</p>
1898
1898
 
1899
1899
  Ruby-VPI uses the convention described above to dynamically create a direct Ruby interface to the design under test, so <em>do not</em> rename the generated files arbitrarily.
1900
1900
  </div>
@@ -1913,7 +1913,7 @@ By producing multiple files, the automated test generator physically decouples t
1913
1913
  <div class="tip" id="Using__kdiff3__with_the_automated_test_generator.">
1914
1914
  <img src="images/tango/tip.png" alt="tip" class="icon"/>
1915
1915
 
1916
- <p class="title"><a href="#a-607087558">Tip 3</a>. &nbsp; Using <strong>kdiff3</strong> with the automated test generator.</p>
1916
+ <p class="title"><a href="#a-607425508">Tip 3</a>. &nbsp; Using <strong>kdiff3</strong> with the automated test generator.</p>
1917
1917
 
1918
1918
  <ol>
1919
1919
  <li>Create a file named <tt>merge2</tt> with the following content: <pre class="code">
@@ -1939,7 +1939,7 @@ kdiff3 --auto --output <span style="background-color:#fff0f0"><span style="color
1939
1939
 
1940
1940
  <div id="usage.tools.convert" class="section">
1941
1941
  <h3 class="title">
1942
- <a href="#a-607093928">5.4.2</a>
1942
+ <a href="#a-607431878">5.4.2</a>
1943
1943
 
1944
1944
  &nbsp;
1945
1945
 
@@ -1961,7 +1961,7 @@ kdiff3 --auto --output <span style="background-color:#fff0f0"><span style="color
1961
1961
 
1962
1962
  <div id="usage.examples" class="section">
1963
1963
  <h2 class="title">
1964
- <a href="#a-607103698">5.5</a>
1964
+ <a href="#a-607441648">5.5</a>
1965
1965
 
1966
1966
  &nbsp;
1967
1967
 
@@ -1977,7 +1977,7 @@ kdiff3 --auto --output <span style="background-color:#fff0f0"><span style="color
1977
1977
 
1978
1978
  <div id="usage.tutorial" class="section">
1979
1979
  <h2 class="title">
1980
- <a href="#a-606970248">5.6</a>
1980
+ <a href="#a-607314468">5.6</a>
1981
1981
 
1982
1982
  &nbsp;
1983
1983
 
@@ -2000,7 +2000,7 @@ kdiff3 --auto --output <span style="background-color:#fff0f0"><span style="color
2000
2000
 
2001
2001
  <div id="usage.tutorial.declare-design" class="section">
2002
2002
  <h3 class="title">
2003
- <a href="#a-607111108">5.6.1</a>
2003
+ <a href="#a-607449058">5.6.1</a>
2004
2004
 
2005
2005
  &nbsp;
2006
2006
 
@@ -2025,7 +2025,7 @@ kdiff3 --auto --output <span style="background-color:#fff0f0"><span style="color
2025
2025
  <div class="example" id="fig:counter.v_decl">
2026
2026
 
2027
2027
 
2028
- <p class="title"><a href="#a-607107598">Example 3</a>. &nbsp; Declaration of a simple up-counter with synchronous reset</p>
2028
+ <p class="title"><a href="#a-607445548">Example 3</a>. &nbsp; Declaration of a simple up-counter with synchronous reset</p>
2029
2029
 
2030
2030
  <pre class="code" lang="verilog">
2031
2031
  module counter #(parameter Size = 5) (
@@ -2049,7 +2049,7 @@ Before we continue, save the source code shown in <a href="#fig:counter.v_decl">
2049
2049
 
2050
2050
  <div id="usage.tutorial.generate-test" class="section">
2051
2051
  <h3 class="title">
2052
- <a href="#a-607121708">5.6.2</a>
2052
+ <a href="#a-607459658">5.6.2</a>
2053
2053
 
2054
2054
  &nbsp;
2055
2055
 
@@ -2085,7 +2085,7 @@ $ cp counter.v xUnit
2085
2085
  <div class="example" id="fig:generate-test.RSpec">
2086
2086
 
2087
2087
 
2088
- <p class="title"><a href="#a-607114448">Example 4</a>. &nbsp; Generating a test with specification in RSpec format</p>
2088
+ <p class="title"><a href="#a-607452398">Example 4</a>. &nbsp; Generating a test with specification in RSpec format</p>
2089
2089
 
2090
2090
  <pre>
2091
2091
  $ ruby-vpi generate counter.v --RSpec
@@ -2107,7 +2107,7 @@ $ ruby-vpi generate counter.v --RSpec
2107
2107
  <div class="example" id="fig:generate-test.xUnit">
2108
2108
 
2109
2109
 
2110
- <p class="title"><a href="#a-607116908">Example 5</a>. &nbsp; Generating a test with specification in xUnit format</p>
2110
+ <p class="title"><a href="#a-607454858">Example 5</a>. &nbsp; Generating a test with specification in xUnit format</p>
2111
2111
 
2112
2112
  <pre>
2113
2113
  $ ruby-vpi generate counter.v --xUnit
@@ -2132,7 +2132,7 @@ $ ruby-vpi generate counter.v --xUnit
2132
2132
 
2133
2133
  <div id="usage.tutorial.specification" class="section">
2134
2134
  <h3 class="title">
2135
- <a href="#a-607131808">5.6.3</a>
2135
+ <a href="#a-607469758">5.6.3</a>
2136
2136
 
2137
2137
  &nbsp;
2138
2138
 
@@ -2160,7 +2160,7 @@ Here are some reasonable expectations for our simple counter:
2160
2160
  <div class="example" id="fig:RSpec_counter_spec.rb">
2161
2161
 
2162
2162
 
2163
- <p class="title"><a href="#a-607124618">Example 6</a>. &nbsp; Specification implemented in RSpec format</p>
2163
+ <p class="title"><a href="#a-607462568">Example 6</a>. &nbsp; Specification implemented in RSpec format</p>
2164
2164
 
2165
2165
  <pre class="code">require <span style="background-color:#fff0f0"><span style="color:#710">'</span><span style="color:#D20">spec</span><span style="color:#710">'</span></span>
2166
2166
 
@@ -2212,7 +2212,7 @@ describe <span style="background-color:#fff0f0"><span style="color:#710">&quot;<
2212
2212
  <div class="example" id="fig:xUnit_counter_spec.rb">
2213
2213
 
2214
2214
 
2215
- <p class="title"><a href="#a-607126978">Example 7</a>. &nbsp; Specification implemented in xUnit format</p>
2215
+ <p class="title"><a href="#a-607464928">Example 7</a>. &nbsp; Specification implemented in xUnit format</p>
2216
2216
 
2217
2217
  <pre class="code">require <span style="background-color:#fff0f0"><span style="color:#710">'</span><span style="color:#D20">test/unit</span><span style="color:#710">'</span></span>
2218
2218
 
@@ -2272,7 +2272,7 @@ Before we continue,
2272
2272
 
2273
2273
  <div id="usage.tutorial.implement-proto" class="section">
2274
2274
  <h3 class="title">
2275
- <a href="#a-607137798">5.6.4</a>
2275
+ <a href="#a-607475748">5.6.4</a>
2276
2276
 
2277
2277
  &nbsp;
2278
2278
 
@@ -2289,7 +2289,7 @@ Before we continue,
2289
2289
  <div class="example" id="fig:counter_proto.rb">
2290
2290
 
2291
2291
 
2292
- <p class="title"><a href="#a-607134398">Example 8</a>. &nbsp; Ruby prototype of our Verilog design</p>
2292
+ <p class="title"><a href="#a-607472348">Example 8</a>. &nbsp; Ruby prototype of our Verilog design</p>
2293
2293
 
2294
2294
  <pre class="code"><span style="color:#888"># Ruby prototype of the design under test's Verilog implementation.</span>
2295
2295
  <span style="color:#080; font-weight:bold">def</span> <span style="color:#06B; font-weight:bold">feign!</span>
@@ -2316,7 +2316,7 @@ Before we continue, replace the contents of the files named <tt>RSpec/counter_pr
2316
2316
 
2317
2317
  <div id="usage.tutorial.test-proto" class="section">
2318
2318
  <h3 class="title">
2319
- <a href="#a-607151048">5.6.5</a>
2319
+ <a href="#a-607231778">5.6.5</a>
2320
2320
 
2321
2321
  &nbsp;
2322
2322
 
@@ -2336,7 +2336,7 @@ Before we continue, replace the contents of the files named <tt>RSpec/counter_pr
2336
2336
  <div class="example" id="fig:test-proto.RSpec">
2337
2337
 
2338
2338
 
2339
- <p class="title"><a href="#a-607140918">Example 9</a>. &nbsp; Running a test with specification in RSpec format</p>
2339
+ <p class="title"><a href="#a-607478868">Example 9</a>. &nbsp; Running a test with specification in RSpec format</p>
2340
2340
 
2341
2341
  <pre>
2342
2342
  $ cd RSpec
@@ -2360,7 +2360,7 @@ cd -
2360
2360
  <div class="example" id="fig:test-proto.unit-test">
2361
2361
 
2362
2362
 
2363
- <p class="title"><a href="#a-607143418">Example 10</a>. &nbsp; Running a test with specification in xUnit format</p>
2363
+ <p class="title"><a href="#a-607481368">Example 10</a>. &nbsp; Running a test with specification in xUnit format</p>
2364
2364
 
2365
2365
  <pre>
2366
2366
  $ cd xUnit
@@ -2384,7 +2384,7 @@ Finished in 0.043859 seconds.
2384
2384
  <div class="tip" id="What_can_the_test_runner_do_">
2385
2385
  <img src="images/tango/tip.png" alt="tip" class="icon"/>
2386
2386
 
2387
- <p class="title"><a href="#a-607145688">Tip 4</a>. &nbsp; What can the test runner do?</p>
2387
+ <p class="title"><a href="#a-607223748">Tip 4</a>. &nbsp; What can the test runner do?</p>
2388
2388
 
2389
2389
  If you invoke the test runner (1) without any arguments or (2) with the <tt>--tasks</tt> option, it will show you a list of tasks that it can perform for you.
2390
2390
  </div>
@@ -2400,7 +2400,7 @@ Finished in 0.043859 seconds.
2400
2400
 
2401
2401
  <div id="usage.tutorial.implement-design" class="section">
2402
2402
  <h3 class="title">
2403
- <a href="#a-607157038">5.6.6</a>
2403
+ <a href="#a-607245728">5.6.6</a>
2404
2404
 
2405
2405
  &nbsp;
2406
2406
 
@@ -2417,7 +2417,7 @@ Finished in 0.043859 seconds.
2417
2417
  <div class="example" id="fig:counter.v_impl">
2418
2418
 
2419
2419
 
2420
- <p class="title"><a href="#a-607153638">Example 11</a>. &nbsp; Implementation of a simple up-counter with synchronous reset</p>
2420
+ <p class="title"><a href="#a-607235998">Example 11</a>. &nbsp; Implementation of a simple up-counter with synchronous reset</p>
2421
2421
 
2422
2422
  <pre class="code" lang="verilog">/**
2423
2423
  A simple up-counter with synchronous reset.
@@ -2454,7 +2454,7 @@ Before we continue, replace the contents of the files named <tt>RSpec/counter.v<
2454
2454
 
2455
2455
  <div id="usage.tutorial.test-design" class="section">
2456
2456
  <h3 class="title">
2457
- <a href="#a-606917698">5.6.7</a>
2457
+ <a href="#a-607263938">5.6.7</a>
2458
2458
 
2459
2459
  &nbsp;
2460
2460
 
@@ -2474,7 +2474,7 @@ Before we continue, replace the contents of the files named <tt>RSpec/counter.v<
2474
2474
  <div class="example" id="fig:test-design.RSpec">
2475
2475
 
2476
2476
 
2477
- <p class="title"><a href="#a-607159998">Example 12</a>. &nbsp; Running a test with specification in RSpec format</p>
2477
+ <p class="title"><a href="#a-607252508">Example 12</a>. &nbsp; Running a test with specification in RSpec format</p>
2478
2478
 
2479
2479
  <pre>
2480
2480
  $ cd RSpec
@@ -2496,7 +2496,7 @@ Finished in 0.041198 seconds
2496
2496
  <div class="example" id="fig:test-design.unit-test">
2497
2497
 
2498
2498
 
2499
- <p class="title"><a href="#a-606910818">Example 13</a>. &nbsp; Running a test with specification in xUnit format</p>
2499
+ <p class="title"><a href="#a-607255018">Example 13</a>. &nbsp; Running a test with specification in xUnit format</p>
2500
2500
 
2501
2501
  <pre>
2502
2502
  $ cd xUnit
@@ -2525,7 +2525,7 @@ Finished in 0.040262 seconds.
2525
2525
 
2526
2526
  <div id="hacking" class="chapter">
2527
2527
  <h1 class="title">
2528
- Chapter <a href="#a-607168058">6</a>
2528
+ Chapter <a href="#a-607500728">6</a>
2529
2529
 
2530
2530
  <br/><br/>
2531
2531
 
@@ -2537,7 +2537,7 @@ Finished in 0.040262 seconds.
2537
2537
 
2538
2538
  <div id="hacking.scm" class="section">
2539
2539
  <h2 class="title">
2540
- <a href="#a-607153878">6.1</a>
2540
+ <a href="#a-607491268">6.1</a>
2541
2541
 
2542
2542
  &nbsp;
2543
2543
 
@@ -2558,7 +2558,7 @@ Finished in 0.040262 seconds.
2558
2558
 
2559
2559
  <div id="hacking.release-packages" class="section">
2560
2560
  <h2 class="title">
2561
- <a href="#a-607161228">6.2</a>
2561
+ <a href="#a-607493898">6.2</a>
2562
2562
 
2563
2563
  &nbsp;
2564
2564
 
@@ -2586,7 +2586,7 @@ Finished in 0.040262 seconds.
2586
2586
 
2587
2587
  <div id="hacking.manual" class="section">
2588
2588
  <h2 class="title">
2589
- <a href="#a-607163458">6.3</a>
2589
+ <a href="#a-607496128">6.3</a>
2590
2590
 
2591
2591
  &nbsp;
2592
2592
 
@@ -2604,7 +2604,7 @@ Finished in 0.040262 seconds.
2604
2604
 
2605
2605
  <div id="problems" class="chapter">
2606
2606
  <h1 class="title">
2607
- Chapter <a href="#a-607224248">7</a>
2607
+ Chapter <a href="#a-607556918">7</a>
2608
2608
 
2609
2609
  <br/><br/>
2610
2610
 
@@ -2619,7 +2619,7 @@ Finished in 0.040262 seconds.
2619
2619
 
2620
2620
  <div id="problem.ivl" class="section">
2621
2621
  <h2 class="title">
2622
- <a href="#a-607196648">7.1</a>
2622
+ <a href="#a-607529318">7.1</a>
2623
2623
 
2624
2624
  &nbsp;
2625
2625
 
@@ -2634,7 +2634,7 @@ Finished in 0.040262 seconds.
2634
2634
 
2635
2635
  <div id="problems.ivl.vpi_handle_by_name.absolute-paths" class="section">
2636
2636
  <h3 class="title">
2637
- <a href="#a-607174028">7.1.1</a>
2637
+ <a href="#a-607506698">7.1.1</a>
2638
2638
 
2639
2639
  &nbsp;
2640
2640
 
@@ -2654,7 +2654,7 @@ Finished in 0.040262 seconds.
2654
2654
  <div class="example" id="ex:TestFoo">
2655
2655
 
2656
2656
 
2657
- <p class="title"><a href="#a-607170868">Example 14</a>. &nbsp; Part of a bench which instantiates a Verilog design</p>
2657
+ <p class="title"><a href="#a-607503538">Example 14</a>. &nbsp; Part of a bench which instantiates a Verilog design</p>
2658
2658
 
2659
2659
  <pre class="code" lang="verilog">
2660
2660
  module TestFoo;
@@ -2673,7 +2673,7 @@ endmodule
2673
2673
 
2674
2674
  <div id="problems.ivl.vpi_handle_by_name.connect-registers" class="section">
2675
2675
  <h3 class="title">
2676
- <a href="#a-607183718">7.1.2</a>
2676
+ <a href="#a-607516388">7.1.2</a>
2677
2677
 
2678
2678
  &nbsp;
2679
2679
 
@@ -2696,7 +2696,7 @@ endmodule
2696
2696
  <div class="example" id="ex:TestFoo_bad">
2697
2697
 
2698
2698
 
2699
- <p class="title"><a href="#a-607176928">Example 15</a>. &nbsp; Bad design with unconnected registers</p>
2699
+ <p class="title"><a href="#a-607509598">Example 15</a>. &nbsp; Bad design with unconnected registers</p>
2700
2700
 
2701
2701
  Here the <code class="code">clk_reg</code> register is not connected to anything.
2702
2702
 
@@ -2716,7 +2716,7 @@ endmodule
2716
2716
  <div class="example" id="ex:TestFoo_fix">
2717
2717
 
2718
2718
 
2719
- <p class="title"><a href="#a-607179368">Example 16</a>. &nbsp; Fixed design with wired registers</p>
2719
+ <p class="title"><a href="#a-607512038">Example 16</a>. &nbsp; Fixed design with wired registers</p>
2720
2720
 
2721
2721
  Here the <code class="code">clk_reg</code> register is connected to the <code class="code">clk_wire</code> wire.
2722
2722
 
@@ -2739,7 +2739,7 @@ endmodule
2739
2739
 
2740
2740
  <div id="problems.ivl.vpi_reset" class="section">
2741
2741
  <h3 class="title">
2742
- <a href="#a-607185968">7.1.3</a>
2742
+ <a href="#a-607518638">7.1.3</a>
2743
2743
 
2744
2744
  &nbsp;
2745
2745
 
@@ -2758,7 +2758,7 @@ endmodule
2758
2758
 
2759
2759
  <div id="problem.ncsim" class="section">
2760
2760
  <h2 class="title">
2761
- <a href="#a-607202038">7.2</a>
2761
+ <a href="#a-607534708">7.2</a>
2762
2762
 
2763
2763
  &nbsp;
2764
2764
 
@@ -2773,7 +2773,7 @@ endmodule
2773
2773
 
2774
2774
  <div id="problem.ncsim.vpiForceFlag" class="section">
2775
2775
  <h3 class="title">
2776
- <a href="#a-607199078">7.2.1</a>
2776
+ <a href="#a-607531748">7.2.1</a>
2777
2777
 
2778
2778
  &nbsp;
2779
2779
 
@@ -2800,7 +2800,7 @@ endmodule
2800
2800
 
2801
2801
  <div id="glossary" class="chapter">
2802
2802
  <h1 class="title">
2803
- Chapter <a href="#a-607256698">8</a>
2803
+ Chapter <a href="#a-607589368">8</a>
2804
2804
 
2805
2805
  <br/><br/>
2806
2806
 
@@ -2812,7 +2812,7 @@ endmodule
2812
2812
 
2813
2813
  <div id="glossary.test" class="section">
2814
2814
  <h2 class="title">
2815
- <a href="#a-607227078">8.1</a>
2815
+ <a href="#a-607559748">8.1</a>
2816
2816
 
2817
2817
  &nbsp;
2818
2818
 
@@ -2828,7 +2828,7 @@ endmodule
2828
2828
 
2829
2829
  <div id="glossary.design" class="section">
2830
2830
  <h2 class="title">
2831
- <a href="#a-607229578">8.2</a>
2831
+ <a href="#a-607562248">8.2</a>
2832
2832
 
2833
2833
  &nbsp;
2834
2834
 
@@ -2844,7 +2844,7 @@ endmodule
2844
2844
 
2845
2845
  <div id="glossary.specification" class="section">
2846
2846
  <h2 class="title">
2847
- <a href="#a-607232338">8.3</a>
2847
+ <a href="#a-607565008">8.3</a>
2848
2848
 
2849
2849
  &nbsp;
2850
2850
 
@@ -2860,7 +2860,7 @@ endmodule
2860
2860
 
2861
2861
  <div id="glossary.expectation" class="section">
2862
2862
  <h2 class="title">
2863
- <a href="#a-607234558">8.4</a>
2863
+ <a href="#a-607567228">8.4</a>
2864
2864
 
2865
2865
  &nbsp;
2866
2866
 
@@ -2876,7 +2876,7 @@ endmodule
2876
2876
 
2877
2877
  <div id="glossary.handle" class="section">
2878
2878
  <h2 class="title">
2879
- <a href="#a-607237038">8.5</a>
2879
+ <a href="#a-607569708">8.5</a>
2880
2880
 
2881
2881
  &nbsp;
2882
2882
 
@@ -2892,7 +2892,7 @@ endmodule
2892
2892
 
2893
2893
  <div id="glossary.rake" class="section">
2894
2894
  <h2 class="title">
2895
- <a href="#a-607239298">8.6</a>
2895
+ <a href="#a-607571968">8.6</a>
2896
2896
 
2897
2897
  &nbsp;
2898
2898
 
@@ -2913,7 +2913,7 @@ endmodule
2913
2913
 
2914
2914
  <div id="glossary.RSpec" class="section">
2915
2915
  <h2 class="title">
2916
- <a href="#a-607241838">8.7</a>
2916
+ <a href="#a-607574508">8.7</a>
2917
2917
 
2918
2918
  &nbsp;
2919
2919
 
@@ -2932,7 +2932,7 @@ endmodule
2932
2932
 
2933
2933
  <div id="glossary.TDD" class="section">
2934
2934
  <h2 class="title">
2935
- <a href="#a-607244098">8.8</a>
2935
+ <a href="#a-607576768">8.8</a>
2936
2936
 
2937
2937
  &nbsp;
2938
2938
 
@@ -2951,7 +2951,7 @@ endmodule
2951
2951
 
2952
2952
  <div id="glossary.BDD" class="section">
2953
2953
  <h2 class="title">
2954
- <a href="#a-607246358">8.9</a>
2954
+ <a href="#a-607579028">8.9</a>
2955
2955
 
2956
2956
  &nbsp;
2957
2957
 
@@ -2971,49 +2971,49 @@ endmodule
2971
2971
  <hr style="display: none"/>
2972
2972
  <div id="toc">
2973
2973
  <h1 id="toc:contents">Contents</h1>
2974
- <ul><li><span class="hide">1 </span><a id="a-605815698" href="#Ruby-VPI_18.0.1_user_manual">Ruby-VPI 18.0.1 user manual</a><ul><li><span class="hide">1.1 </span><a id="a-605717698" href="#About_this_manual">About this manual</a></li><li><span class="hide">1.2 </span><a id="a-605744638" href="#Legal_notice">Legal notice</a></li></ul></li><li><span class="hide">2 </span><a id="a-606978988" href="#intro">Welcome</a><ul><li><span class="hide">2.1 </span><a id="a-606913148" href="#resources">Resources</a><ul><li><span class="hide">2.1.1 </span><a id="a-605838518" href="#Records">Records</a></li><li><span class="hide">2.1.2 </span><a id="a-605610268" href="#Documentation">Documentation</a></li><li><span class="hide">2.1.3 </span><a id="a-606907548" href="#Facilities">Facilities</a></li></ul></li><li><span class="hide">2.2 </span><a id="a-606925458" href="#intro.features">Features</a><ul><li><span class="hide">2.2.1 </span><a id="a-606915788" href="#Portable">Portable</a></li><li><span class="hide">2.2.2 </span><a id="a-606918188" href="#Agile">Agile</a></li><li><span class="hide">2.2.3 </span><a id="a-606920588" href="#Powerful">Powerful</a></li></ul></li><li><span class="hide">2.3 </span><a id="a-606937688" href="#intro.reqs">Requirements</a><ul><li><span class="hide">2.3.1 </span><a id="a-606928098" href="#Verilog_simulator">Verilog simulator</a></li><li><span class="hide">2.3.2 </span><a id="a-606930538" href="#Compilers">Compilers</a></li><li><span class="hide">2.3.3 </span><a id="a-606932858" href="#Libraries">Libraries</a></li></ul></li><li><span class="hide">2.4 </span><a id="a-606940248" href="#intro.applications">Applications</a></li><li><span class="hide">2.5 </span><a id="a-606942848" href="#intro.appetizers">Appetizers</a></li><li><span class="hide">2.6 </span><a id="a-606945718" href="#intro.license">License</a></li><li><span class="hide">2.7 </span><a id="a-606951108" href="#intro.related-works">Related works</a><ul><li><span class="hide">2.7.1 </span><a id="a-606948168" href="#intro.related-works.pli">Ye olde PLI</a></li></ul></li></ul></li><li><span class="hide">3 </span><a id="a-607019648" href="#setup">Setup</a><ul><li><span class="hide">3.1 </span><a id="a-606982178" href="#setup.manifest">Manifest</a></li><li><span class="hide">3.2 </span><a id="a-606987618" href="#setup.reqs">Requirements</a></li><li><span class="hide">3.3 </span><a id="a-606993788" href="#setup.recom">Recommendations</a><ul><li><span class="hide">3.3.1 </span><a id="a-606990448" href="#setup.recom.merger">Text merging tool</a></li></ul></li><li><span class="hide">3.4 </span><a id="a-607002928" href="#setup.inst">Installation</a><ul><li><span class="hide">3.4.1 </span><a id="a-606998868" href="#setup.inst.windows">Installing on Windows</a></li></ul></li><li><span class="hide">3.5 </span><a id="a-607005208" href="#setup.maintenance">Maintenance</a></li></ul></li><li><span class="hide">4 </span><a id="a-607025428" href="#organization">Organization</a><ul><li><span class="hide">4.1 </span><a id="a-607028538" href="#overview.relay">Ruby/Verilog interaction</a></li><li><span class="hide">4.2 </span><a id="a-607034108" href="#organization.tests">Tests</a></li><li><span class="hide">4.3 </span><a id="a-606948098" href="#VPI_in_Ruby">VPI in Ruby</a><ul><li><span class="hide">4.3.1 </span><a id="a-607043028" href="#Deviations_from_the_VPI_standard">Deviations from the VPI standard</a><ul><li><span class="hide">4.3.1.1 </span><a id="a-607036598" href="#Names_are_capitalized">Names are capitalized</a></li><li><span class="hide">4.3.1.2 </span><a id="a-607039098" href="#a_vprintf__is__printf_"><code class="code">vprintf</code> is <code class="code">printf</code></a></li></ul></li><li><span class="hide">4.3.2 </span><a id="a-607068568" href="#vpi.handles">Handles</a><ul><li><span class="hide">4.3.2.1 </span><a id="a-607045688" href="#Shortcuts_for_productivity">Shortcuts for productivity</a></li><li><span class="hide">4.3.2.2 </span><a id="a-607048248" href="#Accessing_a_handle_s_relatives">Accessing a handle&#8217;s relatives</a></li><li><span class="hide">4.3.2.3 </span><a id="a-607051188" href="#Accessing_a_handle_s_properties">Accessing a handle&#8217;s properties</a></li></ul></li><li><span class="hide">4.3.3 </span><a id="a-607076998" href="#vpi.callbacks">Callbacks</a></li></ul></li></ul></li><li><span class="hide">5 </span><a id="a-607149688" href="#usage">Usage</a><ul><li><span class="hide">5.1 </span><a id="a-607049328" href="#usage.prototyping">Prototyping</a><ul><li><span class="hide">5.1.1 </span><a id="a-607035478" href="#Getting_started">Getting started</a></li><li><span class="hide">5.1.2 </span><a id="a-607039268" href="#How_does_prototyping_work_">How does prototyping work?</a></li></ul></li><li><span class="hide">5.2 </span><a id="a-607058778" href="#usage.debugger">Debugging</a><ul><li><span class="hide">5.2.1 </span><a id="a-607053478" href="#usage.debugger.init">Advanced initialization</a></li></ul></li><li><span class="hide">5.3 </span><a id="a-607082308" href="#usage.test-runner">Test runner</a><ul><li><span class="hide">5.3.1 </span><a id="a-607072228" href="#usage.test-runner.env-vars">Environment variables</a><ul><li><span class="hide">5.3.1.1 </span><a id="a-607063028" href="#Variables_as_command-line_arguments">Variables as command-line arguments</a></li></ul></li></ul></li><li><span class="hide">5.4 </span><a id="a-607101458" href="#usage.tools">Tools</a><ul><li><span class="hide">5.4.1 </span><a id="a-607091638" href="#usage.tools.generate">Automated test generation</a></li><li><span class="hide">5.4.2 </span><a id="a-607093928" href="#usage.tools.convert">Verilog to Ruby conversion</a></li></ul></li><li><span class="hide">5.5 </span><a id="a-607103698" href="#usage.examples">Sample tests</a></li><li><span class="hide">5.6 </span><a id="a-606970248" href="#usage.tutorial">Tutorial</a><ul><li><span class="hide">5.6.1 </span><a id="a-607111108" href="#usage.tutorial.declare-design">Start with a Verilog design</a></li><li><span class="hide">5.6.2 </span><a id="a-607121708" href="#usage.tutorial.generate-test">Generate a test</a></li><li><span class="hide">5.6.3 </span><a id="a-607131808" href="#usage.tutorial.specification">Specify your expectations</a></li><li><span class="hide">5.6.4 </span><a id="a-607137798" href="#usage.tutorial.implement-proto">Implement the prototype</a></li><li><span class="hide">5.6.5 </span><a id="a-607151048" href="#usage.tutorial.test-proto">Verify the prototype</a></li><li><span class="hide">5.6.6 </span><a id="a-607157038" href="#usage.tutorial.implement-design">Implement the design</a></li><li><span class="hide">5.6.7 </span><a id="a-606917698" href="#usage.tutorial.test-design">Verify the design</a></li></ul></li></ul></li><li><span class="hide">6 </span><a id="a-607168058" href="#hacking">Hacking</a><ul><li><span class="hide">6.1 </span><a id="a-607153878" href="#hacking.scm">Getting the source code</a></li><li><span class="hide">6.2 </span><a id="a-607161228" href="#hacking.release-packages">Building release packages</a></li><li><span class="hide">6.3 </span><a id="a-607163458" href="#hacking.manual">Editing this manual</a></li></ul></li><li><span class="hide">7 </span><a id="a-607224248" href="#problems">Known problems</a><ul><li><span class="hide">7.1 </span><a id="a-607196648" href="#problem.ivl">Icarus Verilog</a><ul><li><span class="hide">7.1.1 </span><a id="a-607174028" href="#problems.ivl.vpi_handle_by_name.absolute-paths">Give full paths to Verilog objects</a></li><li><span class="hide">7.1.2 </span><a id="a-607183718" href="#problems.ivl.vpi_handle_by_name.connect-registers">Registers must be connected</a></li><li><span class="hide">7.1.3 </span><a id="a-607185968" href="#problems.ivl.vpi_reset">Vpi::reset</a></li></ul></li><li><span class="hide">7.2 </span><a id="a-607202038" href="#problem.ncsim">Cadence NC-Sim</a><ul><li><span class="hide">7.2.1 </span><a id="a-607199078" href="#problem.ncsim.vpiForceFlag">Cannot force values onto handles</a></li></ul></li></ul></li><li><span class="hide">8 </span><a id="a-607256698" href="#glossary">Glossary</a><ul><li><span class="hide">8.1 </span><a id="a-607227078" href="#glossary.test">Test</a></li><li><span class="hide">8.2 </span><a id="a-607229578" href="#glossary.design">Design</a></li><li><span class="hide">8.3 </span><a id="a-607232338" href="#glossary.specification">Specification</a></li><li><span class="hide">8.4 </span><a id="a-607234558" href="#glossary.expectation">Expectation</a></li><li><span class="hide">8.5 </span><a id="a-607237038" href="#glossary.handle">Handle</a></li><li><span class="hide">8.6 </span><a id="a-607239298" href="#glossary.rake">Rake</a></li><li><span class="hide">8.7 </span><a id="a-607241838" href="#glossary.RSpec">RSpec</a></li><li><span class="hide">8.8 </span><a id="a-607244098" href="#glossary.TDD">Test driven development</a></li><li><span class="hide">8.9 </span><a id="a-607246358" href="#glossary.BDD">Behavior driven development</a></li></ul></li></ul>
2974
+ <ul><li><span class="hide">1 </span><a id="a-607241338" href="#Ruby-VPI_18.0.2_user_manual">Ruby-VPI 18.0.2 user manual</a><ul><li><span class="hide">1.1 </span><a id="a-607234498" href="#About_this_manual">About this manual</a></li><li><span class="hide">1.2 </span><a id="a-607237028" href="#Legal_notice">Legal notice</a></li></ul></li><li><span class="hide">2 </span><a id="a-607321098" href="#intro">Welcome</a><ul><li><span class="hide">2.1 </span><a id="a-607255258" href="#resources">Resources</a><ul><li><span class="hide">2.1.1 </span><a id="a-607244578" href="#Records">Records</a></li><li><span class="hide">2.1.2 </span><a id="a-607246958" href="#Documentation">Documentation</a></li><li><span class="hide">2.1.3 </span><a id="a-607249658" href="#Facilities">Facilities</a></li></ul></li><li><span class="hide">2.2 </span><a id="a-607267568" href="#intro.features">Features</a><ul><li><span class="hide">2.2.1 </span><a id="a-607257898" href="#Portable">Portable</a></li><li><span class="hide">2.2.2 </span><a id="a-607260298" href="#Agile">Agile</a></li><li><span class="hide">2.2.3 </span><a id="a-607262698" href="#Powerful">Powerful</a></li></ul></li><li><span class="hide">2.3 </span><a id="a-607279798" href="#intro.reqs">Requirements</a><ul><li><span class="hide">2.3.1 </span><a id="a-607270208" href="#Verilog_simulator">Verilog simulator</a></li><li><span class="hide">2.3.2 </span><a id="a-607272648" href="#Compilers">Compilers</a></li><li><span class="hide">2.3.3 </span><a id="a-607274968" href="#Libraries">Libraries</a></li></ul></li><li><span class="hide">2.4 </span><a id="a-607282358" href="#intro.applications">Applications</a></li><li><span class="hide">2.5 </span><a id="a-607284958" href="#intro.appetizers">Appetizers</a></li><li><span class="hide">2.6 </span><a id="a-607287828" href="#intro.license">License</a></li><li><span class="hide">2.7 </span><a id="a-607293218" href="#intro.related-works">Related works</a><ul><li><span class="hide">2.7.1 </span><a id="a-607290278" href="#intro.related-works.pli">Ye olde PLI</a></li></ul></li></ul></li><li><span class="hide">3 </span><a id="a-607361758" href="#setup">Setup</a><ul><li><span class="hide">3.1 </span><a id="a-607324288" href="#setup.manifest">Manifest</a></li><li><span class="hide">3.2 </span><a id="a-607329728" href="#setup.reqs">Requirements</a></li><li><span class="hide">3.3 </span><a id="a-607335898" href="#setup.recom">Recommendations</a><ul><li><span class="hide">3.3.1 </span><a id="a-607332558" href="#setup.recom.merger">Text merging tool</a></li></ul></li><li><span class="hide">3.4 </span><a id="a-607345038" href="#setup.inst">Installation</a><ul><li><span class="hide">3.4.1 </span><a id="a-607340978" href="#setup.inst.windows">Installing on Windows</a></li></ul></li><li><span class="hide">3.5 </span><a id="a-607347318" href="#setup.maintenance">Maintenance</a></li></ul></li><li><span class="hide">4 </span><a id="a-607368998" href="#organization">Organization</a><ul><li><span class="hide">4.1 </span><a id="a-607370648" href="#overview.relay">Ruby/Verilog interaction</a></li><li><span class="hide">4.2 </span><a id="a-607376218" href="#organization.tests">Tests</a></li><li><span class="hide">4.3 </span><a id="a-607291858" href="#VPI_in_Ruby">VPI in Ruby</a><ul><li><span class="hide">4.3.1 </span><a id="a-607385138" href="#Deviations_from_the_VPI_standard">Deviations from the VPI standard</a><ul><li><span class="hide">4.3.1.1 </span><a id="a-607378708" href="#Names_are_capitalized">Names are capitalized</a></li><li><span class="hide">4.3.1.2 </span><a id="a-607381208" href="#a_vprintf__is__printf_"><code class="code">vprintf</code> is <code class="code">printf</code></a></li></ul></li><li><span class="hide">4.3.2 </span><a id="a-607236168" href="#vpi.handles">Handles</a><ul><li><span class="hide">4.3.2.1 </span><a id="a-607387798" href="#Shortcuts_for_productivity">Shortcuts for productivity</a></li><li><span class="hide">4.3.2.2 </span><a id="a-607390358" href="#Accessing_a_handle_s_relatives">Accessing a handle&#8217;s relatives</a></li><li><span class="hide">4.3.2.3 </span><a id="a-607393298" href="#Accessing_a_handle_s_properties">Accessing a handle&#8217;s properties</a></li></ul></li><li><span class="hide">4.3.3 </span><a id="a-607249768" href="#vpi.callbacks">Callbacks</a></li></ul></li></ul></li><li><span class="hide">5 </span><a id="a-607488938" href="#usage">Usage</a><ul><li><span class="hide">5.1 </span><a id="a-607395418" href="#usage.prototyping">Prototyping</a><ul><li><span class="hide">5.1.1 </span><a id="a-607378568" href="#Getting_started">Getting started</a></li><li><span class="hide">5.1.2 </span><a id="a-607383008" href="#How_does_prototyping_work_">How does prototyping work?</a></li></ul></li><li><span class="hide">5.2 </span><a id="a-607403488" href="#usage.debugger">Debugging</a><ul><li><span class="hide">5.2.1 </span><a id="a-607400418" href="#usage.debugger.init">Advanced initialization</a></li></ul></li><li><span class="hide">5.3 </span><a id="a-607420258" href="#usage.test-runner">Test runner</a><ul><li><span class="hide">5.3.1 </span><a id="a-607413148" href="#usage.test-runner.env-vars">Environment variables</a><ul><li><span class="hide">5.3.1.1 </span><a id="a-607406578" href="#Variables_as_command-line_arguments">Variables as command-line arguments</a></li></ul></li></ul></li><li><span class="hide">5.4 </span><a id="a-607439408" href="#usage.tools">Tools</a><ul><li><span class="hide">5.4.1 </span><a id="a-607429588" href="#usage.tools.generate">Automated test generation</a></li><li><span class="hide">5.4.2 </span><a id="a-607431878" href="#usage.tools.convert">Verilog to Ruby conversion</a></li></ul></li><li><span class="hide">5.5 </span><a id="a-607441648" href="#usage.examples">Sample tests</a></li><li><span class="hide">5.6 </span><a id="a-607314468" href="#usage.tutorial">Tutorial</a><ul><li><span class="hide">5.6.1 </span><a id="a-607449058" href="#usage.tutorial.declare-design">Start with a Verilog design</a></li><li><span class="hide">5.6.2 </span><a id="a-607459658" href="#usage.tutorial.generate-test">Generate a test</a></li><li><span class="hide">5.6.3 </span><a id="a-607469758" href="#usage.tutorial.specification">Specify your expectations</a></li><li><span class="hide">5.6.4 </span><a id="a-607475748" href="#usage.tutorial.implement-proto">Implement the prototype</a></li><li><span class="hide">5.6.5 </span><a id="a-607231778" href="#usage.tutorial.test-proto">Verify the prototype</a></li><li><span class="hide">5.6.6 </span><a id="a-607245728" href="#usage.tutorial.implement-design">Implement the design</a></li><li><span class="hide">5.6.7 </span><a id="a-607263938" href="#usage.tutorial.test-design">Verify the design</a></li></ul></li></ul></li><li><span class="hide">6 </span><a id="a-607500728" href="#hacking">Hacking</a><ul><li><span class="hide">6.1 </span><a id="a-607491268" href="#hacking.scm">Getting the source code</a></li><li><span class="hide">6.2 </span><a id="a-607493898" href="#hacking.release-packages">Building release packages</a></li><li><span class="hide">6.3 </span><a id="a-607496128" href="#hacking.manual">Editing this manual</a></li></ul></li><li><span class="hide">7 </span><a id="a-607556918" href="#problems">Known problems</a><ul><li><span class="hide">7.1 </span><a id="a-607529318" href="#problem.ivl">Icarus Verilog</a><ul><li><span class="hide">7.1.1 </span><a id="a-607506698" href="#problems.ivl.vpi_handle_by_name.absolute-paths">Give full paths to Verilog objects</a></li><li><span class="hide">7.1.2 </span><a id="a-607516388" href="#problems.ivl.vpi_handle_by_name.connect-registers">Registers must be connected</a></li><li><span class="hide">7.1.3 </span><a id="a-607518638" href="#problems.ivl.vpi_reset">Vpi::reset</a></li></ul></li><li><span class="hide">7.2 </span><a id="a-607534708" href="#problem.ncsim">Cadence NC-Sim</a><ul><li><span class="hide">7.2.1 </span><a id="a-607531748" href="#problem.ncsim.vpiForceFlag">Cannot force values onto handles</a></li></ul></li></ul></li><li><span class="hide">8 </span><a id="a-607589368" href="#glossary">Glossary</a><ul><li><span class="hide">8.1 </span><a id="a-607559748" href="#glossary.test">Test</a></li><li><span class="hide">8.2 </span><a id="a-607562248" href="#glossary.design">Design</a></li><li><span class="hide">8.3 </span><a id="a-607565008" href="#glossary.specification">Specification</a></li><li><span class="hide">8.4 </span><a id="a-607567228" href="#glossary.expectation">Expectation</a></li><li><span class="hide">8.5 </span><a id="a-607569708" href="#glossary.handle">Handle</a></li><li><span class="hide">8.6 </span><a id="a-607571968" href="#glossary.rake">Rake</a></li><li><span class="hide">8.7 </span><a id="a-607574508" href="#glossary.RSpec">RSpec</a></li><li><span class="hide">8.8 </span><a id="a-607576768" href="#glossary.TDD">Test driven development</a></li><li><span class="hide">8.9 </span><a id="a-607579028" href="#glossary.BDD">Behavior driven development</a></li></ul></li></ul>
2975
2975
 
2976
2976
  <h1 id="toc:tip">Tips</h1>
2977
2977
  <ol>
2978
- <li><a href="#Add_support_for_your_Verilog_simulator" id="a-606984648">Add support for your Verilog simulator</a></li>
2979
- <li><a href="#Tuning_for_maximum_performance" id="a-606996338">Tuning for maximum performance</a></li>
2980
- <li><a href="#Using__kdiff3__with_the_automated_test_generator." id="a-607087558">Using <strong>kdiff3</strong> with the automated test generator.</a></li>
2981
- <li><a href="#What_can_the_test_runner_do_" id="a-607145688">What can the test runner do?</a></li>
2978
+ <li><a href="#Add_support_for_your_Verilog_simulator" id="a-607326758">Add support for your Verilog simulator</a></li>
2979
+ <li><a href="#Tuning_for_maximum_performance" id="a-607338448">Tuning for maximum performance</a></li>
2980
+ <li><a href="#Using__kdiff3__with_the_automated_test_generator." id="a-607425508">Using <strong>kdiff3</strong> with the automated test generator.</a></li>
2981
+ <li><a href="#What_can_the_test_runner_do_" id="a-607223748">What can the test runner do?</a></li>
2982
2982
  </ol>
2983
2983
  <h1 id="toc:caution">Cautions</h1>
2984
2984
  <ol>
2985
- <li><a href="#Do_not_rename_generated_files" id="a-607085068">Do not rename generated files</a></li>
2985
+ <li><a href="#Do_not_rename_generated_files" id="a-607423018">Do not rename generated files</a></li>
2986
2986
  </ol>
2987
2987
  <h1 id="toc:figure">Figures</h1>
2988
2988
  <ol>
2989
- <li><a href="#fig:organization.detail" id="a-607022248">Where does Ruby-VPI fit in?</a></li>
2990
- <li><a href="#fig:ruby_relay" id="a-607025058">Interaction between Ruby and Verilog</a></li>
2991
- <li><a href="#fig:organization" id="a-607031008">Organization of a test in Ruby-VPI</a></li>
2992
- <li><a href="#fig:method_naming_format" id="a-607053988">Method naming format for accessing a handle&#8217;s properties</a></li>
2989
+ <li><a href="#fig:organization.detail" id="a-607364358">Where does Ruby-VPI fit in?</a></li>
2990
+ <li><a href="#fig:ruby_relay" id="a-607367168">Interaction between Ruby and Verilog</a></li>
2991
+ <li><a href="#fig:organization" id="a-607373118">Organization of a test in Ruby-VPI</a></li>
2992
+ <li><a href="#fig:method_naming_format" id="a-607396098">Method naming format for accessing a handle&#8217;s properties</a></li>
2993
2993
  </ol>
2994
2994
  <h1 id="toc:table">Tables</h1>
2995
2995
  <ol>
2996
- <li><a href="#tbl:accessors" id="a-607056418">Possible accessors and their implications</a></li>
2997
- <li><a href="#ex:properties" id="a-607059358">Examples of accessing a handle&#8217;s properties</a></li>
2996
+ <li><a href="#tbl:accessors" id="a-607398528">Possible accessors and their implications</a></li>
2997
+ <li><a href="#ex:properties" id="a-607223948">Examples of accessing a handle&#8217;s properties</a></li>
2998
2998
  </ol>
2999
2999
  <h1 id="toc:example">Examples</h1>
3000
3000
  <ol>
3001
- <li><a href="#ex:callback" id="a-607072518">Using a callback for value change notification</a></li>
3002
- <li><a href="#Running_a_test_with_environment_variables" id="a-607065588">Running a test with environment variables</a></li>
3003
- <li><a href="#fig:counter.v_decl" id="a-607107598">Declaration of a simple up-counter with synchronous reset</a></li>
3004
- <li><a href="#fig:generate-test.RSpec" id="a-607114448">Generating a test with specification in RSpec format</a></li>
3005
- <li><a href="#fig:generate-test.xUnit" id="a-607116908">Generating a test with specification in xUnit format</a></li>
3006
- <li><a href="#fig:RSpec_counter_spec.rb" id="a-607124618">Specification implemented in RSpec format</a></li>
3007
- <li><a href="#fig:xUnit_counter_spec.rb" id="a-607126978">Specification implemented in xUnit format</a></li>
3008
- <li><a href="#fig:counter_proto.rb" id="a-607134398">Ruby prototype of our Verilog design</a></li>
3009
- <li><a href="#fig:test-proto.RSpec" id="a-607140918">Running a test with specification in RSpec format</a></li>
3010
- <li><a href="#fig:test-proto.unit-test" id="a-607143418">Running a test with specification in xUnit format</a></li>
3011
- <li><a href="#fig:counter.v_impl" id="a-607153638">Implementation of a simple up-counter with synchronous reset</a></li>
3012
- <li><a href="#fig:test-design.RSpec" id="a-607159998">Running a test with specification in RSpec format</a></li>
3013
- <li><a href="#fig:test-design.unit-test" id="a-606910818">Running a test with specification in xUnit format</a></li>
3014
- <li><a href="#ex:TestFoo" id="a-607170868">Part of a bench which instantiates a Verilog design</a></li>
3015
- <li><a href="#ex:TestFoo_bad" id="a-607176928">Bad design with unconnected registers</a></li>
3016
- <li><a href="#ex:TestFoo_fix" id="a-607179368">Fixed design with wired registers</a></li>
3001
+ <li><a href="#ex:callback" id="a-607242918">Using a callback for value change notification</a></li>
3002
+ <li><a href="#Running_a_test_with_environment_variables" id="a-607408978">Running a test with environment variables</a></li>
3003
+ <li><a href="#fig:counter.v_decl" id="a-607445548">Declaration of a simple up-counter with synchronous reset</a></li>
3004
+ <li><a href="#fig:generate-test.RSpec" id="a-607452398">Generating a test with specification in RSpec format</a></li>
3005
+ <li><a href="#fig:generate-test.xUnit" id="a-607454858">Generating a test with specification in xUnit format</a></li>
3006
+ <li><a href="#fig:RSpec_counter_spec.rb" id="a-607462568">Specification implemented in RSpec format</a></li>
3007
+ <li><a href="#fig:xUnit_counter_spec.rb" id="a-607464928">Specification implemented in xUnit format</a></li>
3008
+ <li><a href="#fig:counter_proto.rb" id="a-607472348">Ruby prototype of our Verilog design</a></li>
3009
+ <li><a href="#fig:test-proto.RSpec" id="a-607478868">Running a test with specification in RSpec format</a></li>
3010
+ <li><a href="#fig:test-proto.unit-test" id="a-607481368">Running a test with specification in xUnit format</a></li>
3011
+ <li><a href="#fig:counter.v_impl" id="a-607235998">Implementation of a simple up-counter with synchronous reset</a></li>
3012
+ <li><a href="#fig:test-design.RSpec" id="a-607252508">Running a test with specification in RSpec format</a></li>
3013
+ <li><a href="#fig:test-design.unit-test" id="a-607255018">Running a test with specification in xUnit format</a></li>
3014
+ <li><a href="#ex:TestFoo" id="a-607503538">Part of a bench which instantiates a Verilog design</a></li>
3015
+ <li><a href="#ex:TestFoo_bad" id="a-607509598">Bad design with unconnected registers</a></li>
3016
+ <li><a href="#ex:TestFoo_fix" id="a-607512038">Fixed design with wired registers</a></li>
3017
3017
  </ol>
3018
3018
  </div>
3019
3019
  </body>