ruby-vpi 18.0.1 → 18.0.2
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- data/doc/history.html +64 -41
- data/doc/history.inc +7 -1
- data/doc/history.yaml +14 -0
- data/doc/manual.html +129 -129
- data/doc/memo.html +4 -4
- data/doc/readme.html +11 -11
- data/doc/rss.erb +1 -2
- data/doc/rss.xml +7 -252
- data/lib/ruby-vpi/runner_boot_loader.rb +1 -1
- data/ref/c/annotated.html +1 -1
- data/ref/c/common_8h.html +1 -1
- data/ref/c/files.html +1 -1
- data/ref/c/functions.html +1 -1
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- data/ref/c/relay_8c.html +1 -1
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- data/ref/c/structt__cb__data.html +1 -1
- data/ref/c/structt__vpi__delay.html +1 -1
- data/ref/c/structt__vpi__error__info.html +1 -1
- data/ref/c/structt__vpi__strengthval.html +1 -1
- data/ref/c/structt__vpi__systf__data.html +1 -1
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- data/ref/c/structt__vpi__vecval.html +1 -1
- data/ref/c/structt__vpi__vlog__info.html +1 -1
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- data/ref/c/vpi__user_8h.html +1 -1
- data/ref/ruby/created.rid +1 -1
- data/ref/ruby/files/lib/ruby-vpi/runner_boot_loader_rb.html +1 -1
- metadata +2 -2
data/doc/manual.html
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<link rel="stylesheet" type="text/css" href="common.css" media="screen" />
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<title>Ruby-VPI 18.0.
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<title>Ruby-VPI 18.0.2 user manual</title>
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<h1 class="title"><big>Ruby-VPI 18.0.2 user manual</big></h1>
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<h2 class="author">Suraj N. Kurapati</h2>
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– release notes for version 18.0.
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<li><a href="history.html#a18.0.2">What’s new</a>
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– release notes for version 18.0.2.
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<ul>
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– a record of all release notes.</li>
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<p class="title"><a href="#a-607326758">Tip 1</a>. Add support for your Verilog simulator</p>
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Write a <a href="http://rubyforge.org/tracker/?group_id=1339">support request</a> for your simulator, while providing a sample transcript of the commands you use to run a test with your simulator, and I will add support for your simulator in the next release!
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You can tune your installation of Ruby-VPI for maximum performance by adding your C compiler’s optimization flag to the <code class="code"><span style="color:#036; font-weight:bold">CFLAGS</span></code> environment variable <em>before</em> you run the <pre>gem install -y ruby-vpi</pre> command. For example, if your C compiler is GCC, then you can set <code class="code"><span style="color:#036; font-weight:bold">CFLAGS</span></code> to <tt>-O9</tt> for maximum optimization.
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|
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|
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|
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|
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<p class="title"><a href="#a-607223748">Tip 4</a>. What can the test runner do?</p>
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If you invoke the test runner (1) without any arguments or (2) with the <tt>--tasks</tt> option, it will show you a list of tasks that it can perform for you.
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<p class="title"><a href="#a-607235998">Example 11</a>. Implementation of a simple up-counter with synchronous reset</p>
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<ul><li><span class="hide">1 </span><a id="a-607241338" href="#Ruby-VPI_18.0.2_user_manual">Ruby-VPI 18.0.2 user manual</a><ul><li><span class="hide">1.1 </span><a id="a-607234498" href="#About_this_manual">About this manual</a></li><li><span class="hide">1.2 </span><a id="a-607237028" href="#Legal_notice">Legal notice</a></li></ul></li><li><span class="hide">2 </span><a id="a-607321098" href="#intro">Welcome</a><ul><li><span class="hide">2.1 </span><a id="a-607255258" href="#resources">Resources</a><ul><li><span class="hide">2.1.1 </span><a id="a-607244578" href="#Records">Records</a></li><li><span class="hide">2.1.2 </span><a id="a-607246958" href="#Documentation">Documentation</a></li><li><span class="hide">2.1.3 </span><a id="a-607249658" href="#Facilities">Facilities</a></li></ul></li><li><span class="hide">2.2 </span><a id="a-607267568" href="#intro.features">Features</a><ul><li><span class="hide">2.2.1 </span><a id="a-607257898" href="#Portable">Portable</a></li><li><span class="hide">2.2.2 </span><a id="a-607260298" href="#Agile">Agile</a></li><li><span class="hide">2.2.3 </span><a id="a-607262698" href="#Powerful">Powerful</a></li></ul></li><li><span class="hide">2.3 </span><a id="a-607279798" href="#intro.reqs">Requirements</a><ul><li><span class="hide">2.3.1 </span><a id="a-607270208" href="#Verilog_simulator">Verilog simulator</a></li><li><span class="hide">2.3.2 </span><a id="a-607272648" href="#Compilers">Compilers</a></li><li><span class="hide">2.3.3 </span><a id="a-607274968" href="#Libraries">Libraries</a></li></ul></li><li><span class="hide">2.4 </span><a id="a-607282358" href="#intro.applications">Applications</a></li><li><span class="hide">2.5 </span><a id="a-607284958" href="#intro.appetizers">Appetizers</a></li><li><span class="hide">2.6 </span><a id="a-607287828" href="#intro.license">License</a></li><li><span class="hide">2.7 </span><a id="a-607293218" href="#intro.related-works">Related works</a><ul><li><span class="hide">2.7.1 </span><a id="a-607290278" href="#intro.related-works.pli">Ye olde PLI</a></li></ul></li></ul></li><li><span class="hide">3 </span><a id="a-607361758" href="#setup">Setup</a><ul><li><span class="hide">3.1 </span><a id="a-607324288" href="#setup.manifest">Manifest</a></li><li><span class="hide">3.2 </span><a id="a-607329728" href="#setup.reqs">Requirements</a></li><li><span class="hide">3.3 </span><a id="a-607335898" href="#setup.recom">Recommendations</a><ul><li><span class="hide">3.3.1 </span><a id="a-607332558" href="#setup.recom.merger">Text merging tool</a></li></ul></li><li><span class="hide">3.4 </span><a id="a-607345038" href="#setup.inst">Installation</a><ul><li><span class="hide">3.4.1 </span><a id="a-607340978" href="#setup.inst.windows">Installing on Windows</a></li></ul></li><li><span class="hide">3.5 </span><a id="a-607347318" href="#setup.maintenance">Maintenance</a></li></ul></li><li><span class="hide">4 </span><a id="a-607368998" href="#organization">Organization</a><ul><li><span class="hide">4.1 </span><a id="a-607370648" href="#overview.relay">Ruby/Verilog interaction</a></li><li><span class="hide">4.2 </span><a id="a-607376218" href="#organization.tests">Tests</a></li><li><span class="hide">4.3 </span><a id="a-607291858" href="#VPI_in_Ruby">VPI in Ruby</a><ul><li><span class="hide">4.3.1 </span><a id="a-607385138" href="#Deviations_from_the_VPI_standard">Deviations from the VPI standard</a><ul><li><span class="hide">4.3.1.1 </span><a id="a-607378708" href="#Names_are_capitalized">Names are capitalized</a></li><li><span class="hide">4.3.1.2 </span><a id="a-607381208" href="#a_vprintf__is__printf_"><code class="code">vprintf</code> is <code class="code">printf</code></a></li></ul></li><li><span class="hide">4.3.2 </span><a id="a-607236168" href="#vpi.handles">Handles</a><ul><li><span class="hide">4.3.2.1 </span><a id="a-607387798" href="#Shortcuts_for_productivity">Shortcuts for productivity</a></li><li><span class="hide">4.3.2.2 </span><a id="a-607390358" href="#Accessing_a_handle_s_relatives">Accessing a handle’s relatives</a></li><li><span class="hide">4.3.2.3 </span><a id="a-607393298" href="#Accessing_a_handle_s_properties">Accessing a handle’s properties</a></li></ul></li><li><span class="hide">4.3.3 </span><a id="a-607249768" href="#vpi.callbacks">Callbacks</a></li></ul></li></ul></li><li><span class="hide">5 </span><a id="a-607488938" href="#usage">Usage</a><ul><li><span class="hide">5.1 </span><a id="a-607395418" href="#usage.prototyping">Prototyping</a><ul><li><span class="hide">5.1.1 </span><a id="a-607378568" href="#Getting_started">Getting started</a></li><li><span class="hide">5.1.2 </span><a id="a-607383008" href="#How_does_prototyping_work_">How does prototyping work?</a></li></ul></li><li><span class="hide">5.2 </span><a id="a-607403488" href="#usage.debugger">Debugging</a><ul><li><span class="hide">5.2.1 </span><a id="a-607400418" href="#usage.debugger.init">Advanced initialization</a></li></ul></li><li><span class="hide">5.3 </span><a id="a-607420258" href="#usage.test-runner">Test runner</a><ul><li><span class="hide">5.3.1 </span><a id="a-607413148" href="#usage.test-runner.env-vars">Environment variables</a><ul><li><span class="hide">5.3.1.1 </span><a id="a-607406578" href="#Variables_as_command-line_arguments">Variables as command-line arguments</a></li></ul></li></ul></li><li><span class="hide">5.4 </span><a id="a-607439408" href="#usage.tools">Tools</a><ul><li><span class="hide">5.4.1 </span><a id="a-607429588" href="#usage.tools.generate">Automated test generation</a></li><li><span class="hide">5.4.2 </span><a id="a-607431878" href="#usage.tools.convert">Verilog to Ruby conversion</a></li></ul></li><li><span class="hide">5.5 </span><a id="a-607441648" href="#usage.examples">Sample tests</a></li><li><span class="hide">5.6 </span><a id="a-607314468" href="#usage.tutorial">Tutorial</a><ul><li><span class="hide">5.6.1 </span><a id="a-607449058" href="#usage.tutorial.declare-design">Start with a Verilog design</a></li><li><span class="hide">5.6.2 </span><a id="a-607459658" href="#usage.tutorial.generate-test">Generate a test</a></li><li><span class="hide">5.6.3 </span><a id="a-607469758" href="#usage.tutorial.specification">Specify your expectations</a></li><li><span class="hide">5.6.4 </span><a id="a-607475748" href="#usage.tutorial.implement-proto">Implement the prototype</a></li><li><span class="hide">5.6.5 </span><a id="a-607231778" href="#usage.tutorial.test-proto">Verify the prototype</a></li><li><span class="hide">5.6.6 </span><a id="a-607245728" href="#usage.tutorial.implement-design">Implement the design</a></li><li><span class="hide">5.6.7 </span><a id="a-607263938" href="#usage.tutorial.test-design">Verify the design</a></li></ul></li></ul></li><li><span class="hide">6 </span><a id="a-607500728" href="#hacking">Hacking</a><ul><li><span class="hide">6.1 </span><a id="a-607491268" href="#hacking.scm">Getting the source code</a></li><li><span class="hide">6.2 </span><a id="a-607493898" href="#hacking.release-packages">Building release packages</a></li><li><span class="hide">6.3 </span><a id="a-607496128" href="#hacking.manual">Editing this manual</a></li></ul></li><li><span class="hide">7 </span><a id="a-607556918" href="#problems">Known problems</a><ul><li><span class="hide">7.1 </span><a id="a-607529318" href="#problem.ivl">Icarus Verilog</a><ul><li><span class="hide">7.1.1 </span><a id="a-607506698" href="#problems.ivl.vpi_handle_by_name.absolute-paths">Give full paths to Verilog objects</a></li><li><span class="hide">7.1.2 </span><a id="a-607516388" href="#problems.ivl.vpi_handle_by_name.connect-registers">Registers must be connected</a></li><li><span class="hide">7.1.3 </span><a id="a-607518638" href="#problems.ivl.vpi_reset">Vpi::reset</a></li></ul></li><li><span class="hide">7.2 </span><a id="a-607534708" href="#problem.ncsim">Cadence NC-Sim</a><ul><li><span class="hide">7.2.1 </span><a id="a-607531748" href="#problem.ncsim.vpiForceFlag">Cannot force values onto handles</a></li></ul></li></ul></li><li><span class="hide">8 </span><a id="a-607589368" href="#glossary">Glossary</a><ul><li><span class="hide">8.1 </span><a id="a-607559748" href="#glossary.test">Test</a></li><li><span class="hide">8.2 </span><a id="a-607562248" href="#glossary.design">Design</a></li><li><span class="hide">8.3 </span><a id="a-607565008" href="#glossary.specification">Specification</a></li><li><span class="hide">8.4 </span><a id="a-607567228" href="#glossary.expectation">Expectation</a></li><li><span class="hide">8.5 </span><a id="a-607569708" href="#glossary.handle">Handle</a></li><li><span class="hide">8.6 </span><a id="a-607571968" href="#glossary.rake">Rake</a></li><li><span class="hide">8.7 </span><a id="a-607574508" href="#glossary.RSpec">RSpec</a></li><li><span class="hide">8.8 </span><a id="a-607576768" href="#glossary.TDD">Test driven development</a></li><li><span class="hide">8.9 </span><a id="a-607579028" href="#glossary.BDD">Behavior driven development</a></li></ul></li></ul>
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<h1 id="toc:tip">Tips</h1>
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<li><a href="#Add_support_for_your_Verilog_simulator" id="a-
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<li><a href="#Tuning_for_maximum_performance" id="a-
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<li><a href="#Using__kdiff3__with_the_automated_test_generator." id="a-
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<li><a href="#What_can_the_test_runner_do_" id="a-
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<li><a href="#Add_support_for_your_Verilog_simulator" id="a-607326758">Add support for your Verilog simulator</a></li>
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<li><a href="#Tuning_for_maximum_performance" id="a-607338448">Tuning for maximum performance</a></li>
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<li><a href="#Using__kdiff3__with_the_automated_test_generator." id="a-607425508">Using <strong>kdiff3</strong> with the automated test generator.</a></li>
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<li><a href="#What_can_the_test_runner_do_" id="a-607223748">What can the test runner do?</a></li>
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<h1 id="toc:caution">Cautions</h1>
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<li><a href="#Do_not_rename_generated_files" id="a-
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<li><a href="#Do_not_rename_generated_files" id="a-607423018">Do not rename generated files</a></li>
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<h1 id="toc:figure">Figures</h1>
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<li><a href="#fig:method_naming_format" id="a-
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<li><a href="#fig:organization.detail" id="a-607364358">Where does Ruby-VPI fit in?</a></li>
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<li><a href="#fig:ruby_relay" id="a-607367168">Interaction between Ruby and Verilog</a></li>
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<li><a href="#fig:organization" id="a-607373118">Organization of a test in Ruby-VPI</a></li>
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<li><a href="#fig:method_naming_format" id="a-607396098">Method naming format for accessing a handle’s properties</a></li>
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<h1 id="toc:table">Tables</h1>
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<li><a href="#tbl:accessors" id="a-607398528">Possible accessors and their implications</a></li>
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<li><a href="#ex:properties" id="a-607223948">Examples of accessing a handle’s properties</a></li>
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</ol>
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<h1 id="toc:example">Examples</h1>
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<li><a href="#Running_a_test_with_environment_variables" id="a-
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<li><a href="#fig:counter.v_decl" id="a-
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<li><a href="#fig:generate-test.RSpec" id="a-
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<li><a href="#fig:counter.v_impl" id="a-
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<li><a href="#fig:test-design.RSpec" id="a-
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<li><a href="#fig:test-design.unit-test" id="a-
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<li><a href="#ex:TestFoo" id="a-
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<li><a href="#ex:TestFoo_bad" id="a-
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<li><a href="#ex:TestFoo_fix" id="a-
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<li><a href="#ex:callback" id="a-607242918">Using a callback for value change notification</a></li>
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<li><a href="#Running_a_test_with_environment_variables" id="a-607408978">Running a test with environment variables</a></li>
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<li><a href="#fig:counter.v_decl" id="a-607445548">Declaration of a simple up-counter with synchronous reset</a></li>
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<li><a href="#fig:generate-test.RSpec" id="a-607452398">Generating a test with specification in RSpec format</a></li>
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<li><a href="#fig:generate-test.xUnit" id="a-607454858">Generating a test with specification in xUnit format</a></li>
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<li><a href="#fig:RSpec_counter_spec.rb" id="a-607462568">Specification implemented in RSpec format</a></li>
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<li><a href="#fig:xUnit_counter_spec.rb" id="a-607464928">Specification implemented in xUnit format</a></li>
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<li><a href="#fig:counter_proto.rb" id="a-607472348">Ruby prototype of our Verilog design</a></li>
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<li><a href="#fig:test-proto.RSpec" id="a-607478868">Running a test with specification in RSpec format</a></li>
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<li><a href="#fig:test-proto.unit-test" id="a-607481368">Running a test with specification in xUnit format</a></li>
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<li><a href="#fig:counter.v_impl" id="a-607235998">Implementation of a simple up-counter with synchronous reset</a></li>
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<li><a href="#fig:test-design.RSpec" id="a-607252508">Running a test with specification in RSpec format</a></li>
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<li><a href="#fig:test-design.unit-test" id="a-607255018">Running a test with specification in xUnit format</a></li>
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<li><a href="#ex:TestFoo" id="a-607503538">Part of a bench which instantiates a Verilog design</a></li>
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<li><a href="#ex:TestFoo_bad" id="a-607509598">Bad design with unconnected registers</a></li>
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<li><a href="#ex:TestFoo_fix" id="a-607512038">Fixed design with wired registers</a></li>
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</div>
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</body>
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