ruby-vpi 13.0.0 → 14.0.0

data/ext/Rakefile

@@ -54,12 +54,7 @@ file 'swig_wrap.cin' => 'swig_vpi.i' do |t|
   sh %w{swig -ruby -o}, t.name, t.prerequisites[0]
 end
 
-file 'swig_vpi.i' => 'swig_vpi.h'
-
-file 'swig_vpi.h' => 'vpi_user.h' do |t|
-  # avoid problems with SWIG-generated wrapper for VPI vprintf functions which use va_list
-  ruby %{-pe 'gsub /\\bva_list\\b/, "int"' #{t.prerequisites[0]} > #{t.name}}
-end
+file 'swig_vpi.i' => 'vpi_user.h'
 
 # NOTE: since SWIG is not a requirement for users, we should not clobber these generated files
 #CLOBBER.include 'swig_wrap.cin', 'swig_vpi.h'

data/ext/main.c

@@ -36,20 +36,21 @@ void main_init() {
   // load the VPI interface for Ruby
     Init_vpi();
     rb_define_module_function(mVpi, "relay_verilog", main_relay_verilog, 0);
+    rb_define_module_function(mVpi, "relay_ruby_reason", main_relay_ruby_reason, 0);
+
 
   // initialize the Ruby bench
     char* benchFile = getenv("RUBY_VPI__RUBY_BENCH_FILE");
 
     if (benchFile != NULL) {
+      ruby_script(benchFile);
       rb_load_file(benchFile);
     }
     else {
-      common_printf("error: environment variable RUBY_VPI__RUBY_BENCH_FILE is not set.");
+      common_printf("error: environment variable RUBY_VPI__RUBY_BENCH_FILE is uninitialized.");
       exit(EXIT_FAILURE);
     }
 
-    ruby_script(benchFile);
-
   // run the test bench
     ruby_run();
 
@@ -60,3 +61,7 @@ VALUE main_relay_verilog(VALUE arSelf) {
   relay_verilog();
   return arSelf;
 }
+
+VALUE main_relay_ruby_reason(VALUE arSelf) {
+  return SWIG_NewPointerObj(vlog_relay_ruby_reason(), SWIGTYPE_p_t_cb_data, 0);
+}

data/ext/main.h

@@ -37,4 +37,9 @@
   */
   VALUE main_relay_verilog(VALUE arSelf);
 
+  /**
+    Gets the reason (Vpi::S_cb_data) why Verilog relayed to Ruby.
+  */
+  VALUE main_relay_ruby_reason(VALUE arSelf);
+
 #endif

data/ext/relay.c

@@ -28,11 +28,23 @@ pthread_t relay__rubyThread;
 pthread_mutex_t relay__rubyLock;
 pthread_mutex_t relay__verilogLock;
 
+// Body of the ruby thread.
+void* relay_ruby_thread(void* dummy) {
+  main_init();
+  return NULL;
+}
+
 void relay_init() {
   pthread_mutex_init(&relay__rubyLock, NULL);
   pthread_mutex_lock(&relay__rubyLock);
   pthread_mutex_init(&relay__verilogLock, NULL);
   pthread_mutex_lock(&relay__verilogLock);
+
+  // start the ruby thread
+    pthread_create(&relay__rubyThread, 0, relay_ruby_thread, NULL);
+
+    // XXX: freezee verilog because RubyVpi.init_bench will call relay_verilog (which assumes that verilog is frozen)
+    pthread_mutex_lock(&relay__verilogLock);
 }
 
 void relay_ruby() {
@@ -44,15 +56,3 @@ void relay_verilog() {
   pthread_mutex_unlock(&relay__verilogLock);
   pthread_mutex_lock(&relay__rubyLock);
 }
-
-void* relay_main_handshake(void* aDummy) {
-  main_init();
-  return NULL;
-}
-
-void relay_main() {
-  pthread_create(&relay__rubyThread, 0, relay_main_handshake, NULL);
-
-  // XXX: freezee verilog because RubyVpi.init_bench will call relay_verilog (which assumes that verilog is frozen)
-  pthread_mutex_lock(&relay__verilogLock);
-}

data/ext/relay.h

@@ -28,7 +28,7 @@
   #include "common.h"
 
   /**
-    Initialize the relay mechanism, which enables Verilog to transfer control to Ruby and vice versa.
+    Initialize the relay mechanism, which enables Verilog to transfer control to Ruby and vice versa, and start Ruby.
   */
   void relay_init();
 
@@ -42,9 +42,4 @@
   */
   void relay_verilog();
 
-  /**
-    Transfers control to the main layer.
-  */
-  void relay_main();
-
 #endif

data/ext/swig_vpi.i

@@ -3,9 +3,9 @@
 
 /* Parse the header file to generate wrappers */
 %{
-#include "swig_vpi.h"
+#include "vpi_user.h"
 %}
-%include "swig_vpi.h"
+%include "vpi_user.h"
 
 
 /* allows us to set S_cb_data.cb_rtn = Vpi::Vlog_relay_ruby from Ruby */

data/ext/swig_wrap.cin

@@ -1491,9 +1491,10 @@ SWIG_Ruby_SetModule(swig_module_info *pointer)
 #define SWIGTYPE_p_unsigned_char swig_types[17]
 #define SWIGTYPE_p_unsigned_int swig_types[18]
 #define SWIGTYPE_p_unsigned_short swig_types[19]
-#define SWIGTYPE_p_void swig_types[20]
-static swig_type_info *swig_types[22];
-static swig_module_info swig_module = {swig_types, 21, 0, 0, 0, 0};
+#define SWIGTYPE_p_va_list swig_types[20]
+#define SWIGTYPE_p_void swig_types[21]
+static swig_type_info *swig_types[23];
+static swig_module_info swig_module = {swig_types, 22, 0, 0, 0, 0};
 #define SWIG_TypeQuery(name) SWIG_TypeQueryModule(&swig_module, &swig_module, name)
 #define SWIG_MangledTypeQuery(name) SWIG_MangledTypeQueryModule(&swig_module, &swig_module, name)
 
@@ -1511,7 +1512,7 @@ static VALUE mVpi;
 #define SWIG_as_voidptrptr(a) ((void)SWIG_as_voidptr(*a),(void**)(a)) 
 
 
-#include "swig_vpi.h"
+#include "vpi_user.h"
 
 
 #include <limits.h>
@@ -5943,13 +5944,13 @@ fail:
 SWIGINTERN VALUE
 _wrap_vpi_vprintf(int argc, VALUE *argv, VALUE self) {
   PLI_BYTE8 *arg1 = (PLI_BYTE8 *) 0 ;
-  int arg2 ;
+  va_list arg2 ;
   PLI_INT32 result;
   int res1 ;
   char *buf1 = 0 ;
   int alloc1 = 0 ;
-  int val2 ;
-  int ecode2 = 0 ;
+  void *argp2 ;
+  int res2 = 0 ;
   VALUE vresult = Qnil;
   
   if ((argc < 2) || (argc > 2)) {
@@ -5960,11 +5961,17 @@ _wrap_vpi_vprintf(int argc, VALUE *argv, VALUE self) {
     SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "vpi_vprintf" "', argument " "1"" of type '" "PLI_BYTE8 *""'");
   }
   arg1 = buf1;
-  ecode2 = SWIG_AsVal_int(argv[1], &val2);
-  if (!SWIG_IsOK(ecode2)) {
-    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "vpi_vprintf" "', argument " "2"" of type '" "int""'");
-  } 
-  arg2 = (int)(val2);
+  {
+    res2 = SWIG_ConvertPtr(argv[1], &argp2, SWIGTYPE_p_va_list,  0 );
+    if (!SWIG_IsOK(res2)) {
+      SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "vpi_vprintf" "', argument " "2"" of type '" "va_list""'"); 
+    }  
+    if (!argp2) {
+      SWIG_exception_fail(SWIG_ValueError, "invalid null reference " "in method '" "vpi_vprintf" "', argument " "2"" of type '" "va_list""'");
+    } else {
+      arg2 = *((va_list *)(argp2));
+    }
+  }
   result = (PLI_INT32)vpi_vprintf(arg1,arg2);
   
   vresult = SWIG_From_int((int)(result));
@@ -5980,15 +5987,15 @@ SWIGINTERN VALUE
 _wrap_vpi_mcd_vprintf(int argc, VALUE *argv, VALUE self) {
   PLI_UINT32 arg1 ;
   PLI_BYTE8 *arg2 = (PLI_BYTE8 *) 0 ;
-  int arg3 ;
+  va_list arg3 ;
   PLI_INT32 result;
   unsigned int val1 ;
   int ecode1 = 0 ;
   int res2 ;
   char *buf2 = 0 ;
   int alloc2 = 0 ;
-  int val3 ;
-  int ecode3 = 0 ;
+  void *argp3 ;
+  int res3 = 0 ;
   VALUE vresult = Qnil;
   
   if ((argc < 3) || (argc > 3)) {
@@ -6004,11 +6011,17 @@ _wrap_vpi_mcd_vprintf(int argc, VALUE *argv, VALUE self) {
     SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "vpi_mcd_vprintf" "', argument " "2"" of type '" "PLI_BYTE8 *""'");
   }
   arg2 = buf2;
-  ecode3 = SWIG_AsVal_int(argv[2], &val3);
-  if (!SWIG_IsOK(ecode3)) {
-    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "vpi_mcd_vprintf" "', argument " "3"" of type '" "int""'");
-  } 
-  arg3 = (int)(val3);
+  {
+    res3 = SWIG_ConvertPtr(argv[2], &argp3, SWIGTYPE_p_va_list,  0 );
+    if (!SWIG_IsOK(res3)) {
+      SWIG_exception_fail(SWIG_ArgError(res3), "in method '" "vpi_mcd_vprintf" "', argument " "3"" of type '" "va_list""'"); 
+    }  
+    if (!argp3) {
+      SWIG_exception_fail(SWIG_ValueError, "invalid null reference " "in method '" "vpi_mcd_vprintf" "', argument " "3"" of type '" "va_list""'");
+    } else {
+      arg3 = *((va_list *)(argp3));
+    }
+  }
   result = (PLI_INT32)vpi_mcd_vprintf(arg1,arg2,arg3);
   
   vresult = SWIG_From_int((int)(result));
@@ -6170,6 +6183,7 @@ static swig_type_info _swigt__p_t_vpi_vlog_info = {"_p_t_vpi_vlog_info", "struct
 static swig_type_info _swigt__p_unsigned_char = {"_p_unsigned_char", "unsigned char *|PLI_UBYTE8 *", 0, 0, (void*)0, 0};
 static swig_type_info _swigt__p_unsigned_int = {"_p_unsigned_int", "unsigned int *|vpiHandle", 0, 0, (void*)0, 0};
 static swig_type_info _swigt__p_unsigned_short = {"_p_unsigned_short", "unsigned short *|PLI_UINT16 *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_va_list = {"_p_va_list", "va_list *", 0, 0, (void*)0, 0};
 static swig_type_info _swigt__p_void = {"_p_void", "void *", 0, 0, (void*)0, 0};
 
 static swig_type_info *swig_type_initial[] = {
@@ -6193,6 +6207,7 @@ static swig_type_info *swig_type_initial[] = {
   &_swigt__p_unsigned_char,
   &_swigt__p_unsigned_int,
   &_swigt__p_unsigned_short,
+  &_swigt__p_va_list,
   &_swigt__p_void,
 };
 
@@ -6216,6 +6231,7 @@ static swig_cast_info _swigc__p_t_vpi_vlog_info[] = {  {&_swigt__p_t_vpi_vlog_in
 static swig_cast_info _swigc__p_unsigned_char[] = {  {&_swigt__p_unsigned_char, 0, 0, 0},{0, 0, 0, 0}};
 static swig_cast_info _swigc__p_unsigned_int[] = {  {&_swigt__p_unsigned_int, 0, 0, 0},{0, 0, 0, 0}};
 static swig_cast_info _swigc__p_unsigned_short[] = {  {&_swigt__p_unsigned_short, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_va_list[] = {  {&_swigt__p_va_list, 0, 0, 0},{0, 0, 0, 0}};
 static swig_cast_info _swigc__p_void[] = {  {&_swigt__p_void, 0, 0, 0},{0, 0, 0, 0}};
 
 static swig_cast_info *swig_cast_initial[] = {
@@ -6239,6 +6255,7 @@ static swig_cast_info *swig_cast_initial[] = {
   _swigc__p_unsigned_char,
   _swigc__p_unsigned_int,
   _swigc__p_unsigned_short,
+  _swigc__p_va_list,
   _swigc__p_void,
 };
 

data/ext/verilog.h

@@ -55,7 +55,7 @@
     #define verilog_tf_funcPtr verilog_tf_funcPtr_strict
 
     #define verilog_tf_funcSig(aFuncName) \
-      PLI_INT32 aFuncName(PLI_BYTE8* aArg)
+      PLI_INT32 aFuncName(PLI_BYTE8* aCallbackData)
 
     #define verilog_tf_funcReturn(aReturnVal) \
       return aReturnVal
@@ -66,7 +66,7 @@
     PLI_INT32 (*aPtrName)(p_cb_data)
 
   #define verilog_cb_funcSig(aFuncName) \
-    PLI_INT32 aFuncName(p_cb_data aArg)
+    PLI_INT32 aFuncName(p_cb_data aCallbackData)
 
   #define verilog_cb_funcReturn(aReturnVal) \
     return aReturnVal

data/ext/vlog.c

@@ -23,17 +23,24 @@
 #include "relay.h"
 
 
-verilog_cb_funcSig(vlog_relay_main) {
+s_cb_data* vlog__relayReason = NULL;
+
+verilog_cb_funcSig(vlog_relay_init) {
   relay_init();
-  relay_main();
   verilog_cb_funcReturn(0);
 }
 
 verilog_cb_funcSig(vlog_relay_ruby) {
+  vlog__relayReason = aCallbackData;
   relay_ruby();
+
   verilog_cb_funcReturn(0);
 }
 
+s_cb_data* vlog_relay_ruby_reason() {
+  return vlog__relayReason;
+}
+
 
 /**
   Registers a callback at start of simulation to vlog_relay_main();
@@ -42,7 +49,7 @@ void vlog_startup() {
   s_cb_data call;
 
   call.reason = cbStartOfSimulation;
-  call.cb_rtn = vlog_relay_main;
+  call.cb_rtn = vlog_relay_init;
   call.obj = NULL;
   call.time = NULL;
   call.value = NULL;

data/ext/vlog.h

@@ -28,13 +28,13 @@
   #include "verilog.h"
 
   /**
-    Relays control to the main layer.
+    Relays control from Verilog to Ruby.
   */
-  verilog_cb_funcSig(vlog_relay_main);
+  verilog_cb_funcSig(vlog_relay_ruby);
 
   /**
-    Relays control from Verilog to Ruby.
+    Returns the data corresponding to the callback that caused the relay from Verilog to Ruby.
   */
-  verilog_cb_funcSig(vlog_relay_ruby);
+  s_cb_data* vlog_relay_ruby_reason();
 
 #endif

data/lib/ruby-vpi/vpi.rb

@@ -21,6 +21,18 @@
 =end
 
 module Vpi
+  # Number of bits in PLI_INT32.
+  INTEGER_BITS = 32
+
+  # Lowest upper bound of PLI_INT32.
+  INTEGER_LIMIT = 2 ** INTEGER_BITS
+
+  # Bit-mask capable of capturing PLI_INT32.
+  INTEGER_MASK = INTEGER_LIMIT - 1
+
+
+  ## handles
+
   Handle = SWIG::TYPE_p_unsigned_int
 
   # An object inside a Verilog simulation (see *vpiHandle* in IEEE Std. 1364-2005).
@@ -214,6 +226,8 @@ module Vpi
     alias to_s inspect
 
 
+    ## properties
+
     @@propCache = Hash.new {|h, k| h[k] = Property.resolve(k)}
 
     # Provides access to this handle's
@@ -354,4 +368,104 @@ module Vpi
       end
     end
   end
+
+
+  ## callbacks
+
+  Callback = Struct.new :handler, :token #:nodoc:
+  @@callbacks = {}
+
+  alias vpi_register_cb_old vpi_register_cb
+
+  # This is a Ruby version of the vpi_register_cb C function. It is identical to the C function, except for the following differences:
+  # * This method accepts a block (callback handler) which is executed whenever the callback occurs.
+  # * This method overwrites the +cb_rtn+ and +user_data+ fields of the given +S_cb_data+ object.
+  def vpi_register_cb aData, &aHandler # :yields: Vpi::S_cb_data
+    raise ArgumentError, "block must be given" unless block_given?
+
+    key = aHandler.object_id.to_s
+
+    # register the callback with Verilog
+      aData.user_data = key
+      aData.cb_rtn = Vlog_relay_ruby
+      token = vpi_register_cb_old(aData)
+
+    @@callbacks[key] = Callback.new(aHandler, token)
+    token
+  end
+
+  alias vpi_remove_cb_old vpi_remove_cb
+
+  def vpi_remove_cb aData # :nodoc:
+    key = aData.user_data
+
+    if c = @@callbacks[key]
+      vpi_remove_cb_old c.token
+      @@callbacks.delete key
+    end
+  end
+
+  # Proxy for relay_verilog which supports callbacks.
+  # This method should NOT be invoked from callback handlers (see vpi_register_cb) and threads -- otherwise the situation will be like seven remote controls changing the channel on a single television set!
+  def relay_verilog_proxy # :nodoc:
+    loop do
+      relay_verilog
+
+      if reason = relay_ruby_reason # might be nil
+        dst = reason.user_data
+
+        if c = @@callbacks[dst]
+          c.handler.call reason
+        else
+          break # main thread is receiver
+        end
+      end
+    end
+  end
+
+
+  ## simulation control
+
+  # Simulates the design under test according to RubyVpi.init_bench.
+  def simulate
+    # this is a dummy method!
+  end
+
+  # Advances the simulation by the given number of steps.
+  def advance_time aNumSteps = 1
+    # schedule wake-up callback from verilog
+      time = S_vpi_time.new
+      time.low = aNumSteps & INTEGER_MASK
+      time.high = (aNumSteps >> INTEGER_BITS) & INTEGER_MASK
+      time.type = VpiSimTime
+
+      value = S_vpi_value.new
+      value.format = VpiSuppressVal
+
+      alarm = S_cb_data.new
+      alarm.reason = CbAfterDelay
+      alarm.cb_rtn = Vlog_relay_ruby
+      alarm.obj = nil
+      alarm.time = time
+      alarm.value = value
+      alarm.index = 0
+      alarm.user_data = nil
+
+      vpi_free_object(vpi_register_cb_old(alarm))
+
+    # relay to verilog
+      relay_verilog_proxy
+  end
+
+
+  ## utility
+
+  # Returns the current simulation time as a 64-bit integer.
+  def simulation_time
+    t = S_vpi_time.new
+    t.type = VpiSimTime
+
+    vpi_get_time nil, t
+    (t.high << INTEGER_BITS) | t.low
+  end
 end

data/lib/ruby-vpi.rb

@@ -19,44 +19,32 @@
 =end
 
 module RubyVpi
-  # Initializes the bench by loading:
-  # 1. the design.rb file
-  # 2. the proto.rb file if prototyping is enabled
-  # 3. the spec.rb file
+  # Initializes the bench by setting up code coverage, the interactive debugger, and so on:
+  # 1. loads the design.rb file
+  # 2. loads the proto.rb file if prototyping is enabled
+  # 3. loads the spec.rb file
   #
-  # aDesignId:: The name of the Ruby design object.
-  # aSpecFormat:: The format being used by the specification.
-  # aClockTrigger:: When the return value of this block is +true+, then the relay_verilog method returns. This block is given one argument: a handle to the clock signal that drives the design under test. If this block is not specified, relay_verilog will always return upon the next positive edge of the clock signal.
+  # aDesignId:: The name of the Ruby object which gives access to the design under test.
+  # aSpecFormat:: The name of the format being used by the specification.
+  # aSimulationCycle:: A block that simulates the design under test by, for example, toggling the clock signal.
   #
-  #   # return upon positive edge
-  #   RubyVpi.init_bench ... |clk|
-  #     clk.intVal == 1
-  #   end
-  #
-  #   # return upon negative edge
-  #   RubyVpi.init_bench ... do |clk|
-  #     clk.intVal == 0
-  #   end
-  #
-  #   # return whenever clock changes
-  #   RubyVpi.init_bench ... do |clk|
-  #     true
-  #   end
-  #
-  def RubyVpi.init_bench aDesignId, aSpecFormat, &aClockTrigger # :yields: clock_signal
+  def RubyVpi.init_bench aDesignId, aSpecFormat, &aSimulationCycle
+    raise ArgumentError, "block must be given" unless block_given?
+
     if caller.find {|s| s =~ /^(.*?)_bench.rb:/}
       testName = $1
     else
       raise 'Unable to determine name of test.'
     end
 
-    aClockTrigger ||= lambda {|clk| clk.intVal == 1}
-
     useDebugger = !(ENV['DEBUG'] || '').empty?
     useCoverage = !(ENV['COVERAGE'] || '').empty?
     usePrototype = !(ENV['PROTOTYPE'] || '').empty?
 
     # set up code coverage analysis
+      # XXX: this is loaded *before* RCov to prevent coverage statistics about it
+      require 'ruby-vpi/vpi'
+
       if useCoverage
         require 'ruby-vpi/rcov'
 
@@ -104,8 +92,6 @@ module RubyVpi
         end
 
     # set up the VPI utility layer
-      require 'ruby-vpi/vpi'
-
       Object.class_eval do
         include Vpi
       end
@@ -123,48 +109,24 @@ module RubyVpi
         require "#{testName}_proto.rb"
 
         Vpi.module_eval do
-          define_method :relay_verilog do
+          define_method :simulate do
             design.simulate!
           end
+
+          define_method :vpi_register_cb do
+            warn "vpi_register_cb: callbacks not allowed when prototyping"
+          end
         end
 
         Vpi::vpi_printf "#{Config::PROJECT_NAME}: prototype is enabled for test #{testName.inspect}\n"
 
-    # trigger relay_verilog according to aClockTrigger
       else
-        regs = design[VpiReg].sort_by {|h| h.lineNo}
-        clock = regs.first
-
         Vpi.module_eval do
-          # register callback for relay_verilog
-            time = S_vpi_time.new
-            time.type = VpiSuppressTime
-
-            value = S_vpi_value.new
-            value.format = VpiSuppressVal
-
-            alarm = S_cb_data.new
-            alarm.reason = CbValueChange
-            alarm.cb_rtn = Vlog_relay_ruby
-            alarm.obj = clock
-            alarm.time = time
-            alarm.value = value
-            alarm.index = 0
-            alarm.user_data = nil
-
-            vpi_free_object(vpi_register_cb(alarm))
-
-          alias_method :relay_verilog_old, :relay_verilog
-
-          define_method :relay_verilog do
-            begin
-              relay_verilog_old
-            end until aClockTrigger.call(clock)
-          end
+          define_method :simulate, &aSimulationCycle
         end
 
-        # XXX: this completes the handshake with pthread_mutex_lock() in relay_main() in the C extension
-        relay_verilog_old
+        # XXX: this completes the handshake, by calling relay_verilog, with pthread_mutex_lock() in relay_main() in the C extension
+        advance_time
       end
 
     # load the design's specification

data/ref/c/annotated.html

@@ -27,7 +27,7 @@
   <tr><td class="indexkey"><a class="el" href="structt__vpi__vecval.html">t_vpi_vecval</a></td><td class="indexvalue"></td></tr>
   <tr><td class="indexkey"><a class="el" href="structt__vpi__vlog__info.html">t_vpi_vlog_info</a></td><td class="indexvalue"></td></tr>
 </table>
-<hr size="1"><address style="align: right;"><small>Generated on Wed Dec 27 22:29:46 2006 for Ruby-VPI by&nbsp;
+<hr size="1"><address style="align: right;"><small>Generated on Sat Dec 30 19:26:26 2006 for Ruby-VPI by&nbsp;
 <a href="http://www.doxygen.org/index.html">
 <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.7 </small></address>
 </body>

data/ref/c/common_8h.html

@@ -140,7 +140,7 @@ Pass aroung this value instead of zero and non-zero integers. <dl compact><dt><b
 
 </div>
 </div><p>
-<hr size="1"><address style="align: right;"><small>Generated on Wed Dec 27 22:29:46 2006 for Ruby-VPI by&nbsp;
+<hr size="1"><address style="align: right;"><small>Generated on Sat Dec 30 19:26:25 2006 for Ruby-VPI by&nbsp;
 <a href="http://www.doxygen.org/index.html">
 <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.7 </small></address>
 </body>

data/ref/c/files.html

@@ -27,7 +27,7 @@
   <tr><td class="indexkey"><a class="el" href="vlog_8h.html">vlog.h</a></td><td class="indexvalue">Interface between C and Verilog code </td></tr>
   <tr><td class="indexkey"><a class="el" href="vpi__user_8h.html">vpi_user.h</a></td><td class="indexvalue"></td></tr>
 </table>
-<hr size="1"><address style="align: right;"><small>Generated on Wed Dec 27 22:29:46 2006 for Ruby-VPI by&nbsp;
+<hr size="1"><address style="align: right;"><small>Generated on Sat Dec 30 19:26:26 2006 for Ruby-VPI by&nbsp;
 <a href="http://www.doxygen.org/index.html">
 <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.7 </small></address>
 </body>

data/ref/c/functions.html

@@ -125,7 +125,7 @@ Here is a list of all struct and union fields with links to the structures/union
 : <a class="el" href="structt__cb__data.html#5039bb34ac75410ff93cbe44515b3543">t_cb_data</a>, <a class="el" href="structt__vpi__value.html#73c4197b95dc5a8f4e8f0754e776d796">t_vpi_value</a><li>vector
 : <a class="el" href="structt__vpi__value.html#b363de5e581f84f9da4610dade8136df">t_vpi_value</a><li>version
 : <a class="el" href="structt__vpi__vlog__info.html#3ff076199159904aa9869e0fb1476bad">t_vpi_vlog_info</a></ul>
-<hr size="1"><address style="align: right;"><small>Generated on Wed Dec 27 22:29:46 2006 for Ruby-VPI by&nbsp;
+<hr size="1"><address style="align: right;"><small>Generated on Sat Dec 30 19:26:26 2006 for Ruby-VPI by&nbsp;
 <a href="http://www.doxygen.org/index.html">
 <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.7 </small></address>
 </body>

data/ref/c/functions_vars.html

@@ -125,7 +125,7 @@
 : <a class="el" href="structt__cb__data.html#5039bb34ac75410ff93cbe44515b3543">t_cb_data</a>, <a class="el" href="structt__vpi__value.html#73c4197b95dc5a8f4e8f0754e776d796">t_vpi_value</a><li>vector
 : <a class="el" href="structt__vpi__value.html#b363de5e581f84f9da4610dade8136df">t_vpi_value</a><li>version
 : <a class="el" href="structt__vpi__vlog__info.html#3ff076199159904aa9869e0fb1476bad">t_vpi_vlog_info</a></ul>
-<hr size="1"><address style="align: right;"><small>Generated on Wed Dec 27 22:29:46 2006 for Ruby-VPI by&nbsp;
+<hr size="1"><address style="align: right;"><small>Generated on Sat Dec 30 19:26:26 2006 for Ruby-VPI by&nbsp;
 <a href="http://www.doxygen.org/index.html">
 <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.7 </small></address>
 </body>

data/ref/c/globals.html

@@ -49,7 +49,7 @@ Here is a list of all functions, variables, defines, enums, and typedefs with li
 <h3><a class="anchor" name="index_b">- b -</a></h3><ul>
 <li>bool
 : <a class="el" href="common_8h.html#f6a258d8f3ee5206d682d799316314b1">common.h</a></ul>
-<hr size="1"><address style="align: right;"><small>Generated on Wed Dec 27 22:29:46 2006 for Ruby-VPI by&nbsp;
+<hr size="1"><address style="align: right;"><small>Generated on Sat Dec 30 19:26:26 2006 for Ruby-VPI by&nbsp;
 <a href="http://www.doxygen.org/index.html">
 <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.7 </small></address>
 </body>

data/ref/c/globals_0x63.html

@@ -80,7 +80,7 @@ Here is a list of all functions, variables, defines, enums, and typedefs with li
 : <a class="el" href="common_8h.html#f30d3fc89fbb3ed2aab2f5904ab76815">common.h</a><li>common_debug
 : <a class="el" href="common_8h.html#fcdad79cb06a5c61737b2f434218dc95">common.h</a><li>common_printf
 : <a class="el" href="common_8h.html#88235e5f8aab82571d68045e9f73fe81">common.h</a></ul>
-<hr size="1"><address style="align: right;"><small>Generated on Wed Dec 27 22:29:46 2006 for Ruby-VPI by&nbsp;
+<hr size="1"><address style="align: right;"><small>Generated on Sat Dec 30 19:26:26 2006 for Ruby-VPI by&nbsp;
 <a href="http://www.doxygen.org/index.html">
 <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.7 </small></address>
 </body>