ruby-vpi 12.1.0 → 13.0.0

data/ext/relay.c

@@ -20,12 +20,8 @@
 */
 
 #include "relay.h"
-
-#include "swig.h"
-#include "common.h"
+#include "main.h"
 #include <pthread.h>
-#include <ruby.h>
-#include <assert.h>
 
 
 pthread_t relay__rubyThread;
@@ -49,86 +45,14 @@ void relay_verilog() {
   pthread_mutex_lock(&relay__rubyLock);
 }
 
-/**
-  Stores command-line options for the Ruby interpreter.
-*/
-typedef struct {
-  PLI_BYTE8** mArgs;	/// Array of command-line arguments.
-  unsigned int mCount;	/// Number of command-line arguments.
-} relay__RubyOptions__def;
-
-/**
-  @param	apRubyOptions	relay__RubyOptions__def structure which contains command-line options passsed to the Ruby interpreter.
-  @note	The structure will be freed *deeply* after use.
-*/
-void* ruby_run_handshake(void* apRubyOptions) {
-  ruby_init();
-  ruby_init_loadpath();
-
-  swig_init();
-
-  // pass command-line arguments to the interpreter
-    relay__RubyOptions__def* pRubyOptions = (relay__RubyOptions__def*) apRubyOptions;
-
-    PLI_BYTE8** argv = pRubyOptions->mArgs;
-    unsigned int argc = pRubyOptions->mCount;
-
-    ruby_options(argc, argv);
-
-  // free the memory used by command-line options
-    unsigned int i;
-    for (i = 0; i < argc; i++) {
-      free(argv[i]);
-    }
-
-    free(argv);
-    free(pRubyOptions);
-
-  ruby_run();
-  ruby_finalize();
-
+void* relay_main_handshake(void* aDummy) {
+  main_init();
   return NULL;
 }
 
-void relay_ruby_run() {
-  relay__RubyOptions__def* pRubyOptions = malloc(sizeof(relay__RubyOptions__def));
-
-  if (pRubyOptions) {
-    pRubyOptions->mArgs = NULL;
-    pRubyOptions->mCount = 0;
-
-    // transform the arguments passed to this function by Verilog into command-line arguments for Ruby interpeter
-      vpiHandle vCall = vpi_handle(vpiSysTfCall, NULL);
-
-      if (vCall) {
-        vpiHandle vCallArgs = vpi_iterate(vpiArgument, vCall);
-
-        if (vCallArgs) {
-          vpiHandle vArg;
-          s_vpi_value argVal;
-          argVal.format = vpiStringVal;
-
-          while (vArg = vpi_scan(vCallArgs)) {
-            pRubyOptions->mCount++;
+void relay_main() {
+  pthread_create(&relay__rubyThread, 0, relay_main_handshake, NULL);
 
-            // grow the options struct to hold more options
-              if (pRubyOptions->mArgs == NULL)
-                pRubyOptions->mArgs = malloc(sizeof(PLI_BYTE8*) * pRubyOptions->mCount);
-              else
-                pRubyOptions->mArgs = realloc(pRubyOptions->mArgs, sizeof(PLI_BYTE8*) * pRubyOptions->mCount);
-
-              assert(pRubyOptions->mArgs != NULL);
-
-            vpi_get_value(vArg, &argVal);
-            pRubyOptions->mArgs[pRubyOptions->mCount - 1] = strdup(argVal.value.str);
-          }
-        }
-      }
-
-    pthread_create(&relay__rubyThread, 0, ruby_run_handshake, pRubyOptions);
-    return;
-  }
-
-  common_printf("error: unable to allocate memory for Ruby's command-line arguments.");
-  exit(EXIT_FAILURE);
+  // XXX: freezee verilog because RubyVpi.init_bench will call relay_verilog (which assumes that verilog is frozen)
+  pthread_mutex_lock(&relay__verilogLock);
 }

data/ext/relay.h

@@ -25,24 +25,26 @@
 #ifndef RELAY_H
 #define RELAY_H
 
+  #include "common.h"
+
   /**
-    Initialize the relay mechanism, which enables Verilog code to transfer control to Ruby code and vice versa.
+    Initialize the relay mechanism, which enables Verilog to transfer control to Ruby and vice versa.
   */
   void relay_init();
 
   /**
-    Transfers control to Ruby code.
+    Transfers control to Ruby.
   */
   void relay_ruby();
 
   /**
-    Transfers control to Verilog code.
+    Transfers control to Verilog.
   */
   void relay_verilog();
 
   /**
-    Starts the Ruby interpreter.
+    Transfers control to the main layer.
   */
-  inline void relay_ruby_run();
+  void relay_main();
 
 #endif

data/ext/swig_vpi.i

@@ -1,8 +1,15 @@
 %module vpi
+
+
+/* Parse the header file to generate wrappers */
 %{
-/* Includes the header in the wrapper code */
 #include "swig_vpi.h"
 %}
-
-/* Parse the header file to generate wrappers */
 %include "swig_vpi.h"
+
+
+/* allows us to set S_cb_data.cb_rtn = Vpi::Vlog_relay_ruby from Ruby */
+%{
+#include "vlog.h"
+%}
+%constant PLI_INT32 vlog_relay_ruby(struct t_cb_data *);

data/ext/swig_wrap.cin

@@ -1511,7 +1511,6 @@ static VALUE mVpi;
 #define SWIG_as_voidptrptr(a) ((void)SWIG_as_voidptr(*a),(void**)(a)) 
 
 
-/* Includes the header in the wrapper code */
 #include "swig_vpi.h"
 
 
@@ -1766,6 +1765,9 @@ SWIG_FromCharPtr(const char *cptr)
   return SWIG_FromCharPtrAndSize(cptr, (cptr ? strlen(cptr) : 0));
 }
 
+
+#include "vlog.h"
+
 swig_class cS_vpi_time;
 
 SWIGINTERN VALUE
@@ -7127,5 +7129,6 @@ SWIGEXPORT void Init_vpi(void) {
   rb_define_module_function(mVpi, "vpi_handle_by_multi_index", _wrap_vpi_handle_by_multi_index, -1);
   rb_define_singleton_method(mVpi, "vlog_startup_routines", vlog_startup_routines_get, 0);
   rb_define_singleton_method(mVpi, "vlog_startup_routines=", vlog_startup_routines_set, 1);
+  rb_define_const(mVpi, "Vlog_relay_ruby", SWIG_NewFunctionPtrObj((void *)vlog_relay_ruby, SWIGTYPE_p_f_p_struct_t_cb_data__int));
 }
 

data/ext/verilog.h

@@ -22,25 +22,31 @@
 */
 
 #ifndef VERILOG_H
-#define	VERILOG_H
+#define VERILOG_H
 
-  // Use our verbatim copy of the official IEEE Std. 1364-2005 header file, which was obtained from this URL: <http://www.boydtechinc.com/ptf/archive/ptf_2005/0737.html>
+  /*
+    Use our verbatim copy of the official IEEE Std. 1364-2005 header file, which was obtained from this URL: <http://www.boydtechinc.com/ptf/archive/ptf_2005/0737.html>
+  */
   #include "vpi_user.h"
 
-  // Adjust for the peculiarities of the Verilog simulator being used.
+  /*
+    Adjust for the peculiarities of the Verilog simulator being used.
+  */
   #ifdef SYNOPSYS_VCS
     #define VERILOG_LENIENT
   #endif
 
-  // Do we want to enforce strict compliance with IEEE Std. 1364-2001? If so, Ruby-VPI might not work with Synopsys VCS, but that's not our fault. ;-)
-  #define verilog_tf_funcPtr_strict(aPtrName)	\
+  /*
+    Do we want to enforce strict compliance with IEEE Std. 1364-2001? If so, Ruby-VPI might not work with Synopsys VCS, but that's not our fault. ;-)
+  */
+  #define verilog_tf_funcPtr_strict(aPtrName) \
     PLI_INT32 (*aPtrName)(PLI_BYTE8*)
 
   #ifdef VERILOG_LENIENT
-    #define verilog_tf_funcPtr(aPtrName)	\
+    #define verilog_tf_funcPtr(aPtrName) \
       void (*aPtrName)(void)
 
-    #define verilog_tf_funcSig(aFuncName)	\
+    #define verilog_tf_funcSig(aFuncName) \
       void aFuncName(void)
 
     #define verilog_tf_funcReturn(aReturnVal) \
@@ -48,11 +54,21 @@
   #else
     #define verilog_tf_funcPtr verilog_tf_funcPtr_strict
 
-    #define verilog_tf_funcSig(aFuncName)	\
-      PLI_INT32 aFuncName(PLI_BYTE8* aDummy)
+    #define verilog_tf_funcSig(aFuncName) \
+      PLI_INT32 aFuncName(PLI_BYTE8* aArg)
 
-    #define verilog_tf_funcReturn(aReturnVal)	\
+    #define verilog_tf_funcReturn(aReturnVal) \
       return aReturnVal
   #endif
 
+
+  #define verilog_cb_funcPtr(aPtrName) \
+    PLI_INT32 (*aPtrName)(p_cb_data)
+
+  #define verilog_cb_funcSig(aFuncName) \
+    PLI_INT32 aFuncName(p_cb_data aArg)
+
+  #define verilog_cb_funcReturn(aReturnVal) \
+    return aReturnVal
+
 #endif

data/ext/vlog.c

@@ -20,42 +20,35 @@
 */
 
 #include "vlog.h"
-
 #include "relay.h"
-#include <stdlib.h>
 
 
-verilog_tf_funcSig(vlog_ruby_init) {
+verilog_cb_funcSig(vlog_relay_main) {
   relay_init();
-  relay_ruby_run();
-  verilog_tf_funcReturn(0);
+  relay_main();
+  verilog_cb_funcReturn(0);
 }
 
-verilog_tf_funcSig(vlog_ruby_relay) {
+verilog_cb_funcSig(vlog_relay_ruby) {
   relay_ruby();
-  verilog_tf_funcReturn(0);
+  verilog_cb_funcReturn(0);
 }
 
-void vlog_bind_task(PLI_BYTE8* apTaskName, verilog_tf_funcPtr(apTaskDef)) {
-  s_vpi_systf_data tf;
-
-  tf.type = vpiSysTask;
-  tf.sysfunctype = 0;
-  tf.tfname = apTaskName;
-  tf.calltf = (verilog_tf_funcPtr_strict())apTaskDef;
-  tf.compiletf = NULL;
-  tf.sizetf = NULL;
-  tf.user_data = NULL;
-
-  vpi_register_systf(&tf);
-}
 
 /**
-  Binds the default VPI tasks (provided by Ruby-VPI) before the Verilog simulator begins to simulate.
+  Registers a callback at start of simulation to vlog_relay_main();
 */
 void vlog_startup() {
-  vlog_bind_task("$ruby_init", vlog_ruby_init);
-  vlog_bind_task("$ruby_relay", vlog_ruby_relay);
+  s_cb_data call;
+
+  call.reason = cbStartOfSimulation;
+  call.cb_rtn = vlog_relay_main;
+  call.obj = NULL;
+  call.time = NULL;
+  call.value = NULL;
+  call.user_data = NULL;
+
+  vpi_free_object(vpi_register_cb(&call));
 }
 
 void (*vlog_startup_routines[])() = { vlog_startup, 0 };

data/ext/vlog.h

@@ -24,31 +24,17 @@
 #ifndef VLOG_H
 #define VLOG_H
 
+  #include "common.h"
   #include "verilog.h"
 
-
-  /**
-    Callback for the $ruby_relay VPI task. Transfers control from Verilog to Ruby code.
-  */
-  verilog_tf_funcSig(vlog_ruby_relay);
-
   /**
-    Callback for the $ruby_init VPI task. Initializes and starts the Ruby interpreter with the same arguments as those given to the VPI task-call.
-
-    For example, to start the Ruby interpreter with the "-w" option and with the "hello_world.rb" script, the Verilog code would have a statement like this:
-      - <tt>$ruby_init("-w", "hello_world.rb");</tt>
+    Relays control to the main layer.
   */
-  verilog_tf_funcSig(vlog_ruby_init);
+  verilog_cb_funcSig(vlog_relay_main);
 
   /**
-    Binds a C function to a VPI task, so that Verilog code can invoke the C function by calling the VPI task.
-
-    For example, if we bound a VPI task named "$hello_world" to the C function hello_world(), then the hello_world() function would be invoked whenever Verilog code called the "$hello_world" VPI task.
-
-    @param	apTaskName	Name of the VPI task. For example, "$hello_world".
-
-    @param	apTaskDef	The C function which you want to associate with the given VPI task. For example, hello_world().
+    Relays control from Verilog to Ruby.
   */
-  void vlog_bind_task(PLI_BYTE8* apTaskName, verilog_tf_funcPtr(apTaskDef));
+  verilog_cb_funcSig(vlog_relay_ruby);
 
 #endif

data/lib/ruby-vpi/rcov.rb

@@ -24,7 +24,7 @@ require 'rcov'
 # satisfy dependencies of 'rcov/report'
   require 'xx'
 
-  module XX
+  module XX # :nodoc: all
     module XMLish
       include Markup
 
@@ -53,8 +53,8 @@ module RubyVpi
     end
   end
 
-  # Invokes the given block after code coverage analysis has completed.
-  def RubyVpi.with_coverage_analysis &aBlock # :yields: Rcov::CodeCoverageAnalyzer
+  # Invokes the given block, which yields COVERAGE_ANALYSIS, after code coverage analysis has completed.
+  def RubyVpi.with_coverage_analysis &aBlock # :nodoc:
     if aBlock
       COVERAGE_ANALYSIS_HANDLERS << aBlock
     end

data/lib/ruby-vpi/runner.rb

@@ -51,6 +51,9 @@
     src
   end
 
+# prepare hook for rb_load_file() in main.c
+  ENV['RUBY_VPI__RUBY_BENCH_FILE'] = SIMULATOR_TARGET + '.rb'
+
 
 require 'rake/clean'
 require 'ruby-vpi'
@@ -63,7 +66,7 @@ BOOTSTAP_FUNC = 'vlog_startup_routines_bootstrap'
 
 
 # Returns the path to the Ruby-VPI object file for the given simulator.
-def object_file_path aSimId
+def object_file_path aSimId # :nodoc:
   path = File.join(OBJECT_PATH, "#{PROJECT_ID}.#{aSimId}.so")
 
   unless File.exist? path
@@ -74,7 +77,7 @@ def object_file_path aSimId
 end
 
 # Returns an array of include-directory options.
-def expand_include_dir_options aSimId, aIncludes = SIMULATOR_INCLUDES
+def expand_include_dir_options aSimId, aIncludes = SIMULATOR_INCLUDES # :nodoc:
   prefix = case aSimId
     when :ivl
       '-I'

data/lib/ruby-vpi/vpi.rb

@@ -277,7 +277,7 @@ module Vpi
     Property = Struct.new :type, :name, :operation, :accessor, :assignment
 
     # Resolves the given shorthand name into a description of its VPI property.
-    def Property.resolve aName
+    def Property.resolve aName # :nodoc:
       # parse the given property name
         tokens = aName.to_s.split(/_/)
 

data/lib/ruby-vpi.rb

@@ -26,20 +26,36 @@ module RubyVpi
   #
   # aDesignId:: The name of the Ruby design object.
   # aSpecFormat:: The format being used by the specification.
-  def RubyVpi.init_bench aDesignId, aSpecFormat
+  # aClockTrigger:: When the return value of this block is +true+, then the relay_verilog method returns. This block is given one argument: a handle to the clock signal that drives the design under test. If this block is not specified, relay_verilog will always return upon the next positive edge of the clock signal.
+  #
+  #   # return upon positive edge
+  #   RubyVpi.init_bench ... |clk|
+  #     clk.intVal == 1
+  #   end
+  #
+  #   # return upon negative edge
+  #   RubyVpi.init_bench ... do |clk|
+  #     clk.intVal == 0
+  #   end
+  #
+  #   # return whenever clock changes
+  #   RubyVpi.init_bench ... do |clk|
+  #     true
+  #   end
+  #
+  def RubyVpi.init_bench aDesignId, aSpecFormat, &aClockTrigger # :yields: clock_signal
     if caller.find {|s| s =~ /^(.*?)_bench.rb:/}
       testName = $1
     else
       raise 'Unable to determine name of test.'
     end
 
+    aClockTrigger ||= lambda {|clk| clk.intVal == 1}
+
     useDebugger = !(ENV['DEBUG'] || '').empty?
     useCoverage = !(ENV['COVERAGE'] || '').empty?
     usePrototype = !(ENV['PROTOTYPE'] || '').empty?
 
-    # service the $ruby_init() task
-      Vpi::relay_verilog
-
     # set up code coverage analysis
       if useCoverage
         require 'ruby-vpi/rcov'
@@ -106,13 +122,49 @@ module RubyVpi
       if usePrototype
         require "#{testName}_proto.rb"
 
-        Vpi.class_eval do
+        Vpi.module_eval do
           define_method :relay_verilog do
             design.simulate!
           end
         end
 
         Vpi::vpi_printf "#{Config::PROJECT_NAME}: prototype is enabled for test #{testName.inspect}\n"
+
+    # trigger relay_verilog according to aClockTrigger
+      else
+        regs = design[VpiReg].sort_by {|h| h.lineNo}
+        clock = regs.first
+
+        Vpi.module_eval do
+          # register callback for relay_verilog
+            time = S_vpi_time.new
+            time.type = VpiSuppressTime
+
+            value = S_vpi_value.new
+            value.format = VpiSuppressVal
+
+            alarm = S_cb_data.new
+            alarm.reason = CbValueChange
+            alarm.cb_rtn = Vlog_relay_ruby
+            alarm.obj = clock
+            alarm.time = time
+            alarm.value = value
+            alarm.index = 0
+            alarm.user_data = nil
+
+            vpi_free_object(vpi_register_cb(alarm))
+
+          alias_method :relay_verilog_old, :relay_verilog
+
+          define_method :relay_verilog do
+            begin
+              relay_verilog_old
+            end until aClockTrigger.call(clock)
+          end
+        end
+
+        # XXX: this completes the handshake with pthread_mutex_lock() in relay_main() in the C extension
+        relay_verilog_old
       end
 
     # load the design's specification

data/ref/c/annotated.html

@@ -17,12 +17,6 @@
     <li><a href="functions.html"><span>Data&nbsp;Fields</span></a></li>
   </ul></div>
 <h1>Ruby-VPI Data Structures</h1>Here are the data structures with brief descriptions:<table>
-  <tr><td class="indexkey"><a class="el" href="structrelay____RubyOptions____def.html">relay__RubyOptions__def</a></td><td class="indexvalue">Stores command-line options for the Ruby interpreter </td></tr>
-  <tr><td class="indexkey"><a class="el" href="unions__vpi__value__value.html">s_vpi_value_value</a></td><td class="indexvalue"></td></tr>
-  <tr><td class="indexkey"><a class="el" href="structswig__cast__info.html">swig_cast_info</a></td><td class="indexvalue"></td></tr>
-  <tr><td class="indexkey"><a class="el" href="structswig__class.html">swig_class</a></td><td class="indexvalue"></td></tr>
-  <tr><td class="indexkey"><a class="el" href="structswig__module__info.html">swig_module_info</a></td><td class="indexvalue"></td></tr>
-  <tr><td class="indexkey"><a class="el" href="structswig__type__info.html">swig_type_info</a></td><td class="indexvalue"></td></tr>
   <tr><td class="indexkey"><a class="el" href="structt__cb__data.html">t_cb_data</a></td><td class="indexvalue"></td></tr>
   <tr><td class="indexkey"><a class="el" href="structt__vpi__delay.html">t_vpi_delay</a></td><td class="indexvalue"></td></tr>
   <tr><td class="indexkey"><a class="el" href="structt__vpi__error__info.html">t_vpi_error_info</a></td><td class="indexvalue"></td></tr>
@@ -33,7 +27,7 @@
   <tr><td class="indexkey"><a class="el" href="structt__vpi__vecval.html">t_vpi_vecval</a></td><td class="indexvalue"></td></tr>
   <tr><td class="indexkey"><a class="el" href="structt__vpi__vlog__info.html">t_vpi_vlog_info</a></td><td class="indexvalue"></td></tr>
 </table>
-<hr size="1"><address style="align: right;"><small>Generated on Fri Dec 22 21:43:02 2006 for Ruby-VPI by&nbsp;
+<hr size="1"><address style="align: right;"><small>Generated on Wed Dec 27 22:29:46 2006 for Ruby-VPI by&nbsp;
 <a href="http://www.doxygen.org/index.html">
 <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.7 </small></address>
 </body>

data/ref/c/common_8h.html

@@ -18,6 +18,7 @@
   </ul></div>
 <h1>common.h File Reference</h1>Things common to all Ruby-VPI code. <a href="#_details">More...</a>
 <p>
+<code>#include &lt;stddef.h&gt;</code><br>
 <code>#include &quot;<a class="el" href="verilog_8h.html">verilog.h</a>&quot;</code><br>
 <table border="0" cellpadding="0" cellspacing="0">
 <tr><td></td></tr>
@@ -139,7 +140,7 @@ Pass aroung this value instead of zero and non-zero integers. <dl compact><dt><b
 
 </div>
 </div><p>
-<hr size="1"><address style="align: right;"><small>Generated on Fri Dec 22 21:43:02 2006 for Ruby-VPI by&nbsp;
+<hr size="1"><address style="align: right;"><small>Generated on Wed Dec 27 22:29:46 2006 for Ruby-VPI by&nbsp;
 <a href="http://www.doxygen.org/index.html">
 <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.7 </small></address>
 </body>

data/ref/c/files.html

@@ -18,18 +18,16 @@
   </ul></div>
 <h1>Ruby-VPI File List</h1>Here is a list of all files with brief descriptions:<table>
   <tr><td class="indexkey"><a class="el" href="common_8h.html">common.h</a></td><td class="indexvalue">Things common to all Ruby-VPI code </td></tr>
+  <tr><td class="indexkey"><a class="el" href="main_8c.html">main.c</a></td><td class="indexvalue"></td></tr>
+  <tr><td class="indexkey"><a class="el" href="main_8h.html">main.h</a></td><td class="indexvalue">The C extension for Ruby-VPI </td></tr>
   <tr><td class="indexkey"><a class="el" href="relay_8c.html">relay.c</a></td><td class="indexvalue"></td></tr>
   <tr><td class="indexkey"><a class="el" href="relay_8h.html">relay.h</a></td><td class="indexvalue">Logic for transferring control between Ruby and Verilog </td></tr>
-  <tr><td class="indexkey"><a class="el" href="swig_8c.html">swig.c</a></td><td class="indexvalue"></td></tr>
-  <tr><td class="indexkey"><a class="el" href="swig_8h.html">swig.h</a></td><td class="indexvalue">C interface to the SWIG-generated VPI interface </td></tr>
-  <tr><td class="indexkey"><a class="el" href="swig__vpi_8h.html">swig_vpi.h</a></td><td class="indexvalue"></td></tr>
-  <tr><td class="indexkey"><a class="el" href="swig__wrap_8cin.html">swig_wrap.cin</a></td><td class="indexvalue"></td></tr>
   <tr><td class="indexkey"><a class="el" href="verilog_8h.html">verilog.h</a></td><td class="indexvalue">A proxy for all Verilog headers of interest to us </td></tr>
   <tr><td class="indexkey"><a class="el" href="vlog_8c.html">vlog.c</a></td><td class="indexvalue"></td></tr>
   <tr><td class="indexkey"><a class="el" href="vlog_8h.html">vlog.h</a></td><td class="indexvalue">Interface between C and Verilog code </td></tr>
   <tr><td class="indexkey"><a class="el" href="vpi__user_8h.html">vpi_user.h</a></td><td class="indexvalue"></td></tr>
 </table>
-<hr size="1"><address style="align: right;"><small>Generated on Fri Dec 22 21:43:02 2006 for Ruby-VPI by&nbsp;
+<hr size="1"><address style="align: right;"><small>Generated on Wed Dec 27 22:29:46 2006 for Ruby-VPI by&nbsp;
 <a href="http://www.doxygen.org/index.html">
 <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.7 </small></address>
 </body>