ruby-adept 0.0.1
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- data/.gitignore +17 -0
- data/.travis.yml +6 -0
- data/Gemfile +10 -0
- data/LICENSE.txt +22 -0
- data/README.md +29 -0
- data/Rakefile +16 -0
- data/adept.gemspec +33 -0
- data/autotest/discover.rb +2 -0
- data/bin/bprog +110 -0
- data/firmware/.gitignore +73 -0
- data/firmware/epp_stream/Basys2_100_250General.ucf +21 -0
- data/firmware/epp_stream/epp_controller.vhd +210 -0
- data/firmware/epp_stream/epp_stream.xise +355 -0
- data/firmware/epp_stream/fifo.vhd +178 -0
- data/firmware/epp_stream/tests/fifo_testbench.vhdl +164 -0
- data/lib/adept/boards/basys2.rb +84 -0
- data/lib/adept/boards.rb +2 -0
- data/lib/adept/connection_provider.rb +30 -0
- data/lib/adept/data_formats/bitstream.rb +116 -0
- data/lib/adept/data_formats/data_factories.rb +33 -0
- data/lib/adept/data_formats.rb +2 -0
- data/lib/adept/device.rb +127 -0
- data/lib/adept/error.rb +4 -0
- data/lib/adept/jtag/connection.rb +404 -0
- data/lib/adept/jtag/device.rb +178 -0
- data/lib/adept/jtag/devices/fpga.rb +162 -0
- data/lib/adept/jtag/devices/null.rb +0 -0
- data/lib/adept/jtag/devices/platform_flash.rb +23 -0
- data/lib/adept/jtag/devices.rb +2 -0
- data/lib/adept/jtag/error.rb +8 -0
- data/lib/adept/jtag/tap_state.rb +67 -0
- data/lib/adept/jtag/tap_states.rb +52 -0
- data/lib/adept/jtag.rb +11 -0
- data/lib/adept/low_level/connection.rb +59 -0
- data/lib/adept/low_level/device.rb +43 -0
- data/lib/adept/low_level/device_error.rb +22 -0
- data/lib/adept/low_level/device_manager.rb +142 -0
- data/lib/adept/low_level/enhanced_parallel.rb +151 -0
- data/lib/adept/low_level/error_handler.rb +60 -0
- data/lib/adept/low_level/jtag.rb +379 -0
- data/lib/adept/low_level/library.rb +173 -0
- data/lib/adept/low_level.rb +4 -0
- data/lib/adept/version.rb +3 -0
- data/lib/adept.rb +11 -0
- data/spec/firmware/epp_loopback.bit +0 -0
- data/spec/lib/adept/data_formats/bitstream_spec.rb +95 -0
- data/spec/lib/adept/data_formats/data_factories_spec.rb +42 -0
- data/spec/lib/adept/device_spec.rb +88 -0
- data/spec/lib/adept/jtag/connection_spec.rb +433 -0
- data/spec/lib/adept/jtag/device_spec.rb +107 -0
- data/spec/lib/adept/jtag/devices/fpga_spec.rb +71 -0
- data/spec/lib/adept/low_level/enhanced_parallel_spec.rb +72 -0
- data/spec/lib/adept/low_level/jtag_spec.rb +204 -0
- data/spec/spec_helpers.rb +25 -0
- metadata +240 -0
data/.gitignore
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data/.travis.yml
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data/Gemfile
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data/LICENSE.txt
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Copyright (c) 2012 Kyle J. Temkin
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MIT License
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
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LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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data/README.md
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# Adept
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TODO: Write a gem description
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## Installation
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Add this line to your application's Gemfile:
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gem 'adept'
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And then execute:
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$ bundle
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Or install it yourself as:
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$ gem install adept
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## Usage
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TODO: Write usage instructions here
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## Contributing
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1. Fork it
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2. Create your feature branch (`git checkout -b my-new-feature`)
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3. Commit your changes (`git commit -am 'Add some feature'`)
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4. Push to the branch (`git push origin my-new-feature`)
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5. Create new Pull Request
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data/Rakefile
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require "bundler/gem_tasks"
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task :default => [:test_offline]
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#Offline tests only: don't perform tests that require live hardware.
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task :test_offline do
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sh "rspec -Ilib --tag=~online"
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end
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task :test do
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sh "rspec -Ilib"
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end
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task :install_adept do
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end
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data/adept.gemspec
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# -*- encoding: utf-8 -*-
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lib = File.expand_path('../lib', __FILE__)
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$LOAD_PATH.unshift(lib) unless $LOAD_PATH.include?(lib)
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require 'adept/version'
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Gem::Specification.new do |gem|
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gem.name = "ruby-adept"
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gem.version = Adept::VERSION
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gem.authors = ["Kyle J. Temkin"]
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gem.email = ["ktemkin@binghamton.edu"]
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gem.description =
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'Ruby library for working with Digilent devices via the Adept SDK.
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Provides both low-level wrappers for the Adept SDK elements and high-level
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interfaces, including simple programming and configuration routines.'
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gem.summary = "Framework for working with Digilent Adept devices."
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gem.homepage = "http://www.github.com/ktemkin/ruby-adept"
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gem.add_runtime_dependency 'bindata'
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gem.add_runtime_dependency 'ruby-ise'
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gem.add_runtime_dependency 'trollop'
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gem.add_runtime_dependency 'smart_colored'
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gem.add_runtime_dependency 'ffi'
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gem.add_runtime_dependency 'require_all'
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gem.add_development_dependency 'rspec'
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gem.add_development_dependency 'fakefs'
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gem.files = `git ls-files`.split($/)
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gem.executables = gem.files.grep(%r{^bin/}).map{ |f| File.basename(f) }
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gem.test_files = gem.files.grep(%r{^(test|spec|features)/})
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gem.require_paths = ["lib"]
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end
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data/bin/bprog
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#!/usr/bin/env ruby
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require 'ise'
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require 'adept'
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require 'trollop'
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require 'smart_colored/extend'
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include Adept
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#Add some separation before and after the output, to make it more visible.
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puts
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at_exit { puts }
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#
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#Output a formatted warning message.
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#
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def warn(message)
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puts message.yellow
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end
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#
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#Output a formatted error message.
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#
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def error(message, title="Oops!")
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puts "#{title.bold} #{message}".red
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end
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#
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# Output a formatted error message, and quit.
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#
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def fatal_error(message, title="Oops!")
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error "#{message}", title
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exit
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end
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#
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# Get the currently connected device.
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#
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def get_target_connection(opts={})
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#Ensure that we have a plugged-in board.
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fatal_error "It doesn't look like there's a Digilent board plugged in, on or off." if Device::connected_devices.empty?
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#By default, use the first connected device.
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device = Device::open_first_connected_device
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at_exit { device.close }
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#If the device doesn't support JTAG, we can't program it.
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fatal_error "This device isn't supported." unless device.supported_connections.include?(JTAG::Connection)
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jtag = JTAG::Connection.new(device)
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fatal_error "The power switch is off on your connected board! Turn it on, and try again." if jtag.connected_devices.empty?
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jtag
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end
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#
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# Get the target file.
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#
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def get_target_file(opts={})
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#If a file was provided on the command line, use it.
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file = ARGV.shift if ARGV
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#Attempt to determine the target file automagically.
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unless file
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#Attempt to determine the file.
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file = ISE::ProjectNavigator::most_recent_project.bit_file
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fatal_error "You didn't specify a file to program, and I couldn't figure out a likely candidate.\n Perhaps you still need to generate a programming file?" unless file
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#And warn the user of the file we chose.
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warn "You didn't specify a file to program, so I assumed you wanted me to program:"
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puts "#{File::dirname(file)}/#{File::basename(file).bold}"
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end
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fatal_error "The file you asked me to program doesn't seem to exist." unless File::exists?(file)
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#Return the ascertained file.
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file
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end
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def configure_fpga(jtag, bitfile_path)
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#Find the first connected FPGA.
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fpga = jtag.connected_devices.find { |device| device.is_a? JTAG::Devices::FPGA }
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fatal_error "This board doesn't feature a supported FPGA!" unless fpga
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#Get the bit-file in question.
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bitstream = Adept::DataFormats::Bitstream.from_file(bitfile_path)
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fpga.configure(bitstream)
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end
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connection = get_target_connection
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file = get_target_file
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begin
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configure_fpga(connection, file)
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rescue Error => e
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puts
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fatal_error e.message
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end
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data/firmware/.gitignore
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# intermediate build files
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*.bgn
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*.bit
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*.bld
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*.cmd_log
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*.drc
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*.ll
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*.lso
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*.msd
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*.msk
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*.ncd
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*.ngc
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*.ngd
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*.ngr
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*.pad
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*.par
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*.pcf
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*.prj
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*.ptwx
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*.rbb
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*.rbd
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*.stx
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*.syr
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*.twr
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*.twx
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*.unroutes
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*.ut
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*.xpi
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*.xst
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*_bitgen.xwbt
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*_envsettings.html
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*_map.map
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*_map.mrp
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*_map.ngm
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*_map.xrpt
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*_ngdbuild.xrpt
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*_pad.csv
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*_pad.txt
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*_par.xrpt
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*_summary.html
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*_summary.xml
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*_usage.xml
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*_xst.xrpt
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*.xmsgs
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# IP-core-related generated files
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xaw2vhdl.log
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# project-wide generated files
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*.gise
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par_usage_statistics.html
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usage_statistics_webtalk.html
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webtalk.log
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webtalk_pn.xml
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# generated folders
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iseconfig/
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xlnx_auto_0_xdb/
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xst/
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_ngo/
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_xmsgs/
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#Simulation generated files
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*isim_*.exe
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*isim_*.wdb
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fuse.log
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fuse.log
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fuse.xmsgs
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fuseRelaunch.cmd
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isim.cmd
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isim.log
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isim/
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xilinxsim.ini
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#Basys Board on-board clock.
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NET "clk" LOC = "B8"; # Bank = 0, Signal name = MCLK
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#Reset button.
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NET "reset" LOC = "G12"; #PB12
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#EPP Control Signals
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NET "eppAddrStrobe" LOC = "F2"; # Bank = 3
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NET "eppDataStrobe" LOC = "F1"; # Bank = 3
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NET "eppReadNotWrite" LOC = "C2"; # Bank = 3
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NET "eppAck" LOC = "D2"; # Bank = 3
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#EPP Data Signals
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NET "eppDataBus<0>" LOC = "N2"; # Bank = 2
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NET "eppDataBus<1>" LOC = "M2"; # Bank = 2
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NET "eppDataBus<2>" LOC = "M1"; # Bank = 3
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NET "eppDataBus<3>" LOC = "L1"; # Bank = 3
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NET "eppDataBus<4>" LOC = "L2"; # Bank = 3
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NET "eppDataBus<5>" LOC = "H2"; # Bank = 3
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NET "eppDataBus<6>" LOC = "H1"; # Bank = 3
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NET "eppDataBus<7>" LOC = "H3"; # Bank = 3
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----------------------------------------------------------------------------------
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-- EPP Controller
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--
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-- Original Author: Chris McClelland
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-- Altered for use with EPP periperhals by Kyle Temkin
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--
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-- Portions copyright (c) 2013 Binghamton University
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-- Copyright (c) 2011 Chris McClelland
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--
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-- This program is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program. If not, see <http://www.gnu.org/licenses/>.-
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--
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----------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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|
+
entity TopLevel is
|
31
|
+
port(
|
32
|
+
-- Main 50MHz clock
|
33
|
+
clk : in std_logic;
|
34
|
+
|
35
|
+
-- Reset button (BTN0)
|
36
|
+
reset : in std_logic;
|
37
|
+
|
38
|
+
-- Host interface signals
|
39
|
+
eppDataBus : inout std_logic_vector(7 downto 0);
|
40
|
+
eppAddrStrobe : in std_logic;
|
41
|
+
eppDataStrobe : in std_logic;
|
42
|
+
eppReadNotWrite : in std_logic;
|
43
|
+
eppAck : out std_logic
|
44
|
+
);
|
45
|
+
end TopLevel;
|
46
|
+
|
47
|
+
architecture Behavioural of TopLevel is
|
48
|
+
type State is (-- INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
|
49
|
+
|
50
|
+
STATE_IDLE,
|
51
|
+
|
52
|
+
STATE_ADDR_WRITE_EXEC,
|
53
|
+
STATE_ADDR_WRITE_ACK,
|
54
|
+
|
55
|
+
STATE_DATA_WRITE_EXEC,
|
56
|
+
STATE_DATA_WRITE_ACK,
|
57
|
+
|
58
|
+
STATE_DATA_READ_EXEC,
|
59
|
+
STATE_DATA_READ_ACK
|
60
|
+
);
|
61
|
+
|
62
|
+
-- State and next-state
|
63
|
+
signal iThisState, iNextState : State;
|
64
|
+
|
65
|
+
-- Synchronised versions of asynchronous inputs
|
66
|
+
signal iSyncAddrStrobe : std_logic;
|
67
|
+
signal iSyncDataStrobe : std_logic;
|
68
|
+
signal iSyncReadNotWrite : std_logic;
|
69
|
+
|
70
|
+
-- Data to be mux'd back to host
|
71
|
+
signal iDataOutput : std_logic_vector(7 downto 0);
|
72
|
+
|
73
|
+
-- Registers
|
74
|
+
signal iThisRegAddr, iNextRegAddr : std_logic_vector(1 downto 0);
|
75
|
+
signal iThisAck, iNextAck : std_logic;
|
76
|
+
signal iThisR0, iNextR0 : std_logic_vector(7 downto 0);
|
77
|
+
signal iThisR1, iNextR1 : std_logic_vector(7 downto 0);
|
78
|
+
signal iThisR2, iNextR2 : std_logic_vector(7 downto 0);
|
79
|
+
signal iThisR3, iNextR3 : std_logic_vector(7 downto 0);
|
80
|
+
|
81
|
+
begin
|
82
|
+
|
83
|
+
-- Drive the outputs
|
84
|
+
eppAck <= iThisAck;
|
85
|
+
|
86
|
+
-- EPP operation
|
87
|
+
eppDataBus <=
|
88
|
+
iDataOutput when ( eppReadNotWrite = '1' ) else
|
89
|
+
"ZZZZZZZZ";
|
90
|
+
|
91
|
+
with ( iThisRegAddr ) select
|
92
|
+
iDataOutput <=
|
93
|
+
iThisR0 when "00",
|
94
|
+
iThisR1 when "01",
|
95
|
+
iThisR2 when "10",
|
96
|
+
iThisR3 when others;
|
97
|
+
|
98
|
+
-- Infer registers
|
99
|
+
process(clk, reset)
|
100
|
+
begin
|
101
|
+
if ( reset = '1' ) then
|
102
|
+
iThisState <= STATE_IDLE;
|
103
|
+
iThisRegAddr <= (others => '0');
|
104
|
+
iThisR0 <= (others => '0');
|
105
|
+
iThisR1 <= (others => '0');
|
106
|
+
iThisR2 <= (others => '0');
|
107
|
+
iThisR3 <= (others => '0');
|
108
|
+
iThisAck <= '0';
|
109
|
+
iSyncAddrStrobe <= '1';
|
110
|
+
iSyncDataStrobe <= '1';
|
111
|
+
iSyncReadNotWrite <= '1';
|
112
|
+
elsif ( clk'event and clk = '1' ) then
|
113
|
+
iThisState <= iNextState;
|
114
|
+
iThisRegAddr <= iNextRegAddr;
|
115
|
+
iThisR0 <= iNextR0;
|
116
|
+
iThisR1 <= iNextR1;
|
117
|
+
iThisR2 <= iNextR2;
|
118
|
+
iThisR3 <= iNextR3;
|
119
|
+
iThisAck <= iNextAck;
|
120
|
+
iSyncAddrStrobe <= eppAddrStrobe;
|
121
|
+
iSyncDataStrobe <= eppDataStrobe;
|
122
|
+
iSyncReadNotWrite <= eppReadNotWrite;
|
123
|
+
end if;
|
124
|
+
end process;
|
125
|
+
|
126
|
+
-- Next state logic
|
127
|
+
process(
|
128
|
+
eppDataBus, iThisState, iThisRegAddr,
|
129
|
+
iSyncAddrStrobe, iSyncDataStrobe, iSyncReadNotWrite,
|
130
|
+
iThisR0, iThisR1, iThisR2, iThisR3)
|
131
|
+
begin
|
132
|
+
iNextAck <= '0';
|
133
|
+
iNextState <= STATE_IDLE;
|
134
|
+
iNextRegAddr <= iThisRegAddr;
|
135
|
+
iNextR0 <= iThisR0;
|
136
|
+
iNextR1 <= iThisR1;
|
137
|
+
iNextR2 <= iThisR2;
|
138
|
+
iNextR3 <= iThisR3;
|
139
|
+
case iThisState is
|
140
|
+
when STATE_IDLE =>
|
141
|
+
if ( iSyncAddrStrobe = '0' ) then
|
142
|
+
-- Address can only be written, not read
|
143
|
+
if ( iSyncReadNotWrite = '0' ) then
|
144
|
+
iNextState <= STATE_ADDR_WRITE_EXEC;
|
145
|
+
end if;
|
146
|
+
elsif ( iSyncDataStrobe = '0' ) then
|
147
|
+
-- Register read or write
|
148
|
+
if ( iSyncReadNotWrite = '0' ) then
|
149
|
+
iNextState <= STATE_DATA_WRITE_EXEC;
|
150
|
+
else
|
151
|
+
iNextState <= STATE_DATA_READ_EXEC;
|
152
|
+
end if;
|
153
|
+
end if;
|
154
|
+
|
155
|
+
-- Write address register
|
156
|
+
when STATE_ADDR_WRITE_EXEC =>
|
157
|
+
iNextRegAddr <= eppDataBus(1 downto 0);
|
158
|
+
iNextState <= STATE_ADDR_WRITE_ACK;
|
159
|
+
iNextAck <= '0';
|
160
|
+
when STATE_ADDR_WRITE_ACK =>
|
161
|
+
if ( iSyncAddrStrobe = '0' ) then
|
162
|
+
iNextState <= STATE_ADDR_WRITE_ACK;
|
163
|
+
iNextAck <= '1';
|
164
|
+
else
|
165
|
+
iNextState <= STATE_IDLE;
|
166
|
+
iNextAck <= '0';
|
167
|
+
end if;
|
168
|
+
|
169
|
+
-- Write data register
|
170
|
+
when STATE_DATA_WRITE_EXEC =>
|
171
|
+
case iThisRegAddr is
|
172
|
+
when "00" =>
|
173
|
+
iNextR0 <= eppDataBus;
|
174
|
+
when "01" =>
|
175
|
+
iNextR1 <= eppDataBus;
|
176
|
+
when "10" =>
|
177
|
+
iNextR2 <= eppDataBus;
|
178
|
+
when others =>
|
179
|
+
iNextR3 <= eppDataBus;
|
180
|
+
end case;
|
181
|
+
iNextState <= STATE_DATA_WRITE_ACK;
|
182
|
+
iNextAck <= '1';
|
183
|
+
when STATE_DATA_WRITE_ACK =>
|
184
|
+
if ( iSyncDataStrobe = '0' ) then
|
185
|
+
iNextState <= STATE_DATA_WRITE_ACK;
|
186
|
+
iNextAck <= '1';
|
187
|
+
else
|
188
|
+
iNextState <= STATE_IDLE;
|
189
|
+
iNextAck <= '0';
|
190
|
+
end if;
|
191
|
+
|
192
|
+
-- Read data register
|
193
|
+
when STATE_DATA_READ_EXEC =>
|
194
|
+
iNextAck <= '1';
|
195
|
+
iNextState <= STATE_DATA_READ_ACK;
|
196
|
+
when STATE_DATA_READ_ACK =>
|
197
|
+
if ( iSyncDataStrobe = '0' ) then
|
198
|
+
iNextState <= STATE_DATA_READ_ACK;
|
199
|
+
iNextAck <= '1';
|
200
|
+
else
|
201
|
+
iNextState <= STATE_IDLE;
|
202
|
+
iNextAck <= '0';
|
203
|
+
end if;
|
204
|
+
|
205
|
+
-- Some unknown state
|
206
|
+
when others =>
|
207
|
+
iNextState <= STATE_IDLE;
|
208
|
+
end case;
|
209
|
+
end process;
|
210
|
+
end Behavioural;
|