ring-native 0.0.0 → 0.1.0
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- checksums.yaml +4 -4
- data/.gitignore +1 -0
- data/CHANGES.md +7 -0
- data/Makefile +5 -0
- data/README.md +12 -5
- data/Rakefile +4 -0
- data/ext/ring/extconf.rb +4 -5
- data/lib/ring/native.rb +3 -1
- data/lib/ring/native/version.rb +5 -1
- data/ring-native.gemspec +6 -6
- data/vendor/ring-ffi/Cargo.lock +26 -0
- data/vendor/ring-ffi/Cargo.toml +45 -0
- data/vendor/ring-ffi/LICENSE +16 -0
- data/vendor/ring-ffi/README.md +59 -0
- data/vendor/ring-ffi/src/lib.rs +79 -0
- metadata +10 -255
- data/vendor/ring/BUILDING.md +0 -40
- data/vendor/ring/Cargo.toml +0 -43
- data/vendor/ring/LICENSE +0 -185
- data/vendor/ring/Makefile +0 -35
- data/vendor/ring/PORTING.md +0 -163
- data/vendor/ring/README.md +0 -113
- data/vendor/ring/STYLE.md +0 -197
- data/vendor/ring/appveyor.yml +0 -27
- data/vendor/ring/build.rs +0 -108
- data/vendor/ring/crypto/aes/aes.c +0 -1142
- data/vendor/ring/crypto/aes/aes_test.Windows.vcxproj +0 -25
- data/vendor/ring/crypto/aes/aes_test.cc +0 -93
- data/vendor/ring/crypto/aes/asm/aes-586.pl +0 -2368
- data/vendor/ring/crypto/aes/asm/aes-armv4.pl +0 -1249
- data/vendor/ring/crypto/aes/asm/aes-x86_64.pl +0 -2246
- data/vendor/ring/crypto/aes/asm/aesni-x86.pl +0 -1318
- data/vendor/ring/crypto/aes/asm/aesni-x86_64.pl +0 -2084
- data/vendor/ring/crypto/aes/asm/aesv8-armx.pl +0 -675
- data/vendor/ring/crypto/aes/asm/bsaes-armv7.pl +0 -1364
- data/vendor/ring/crypto/aes/asm/bsaes-x86_64.pl +0 -1565
- data/vendor/ring/crypto/aes/asm/vpaes-x86.pl +0 -841
- data/vendor/ring/crypto/aes/asm/vpaes-x86_64.pl +0 -1116
- data/vendor/ring/crypto/aes/internal.h +0 -87
- data/vendor/ring/crypto/aes/mode_wrappers.c +0 -61
- data/vendor/ring/crypto/bn/add.c +0 -394
- data/vendor/ring/crypto/bn/asm/armv4-mont.pl +0 -694
- data/vendor/ring/crypto/bn/asm/armv8-mont.pl +0 -1503
- data/vendor/ring/crypto/bn/asm/bn-586.pl +0 -774
- data/vendor/ring/crypto/bn/asm/co-586.pl +0 -287
- data/vendor/ring/crypto/bn/asm/rsaz-avx2.pl +0 -1882
- data/vendor/ring/crypto/bn/asm/x86-mont.pl +0 -592
- data/vendor/ring/crypto/bn/asm/x86_64-gcc.c +0 -599
- data/vendor/ring/crypto/bn/asm/x86_64-mont.pl +0 -1393
- data/vendor/ring/crypto/bn/asm/x86_64-mont5.pl +0 -3507
- data/vendor/ring/crypto/bn/bn.c +0 -352
- data/vendor/ring/crypto/bn/bn_asn1.c +0 -74
- data/vendor/ring/crypto/bn/bn_test.Windows.vcxproj +0 -25
- data/vendor/ring/crypto/bn/bn_test.cc +0 -1696
- data/vendor/ring/crypto/bn/cmp.c +0 -200
- data/vendor/ring/crypto/bn/convert.c +0 -433
- data/vendor/ring/crypto/bn/ctx.c +0 -311
- data/vendor/ring/crypto/bn/div.c +0 -594
- data/vendor/ring/crypto/bn/exponentiation.c +0 -1335
- data/vendor/ring/crypto/bn/gcd.c +0 -711
- data/vendor/ring/crypto/bn/generic.c +0 -1019
- data/vendor/ring/crypto/bn/internal.h +0 -316
- data/vendor/ring/crypto/bn/montgomery.c +0 -516
- data/vendor/ring/crypto/bn/mul.c +0 -888
- data/vendor/ring/crypto/bn/prime.c +0 -829
- data/vendor/ring/crypto/bn/random.c +0 -334
- data/vendor/ring/crypto/bn/rsaz_exp.c +0 -262
- data/vendor/ring/crypto/bn/rsaz_exp.h +0 -53
- data/vendor/ring/crypto/bn/shift.c +0 -276
- data/vendor/ring/crypto/bytestring/bytestring_test.Windows.vcxproj +0 -25
- data/vendor/ring/crypto/bytestring/bytestring_test.cc +0 -421
- data/vendor/ring/crypto/bytestring/cbb.c +0 -399
- data/vendor/ring/crypto/bytestring/cbs.c +0 -227
- data/vendor/ring/crypto/bytestring/internal.h +0 -46
- data/vendor/ring/crypto/chacha/chacha_generic.c +0 -140
- data/vendor/ring/crypto/chacha/chacha_vec.c +0 -323
- data/vendor/ring/crypto/chacha/chacha_vec_arm.S +0 -1447
- data/vendor/ring/crypto/chacha/chacha_vec_arm_generate.go +0 -153
- data/vendor/ring/crypto/cipher/cipher_test.Windows.vcxproj +0 -25
- data/vendor/ring/crypto/cipher/e_aes.c +0 -390
- data/vendor/ring/crypto/cipher/e_chacha20poly1305.c +0 -208
- data/vendor/ring/crypto/cipher/internal.h +0 -173
- data/vendor/ring/crypto/cipher/test/aes_128_gcm_tests.txt +0 -543
- data/vendor/ring/crypto/cipher/test/aes_128_key_wrap_tests.txt +0 -9
- data/vendor/ring/crypto/cipher/test/aes_256_gcm_tests.txt +0 -475
- data/vendor/ring/crypto/cipher/test/aes_256_key_wrap_tests.txt +0 -23
- data/vendor/ring/crypto/cipher/test/chacha20_poly1305_old_tests.txt +0 -422
- data/vendor/ring/crypto/cipher/test/chacha20_poly1305_tests.txt +0 -484
- data/vendor/ring/crypto/cipher/test/cipher_test.txt +0 -100
- data/vendor/ring/crypto/constant_time_test.Windows.vcxproj +0 -25
- data/vendor/ring/crypto/constant_time_test.c +0 -304
- data/vendor/ring/crypto/cpu-arm-asm.S +0 -32
- data/vendor/ring/crypto/cpu-arm.c +0 -199
- data/vendor/ring/crypto/cpu-intel.c +0 -261
- data/vendor/ring/crypto/crypto.c +0 -151
- data/vendor/ring/crypto/curve25519/asm/x25519-arm.S +0 -2118
- data/vendor/ring/crypto/curve25519/curve25519.c +0 -4888
- data/vendor/ring/crypto/curve25519/x25519_test.cc +0 -128
- data/vendor/ring/crypto/digest/md32_common.h +0 -181
- data/vendor/ring/crypto/ec/asm/p256-x86_64-asm.pl +0 -2725
- data/vendor/ring/crypto/ec/ec.c +0 -193
- data/vendor/ring/crypto/ec/ec_curves.c +0 -61
- data/vendor/ring/crypto/ec/ec_key.c +0 -228
- data/vendor/ring/crypto/ec/ec_montgomery.c +0 -114
- data/vendor/ring/crypto/ec/example_mul.Windows.vcxproj +0 -25
- data/vendor/ring/crypto/ec/internal.h +0 -243
- data/vendor/ring/crypto/ec/oct.c +0 -253
- data/vendor/ring/crypto/ec/p256-64.c +0 -1794
- data/vendor/ring/crypto/ec/p256-x86_64-table.h +0 -9548
- data/vendor/ring/crypto/ec/p256-x86_64.c +0 -509
- data/vendor/ring/crypto/ec/simple.c +0 -1007
- data/vendor/ring/crypto/ec/util-64.c +0 -183
- data/vendor/ring/crypto/ec/wnaf.c +0 -508
- data/vendor/ring/crypto/ecdh/ecdh.c +0 -155
- data/vendor/ring/crypto/ecdsa/ecdsa.c +0 -304
- data/vendor/ring/crypto/ecdsa/ecdsa_asn1.c +0 -193
- data/vendor/ring/crypto/ecdsa/ecdsa_test.Windows.vcxproj +0 -25
- data/vendor/ring/crypto/ecdsa/ecdsa_test.cc +0 -327
- data/vendor/ring/crypto/header_removed.h +0 -17
- data/vendor/ring/crypto/internal.h +0 -495
- data/vendor/ring/crypto/libring.Windows.vcxproj +0 -101
- data/vendor/ring/crypto/mem.c +0 -98
- data/vendor/ring/crypto/modes/asm/aesni-gcm-x86_64.pl +0 -1045
- data/vendor/ring/crypto/modes/asm/ghash-armv4.pl +0 -517
- data/vendor/ring/crypto/modes/asm/ghash-x86.pl +0 -1393
- data/vendor/ring/crypto/modes/asm/ghash-x86_64.pl +0 -1741
- data/vendor/ring/crypto/modes/asm/ghashv8-armx.pl +0 -422
- data/vendor/ring/crypto/modes/ctr.c +0 -226
- data/vendor/ring/crypto/modes/gcm.c +0 -1206
- data/vendor/ring/crypto/modes/gcm_test.Windows.vcxproj +0 -25
- data/vendor/ring/crypto/modes/gcm_test.c +0 -348
- data/vendor/ring/crypto/modes/internal.h +0 -299
- data/vendor/ring/crypto/perlasm/arm-xlate.pl +0 -170
- data/vendor/ring/crypto/perlasm/readme +0 -100
- data/vendor/ring/crypto/perlasm/x86_64-xlate.pl +0 -1164
- data/vendor/ring/crypto/perlasm/x86asm.pl +0 -292
- data/vendor/ring/crypto/perlasm/x86gas.pl +0 -263
- data/vendor/ring/crypto/perlasm/x86masm.pl +0 -200
- data/vendor/ring/crypto/perlasm/x86nasm.pl +0 -187
- data/vendor/ring/crypto/poly1305/poly1305.c +0 -331
- data/vendor/ring/crypto/poly1305/poly1305_arm.c +0 -301
- data/vendor/ring/crypto/poly1305/poly1305_arm_asm.S +0 -2015
- data/vendor/ring/crypto/poly1305/poly1305_test.Windows.vcxproj +0 -25
- data/vendor/ring/crypto/poly1305/poly1305_test.cc +0 -80
- data/vendor/ring/crypto/poly1305/poly1305_test.txt +0 -52
- data/vendor/ring/crypto/poly1305/poly1305_vec.c +0 -892
- data/vendor/ring/crypto/rand/asm/rdrand-x86_64.pl +0 -75
- data/vendor/ring/crypto/rand/internal.h +0 -32
- data/vendor/ring/crypto/rand/rand.c +0 -189
- data/vendor/ring/crypto/rand/urandom.c +0 -219
- data/vendor/ring/crypto/rand/windows.c +0 -56
- data/vendor/ring/crypto/refcount_c11.c +0 -66
- data/vendor/ring/crypto/refcount_lock.c +0 -53
- data/vendor/ring/crypto/refcount_test.Windows.vcxproj +0 -25
- data/vendor/ring/crypto/refcount_test.c +0 -58
- data/vendor/ring/crypto/rsa/blinding.c +0 -462
- data/vendor/ring/crypto/rsa/internal.h +0 -108
- data/vendor/ring/crypto/rsa/padding.c +0 -300
- data/vendor/ring/crypto/rsa/rsa.c +0 -450
- data/vendor/ring/crypto/rsa/rsa_asn1.c +0 -261
- data/vendor/ring/crypto/rsa/rsa_impl.c +0 -944
- data/vendor/ring/crypto/rsa/rsa_test.Windows.vcxproj +0 -25
- data/vendor/ring/crypto/rsa/rsa_test.cc +0 -437
- data/vendor/ring/crypto/sha/asm/sha-armv8.pl +0 -436
- data/vendor/ring/crypto/sha/asm/sha-x86_64.pl +0 -2390
- data/vendor/ring/crypto/sha/asm/sha256-586.pl +0 -1275
- data/vendor/ring/crypto/sha/asm/sha256-armv4.pl +0 -735
- data/vendor/ring/crypto/sha/asm/sha256-armv8.pl +0 -14
- data/vendor/ring/crypto/sha/asm/sha256-x86_64.pl +0 -14
- data/vendor/ring/crypto/sha/asm/sha512-586.pl +0 -911
- data/vendor/ring/crypto/sha/asm/sha512-armv4.pl +0 -666
- data/vendor/ring/crypto/sha/asm/sha512-armv8.pl +0 -14
- data/vendor/ring/crypto/sha/asm/sha512-x86_64.pl +0 -14
- data/vendor/ring/crypto/sha/sha1.c +0 -271
- data/vendor/ring/crypto/sha/sha256.c +0 -204
- data/vendor/ring/crypto/sha/sha512.c +0 -355
- data/vendor/ring/crypto/test/file_test.cc +0 -326
- data/vendor/ring/crypto/test/file_test.h +0 -181
- data/vendor/ring/crypto/test/malloc.cc +0 -150
- data/vendor/ring/crypto/test/scoped_types.h +0 -95
- data/vendor/ring/crypto/test/test.Windows.vcxproj +0 -35
- data/vendor/ring/crypto/test/test_util.cc +0 -46
- data/vendor/ring/crypto/test/test_util.h +0 -41
- data/vendor/ring/crypto/thread_none.c +0 -55
- data/vendor/ring/crypto/thread_pthread.c +0 -165
- data/vendor/ring/crypto/thread_test.Windows.vcxproj +0 -25
- data/vendor/ring/crypto/thread_test.c +0 -200
- data/vendor/ring/crypto/thread_win.c +0 -282
- data/vendor/ring/examples/checkdigest.rs +0 -103
- data/vendor/ring/include/openssl/aes.h +0 -121
- data/vendor/ring/include/openssl/arm_arch.h +0 -129
- data/vendor/ring/include/openssl/base.h +0 -156
- data/vendor/ring/include/openssl/bn.h +0 -794
- data/vendor/ring/include/openssl/buffer.h +0 -18
- data/vendor/ring/include/openssl/bytestring.h +0 -235
- data/vendor/ring/include/openssl/chacha.h +0 -37
- data/vendor/ring/include/openssl/cmac.h +0 -76
- data/vendor/ring/include/openssl/cpu.h +0 -184
- data/vendor/ring/include/openssl/crypto.h +0 -43
- data/vendor/ring/include/openssl/curve25519.h +0 -88
- data/vendor/ring/include/openssl/ec.h +0 -225
- data/vendor/ring/include/openssl/ec_key.h +0 -129
- data/vendor/ring/include/openssl/ecdh.h +0 -110
- data/vendor/ring/include/openssl/ecdsa.h +0 -156
- data/vendor/ring/include/openssl/err.h +0 -201
- data/vendor/ring/include/openssl/mem.h +0 -101
- data/vendor/ring/include/openssl/obj_mac.h +0 -71
- data/vendor/ring/include/openssl/opensslfeatures.h +0 -68
- data/vendor/ring/include/openssl/opensslv.h +0 -18
- data/vendor/ring/include/openssl/ossl_typ.h +0 -18
- data/vendor/ring/include/openssl/poly1305.h +0 -51
- data/vendor/ring/include/openssl/rand.h +0 -70
- data/vendor/ring/include/openssl/rsa.h +0 -399
- data/vendor/ring/include/openssl/thread.h +0 -133
- data/vendor/ring/include/openssl/type_check.h +0 -71
- data/vendor/ring/mk/Common.props +0 -63
- data/vendor/ring/mk/Windows.props +0 -42
- data/vendor/ring/mk/WindowsTest.props +0 -18
- data/vendor/ring/mk/appveyor.bat +0 -62
- data/vendor/ring/mk/bottom_of_makefile.mk +0 -54
- data/vendor/ring/mk/ring.mk +0 -266
- data/vendor/ring/mk/top_of_makefile.mk +0 -214
- data/vendor/ring/mk/travis.sh +0 -40
- data/vendor/ring/mk/update-travis-yml.py +0 -229
- data/vendor/ring/ring.sln +0 -153
- data/vendor/ring/src/aead.rs +0 -682
- data/vendor/ring/src/agreement.rs +0 -248
- data/vendor/ring/src/c.rs +0 -129
- data/vendor/ring/src/constant_time.rs +0 -37
- data/vendor/ring/src/der.rs +0 -96
- data/vendor/ring/src/digest.rs +0 -690
- data/vendor/ring/src/digest_tests.txt +0 -57
- data/vendor/ring/src/ecc.rs +0 -28
- data/vendor/ring/src/ecc_build.rs +0 -279
- data/vendor/ring/src/ecc_curves.rs +0 -117
- data/vendor/ring/src/ed25519_tests.txt +0 -2579
- data/vendor/ring/src/exe_tests.rs +0 -46
- data/vendor/ring/src/ffi.rs +0 -29
- data/vendor/ring/src/file_test.rs +0 -187
- data/vendor/ring/src/hkdf.rs +0 -153
- data/vendor/ring/src/hkdf_tests.txt +0 -59
- data/vendor/ring/src/hmac.rs +0 -414
- data/vendor/ring/src/hmac_tests.txt +0 -97
- data/vendor/ring/src/input.rs +0 -312
- data/vendor/ring/src/lib.rs +0 -41
- data/vendor/ring/src/pbkdf2.rs +0 -265
- data/vendor/ring/src/pbkdf2_tests.txt +0 -113
- data/vendor/ring/src/polyfill.rs +0 -57
- data/vendor/ring/src/rand.rs +0 -28
- data/vendor/ring/src/signature.rs +0 -314
- data/vendor/ring/third-party/NIST/README.md +0 -9
- data/vendor/ring/third-party/NIST/SHAVS/SHA1LongMsg.rsp +0 -263
- data/vendor/ring/third-party/NIST/SHAVS/SHA1Monte.rsp +0 -309
- data/vendor/ring/third-party/NIST/SHAVS/SHA1ShortMsg.rsp +0 -267
- data/vendor/ring/third-party/NIST/SHAVS/SHA224LongMsg.rsp +0 -263
- data/vendor/ring/third-party/NIST/SHAVS/SHA224Monte.rsp +0 -309
- data/vendor/ring/third-party/NIST/SHAVS/SHA224ShortMsg.rsp +0 -267
- data/vendor/ring/third-party/NIST/SHAVS/SHA256LongMsg.rsp +0 -263
- data/vendor/ring/third-party/NIST/SHAVS/SHA256Monte.rsp +0 -309
- data/vendor/ring/third-party/NIST/SHAVS/SHA256ShortMsg.rsp +0 -267
- data/vendor/ring/third-party/NIST/SHAVS/SHA384LongMsg.rsp +0 -519
- data/vendor/ring/third-party/NIST/SHAVS/SHA384Monte.rsp +0 -309
- data/vendor/ring/third-party/NIST/SHAVS/SHA384ShortMsg.rsp +0 -523
- data/vendor/ring/third-party/NIST/SHAVS/SHA512LongMsg.rsp +0 -519
- data/vendor/ring/third-party/NIST/SHAVS/SHA512Monte.rsp +0 -309
- data/vendor/ring/third-party/NIST/SHAVS/SHA512ShortMsg.rsp +0 -523
- data/vendor/ring/third-party/NIST/sha256sums.txt +0 -1
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/* Copyright (c) 2014, Google Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
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* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */
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char CRYPTO_is_NEON_functional(void) {
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sigfillset(&sigmask);
|
92
|
-
sigdelset(&sigmask, SIGILL);
|
93
|
-
sigdelset(&sigmask, SIGTRAP);
|
94
|
-
sigdelset(&sigmask, SIGFPE);
|
95
|
-
sigdelset(&sigmask, SIGBUS);
|
96
|
-
sigdelset(&sigmask, SIGSEGV);
|
97
|
-
|
98
|
-
struct sigaction sigill_original_action, sigill_action;
|
99
|
-
memset(&sigill_action, 0, sizeof(sigill_action));
|
100
|
-
sigill_action.sa_handler = sigill_handler;
|
101
|
-
sigill_action.sa_mask = sigmask;
|
102
|
-
|
103
|
-
sigset_t original_sigmask;
|
104
|
-
sigprocmask(SIG_SETMASK, &sigmask, &original_sigmask);
|
105
|
-
|
106
|
-
if (sigsetjmp(sigill_jmp, 1 /* save signals */) == 0) {
|
107
|
-
sigaction(SIGILL, &sigill_action, &sigill_original_action);
|
108
|
-
|
109
|
-
// This function cannot be inline asm because GCC will refuse to compile
|
110
|
-
// inline NEON instructions unless building with -mfpu=neon, which would
|
111
|
-
// defeat the point of probing for support at runtime.
|
112
|
-
CRYPTO_arm_neon_probe();
|
113
|
-
supported = 1;
|
114
|
-
}
|
115
|
-
// Note that Android up to and including Lollipop doesn't restore the signal
|
116
|
-
// mask correctly after returning from a sigsetjmp. So that would need to be
|
117
|
-
// set again here if more probes were added.
|
118
|
-
// See https://android-review.googlesource.com/#/c/127624/
|
119
|
-
|
120
|
-
sigaction(SIGILL, &sigill_original_action, NULL);
|
121
|
-
sigprocmask(SIG_SETMASK, &original_sigmask, NULL);
|
122
|
-
|
123
|
-
return supported;
|
124
|
-
}
|
125
|
-
|
126
|
-
#else
|
127
|
-
|
128
|
-
static int probe_for_NEON(void) {
|
129
|
-
return 0;
|
130
|
-
}
|
131
|
-
|
132
|
-
#endif /* !OPENSSL_NO_ASM && OPENSSL_ARM */
|
133
|
-
|
134
|
-
void OPENSSL_cpuid_setup(void) {
|
135
|
-
if (getauxval == NULL) {
|
136
|
-
// On ARM, but not AArch64, try a NEON instruction and see whether it works
|
137
|
-
// in order to probe for NEON support.
|
138
|
-
//
|
139
|
-
// Note that |CRYPTO_is_NEON_capable| can be true even if
|
140
|
-
// |CRYPTO_set_NEON_capable| has never been called if the code was compiled
|
141
|
-
// with NEON support enabled (e.g. -mfpu=neon).
|
142
|
-
if (!g_set_neon_called && !CRYPTO_is_NEON_capable() && probe_for_NEON()) {
|
143
|
-
OPENSSL_armcap_P |= ARMV7_NEON;
|
144
|
-
}
|
145
|
-
return;
|
146
|
-
}
|
147
|
-
|
148
|
-
static const unsigned long AT_HWCAP = 16;
|
149
|
-
unsigned long hwcap = getauxval(AT_HWCAP);
|
150
|
-
|
151
|
-
#if defined(OPENSSL_ARM)
|
152
|
-
static const unsigned long kNEON = 1 << 12;
|
153
|
-
if ((hwcap & kNEON) == 0) {
|
154
|
-
return;
|
155
|
-
}
|
156
|
-
|
157
|
-
/* In 32-bit mode, the ARMv8 feature bits are in a different aux vector
|
158
|
-
* value. */
|
159
|
-
static const unsigned long AT_HWCAP2 = 26;
|
160
|
-
hwcap = getauxval(AT_HWCAP2);
|
161
|
-
|
162
|
-
/* See /usr/include/asm/hwcap.h on an ARM installation for the source of
|
163
|
-
* these values. */
|
164
|
-
static const unsigned long kAES = 1 << 0;
|
165
|
-
static const unsigned long kPMULL = 1 << 1;
|
166
|
-
static const unsigned long kSHA1 = 1 << 2;
|
167
|
-
static const unsigned long kSHA256 = 1 << 3;
|
168
|
-
#elif defined(OPENSSL_AARCH64)
|
169
|
-
/* See /usr/include/asm/hwcap.h on an aarch64 installation for the source of
|
170
|
-
* these values. */
|
171
|
-
static const unsigned long kNEON = 1 << 1;
|
172
|
-
static const unsigned long kAES = 1 << 3;
|
173
|
-
static const unsigned long kPMULL = 1 << 4;
|
174
|
-
static const unsigned long kSHA1 = 1 << 5;
|
175
|
-
static const unsigned long kSHA256 = 1 << 6;
|
176
|
-
|
177
|
-
if ((hwcap & kNEON) == 0) {
|
178
|
-
return;
|
179
|
-
}
|
180
|
-
#endif
|
181
|
-
|
182
|
-
OPENSSL_armcap_P |= ARMV7_NEON;
|
183
|
-
|
184
|
-
if (hwcap & kAES) {
|
185
|
-
OPENSSL_armcap_P |= ARMV8_AES;
|
186
|
-
}
|
187
|
-
if (hwcap & kPMULL) {
|
188
|
-
OPENSSL_armcap_P |= ARMV8_PMULL;
|
189
|
-
}
|
190
|
-
if (hwcap & kSHA1) {
|
191
|
-
OPENSSL_armcap_P |= ARMV8_SHA1;
|
192
|
-
}
|
193
|
-
if (hwcap & kSHA256) {
|
194
|
-
OPENSSL_armcap_P |= ARMV8_SHA256;
|
195
|
-
}
|
196
|
-
}
|
197
|
-
|
198
|
-
#endif /* (defined(OPENSSL_ARM) || defined(OPENSSL_AARCH64)) &&
|
199
|
-
!defined(OPENSSL_STATIC_ARMCAP) */
|
@@ -1,261 +0,0 @@
|
|
1
|
-
/* Copyright (C) 1995-1998 Eric Young (eay@cryptsoft.com)
|
2
|
-
* All rights reserved.
|
3
|
-
*
|
4
|
-
* This package is an SSL implementation written
|
5
|
-
* by Eric Young (eay@cryptsoft.com).
|
6
|
-
* The implementation was written so as to conform with Netscapes SSL.
|
7
|
-
*
|
8
|
-
* This library is free for commercial and non-commercial use as long as
|
9
|
-
* the following conditions are aheared to. The following conditions
|
10
|
-
* apply to all code found in this distribution, be it the RC4, RSA,
|
11
|
-
* lhash, DES, etc., code; not just the SSL code. The SSL documentation
|
12
|
-
* included with this distribution is covered by the same copyright terms
|
13
|
-
* except that the holder is Tim Hudson (tjh@cryptsoft.com).
|
14
|
-
*
|
15
|
-
* Copyright remains Eric Young's, and as such any Copyright notices in
|
16
|
-
* the code are not to be removed.
|
17
|
-
* If this package is used in a product, Eric Young should be given attribution
|
18
|
-
* as the author of the parts of the library used.
|
19
|
-
* This can be in the form of a textual message at program startup or
|
20
|
-
* in documentation (online or textual) provided with the package.
|
21
|
-
*
|
22
|
-
* Redistribution and use in source and binary forms, with or without
|
23
|
-
* modification, are permitted provided that the following conditions
|
24
|
-
* are met:
|
25
|
-
* 1. Redistributions of source code must retain the copyright
|
26
|
-
* notice, this list of conditions and the following disclaimer.
|
27
|
-
* 2. Redistributions in binary form must reproduce the above copyright
|
28
|
-
* notice, this list of conditions and the following disclaimer in the
|
29
|
-
* documentation and/or other materials provided with the distribution.
|
30
|
-
* 3. All advertising materials mentioning features or use of this software
|
31
|
-
* must display the following acknowledgement:
|
32
|
-
* "This product includes cryptographic software written by
|
33
|
-
* Eric Young (eay@cryptsoft.com)"
|
34
|
-
* The word 'cryptographic' can be left out if the rouines from the library
|
35
|
-
* being used are not cryptographic related :-).
|
36
|
-
* 4. If you include any Windows specific code (or a derivative thereof) from
|
37
|
-
* the apps directory (application code) you must include an acknowledgement:
|
38
|
-
* "This product includes software written by Tim Hudson (tjh@cryptsoft.com)"
|
39
|
-
*
|
40
|
-
* THIS SOFTWARE IS PROVIDED BY ERIC YOUNG ``AS IS'' AND
|
41
|
-
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
42
|
-
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
43
|
-
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
44
|
-
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
45
|
-
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
46
|
-
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
47
|
-
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
48
|
-
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
49
|
-
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
50
|
-
* SUCH DAMAGE.
|
51
|
-
*
|
52
|
-
* The licence and distribution terms for any publically available version or
|
53
|
-
* derivative of this code cannot be changed. i.e. this code cannot simply be
|
54
|
-
* copied and put under another distribution licence
|
55
|
-
* [including the GNU Public Licence.] */
|
56
|
-
|
57
|
-
#if !defined(__STDC_FORMAT_MACROS)
|
58
|
-
#define __STDC_FORMAT_MACROS
|
59
|
-
#endif
|
60
|
-
|
61
|
-
#include <openssl/cpu.h>
|
62
|
-
|
63
|
-
|
64
|
-
#if !defined(OPENSSL_NO_ASM) && (defined(OPENSSL_X86) || defined(OPENSSL_X86_64))
|
65
|
-
|
66
|
-
#include <inttypes.h>
|
67
|
-
#include <stdlib.h>
|
68
|
-
#include <stdio.h>
|
69
|
-
#include <string.h>
|
70
|
-
|
71
|
-
#if defined(OPENSSL_WINDOWS)
|
72
|
-
#pragma warning(push, 3)
|
73
|
-
#include <immintrin.h>
|
74
|
-
#include <intrin.h>
|
75
|
-
#pragma warning(pop)
|
76
|
-
#endif
|
77
|
-
|
78
|
-
|
79
|
-
/* OPENSSL_cpuid runs the cpuid instruction. |leaf| is passed in as EAX and ECX
|
80
|
-
* is set to zero. It writes EAX, EBX, ECX, and EDX to |*out_eax| through
|
81
|
-
* |*out_edx|. */
|
82
|
-
static void OPENSSL_cpuid(uint32_t *out_eax, uint32_t *out_ebx,
|
83
|
-
uint32_t *out_ecx, uint32_t *out_edx, uint32_t leaf) {
|
84
|
-
#if defined(OPENSSL_WINDOWS)
|
85
|
-
int tmp[4];
|
86
|
-
__cpuid(tmp, (int)leaf);
|
87
|
-
*out_eax = (uint32_t)tmp[0];
|
88
|
-
*out_ebx = (uint32_t)tmp[1];
|
89
|
-
*out_ecx = (uint32_t)tmp[2];
|
90
|
-
*out_edx = (uint32_t)tmp[3];
|
91
|
-
#elif defined(__pic__) && defined(OPENSSL_32_BIT)
|
92
|
-
/* Inline assembly may not clobber the PIC register. For 32-bit, this is EBX.
|
93
|
-
* See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=47602. */
|
94
|
-
__asm__ volatile (
|
95
|
-
"xor %%ecx, %%ecx\n"
|
96
|
-
"mov %%ebx, %%edi\n"
|
97
|
-
"cpuid\n"
|
98
|
-
"xchg %%edi, %%ebx\n"
|
99
|
-
: "=a"(*out_eax), "=D"(*out_ebx), "=c"(*out_ecx), "=d"(*out_edx)
|
100
|
-
: "a"(leaf)
|
101
|
-
);
|
102
|
-
#else
|
103
|
-
__asm__ volatile (
|
104
|
-
"xor %%ecx, %%ecx\n"
|
105
|
-
"cpuid\n"
|
106
|
-
: "=a"(*out_eax), "=b"(*out_ebx), "=c"(*out_ecx), "=d"(*out_edx)
|
107
|
-
: "a"(leaf)
|
108
|
-
);
|
109
|
-
#endif
|
110
|
-
}
|
111
|
-
|
112
|
-
/* OPENSSL_xgetbv returns the value of an Intel Extended Control Register (XCR).
|
113
|
-
* Currently only XCR0 is defined by Intel so |xcr| should always be zero. */
|
114
|
-
static uint64_t OPENSSL_xgetbv(uint32_t xcr) {
|
115
|
-
#if defined(OPENSSL_WINDOWS)
|
116
|
-
return (uint64_t)_xgetbv(xcr);
|
117
|
-
#else
|
118
|
-
uint32_t eax, edx;
|
119
|
-
__asm__ volatile ("xgetbv" : "=a"(eax), "=d"(edx) : "c"(xcr));
|
120
|
-
return (((uint64_t)edx) << 32) | eax;
|
121
|
-
#endif
|
122
|
-
}
|
123
|
-
|
124
|
-
/* handle_cpu_env applies the value from |in| to the CPUID values in |out[0]|
|
125
|
-
* and |out[1]|. See the comment in |OPENSSL_cpuid_setup| about this. */
|
126
|
-
static void handle_cpu_env(uint32_t *out, const char *in) {
|
127
|
-
const int invert = in[0] == '~';
|
128
|
-
uint64_t v;
|
129
|
-
|
130
|
-
if (!sscanf(in + invert, "%" PRIi64, &v)) {
|
131
|
-
return;
|
132
|
-
}
|
133
|
-
|
134
|
-
if (invert) {
|
135
|
-
out[0] &= ~v;
|
136
|
-
out[1] &= ~(v >> 32);
|
137
|
-
} else {
|
138
|
-
out[0] = v;
|
139
|
-
out[1] = v >> 32;
|
140
|
-
}
|
141
|
-
}
|
142
|
-
|
143
|
-
void OPENSSL_cpuid_setup(void) {
|
144
|
-
/* Determine the vendor and maximum input value. */
|
145
|
-
uint32_t eax, ebx, ecx, edx;
|
146
|
-
OPENSSL_cpuid(&eax, &ebx, &ecx, &edx, 0);
|
147
|
-
|
148
|
-
uint32_t num_ids = eax;
|
149
|
-
|
150
|
-
int is_intel = ebx == 0x756e6547 /* Genu */ &&
|
151
|
-
edx == 0x49656e69 /* ineI */ &&
|
152
|
-
ecx == 0x6c65746e /* ntel */;
|
153
|
-
int is_amd = ebx == 0x68747541 /* Auth */ &&
|
154
|
-
edx == 0x69746e65 /* enti */ &&
|
155
|
-
ecx == 0x444d4163 /* cAMD */;
|
156
|
-
|
157
|
-
int has_amd_xop = 0;
|
158
|
-
if (is_amd) {
|
159
|
-
/* AMD-specific logic.
|
160
|
-
* See http://developer.amd.com/wordpress/media/2012/10/254811.pdf */
|
161
|
-
OPENSSL_cpuid(&eax, &ebx, &ecx, &edx, 0x80000000);
|
162
|
-
uint32_t num_extended_ids = eax;
|
163
|
-
if (num_extended_ids >= 0x80000001) {
|
164
|
-
OPENSSL_cpuid(&eax, &ebx, &ecx, &edx, 0x80000001);
|
165
|
-
if (ecx & (1 << 11)) {
|
166
|
-
has_amd_xop = 1;
|
167
|
-
}
|
168
|
-
}
|
169
|
-
}
|
170
|
-
|
171
|
-
uint32_t extended_features = 0;
|
172
|
-
if (num_ids >= 7) {
|
173
|
-
OPENSSL_cpuid(&eax, &ebx, &ecx, &edx, 7);
|
174
|
-
extended_features = ebx;
|
175
|
-
}
|
176
|
-
|
177
|
-
/* Determine the number of cores sharing an L1 data cache to adjust the
|
178
|
-
* hyper-threading bit. */
|
179
|
-
uint32_t cores_per_cache = 0;
|
180
|
-
if (is_amd) {
|
181
|
-
/* AMD CPUs never share an L1 data cache between threads but do set the HTT
|
182
|
-
* bit on multi-core CPUs. */
|
183
|
-
cores_per_cache = 1;
|
184
|
-
} else if (num_ids >= 4) {
|
185
|
-
/* TODO(davidben): The Intel manual says this CPUID leaf enumerates all
|
186
|
-
* caches using ECX and doesn't say which is first. Does this matter? */
|
187
|
-
OPENSSL_cpuid(&eax, &ebx, &ecx, &edx, 4);
|
188
|
-
cores_per_cache = 1 + ((eax >> 14) & 0xfff);
|
189
|
-
}
|
190
|
-
|
191
|
-
OPENSSL_cpuid(&eax, &ebx, &ecx, &edx, 1);
|
192
|
-
|
193
|
-
/* Adjust the hyper-threading bit. */
|
194
|
-
if (edx & (1 << 28)) {
|
195
|
-
uint32_t num_logical_cores = (ebx >> 16) & 0xff;
|
196
|
-
if (cores_per_cache == 1 || num_logical_cores <= 1) {
|
197
|
-
edx &= ~(1 << 28);
|
198
|
-
}
|
199
|
-
}
|
200
|
-
|
201
|
-
/* Reserved bit #20 was historically repurposed to control the in-memory
|
202
|
-
* representation of RC4 state. Always set it to zero. */
|
203
|
-
edx &= ~(1 << 20);
|
204
|
-
|
205
|
-
/* Reserved bit #30 is repurposed to signal an Intel CPU. */
|
206
|
-
if (is_intel) {
|
207
|
-
edx |= (1 << 30);
|
208
|
-
} else {
|
209
|
-
edx &= ~(1 << 30);
|
210
|
-
}
|
211
|
-
|
212
|
-
/* The SDBG bit is repurposed to denote AMD XOP support. */
|
213
|
-
if (has_amd_xop) {
|
214
|
-
ecx |= (1 << 11);
|
215
|
-
} else {
|
216
|
-
ecx &= ~(1 << 11);
|
217
|
-
}
|
218
|
-
|
219
|
-
uint64_t xcr0 = 0;
|
220
|
-
if (ecx & (1 << 27)) {
|
221
|
-
/* XCR0 may only be queried if the OSXSAVE bit is set. */
|
222
|
-
xcr0 = OPENSSL_xgetbv(0);
|
223
|
-
}
|
224
|
-
/* See Intel manual, section 14.3. */
|
225
|
-
if ((xcr0 & 6) != 6) {
|
226
|
-
/* YMM registers cannot be used. */
|
227
|
-
ecx &= ~(1 << 28); /* AVX */
|
228
|
-
ecx &= ~(1 << 12); /* FMA */
|
229
|
-
ecx &= ~(1 << 11); /* AMD XOP */
|
230
|
-
extended_features &= ~(1 << 5); /* AVX2 */
|
231
|
-
}
|
232
|
-
|
233
|
-
OPENSSL_ia32cap_P[0] = edx;
|
234
|
-
OPENSSL_ia32cap_P[1] = ecx;
|
235
|
-
OPENSSL_ia32cap_P[2] = extended_features;
|
236
|
-
OPENSSL_ia32cap_P[3] = 0;
|
237
|
-
|
238
|
-
const char *env1, *env2;
|
239
|
-
env1 = getenv("OPENSSL_ia32cap");
|
240
|
-
if (env1 == NULL) {
|
241
|
-
return;
|
242
|
-
}
|
243
|
-
|
244
|
-
/* OPENSSL_ia32cap can contain zero, one or two values, separated with a ':'.
|
245
|
-
* Each value is a 64-bit, unsigned value which may start with "0x" to
|
246
|
-
* indicate a hex value. Prior to the 64-bit value, a '~' may be given.
|
247
|
-
*
|
248
|
-
* If '~' isn't present, then the value is taken as the result of the CPUID.
|
249
|
-
* Otherwise the value is inverted and ANDed with the probed CPUID result.
|
250
|
-
*
|
251
|
-
* The first value determines OPENSSL_ia32cap_P[0] and [1]. The second [2]
|
252
|
-
* and [3]. */
|
253
|
-
|
254
|
-
handle_cpu_env(&OPENSSL_ia32cap_P[0], env1);
|
255
|
-
env2 = strchr(env1, ':');
|
256
|
-
if (env2 != NULL) {
|
257
|
-
handle_cpu_env(&OPENSSL_ia32cap_P[2], env2 + 1);
|
258
|
-
}
|
259
|
-
}
|
260
|
-
|
261
|
-
#endif /* !OPENSSL_NO_ASM && (OPENSSL_X86 || OPENSSL_X86_64) */
|