pq_crypto 0.6.4 → 0.6.6

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (213) hide show
  1. checksums.yaml +4 -4
  2. data/CHANGELOG.md +180 -0
  3. data/README.md +7 -0
  4. data/ext/pqcrypto/extconf.rb +4 -1
  5. data/ext/pqcrypto/pq_externalmu.c +35 -0
  6. data/ext/pqcrypto/pqcrypto_native_api.h +85 -75
  7. data/ext/pqcrypto/pqcrypto_ruby_secure.c +16 -9
  8. data/ext/pqcrypto/pqcrypto_secure.c +43 -33
  9. data/ext/pqcrypto/pqcrypto_secure.h +52 -47
  10. data/ext/pqcrypto/pqcrypto_version.h +1 -1
  11. data/ext/pqcrypto/vendor/.vendored +7 -7
  12. data/ext/pqcrypto/vendor/mldsa-native/BUILDING.md +5 -2
  13. data/ext/pqcrypto/vendor/mldsa-native/LICENSE +21 -2
  14. data/ext/pqcrypto/vendor/mldsa-native/README.md +20 -7
  15. data/ext/pqcrypto/vendor/mldsa-native/RELEASE.md +160 -0
  16. data/ext/pqcrypto/vendor/mldsa-native/SECURITY.md +1 -1
  17. data/ext/pqcrypto/vendor/mldsa-native/mldsa/README.md +2 -2
  18. data/ext/pqcrypto/vendor/mldsa-native/mldsa/mldsa_native.c +85 -59
  19. data/ext/pqcrypto/vendor/mldsa-native/mldsa/mldsa_native.h +292 -348
  20. data/ext/pqcrypto/vendor/mldsa-native/mldsa/mldsa_native_asm.S +122 -76
  21. data/ext/pqcrypto/vendor/mldsa-native/mldsa/mldsa_native_config.h +184 -86
  22. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/cbmc.h +49 -4
  23. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/common.h +49 -81
  24. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/context.h +152 -0
  25. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/ct.h +25 -12
  26. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/debug.c +2 -0
  27. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/debug.h +2 -0
  28. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/fips202x4.c +2 -2
  29. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/keccakf1600.c +9 -11
  30. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/auto.h +19 -11
  31. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x1_scalar_aarch64_asm.S +6 -4
  32. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x1_v84a_aarch64_asm.S +7 -4
  33. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x2_v84a_aarch64_asm.S +7 -4
  34. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x4_v8a_scalar_hybrid_aarch64_asm.S +12 -9
  35. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x4_v8a_v84a_scalar_hybrid_aarch64_asm.S +12 -9
  36. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x1_scalar.h +1 -1
  37. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x1_v84a.h +3 -2
  38. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x2_v84a.h +3 -2
  39. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x4_v8a_scalar.h +6 -1
  40. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x4_v8a_v84a_scalar.h +3 -2
  41. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/api.h +11 -11
  42. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/mve.h +9 -22
  43. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccak_f1600_x4_mve.S +8 -5
  44. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccak_f1600_x4_mve.c +1 -0
  45. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/{state_extract_bytes_x4_mve.S → keccak_f1600_x4_state_extract_bytes_mve.S} +14 -14
  46. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/{state_xor_bytes_x4_mve.S → keccak_f1600_x4_state_xor_bytes_mve.S} +12 -12
  47. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/auto.h +5 -4
  48. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/keccak_f1600_x4_avx2.h +2 -2
  49. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/src/fips202_native_x86_64.h +1 -0
  50. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/src/keccak_f1600_x4_avx2_asm.S +36 -2
  51. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/meta.h +62 -4
  52. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/arith_native_aarch64.h +87 -54
  53. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{intt_aarch64_asm.S → mldsa_intt_aarch64_asm.S} +39 -6
  54. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{ntt_aarch64_asm.S → mldsa_ntt_aarch64_asm.S} +39 -6
  55. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{pointwise_montgomery_aarch64_asm.S → mldsa_pointwise_montgomery_aarch64_asm.S} +25 -3
  56. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{poly_caddq_aarch64_asm.S → mldsa_poly_caddq_aarch64_asm.S} +19 -3
  57. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{poly_chknorm_aarch64_asm.S → mldsa_poly_chknorm_aarch64_asm.S} +24 -3
  58. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{poly_decompose_32_aarch64_asm.S → mldsa_poly_decompose_32_aarch64_asm.S} +25 -3
  59. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{poly_decompose_88_aarch64_asm.S → mldsa_poly_decompose_88_aarch64_asm.S} +25 -3
  60. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{poly_use_hint_32_aarch64_asm.S → mldsa_poly_use_hint_32_aarch64_asm.S} +25 -3
  61. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{poly_use_hint_88_aarch64_asm.S → mldsa_poly_use_hint_88_aarch64_asm.S} +25 -3
  62. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{mld_polyvecl_pointwise_acc_montgomery_l4_aarch64_asm.S → mldsa_polyvecl_pointwise_acc_montgomery_l4_aarch64_asm.S} +31 -3
  63. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{mld_polyvecl_pointwise_acc_montgomery_l5_aarch64_asm.S → mldsa_polyvecl_pointwise_acc_montgomery_l5_aarch64_asm.S} +31 -3
  64. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{mld_polyvecl_pointwise_acc_montgomery_l7_aarch64_asm.S → mldsa_polyvecl_pointwise_acc_montgomery_l7_aarch64_asm.S} +31 -3
  65. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{polyz_unpack_17_aarch64_asm.S → mldsa_polyz_unpack_17_aarch64_asm.S} +31 -3
  66. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{polyz_unpack_19_aarch64_asm.S → mldsa_polyz_unpack_19_aarch64_asm.S} +31 -3
  67. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{rej_uniform_aarch64_asm.S → mldsa_rej_uniform_aarch64_asm.S} +48 -15
  68. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{rej_uniform_eta2_aarch64_asm.S → mldsa_rej_uniform_eta2_aarch64_asm.S} +42 -9
  69. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/{rej_uniform_eta4_aarch64_asm.S → mldsa_rej_uniform_eta4_aarch64_asm.S} +42 -9
  70. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/api.h +11 -3
  71. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/meta.h +3 -2
  72. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/meta.h +28 -28
  73. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/arith_native_x86_64.h +171 -49
  74. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/{intt_avx2_asm.S → mldsa_intt_avx2_asm.S} +23 -1
  75. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/{ntt_avx2_asm.S → mldsa_ntt_avx2_asm.S} +23 -1
  76. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/{nttunpack_avx2_asm.S → mldsa_nttunpack_avx2_asm.S} +17 -1
  77. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/{pointwise_acc_l4_avx2_asm.S → mldsa_pointwise_acc_l4_avx2_asm.S} +37 -3
  78. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/{pointwise_acc_l5_avx2_asm.S → mldsa_pointwise_acc_l5_avx2_asm.S} +37 -3
  79. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/{pointwise_acc_l7_avx2_asm.S → mldsa_pointwise_acc_l7_avx2_asm.S} +37 -3
  80. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/{pointwise_avx2_asm.S → mldsa_pointwise_avx2_asm.S} +31 -3
  81. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/{poly_caddq_avx2_asm.S → mldsa_poly_caddq_avx2_asm.S} +18 -9
  82. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_chknorm_avx2_asm.S +176 -0
  83. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_decompose_32_avx2_asm.S +490 -0
  84. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_decompose_88_avx2_asm.S +489 -0
  85. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_use_hint_32_avx2_asm.S +123 -0
  86. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_use_hint_88_avx2_asm.S +125 -0
  87. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_polyz_unpack_17_avx2_asm.S +355 -0
  88. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_polyz_unpack_19_avx2_asm.S +355 -0
  89. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_rej_uniform_avx2_asm.S +132 -0
  90. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_rej_uniform_eta2_avx2_asm.S +205 -0
  91. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_rej_uniform_eta4_avx2_asm.S +176 -0
  92. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/packing.c +27 -36
  93. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/packing.h +42 -8
  94. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/params.h +93 -17
  95. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/poly.c +74 -15
  96. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/poly.h +97 -11
  97. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/poly_kl.c +7 -38
  98. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/poly_kl.h +49 -7
  99. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/polyvec.c +16 -17
  100. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/polyvec.h +26 -9
  101. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/polyvec_lazy.c +3 -0
  102. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/polyvec_lazy.h +18 -19
  103. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/reduce.h +15 -3
  104. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/rounding.h +28 -6
  105. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/sign.c +311 -246
  106. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/sign.h +245 -240
  107. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/sys.h +64 -5
  108. data/ext/pqcrypto/vendor/mlkem-native/BUILDING.md +5 -2
  109. data/ext/pqcrypto/vendor/mlkem-native/LICENSE +21 -3
  110. data/ext/pqcrypto/vendor/mlkem-native/README.md +4 -6
  111. data/ext/pqcrypto/vendor/mlkem-native/RELEASE.md +211 -0
  112. data/ext/pqcrypto/vendor/mlkem-native/mlkem/README.md +2 -2
  113. data/ext/pqcrypto/vendor/mlkem-native/mlkem/mlkem_native.c +25 -34
  114. data/ext/pqcrypto/vendor/mlkem-native/mlkem/mlkem_native.h +79 -142
  115. data/ext/pqcrypto/vendor/mlkem-native/mlkem/mlkem_native_asm.S +62 -71
  116. data/ext/pqcrypto/vendor/mlkem-native/mlkem/mlkem_native_config.h +77 -39
  117. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/cbmc.h +25 -0
  118. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/common.h +48 -34
  119. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/compress.c +25 -5
  120. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/compress.h +14 -0
  121. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/context.h +51 -0
  122. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/fips202.h +2 -2
  123. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/keccakf1600.c +8 -8
  124. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/aarch64/auto.h +20 -12
  125. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/aarch64/src/keccak_f1600_x1_scalar_aarch64_asm.S +5 -3
  126. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/aarch64/src/keccak_f1600_x1_v84a_aarch64_asm.S +5 -2
  127. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/aarch64/src/keccak_f1600_x2_v84a_aarch64_asm.S +5 -2
  128. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/aarch64/src/keccak_f1600_x4_v8a_scalar_hybrid_aarch64_asm.S +10 -7
  129. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/aarch64/src/keccak_f1600_x4_v8a_v84a_scalar_hybrid_aarch64_asm.S +10 -7
  130. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/aarch64/x1_scalar.h +1 -1
  131. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/aarch64/x1_v84a.h +3 -2
  132. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/aarch64/x2_v84a.h +3 -2
  133. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/aarch64/x4_v8a_scalar.h +6 -1
  134. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/aarch64/x4_v8a_v84a_scalar.h +3 -2
  135. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/api.h +11 -11
  136. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/armv81m/mve.h +8 -22
  137. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/armv81m/src/keccak_f1600_x4_mve.S +8 -5
  138. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/armv81m/src/{state_extract_bytes_x4_mve.S → keccak_f1600_x4_state_extract_bytes_mve.S} +14 -14
  139. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/armv81m/src/{state_xor_bytes_x4_mve.S → keccak_f1600_x4_state_xor_bytes_mve.S} +12 -12
  140. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/x86_64/keccak_f1600_x4_avx2.h +2 -2
  141. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/fips202/native/x86_64/src/keccak_f1600_x4_avx2_asm.S +36 -2
  142. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/indcpa.c +22 -0
  143. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/indcpa.h +20 -11
  144. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/kem.c +39 -11
  145. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/kem.h +64 -15
  146. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/aarch64/meta.h +44 -2
  147. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/aarch64/src/aarch64_zetas.c +2 -0
  148. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/aarch64/src/arith_native_aarch64.h +11 -10
  149. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/aarch64/src/{intt_aarch64_asm.S → mlkem_intt_aarch64_asm.S} +16 -9
  150. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/aarch64/src/{ntt_aarch64_asm.S → mlkem_ntt_aarch64_asm.S} +10 -7
  151. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/aarch64/src/{poly_mulcache_compute_aarch64_asm.S → mlkem_poly_mulcache_compute_aarch64_asm.S} +6 -3
  152. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/aarch64/src/{poly_reduce_aarch64_asm.S → mlkem_poly_reduce_aarch64_asm.S} +6 -3
  153. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/aarch64/src/{poly_tobytes_aarch64_asm.S → mlkem_poly_tobytes_aarch64_asm.S} +12 -5
  154. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/aarch64/src/{poly_tomont_aarch64_asm.S → mlkem_poly_tomont_aarch64_asm.S} +11 -5
  155. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/aarch64/src/{polyvec_basemul_acc_montgomery_cached_k2_aarch64_asm.S → mlkem_polyvec_basemul_acc_montgomery_cached_k2_aarch64_asm.S} +6 -3
  156. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/aarch64/src/{polyvec_basemul_acc_montgomery_cached_k3_aarch64_asm.S → mlkem_polyvec_basemul_acc_montgomery_cached_k3_aarch64_asm.S} +6 -3
  157. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/aarch64/src/{polyvec_basemul_acc_montgomery_cached_k4_aarch64_asm.S → mlkem_polyvec_basemul_acc_montgomery_cached_k4_aarch64_asm.S} +6 -3
  158. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/aarch64/src/{rej_uniform_aarch64_asm.S → mlkem_rej_uniform_aarch64_asm.S} +17 -17
  159. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/api.h +21 -8
  160. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/meta.h +1 -1
  161. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/ppc64le/meta.h +4 -0
  162. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/ppc64le/src/{intt_ppc_asm.S → mlkem_intt_ppc_asm.S} +29 -5
  163. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/ppc64le/src/{ntt_ppc_asm.S → mlkem_ntt_ppc_asm.S} +22 -1
  164. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/ppc64le/src/{poly_tomont_ppc_asm.S → mlkem_poly_tomont_ppc_asm.S} +25 -3
  165. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/ppc64le/src/{reduce_ppc_asm.S → mlkem_reduce_ppc_asm.S} +22 -1
  166. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/riscv64/meta.h +4 -0
  167. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/riscv64/src/arith_native_riscv64.h +4 -0
  168. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/riscv64/src/rv64v_poly.c +6 -2
  169. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/meta.h +45 -25
  170. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/arith_native_x86_64.h +20 -20
  171. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/compress_consts.c +14 -3
  172. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/compress_consts.h +8 -0
  173. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{intt_avx2_asm.S → mlkem_intt_avx2_asm.S} +27 -3
  174. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{ntt_avx2_asm.S → mlkem_ntt_avx2_asm.S} +23 -1
  175. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{nttfrombytes_avx2_asm.S → mlkem_nttfrombytes_avx2_asm.S} +27 -3
  176. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{ntttobytes_avx2_asm.S → mlkem_ntttobytes_avx2_asm.S} +27 -3
  177. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{nttunpack_avx2_asm.S → mlkem_nttunpack_avx2_asm.S} +17 -1
  178. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{poly_compress_d10_avx2_asm.S → mlkem_poly_compress_d10_avx2_asm.S} +34 -3
  179. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{poly_compress_d11_avx2_asm.S → mlkem_poly_compress_d11_avx2_asm.S} +33 -2
  180. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{poly_compress_d4_avx2_asm.S → mlkem_poly_compress_d4_avx2_asm.S} +34 -3
  181. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{poly_compress_d5_avx2_asm.S → mlkem_poly_compress_d5_avx2_asm.S} +33 -2
  182. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{poly_decompress_d10_avx2_asm.S → mlkem_poly_decompress_d10_avx2_asm.S} +32 -3
  183. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{poly_decompress_d11_avx2_asm.S → mlkem_poly_decompress_d11_avx2_asm.S} +32 -2
  184. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{poly_decompress_d4_avx2_asm.S → mlkem_poly_decompress_d4_avx2_asm.S} +32 -3
  185. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{poly_decompress_d5_avx2_asm.S → mlkem_poly_decompress_d5_avx2_asm.S} +32 -2
  186. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{poly_mulcache_compute_avx2_asm.S → mlkem_poly_mulcache_compute_avx2_asm.S} +29 -1
  187. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{polyvec_basemul_acc_montgomery_cached_k2_avx2_asm.S → mlkem_polyvec_basemul_acc_montgomery_cached_k2_avx2_asm.S} +35 -1
  188. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{polyvec_basemul_acc_montgomery_cached_k3_avx2_asm.S → mlkem_polyvec_basemul_acc_montgomery_cached_k3_avx2_asm.S} +35 -1
  189. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{polyvec_basemul_acc_montgomery_cached_k4_avx2_asm.S → mlkem_polyvec_basemul_acc_montgomery_cached_k4_avx2_asm.S} +35 -1
  190. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{reduce_avx2_asm.S → mlkem_reduce_avx2_asm.S} +17 -1
  191. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{rej_uniform_avx2_asm.S → mlkem_rej_uniform_avx2_asm.S} +40 -7
  192. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/native/x86_64/src/{tomont_avx2_asm.S → mlkem_tomont_avx2_asm.S} +20 -3
  193. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/poly.c +7 -2
  194. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/poly.h +6 -0
  195. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/poly_k.c +25 -4
  196. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/poly_k.h +33 -4
  197. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/sampling.c +4 -0
  198. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/sampling.h +4 -0
  199. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/sys.h +21 -3
  200. data/ext/pqcrypto/vendor/mlkem-native/mlkem/src/verify.h +11 -10
  201. data/lib/pq_crypto/version.rb +1 -1
  202. data/script/vendor_libs.rb +6 -6
  203. metadata +79 -79
  204. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/poly_chknorm_avx2.c +0 -52
  205. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/poly_decompose_32_avx2.c +0 -157
  206. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/poly_decompose_88_avx2.c +0 -157
  207. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/poly_use_hint_32_avx2.c +0 -103
  208. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/poly_use_hint_88_avx2.c +0 -105
  209. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/polyz_unpack_17_avx2.c +0 -94
  210. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/polyz_unpack_19_avx2.c +0 -96
  211. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/rej_uniform_avx2.c +0 -126
  212. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/rej_uniform_eta2_avx2.c +0 -157
  213. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/rej_uniform_eta4_avx2.c +0 -141
@@ -1,157 +0,0 @@
1
- /*
2
- * Copyright (c) The mldsa-native project authors
3
- * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
4
- */
5
-
6
- /* References
7
- * ==========
8
- *
9
- * - [REF_AVX2]
10
- * CRYSTALS-Dilithium optimized AVX2 implementation
11
- * Bai, Ducas, Kiltz, Lepoint, Lyubashevsky, Schwabe, Seiler, Stehlé
12
- * https://github.com/pq-crystals/dilithium/tree/master/avx2
13
- */
14
-
15
- /*
16
- * This file is derived from the public domain
17
- * AVX2 Dilithium implementation @[REF_AVX2].
18
- */
19
-
20
- #include "../../../common.h"
21
-
22
- #if defined(MLD_ARITH_BACKEND_X86_64_DEFAULT) && \
23
- !defined(MLD_CONFIG_NO_KEYPAIR_API) && \
24
- !defined(MLD_CONFIG_MULTILEVEL_NO_SHARED) && \
25
- (defined(MLD_CONFIG_MULTILEVEL_WITH_SHARED) || MLDSA_ETA == 2)
26
-
27
- #include <immintrin.h>
28
- #include "arith_native_x86_64.h"
29
- #include "consts.h"
30
-
31
- #define MLD_AVX2_ETA2 2
32
-
33
- /*
34
- * Reference: In the pqcrystals implementation this function is called
35
- * rej_eta_avx and supports multiple values for ETA via preprocessor
36
- * conditionals. We move the conditionals to the frontend.
37
- */
38
- unsigned int mld_rej_uniform_eta2_avx2(
39
- int32_t *MLD_RESTRICT r,
40
- const uint8_t buf[MLD_AVX2_REJ_UNIFORM_ETA2_BUFLEN])
41
- {
42
- unsigned int ctr, pos;
43
- uint32_t good;
44
- __m256i f0, f1, f2;
45
- __m128i g0, g1;
46
- const __m256i mask = _mm256_set1_epi8(15);
47
- const __m256i eta = _mm256_set1_epi8(MLD_AVX2_ETA2);
48
- const __m256i bound = mask;
49
- /* check-magic: -6560 == 32*round(-2**10 / 5) */
50
- const __m256i v = _mm256_set1_epi32(-6560);
51
- const __m256i p = _mm256_set1_epi32(5);
52
-
53
- ctr = pos = 0;
54
- while (ctr <= MLDSA_N - 8 && pos <= MLD_AVX2_REJ_UNIFORM_ETA2_BUFLEN - 16)
55
- {
56
- f0 = _mm256_cvtepu8_epi16(_mm_loadu_si128((__m128i *)&buf[pos]));
57
- f1 = _mm256_slli_epi16(f0, 4);
58
- f0 = _mm256_or_si256(f0, f1);
59
- f0 = _mm256_and_si256(f0, mask);
60
-
61
- f1 = _mm256_sub_epi8(f0, bound);
62
- f0 = _mm256_sub_epi8(eta, f0);
63
- good = (uint32_t)_mm256_movemask_epi8(f1);
64
-
65
- g0 = _mm256_castsi256_si128(f0);
66
- g1 = _mm_loadl_epi64((__m128i *)&mld_rej_uniform_table[good & 0xFF]);
67
- g1 = _mm_shuffle_epi8(g0, g1);
68
- f1 = _mm256_cvtepi8_epi32(g1);
69
- f2 = _mm256_mulhrs_epi16(f1, v);
70
- f2 = _mm256_mullo_epi16(f2, p);
71
- f1 = _mm256_add_epi32(f1, f2);
72
- _mm256_storeu_si256((__m256i *)&r[ctr], f1);
73
- ctr += (unsigned)_mm_popcnt_u32(good & 0xFF);
74
- good >>= 8;
75
- pos += 4;
76
-
77
- if (ctr > MLDSA_N - 8)
78
- {
79
- break;
80
- }
81
- g0 = _mm_bsrli_si128(g0, 8);
82
- g1 = _mm_loadl_epi64((__m128i *)&mld_rej_uniform_table[good & 0xFF]);
83
- g1 = _mm_shuffle_epi8(g0, g1);
84
- f1 = _mm256_cvtepi8_epi32(g1);
85
- f2 = _mm256_mulhrs_epi16(f1, v);
86
- f2 = _mm256_mullo_epi16(f2, p);
87
- f1 = _mm256_add_epi32(f1, f2);
88
- _mm256_storeu_si256((__m256i *)&r[ctr], f1);
89
- ctr += (unsigned)_mm_popcnt_u32(good & 0xFF);
90
- good >>= 8;
91
- pos += 4;
92
-
93
- if (ctr > MLDSA_N - 8)
94
- {
95
- break;
96
- }
97
- g0 = _mm256_extracti128_si256(f0, 1);
98
- g1 = _mm_loadl_epi64((__m128i *)&mld_rej_uniform_table[good & 0xFF]);
99
- g1 = _mm_shuffle_epi8(g0, g1);
100
- f1 = _mm256_cvtepi8_epi32(g1);
101
- f2 = _mm256_mulhrs_epi16(f1, v);
102
- f2 = _mm256_mullo_epi16(f2, p);
103
- f1 = _mm256_add_epi32(f1, f2);
104
- _mm256_storeu_si256((__m256i *)&r[ctr], f1);
105
- ctr += (unsigned)_mm_popcnt_u32(good & 0xFF);
106
- good >>= 8;
107
- pos += 4;
108
-
109
- if (ctr > MLDSA_N - 8)
110
- {
111
- break;
112
- }
113
- g0 = _mm_bsrli_si128(g0, 8);
114
- g1 = _mm_loadl_epi64((__m128i *)&mld_rej_uniform_table[good]);
115
- g1 = _mm_shuffle_epi8(g0, g1);
116
- f1 = _mm256_cvtepi8_epi32(g1);
117
- f2 = _mm256_mulhrs_epi16(f1, v);
118
- f2 = _mm256_mullo_epi16(f2, p);
119
- f1 = _mm256_add_epi32(f1, f2);
120
- _mm256_storeu_si256((__m256i *)&r[ctr], f1);
121
- ctr += (unsigned)_mm_popcnt_u32(good);
122
- pos += 4;
123
- }
124
-
125
- while (ctr < MLDSA_N && pos < MLD_AVX2_REJ_UNIFORM_ETA2_BUFLEN)
126
- {
127
- uint32_t t0 = buf[pos] & 0x0F;
128
- uint32_t t1 = buf[pos++] >> 4;
129
-
130
- if (t0 < 15)
131
- {
132
- t0 = t0 - (205 * t0 >> 10) * 5;
133
- r[ctr++] = (int32_t)(2 - t0);
134
- }
135
- if (t1 < 15 && ctr < MLDSA_N)
136
- {
137
- t1 = t1 - (205 * t1 >> 10) * 5;
138
- r[ctr++] = (int32_t)(2 - t1);
139
- }
140
- }
141
-
142
- return ctr;
143
- }
144
-
145
- #else /* MLD_ARITH_BACKEND_X86_64_DEFAULT && !MLD_CONFIG_NO_KEYPAIR_API && \
146
- !MLD_CONFIG_MULTILEVEL_NO_SHARED && \
147
- (MLD_CONFIG_MULTILEVEL_WITH_SHARED || MLDSA_ETA == 2) */
148
-
149
- MLD_EMPTY_CU(avx2_rej_uniform_eta2)
150
-
151
- #endif /* !(MLD_ARITH_BACKEND_X86_64_DEFAULT && !MLD_CONFIG_NO_KEYPAIR_API && \
152
- !MLD_CONFIG_MULTILEVEL_NO_SHARED && \
153
- (MLD_CONFIG_MULTILEVEL_WITH_SHARED || MLDSA_ETA == 2)) */
154
-
155
- /* To facilitate single-compilation-unit (SCU) builds, undefine all macros.
156
- * Don't modify by hand -- this is auto-generated by scripts/autogen. */
157
- #undef MLD_AVX2_ETA2
@@ -1,141 +0,0 @@
1
- /*
2
- * Copyright (c) The mldsa-native project authors
3
- * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
4
- */
5
-
6
- /* References
7
- * ==========
8
- *
9
- * - [REF_AVX2]
10
- * CRYSTALS-Dilithium optimized AVX2 implementation
11
- * Bai, Ducas, Kiltz, Lepoint, Lyubashevsky, Schwabe, Seiler, Stehlé
12
- * https://github.com/pq-crystals/dilithium/tree/master/avx2
13
- */
14
-
15
- /*
16
- * This file is derived from the public domain
17
- * AVX2 Dilithium implementation @[REF_AVX2].
18
- */
19
-
20
- #include "../../../common.h"
21
-
22
- #if defined(MLD_ARITH_BACKEND_X86_64_DEFAULT) && \
23
- !defined(MLD_CONFIG_NO_KEYPAIR_API) && \
24
- !defined(MLD_CONFIG_MULTILEVEL_NO_SHARED) && \
25
- (defined(MLD_CONFIG_MULTILEVEL_WITH_SHARED) || MLDSA_ETA == 4)
26
-
27
- #include <immintrin.h>
28
- #include "arith_native_x86_64.h"
29
- #include "consts.h"
30
-
31
- #define MLD_AVX2_ETA4 4
32
-
33
- /*
34
- * Reference: In the pqcrystals implementation this function is called
35
- * rej_eta_avx and supports multiple values for ETA via preprocessor
36
- * conditionals. We move the conditionals to the frontend.
37
- */
38
-
39
- unsigned int mld_rej_uniform_eta4_avx2(
40
- int32_t *MLD_RESTRICT r,
41
- const uint8_t buf[MLD_AVX2_REJ_UNIFORM_ETA4_BUFLEN])
42
- {
43
- unsigned int ctr, pos;
44
- uint32_t good;
45
- __m256i f0, f1;
46
- __m128i g0, g1;
47
- const __m256i mask = _mm256_set1_epi8(15);
48
- const __m256i eta = _mm256_set1_epi8(MLD_AVX2_ETA4);
49
- const __m256i bound = _mm256_set1_epi8(9);
50
-
51
- ctr = pos = 0;
52
- while (ctr <= MLDSA_N - 8 && pos <= MLD_AVX2_REJ_UNIFORM_ETA4_BUFLEN - 16)
53
- {
54
- f0 = _mm256_cvtepu8_epi16(_mm_loadu_si128((__m128i *)&buf[pos]));
55
- f1 = _mm256_slli_epi16(f0, 4);
56
- f0 = _mm256_or_si256(f0, f1);
57
- f0 = _mm256_and_si256(f0, mask);
58
-
59
- f1 = _mm256_sub_epi8(f0, bound);
60
- f0 = _mm256_sub_epi8(eta, f0);
61
- good = (uint32_t)_mm256_movemask_epi8(f1);
62
-
63
- g0 = _mm256_castsi256_si128(f0);
64
- g1 = _mm_loadl_epi64((__m128i *)&mld_rej_uniform_table[good & 0xFF]);
65
- g1 = _mm_shuffle_epi8(g0, g1);
66
- f1 = _mm256_cvtepi8_epi32(g1);
67
- _mm256_storeu_si256((__m256i *)&r[ctr], f1);
68
- ctr += (unsigned)_mm_popcnt_u32(good & 0xFF);
69
- good >>= 8;
70
- pos += 4;
71
-
72
- if (ctr > MLDSA_N - 8)
73
- {
74
- break;
75
- }
76
- g0 = _mm_bsrli_si128(g0, 8);
77
- g1 = _mm_loadl_epi64((__m128i *)&mld_rej_uniform_table[good & 0xFF]);
78
- g1 = _mm_shuffle_epi8(g0, g1);
79
- f1 = _mm256_cvtepi8_epi32(g1);
80
- _mm256_storeu_si256((__m256i *)&r[ctr], f1);
81
- ctr += (unsigned)_mm_popcnt_u32(good & 0xFF);
82
- good >>= 8;
83
- pos += 4;
84
-
85
- if (ctr > MLDSA_N - 8)
86
- {
87
- break;
88
- }
89
- g0 = _mm256_extracti128_si256(f0, 1);
90
- g1 = _mm_loadl_epi64((__m128i *)&mld_rej_uniform_table[good & 0xFF]);
91
- g1 = _mm_shuffle_epi8(g0, g1);
92
- f1 = _mm256_cvtepi8_epi32(g1);
93
- _mm256_storeu_si256((__m256i *)&r[ctr], f1);
94
- ctr += (unsigned)_mm_popcnt_u32(good & 0xFF);
95
- good >>= 8;
96
- pos += 4;
97
-
98
- if (ctr > MLDSA_N - 8)
99
- {
100
- break;
101
- }
102
- g0 = _mm_bsrli_si128(g0, 8);
103
- g1 = _mm_loadl_epi64((__m128i *)&mld_rej_uniform_table[good]);
104
- g1 = _mm_shuffle_epi8(g0, g1);
105
- f1 = _mm256_cvtepi8_epi32(g1);
106
- _mm256_storeu_si256((__m256i *)&r[ctr], f1);
107
- ctr += (unsigned)_mm_popcnt_u32(good);
108
- pos += 4;
109
- }
110
-
111
- while (ctr < MLDSA_N && pos < MLD_AVX2_REJ_UNIFORM_ETA4_BUFLEN)
112
- {
113
- uint32_t t0 = buf[pos] & 0x0F;
114
- uint32_t t1 = buf[pos++] >> 4;
115
-
116
- if (t0 < 9)
117
- {
118
- r[ctr++] = (int32_t)(4 - t0);
119
- }
120
- if (t1 < 9 && ctr < MLDSA_N)
121
- {
122
- r[ctr++] = (int32_t)(4 - t1);
123
- }
124
- }
125
-
126
- return ctr;
127
- }
128
-
129
- #else /* MLD_ARITH_BACKEND_X86_64_DEFAULT && !MLD_CONFIG_NO_KEYPAIR_API && \
130
- !MLD_CONFIG_MULTILEVEL_NO_SHARED && \
131
- (MLD_CONFIG_MULTILEVEL_WITH_SHARED || MLDSA_ETA == 4) */
132
-
133
- MLD_EMPTY_CU(avx2_rej_uniform_eta4)
134
-
135
- #endif /* !(MLD_ARITH_BACKEND_X86_64_DEFAULT && !MLD_CONFIG_NO_KEYPAIR_API && \
136
- !MLD_CONFIG_MULTILEVEL_NO_SHARED && \
137
- (MLD_CONFIG_MULTILEVEL_WITH_SHARED || MLDSA_ETA == 4)) */
138
-
139
- /* To facilitate single-compilation-unit (SCU) builds, undefine all macros.
140
- * Don't modify by hand -- this is auto-generated by scripts/autogen. */
141
- #undef MLD_AVX2_ETA4