origen_arm_debug 0.8.4 → 0.9.0
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- checksums.yaml +4 -4
- data/config/commands.rb +2 -2
- data/config/version.rb +2 -2
- data/lib/origen_arm_debug/driver.rb +39 -38
- data/lib/origen_arm_debug/dut.rb +6 -4
- data/lib/origen_arm_debug/dut_jtag.rb +2 -1
- data/lib/origen_arm_debug/dut_swd.rb +5 -1
- data/lib/origen_arm_debug/mem_ap.rb +100 -244
- data/lib/origen_arm_debug/swj_dp.rb +159 -250
- data/lib/origen_arm_debug.rb +3 -3
- data/pattern/read_write_reg.rb +3 -3
- data/pattern/read_write_reg_jtag.rb +14 -7
- data/pattern/read_write_reg_swd.rb +15 -7
- data/templates/web/index.md.erb +5 -3
- metadata +6 -6
checksums.yaml
CHANGED
@@ -1,7 +1,7 @@
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1
1
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---
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2
2
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SHA1:
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3
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-
metadata.gz:
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4
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-
data.tar.gz:
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3
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+
metadata.gz: f4a9f1dc701be4b75209634978ffff6e9c608ea6
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4
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+
data.tar.gz: f4ac35a546afb37109a02b46fdd099cdb51c2b74
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5
5
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SHA512:
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6
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-
metadata.gz:
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7
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-
data.tar.gz:
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6
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+
metadata.gz: 9bd87b22a6ba0fa200c94b42554cf365461f845f71823579069c986aedda124dcd9c225d0e5a1fab77bae6a1684fc579e7a82c6e2fdb9878bb58c286db0ea45e
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7
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+
data.tar.gz: d1e8c9efbbd74db7d121a900781ba5e245473d8acb1bc78f1655dca5df9bb0937417bdbb173c8103708deb3963a5d7bb6b0aba3cf18b923f1839817b6f7923f2
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data/config/commands.rb
CHANGED
@@ -28,9 +28,9 @@ when "examples"
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28
28
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# Pattern generator tests
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29
29
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ARGV = %w(read_write_reg -t debug -r approved)
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30
30
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load "#{Origen.top}/lib/origen/commands/generate.rb"
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31
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-
ARGV = %w(read_write_reg_jtag -t
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31
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+
ARGV = %w(read_write_reg_jtag -t jtag -r approved)
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32
32
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load "#{Origen.top}/lib/origen/commands/generate.rb"
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33
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-
ARGV = %w(read_write_reg_swd -t
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33
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+
ARGV = %w(read_write_reg_swd -t swd -r approved)
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34
34
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load "#{Origen.top}/lib/origen/commands/generate.rb"
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35
35
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36
36
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if Origen.app.stats.changed_files == 0 &&
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data/config/version.rb
CHANGED
@@ -5,34 +5,37 @@ module OrigenARMDebug
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5
5
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# include SWD
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6
6
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#
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7
7
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class Driver
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8
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+
include Origen::Model
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9
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+
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8
10
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# Returns the parent object that instantiated the driver, could be
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9
11
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# either a DUT object or a protocol abstraction
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10
12
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attr_reader :owner
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11
13
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12
14
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# Initialize class variables
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13
15
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#
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14
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-
# @param [Object] owner Parent object
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15
16
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# @param [Hash] options Options to customize the operation
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16
17
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#
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17
18
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# @example
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18
19
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# DUT.new.arm_debug
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19
20
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#
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20
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-
def initialize(
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21
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-
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22
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-
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21
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+
def initialize(options = {})
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22
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+
# 'buffer' register to bridge the actual memory-mapped register to the internal DAP transactions
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23
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+
# (also used to support case on non-register based calls)
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24
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+
add_reg :buffer, 0x00, 32, data: { pos: 0, bits: 32 }
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23
25
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24
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-
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25
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-
def swj_dp
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26
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-
if owner.respond_to?(:swd)
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27
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-
@swj_dp ||= SWJ_DP.new(self, :swd)
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28
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-
elsif owner.respond_to?(:jtag)
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29
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-
@swj_dp ||= SWJ_DP.new(self, :jtag)
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30
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-
end
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26
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+
instantiate_subblocks(options)
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31
27
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end
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32
28
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33
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-
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34
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-
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35
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-
|
29
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+
def instantiate_subblocks(options = {})
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30
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sub_block :swj_dp, class_name: 'OrigenARMDebug::SWJ_DP'
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31
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+
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32
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+
if options[:aps].nil?
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33
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add_mem_ap('mem_ap', 0x00000000)
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34
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+
else
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35
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options[:aps].each do |key, value|
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36
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add_mem_ap(key, value)
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37
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end
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38
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end
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36
39
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end
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37
40
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38
41
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# Method to add additional Memory Access Ports (MEM-AP) with specified base address
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@@ -44,10 +47,24 @@ module OrigenARMDebug
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44
47
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# arm_debug.add_mem_ap('alt_ahbapi', 0x02000000)
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45
48
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#
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46
49
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def add_mem_ap(name, base_address)
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47
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-
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48
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-
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50
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+
domain name.to_sym
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51
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sub_block name.to_sym, class_name: 'OrigenARMDebug::MemAP', base_address: base_address
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49
52
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end
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50
53
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54
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+
# Create and/or return the SWJ_DP object with specified protocol
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55
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# def swj_dp
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56
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# if parent.respond_to?(:swd)
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57
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# @swj_dp ||= SWJ_DP.new(self, :swd)
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58
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# elsif parent.respond_to?(:jtag)
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59
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# @swj_dp ||= SWJ_DP.new(self, :jtag)
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60
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# end
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61
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# end
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62
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def abs_if
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63
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swj_dp
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64
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end
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65
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alias_method :apapi, :abs_if
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66
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alias_method :dpapi, :abs_if
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67
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+
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51
68
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# Read from a MEM-AP register
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52
69
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#
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53
70
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# @param [Integer, Origen::Register::Reg, Origen::Register::BitCollection, Origen::Register::Bit] reg_or_val
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@@ -59,7 +76,7 @@ module OrigenARMDebug
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59
76
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if options[:ap].nil?
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77
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ap = mem_ap # default to 'mem_ap' if no AP is specified as an option
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78
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else
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-
ap = options[:ap]
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79
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+
ap = eval(options[:ap].to_s)
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63
80
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end
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81
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ap.read_register(reg_or_val, options)
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65
82
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end
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@@ -75,33 +92,17 @@ module OrigenARMDebug
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75
92
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if options[:ap].nil?
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76
93
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ap = mem_ap # default to 'mem_ap' if no AP is specified as an option
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77
94
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else
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78
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-
ap = options[:ap]
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95
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+
ap = eval(options[:ap].to_s)
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79
96
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end
|
80
97
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ap.write_register(reg_or_val, options)
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81
98
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end
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99
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83
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-
def
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84
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-
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100
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+
def jtag
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101
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parent.jtag
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85
102
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end
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86
103
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87
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-
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88
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-
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89
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-
# Short-cut to protocol driver
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90
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-
def arm_debug_driver
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91
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-
return @arm_debug_driver if @arm_debug_driver
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92
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-
if owner.respond_to?(:jtag)
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93
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-
@arm_debug_driver = owner.jtag
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94
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-
elsif owner.respond_to?(:swd)
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95
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-
@arm_debug_driver = owner.swd
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96
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-
else
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97
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-
puts 'Cannot find a compatible physical driver!'
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98
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-
puts 'The ARM debug protocol supports the following phyiscal drivers:'
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99
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-
puts ' JTAG - http://origen-sdk.org/origen_jtag'
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100
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-
puts ' Single Wire Debug - http://origen-sdk.org/origen_swd'
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-
puts ' Background Debug - http://origen-sdk.org/origen_bdm'
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102
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-
puts "Add one to your #{owner.class} to resolve this error."
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103
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-
fail 'ARM Debug error!'
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104
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-
end
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104
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+
def swd
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105
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+
parent.swd
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105
106
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end
|
106
107
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end
|
107
108
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end
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data/lib/origen_arm_debug/dut.rb
CHANGED
@@ -5,9 +5,8 @@ module OrigenARMDebug
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|
5
5
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#
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6
6
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# It is not included when this library is imported.
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7
7
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class DUT
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8
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+
include Origen::TopLevel
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8
9
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include OrigenARMDebug
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9
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-
include Origen::Callbacks
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10
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-
include Origen::Registers
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11
10
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12
11
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# Initializes simple dut model with test register and required jtag/swd pins
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13
12
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#
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@@ -20,9 +19,12 @@ module OrigenARMDebug
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20
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add_reg :test, 0x0, 32, data: { pos: 0, bits: 32 },
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21
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bit: { pos: 0 }
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22
21
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23
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-
arm_debug
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-
arm_debug.add_mem_ap('mdm_ap', 0x01000000)
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+
sub_block :arm_debug, class_name: 'OrigenARMDebug::Driver', aps: { mem_ap: 0x00000000, mdm_ap: 0x01000000 }
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25
23
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arm_debug.add_mem_ap('alt_ahbapi', 0x02000000)
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24
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+
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25
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+
# arm_debug.add_mem_ap('mem_ap', 0x00000000)
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26
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+
# arm_debug.add_mem_ap('mdm_ap', 0x01000000)
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27
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+
# arm_debug.add_mem_ap('alt_ahbapi', 0x02000000)
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26
28
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end
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27
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# Add any custom startup business here.
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@@ -2,7 +2,6 @@ module OrigenARMDebug
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2
2
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# Simple JTAG-specific dut model that inherits from protocol-agnostic DUT model
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3
3
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class JTAG_DUT < DUT
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4
4
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include OrigenJTAG
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5
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-
include Origen::Pins
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6
5
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7
6
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# Adds jtag-required pins to the simple dut model
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8
7
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# Returns nothing.
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@@ -13,6 +12,8 @@ module OrigenARMDebug
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13
12
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add_pin :tdo
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14
13
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add_pin :tms
|
15
14
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add_pin :trst
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15
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+
add_pin :swd_clk
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16
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+
add_pin :swd_dio
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16
17
|
end
|
17
18
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end
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18
19
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end
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@@ -2,12 +2,16 @@ module OrigenARMDebug
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2
2
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# Simple SWD-specific dut model that inherits from protocol-agnostic DUT model
|
3
3
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class SWD_DUT < DUT
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4
4
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include OrigenSWD
|
5
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-
include Origen::Pins
|
6
5
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7
6
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# Adds swd-required pins to the simple dut model
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8
7
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# Returns nothing.
|
9
8
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def initialize
|
10
9
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super
|
10
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+
add_pin :tclk
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11
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+
add_pin :tdi
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12
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+
add_pin :tdo
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13
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+
add_pin :tms
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14
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+
add_pin :trst
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11
15
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add_pin :swd_clk
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12
16
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add_pin :swd_dio
|
13
17
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end
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