ipxact-tools 0.2.0
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- data/config/detector.yml +63 -0
- data/lib/ipxact_tools.rb +287 -0
- data/lib/ipxact_tools/graph_pathfinder.rb +191 -0
- data/lib/ipxact_tools/interrupt_line_detector.rb +98 -0
- data/spec/integration/integration_spec.rb +254 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/PV/pv_initiator_port.h +135 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/PV/pv_initiator_port.tpp +247 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/PV/pv_initiator_port_base.h +189 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/PV/pv_router.h +205 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/PV/pv_router.tpp +278 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/PV/pv_slave_base.h +115 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/PV/pv_slave_base.tpp +126 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/PV/pv_target_port.h +168 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/PV/pv_target_port_base.h +133 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/PV/pv_tlm_if.h +280 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/PV/user_types.h +38 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM1/Leon2Platform/Leon2Platform.xml +77 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM1/Leon2Platform/design_Leon2Platform.xml +156 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM1/Leon2Platform/tlmsrc/Leon2Platform.h +149 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM1/apbSubSystem/apbSubSystem.xml +406 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM1/apbSubSystem/design_apbSubSystem.xml +135 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM1/apbSubSystem/tlmsrc/apbSubSystem.h +133 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM2/Leon2Platform/Leon2Platform.xml +77 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM2/Leon2Platform/design_Leon2Platform.xml +157 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM2/Leon2Platform/tlmsrc/Leon2Platform.h +150 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM2/apbSubSystem/apbSubSystem.xml +422 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM2/apbSubSystem/designConfig_apbSubSystem.xml +79 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM2/apbSubSystem/design_apbSubSystem.xml +184 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM2/apbSubSystem/tlmsrc/apbSubSystem.h +164 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM3/Leon2Platform/Leon2Platform.xml +105 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM3/Leon2Platform/design_Leon2Platform.xml +157 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM3/Leon2Platform/tlmsrc/Leon2Platform.h +152 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM3/apbSubSystem/apbSubSystem.xml +429 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM3/apbSubSystem/designConfig_apbSubSystem.xml +64 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM3/apbSubSystem/design_apbSubSystem.xml +150 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/SystemTLM3/apbSubSystem/tlmsrc/apbSubSystem.h +167 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/ahbbus/1.4/ahbbus22.xml +236 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/ahbbus/1.4/tlmsrc/ahbbus.h +52 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/ahbram/1.4/ahbram.xml +184 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/ahbram/1.4/tlmsrc/ahbram.cc +93 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/ahbram/1.4/tlmsrc/ahbram.h +77 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/apbbus/1.4/apbbus8.xml +544 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/apbbus/1.4/tlmsrc/apbbus.h +55 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/apbmst/1.4/apbmst.xml +209 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/apbmst/1.4/tlmsrc/apbmst.h +53 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/apbram/1.0/apbram.xml +395 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/apbram/1.0/hdlsrc/apbram.cc +89 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/apbram/1.0/hdlsrc/apbram.h +69 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/apbram/1.0/hdlsrc/apbram.v +82 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/apbram/1.0/hdlsrc/apbram.vhd +132 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/cgu/1.4/cgu.xml +686 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/cgu/1.4/tlmsrc/cgu.cc +121 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/cgu/1.4/tlmsrc/cgu.h +81 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/cgu/1.5/cgu.xml +707 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/cgu/1.5/tlmsrc/cgu.cc +121 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/cgu/1.5/tlmsrc/cgu.h +81 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/dma/1.4/dma.xml +272 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/dma/1.4/tlmsrc/dma.cc +230 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/dma/1.4/tlmsrc/dma.h +116 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/irqctrl/1.4/irqctrl.xml +530 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/irqctrl/1.4/tlmsrc/irqctrl.cc +211 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/irqctrl/1.4/tlmsrc/irqctrl.h +108 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/processor/1.4/processor.xml +423 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/processor/1.4/tlmsrc/processor.cc +331 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/processor/1.4/tlmsrc/processor.h +121 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/pv2apb/1.0/pv2apb.xml +240 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/pv2apb/1.0/tlmsrc/pv2apb.cc +153 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/pv2apb/1.0/tlmsrc/pv2apb.h +77 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/pv2tac/1.0/pv2tac.xml +154 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/pv2tac/1.0/tlmsrc/pv2tac.cc +114 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/pv2tac/1.0/tlmsrc/pv2tac.h +67 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/rgu/1.4/rgu.xml +766 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/rgu/1.4/tlmsrc/rgu.cc +126 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/rgu/1.4/tlmsrc/rgu.h +105 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/scmlAdaptor/1.0/scmlAdaptor.xml +154 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/scmlAdaptor/1.0/tlmsrc/scmladaptor.cc +100 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/scmlAdaptor/1.0/tlmsrc/scmladaptor.h +62 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/serial_device/1.0/serial_device.xml +151 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/serial_device/1.0/tlmsrc/serial_device.h +85 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/timers/1.4/timers.xml +460 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/timers/1.4/tlmsrc/timers.cc +201 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/timers/1.4/tlmsrc/timers.h +102 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_scml/1.0/tlmsrc/inc/uart.h +152 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_scml/1.0/tlmsrc/inc/uart_fifo.h +113 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_scml/1.0/tlmsrc/inc/uart_memory_map.h +96 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_scml/1.0/tlmsrc/inc/uart_types.h +60 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_scml/1.0/tlmsrc/src/uart.cc +125 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_scml/1.0/tlmsrc/src/uart_interrupt_handler.cc +136 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_scml/1.0/tlmsrc/src/uart_register_bank.cc +129 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_scml/1.0/tlmsrc/src/uart_serial_tx_rx.cc +145 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_scml/1.0/uart_scml.xml +372 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_tac/1.0/tlmsrc/include/Leon2_uart.h +216 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_tac/1.0/tlmsrc/include/def_Leon2_uart.h +34 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_tac/1.0/tlmsrc/include/tlm_field.h +72 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_tac/1.0/tlmsrc/include/tlm_register.h +129 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_tac/1.0/tlmsrc/include/tlmreg_Leon2_uart.h +133 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_tac/1.0/tlmsrc/src/Leon2_uart.cc +316 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_tac/1.0/tlmsrc/src/tlmreg_Leon2_uart.cc +197 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_tac/1.0/tlmsrc/src/user_specific_Leon2_uart.cc +146 -0
- data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_tac/1.0/uart_tac.xml +222 -0
- data/spec/unit/graph_pathfinder_spec.rb +128 -0
- metadata +272 -0
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//
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// Revision: $Revision: 1506 $
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// Date: $Date: 2009-04-26 01:51:56 -0500 (Sun, 26 Apr 2009) $
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//
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// Copyright (c) 2005, 2006, 2007, 2008, 2009 The SPIRIT Consortium.
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//
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// This work forms part of a deliverable of The SPIRIT Consortium.
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//
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// Use of these materials are governed by the legal terms and conditions
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// outlined in the disclaimer available from www.spiritconsortium.org.
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//
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// This source file is provided on an AS IS basis. The SPIRIT
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// Consortium disclaims any warranty express or implied including
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// any warranty of merchantability and fitness for use for a
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// particular purpose.
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//
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// The user of the source file shall indemnify and hold The SPIRIT
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// Consortium and its members harmless from any damages or liability.
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// Users are requested to provide feedback to The SPIRIT Consortium
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// using either mailto:feedback@lists.spiritconsortium.org or the forms at
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// http://www.spiritconsortium.org/about/contact_us/
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//
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// This file may be copied, and distributed, with or without
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// modifications; but this notice must be included on any copy.
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/*------------------------------------------------------------------------------
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* Includes
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*----------------------------------------------------------------------------*/
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#include "timers.h"
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/*------------------------------------------------------------------------------
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* Methods
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*----------------------------------------------------------------------------*/
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timers::timers( sc_module_name module_name ) :
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sc_module( module_name ),
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pv_slave_base<ADDRESS_TYPE,DATA_TYPE>(name()),
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apb_slave_port("apb_slave_port"),
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int0("int0"),
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int1("int1"),
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clk("clk")
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{
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apb_slave_port( *this );
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int0.initialize(false);
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int1.initialize(false);
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init_registers();
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SC_METHOD(count); // timer process
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dont_initialize();
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sensitive << clk;
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}
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timers::~timers() {
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}
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void timers::end_of_elaboration() {
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cout << name() << " constructed." << endl;
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}
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tlm::tlm_status timers::write( const ADDRESS_TYPE &addr , const DATA_TYPE &data,
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const unsigned int byte_enable,
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const tlm::tlm_mode mode,
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const unsigned int export_id)
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{
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tlm::tlm_status status;
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if ((addr < TIMER_BASE_ADDR) || (addr >= TIMER_BASE_ADDR+TIMER_SIZE)) {
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cout << "ERROR\t" << name() << " : trying to write out of bounds at address " << addr << endl;
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status.set_error();
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return status;
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}
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// Write the register with the correct mask.
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switch (addr) {
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case TIMER0_CONTROL:
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registers[addr] = data & 0x7;
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break;
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case TIMER1_CONTROL:
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registers[addr] = data & 0x7;
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break;
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case PRESCALER_COUNTER:
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registers[addr] = data & 0x3FF;
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break;
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case PRESCALER_RELOAD_VALUE:
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registers[addr] = data & 0x3FF;
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break;
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default :
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registers[addr] = data & 0xFFFFFF;
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break;
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}
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if (addr==TIMER0_CONTROL) {
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// reload timer
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if (data & TIMER_CTRL) {
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cout << name() << " Timer0 forced reload" << endl;
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registers[TIMER0_COUNTER] = registers[TIMER0_RELOAD];
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registers[TIMER0_CONTROL] = data & 0x3; // reset reload bit
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}
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if ((data & TIMER_ENABLE) == TIMER_DISABLED) {
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cout << name() << " Timer0 disabled (clear control register0)" << endl;
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}
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}
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if (addr==TIMER1_CONTROL) {
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// reload timer
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if (data & TIMER_CTRL) {
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cout << name() << " Timer1 forced reload" << endl;
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registers[TIMER1_COUNTER] = registers[TIMER1_RELOAD];
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registers[TIMER1_CONTROL] = data & 0x3; // reset reload bit
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}
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if ((data & TIMER_ENABLE) == TIMER_DISABLED) {
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cout << name() << " Timer1 disabled (clear control register1)" << endl;
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}
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}
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status.set_ok();
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return status;
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}
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tlm::tlm_status timers::read( const ADDRESS_TYPE &addr , DATA_TYPE &data,
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const unsigned int byte_enable,
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const tlm::tlm_mode mode,
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const unsigned int export_id)
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{
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tlm::tlm_status status;
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if ((addr < TIMER_BASE_ADDR) || (addr >= TIMER_BASE_ADDR+TIMER_SIZE)) {
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cout << "ERROR\t" << name() << " : trying to read out of bounds at address " << addr << endl;
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status.set_error();
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return status;
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}
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data = registers[addr];
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status.set_ok();
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return status;
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}
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void timers::init_registers()
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{
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for (int i=0; i < 9; i++) registers[i]=0;
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}
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void timers::count()
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{
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if (clk.posedge()) {
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// Prescaler
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if ((registers[PRESCALER_COUNTER] > 0)) {
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registers[PRESCALER_COUNTER]--;
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}
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else {
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registers[PRESCALER_COUNTER] = registers[PRESCALER_RELOAD_VALUE];
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}
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// Update the timer only if the prescaler value is 0
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if ((registers[PRESCALER_COUNTER] == 0)) {
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// Timer 0
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if ((registers[TIMER0_CONTROL] & TIMER_ENABLE) == TIMER_ENABLED) {
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if ((registers[TIMER0_COUNTER] > 0)) {
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cout << "... T0=" << registers[TIMER0_COUNTER] << " At Time " << sc_time_stamp() << endl;
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registers[TIMER0_COUNTER]--;
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}
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if (registers[TIMER0_COUNTER] == 0) {
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int0.write(1);
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if ((registers[TIMER0_CONTROL] & TIMER_LOAD)) {
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registers[TIMER0_COUNTER] = registers[TIMER0_RELOAD];
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}
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}
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else {
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if (int0.read() == 1)
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int0.write(0);
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}
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}
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// Timer 1
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if ((registers[TIMER1_CONTROL] & TIMER_ENABLE) == TIMER_ENABLED) {
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if ((registers[TIMER1_COUNTER] > 0)) {
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cout << "... T1=" << registers[TIMER1_COUNTER] << " At Time " << sc_time_stamp() << endl;
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registers[TIMER1_COUNTER]--;
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}
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if (registers[TIMER1_COUNTER] == 0) {
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int1.write(1);
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if ((registers[TIMER1_CONTROL] & TIMER_LOAD)) {
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registers[TIMER1_COUNTER] = registers[TIMER1_RELOAD];
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}
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}
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else {
|
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if (int1.read() == 1)
|
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int1.write(0);
|
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}
|
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}
|
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|
+
}
|
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|
+
|
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|
+
if ((registers[TIMER0_CONTROL] & TIMER_ENABLE) == TIMER_DISABLED && int0.read() == 1) {
|
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|
+
int0.write(0);
|
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|
+
}
|
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|
+
|
193
|
+
if ((registers[TIMER1_CONTROL] & TIMER_ENABLE) == TIMER_DISABLED && int1.read() == 1) {
|
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+
int1.write(0);
|
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|
+
}
|
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|
+
|
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|
+
// Timer count rate ( SC kernel recall this method when simulation time
|
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// reaches now + 10 ns
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//next_trigger(10,SC_NS);
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}
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}
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//
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// Revision: $Revision: 1506 $
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// Date: $Date: 2009-04-26 01:51:56 -0500 (Sun, 26 Apr 2009) $
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//
|
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// Copyright (c) 2005, 2006, 2007, 2008, 2009 The SPIRIT Consortium.
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//
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// This work forms part of a deliverable of The SPIRIT Consortium.
|
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//
|
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|
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// Use of these materials are governed by the legal terms and conditions
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+
// outlined in the disclaimer available from www.spiritconsortium.org.
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+
//
|
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+
// This source file is provided on an AS IS basis. The SPIRIT
|
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// Consortium disclaims any warranty express or implied including
|
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+
// any warranty of merchantability and fitness for use for a
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// particular purpose.
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+
//
|
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+
// The user of the source file shall indemnify and hold The SPIRIT
|
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+
// Consortium and its members harmless from any damages or liability.
|
19
|
+
// Users are requested to provide feedback to The SPIRIT Consortium
|
20
|
+
// using either mailto:feedback@lists.spiritconsortium.org or the forms at
|
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|
+
// http://www.spiritconsortium.org/about/contact_us/
|
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|
+
//
|
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|
+
// This file may be copied, and distributed, with or without
|
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+
// modifications; but this notice must be included on any copy.
|
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+
|
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+
|
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+
#ifndef _TIMERS_H_
|
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#define _TIMERS_H_
|
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+
|
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+
/*------------------------------------------------------------------------------
|
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+
* Includes
|
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|
+
*----------------------------------------------------------------------------*/
|
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|
+
#include <systemc.h>
|
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+
|
35
|
+
#include "pv_slave_base.h"
|
36
|
+
#include "pv_target_port.h"
|
37
|
+
#include "user_types.h"
|
38
|
+
|
39
|
+
|
40
|
+
/*------------------------------------------------------------------------------
|
41
|
+
* Define device parameters
|
42
|
+
*----------------------------------------------------------------------------*/
|
43
|
+
#define TIMER_BASE_ADDR 0x0000 // in global systems, start at: 0x30001000
|
44
|
+
#define TIMER_SIZE 0x1000 // 4Kb
|
45
|
+
|
46
|
+
/*------------------------------------------------------------------------------
|
47
|
+
* Define Timer Registers
|
48
|
+
* Note : here static, but could be read from external description
|
49
|
+
*----------------------------------------------------------------------------*/
|
50
|
+
|
51
|
+
#define TIMER_REGISTER_SIZE 0x4 // in bytes
|
52
|
+
#define TIMER0_COUNTER TIMER_BASE_ADDR
|
53
|
+
#define TIMER0_RELOAD TIMER_BASE_ADDR + 1*TIMER_REGISTER_SIZE
|
54
|
+
#define TIMER0_CONTROL TIMER_BASE_ADDR + 2*TIMER_REGISTER_SIZE
|
55
|
+
#define WATCHDOG_COUNTER TIMER_BASE_ADDR + 3*TIMER_REGISTER_SIZE
|
56
|
+
#define TIMER1_COUNTER TIMER_BASE_ADDR + 4*TIMER_REGISTER_SIZE
|
57
|
+
#define TIMER1_RELOAD TIMER_BASE_ADDR + 5*TIMER_REGISTER_SIZE
|
58
|
+
#define TIMER1_CONTROL TIMER_BASE_ADDR + 6*TIMER_REGISTER_SIZE
|
59
|
+
#define PRESCALER_COUNTER TIMER_BASE_ADDR + 7*TIMER_REGISTER_SIZE
|
60
|
+
#define PRESCALER_RELOAD_VALUE TIMER_BASE_ADDR + 8*TIMER_REGISTER_SIZE
|
61
|
+
|
62
|
+
#define TIMER_ENABLE 1
|
63
|
+
#define TIMER_LOAD 2
|
64
|
+
#define TIMER_CTRL 4
|
65
|
+
#define TIMER_DISABLED 0
|
66
|
+
#define TIMER_ENABLED 1
|
67
|
+
/*------------------------------------------------------------------------------
|
68
|
+
* leon2 timers
|
69
|
+
*----------------------------------------------------------------------------*/
|
70
|
+
|
71
|
+
class timers :
|
72
|
+
public sc_module ,
|
73
|
+
public pv_slave_base< ADDRESS_TYPE , DATA_TYPE >
|
74
|
+
{
|
75
|
+
public:
|
76
|
+
SC_HAS_PROCESS(timers);
|
77
|
+
timers( sc_module_name module_name );
|
78
|
+
~timers();
|
79
|
+
|
80
|
+
pv_target_port<ADDRESS_TYPE,DATA_TYPE> apb_slave_port;
|
81
|
+
sc_out<int> int0;
|
82
|
+
sc_out<int> int1;
|
83
|
+
sc_in<sc_logic> clk;
|
84
|
+
|
85
|
+
tlm::tlm_status write( const ADDRESS_TYPE &addr , const DATA_TYPE &data,
|
86
|
+
const unsigned int byte_enable = tlm::NO_BE,
|
87
|
+
const tlm::tlm_mode mode = tlm::REGULAR,
|
88
|
+
const unsigned int export_id = 0 );
|
89
|
+
tlm::tlm_status read( const ADDRESS_TYPE &addr , DATA_TYPE &data,
|
90
|
+
const unsigned int byte_enable = tlm::NO_BE,
|
91
|
+
const tlm::tlm_mode mode = tlm::REGULAR,
|
92
|
+
const unsigned int export_id = 0 );
|
93
|
+
|
94
|
+
private:
|
95
|
+
sc_pvector<DATA_TYPE> registers;
|
96
|
+
int prescaler;
|
97
|
+
void init_registers();
|
98
|
+
void count();
|
99
|
+
void end_of_elaboration();
|
100
|
+
};
|
101
|
+
|
102
|
+
#endif /* _TIMERS_H_ */
|
@@ -0,0 +1,152 @@
|
|
1
|
+
//
|
2
|
+
// Revision: $Revision: 1506 $
|
3
|
+
// Date: $Date: 2009-04-26 01:51:56 -0500 (Sun, 26 Apr 2009) $
|
4
|
+
//
|
5
|
+
// Copyright (c) 2005, 2006, 2007, 2008, 2009 The SPIRIT Consortium.
|
6
|
+
//
|
7
|
+
// This work forms part of a deliverable of The SPIRIT Consortium.
|
8
|
+
//
|
9
|
+
// Use of these materials are governed by the legal terms and conditions
|
10
|
+
// outlined in the disclaimer available from www.spiritconsortium.org.
|
11
|
+
//
|
12
|
+
// This source file is provided on an AS IS basis. The SPIRIT
|
13
|
+
// Consortium disclaims any warranty express or implied including
|
14
|
+
// any warranty of merchantability and fitness for use for a
|
15
|
+
// particular purpose.
|
16
|
+
//
|
17
|
+
// The user of the source file shall indemnify and hold The SPIRIT
|
18
|
+
// Consortium and its members harmless from any damages or liability.
|
19
|
+
// Users are requested to provide feedback to The SPIRIT Consortium
|
20
|
+
// using either mailto:feedback@lists.spiritconsortium.org or the forms at
|
21
|
+
// http://www.spiritconsortium.org/about/contact_us/
|
22
|
+
//
|
23
|
+
// This file may be copied, and distributed, with or without
|
24
|
+
// modifications; but this notice must be included on any copy.
|
25
|
+
|
26
|
+
|
27
|
+
// uart.h
|
28
|
+
|
29
|
+
#ifndef H_UART
|
30
|
+
#define H_UART
|
31
|
+
|
32
|
+
//***************************
|
33
|
+
//* Includes *
|
34
|
+
//***************************
|
35
|
+
#include "scml.h" // For 'scml_memory' and 'scml_bitfield'
|
36
|
+
#include "tlm_interfaces/tlm_core_ifs.h" // For 'tlm_blocking_put_if'
|
37
|
+
#include "PV/PV.h" // For 'PVTarget_port'
|
38
|
+
|
39
|
+
#include "uart_fifo.h" // For 'UART_FIFO'
|
40
|
+
#include "uart_types.h" // For UART data types
|
41
|
+
#include "uart_memory_map.h" // For the register and bit positions
|
42
|
+
|
43
|
+
//***********************
|
44
|
+
//* Definitions *
|
45
|
+
//***********************
|
46
|
+
#define TX_FIFO_SIZE 16 // Size of Transmit FIFO
|
47
|
+
#define RX_FIFO_SIZE 16 // Size of Receive FIFO
|
48
|
+
|
49
|
+
//***********************************
|
50
|
+
//* UART Module Class *
|
51
|
+
//***********************************
|
52
|
+
class uart :
|
53
|
+
public sc_module,
|
54
|
+
virtual public tlm::tlm_blocking_put_if<SERIAL_DATA_STRUCTURE> {
|
55
|
+
public:
|
56
|
+
//**** Port Declarations ****//
|
57
|
+
PVTarget_port<DATA_TYPE, ADDRESS_TYPE> pPVTargetPort; // PV port
|
58
|
+
|
59
|
+
sc_in<bool> pReset; // Reset pin to reset the registers to their default values. active high
|
60
|
+
sc_out<int> pInterrupt; // Interrupt Line, active high
|
61
|
+
|
62
|
+
sc_port<tlm::tlm_blocking_put_if<SERIAL_DATA_STRUCTURE> > pSerialOut; // Serial data output port.
|
63
|
+
sc_export<tlm::tlm_blocking_put_if<SERIAL_DATA_STRUCTURE> > pSerialIn; // Serial data input port. export bound to this module.
|
64
|
+
|
65
|
+
SC_HAS_PROCESS(uart);
|
66
|
+
//**** Constructor ****//
|
67
|
+
uart(sc_module_name Name);
|
68
|
+
|
69
|
+
private:
|
70
|
+
void Reset(); // Function to reset all registers to their default values (which are defined in 'uart_memory_map.h')
|
71
|
+
|
72
|
+
// ******************
|
73
|
+
// * Register Bank *
|
74
|
+
// ******************
|
75
|
+
scml_memory<DATA_TYPE> mRegisterBank;
|
76
|
+
// Aliases of 'mRegisterBank'
|
77
|
+
scml_memory<DATA_TYPE> rRBR_THR; // Shared RBR(read-only) and THR(write-only) location
|
78
|
+
scml_memory<DATA_TYPE> rIIR_FCR; // Shared IIR(read-only) and FCR(write-only) location
|
79
|
+
scml_memory<DATA_TYPE> rIER; // Interrupt Enable (Mask) Register
|
80
|
+
// Bitfield aliases of IER register:
|
81
|
+
scml_bitfield bIER_ELSI; // Enable Line Status Interrupt bit
|
82
|
+
scml_bitfield bIER_ETBEI; // Enable Transmit Buffer Empty Interrupt bit
|
83
|
+
scml_bitfield bIER_ERBFI; // Enable Receive Buffer Full Interrupt bit
|
84
|
+
scml_memory<DATA_TYPE> rLCR; // Line Control Register
|
85
|
+
// Bitfield aliases of LCR register:
|
86
|
+
scml_bitfield bLCR_SB; // Set Break bit
|
87
|
+
scml_bitfield bLCR_SP; // Stick Parity bit
|
88
|
+
scml_bitfield bLCR_EPS; // Even Parity Select bit
|
89
|
+
scml_bitfield bLCR_PEN; // Parity ENable bit
|
90
|
+
scml_bitfield bLCR_STB; // number of STop Bits bit
|
91
|
+
scml_bitfield bLCR_WLS1; // Word Length Select bit 1
|
92
|
+
scml_bitfield bLCR_WLS0; // Word Length Select bit 0
|
93
|
+
scml_memory<DATA_TYPE> rLSR; // Line Status Register
|
94
|
+
// Bitfield aliases of LSR register:
|
95
|
+
scml_bitfield bLSR_THRE; // THR Empty bit
|
96
|
+
scml_bitfield bLSR_BI; // Break Indicator bit
|
97
|
+
scml_bitfield bLSR_FE; // Frame Error bit
|
98
|
+
scml_bitfield bLSR_PE; // Parity Error bit
|
99
|
+
scml_bitfield bLSR_OE; // Overflow Error bit
|
100
|
+
scml_bitfield bLSR_DR; // Data Ready bit
|
101
|
+
|
102
|
+
// Seperate registers (1 word big)
|
103
|
+
scml_memory<DATA_TYPE> rRBR; // Receiver Buffer Register (read-only)
|
104
|
+
scml_memory<DATA_TYPE> rTHR; // Transmitter Holding Register (write-only)
|
105
|
+
scml_memory<DATA_TYPE> rIIR; // Interrupt Identification Register (read-only)
|
106
|
+
scml_memory<DATA_TYPE> rFCR; // FIFO Control Register (write-only)
|
107
|
+
// Bitfield aliases of FCR register:
|
108
|
+
scml_bitfield bFCR_FIFOE; // FIFOs Enable bit
|
109
|
+
|
110
|
+
// **********************************
|
111
|
+
// * Register Call-back Functions *
|
112
|
+
// **********************************
|
113
|
+
void RegCB_RBR_THR_Write(DATA_TYPE WriteData, unsigned int AccessSize, unsigned int Offset);
|
114
|
+
DATA_TYPE RegCB_RBR_THR_Read(unsigned int AccessSize, unsigned int Offset);
|
115
|
+
|
116
|
+
void RegCB_IIR_FCR_Write(DATA_TYPE WriteData, unsigned int AccessSize, unsigned int Offset);
|
117
|
+
DATA_TYPE RegCB_IIR_FCR_Read(unsigned int AccessSize, unsigned int Offset);
|
118
|
+
|
119
|
+
DATA_TYPE RegCB_LSR_Read(unsigned int AccessSize, unsigned int Offset);
|
120
|
+
|
121
|
+
void RegCB_IER_Write(DATA_TYPE WriteData, unsigned int AccessSize, unsigned int Offset);
|
122
|
+
|
123
|
+
// ****************
|
124
|
+
// * FIFO Buffers *
|
125
|
+
// ****************
|
126
|
+
UART_FIFO<DATA_TYPE> TX_FIFO; // Transmit FIFO
|
127
|
+
UART_FIFO<DATA_TYPE> RX_FIFO; // Receive FIFO
|
128
|
+
|
129
|
+
// ********************************
|
130
|
+
// * Serial Transmit and Receive *
|
131
|
+
// ********************************
|
132
|
+
void Serial_Transmit(); // Method triggerd by 'TransmitEvent' event
|
133
|
+
sc_event TransmitEvent; // Event to trigger 'Serial_Transmit()'
|
134
|
+
|
135
|
+
//**** Interface Method of 'tlm_blocking_put_if' ****//
|
136
|
+
void put( const SERIAL_DATA_STRUCTURE &DataStruct ); // All 'put' method calls made to pSerialIn call this function.
|
137
|
+
|
138
|
+
// *********************
|
139
|
+
// * Interrupt Handler *
|
140
|
+
// *********************
|
141
|
+
bool Clear_LS_Interrupt; // Boolean to clear the Line Status Interrupt
|
142
|
+
bool Clear_RX_Interrupt; // Boolean to clear the Receive buffer full Interrupt
|
143
|
+
bool Clear_TX_Interrupt; // Boolean to clear the Transmit buffer empty Interrupt
|
144
|
+
int CurrentInterruptPriority; // Indicator of the priority of the current interrupt.
|
145
|
+
|
146
|
+
void Handle_Interrupts(); // Method triggered by 'InterruptEvent' event
|
147
|
+
sc_event InterruptEvent; // Event to trigger 'Handle_Interrupts()'
|
148
|
+
|
149
|
+
};
|
150
|
+
|
151
|
+
#endif // H_UART
|
152
|
+
|