gupl 0.0.1
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- checksums.yaml +7 -0
- data/CHANGELOG.md +2 -0
- data/CODE_OF_CONDUCT.md +84 -0
- data/Gemfile +10 -0
- data/LICENSE +201 -0
- data/README.md +39 -0
- data/Rakefile +12 -0
- data/example/command_parser.gupl +177 -0
- data/example/command_parser_tb.vhd +172 -0
- data/example/sendrecv.gupl +15 -0
- data/example/sendrecv_tb.vhd +114 -0
- data/example/udpled.gupl +30 -0
- data/exe/gupl +22 -0
- data/gupl.gemspec +38 -0
- data/lib/gupl/version.rb +5 -0
- data/lib/gupl.rb +794 -0
- data/sig/gupl.rbs +4 -0
- data/vhdl_lib/simple_dualportram.vhd +57 -0
- metadata +64 -0
data/sig/gupl.rbs
ADDED
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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entity simple_dualportram is
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generic (
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DEPTH : integer := 10;
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WIDTH : integer := 32;
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WORDS : integer := 1024
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);
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port (
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clk : in std_logic;
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reset : in std_logic;
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we : in std_logic_vector(0 downto 0);
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raddr : in std_logic_vector(31 downto 0);
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waddr : in std_logic_vector(31 downto 0);
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dout : out std_logic_vector(WIDTH-1 downto 0);
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din : in std_logic_vector(WIDTH-1 downto 0);
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length : out std_logic_vector(31 downto 0)
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);
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end simple_dualportram;
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architecture RTL of simple_dualportram is
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type ram_type is array (WORDS-1 downto 0) of std_logic_vector (WIDTH-1 downto 0);
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signal RAM: ram_type := (others => (others => '0'));
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attribute ram_style : string;
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attribute ram_style of RAM : signal is "block";
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signal q : std_logic_vector(WIDTH-1 downto 0) := (others => '0');
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begin -- RTL
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length <= std_logic_vector(to_signed(WORDS, length'length));
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dout <= q;
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process (clk)
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begin -- process
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if rising_edge(clk) then
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if we(0) = '1' then
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RAM(to_integer(unsigned(waddr(DEPTH-1 downto 0)))) <= din;
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end if;
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end if;
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end process;
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process (clk)
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begin -- process
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if rising_edge(clk) then
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q <= RAM(to_integer(unsigned(raddr(DEPTH-1 downto 0))));
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end if;
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end process;
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end RTL;
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metadata
ADDED
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--- !ruby/object:Gem::Specification
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name: gupl
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version: !ruby/object:Gem::Version
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version: 0.0.1
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platform: ruby
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authors:
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- Takefumi MIYOSHI
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autorequire:
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bindir: exe
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cert_chain: []
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date: 2022-06-05 00:00:00.000000000 Z
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dependencies: []
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description: gupl makes UPL modules, which is a VHDL generator.
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email:
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- miyo@wasamon.net
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executables:
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- gupl
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extensions: []
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extra_rdoc_files: []
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files:
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- CHANGELOG.md
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- CODE_OF_CONDUCT.md
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- Gemfile
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- LICENSE
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- README.md
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- Rakefile
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- example/command_parser.gupl
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- example/command_parser_tb.vhd
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- example/sendrecv.gupl
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- example/sendrecv_tb.vhd
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- example/udpled.gupl
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- exe/gupl
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- gupl.gemspec
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- lib/gupl.rb
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- lib/gupl/version.rb
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- sig/gupl.rbs
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- vhdl_lib/simple_dualportram.vhd
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homepage: https://github.com/e-trees/gupl
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licenses: []
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metadata:
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allowed_push_host: https://rubygems.org
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homepage_uri: https://github.com/e-trees/gupl
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source_code_uri: https://github.com/e-trees/gupl
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changelog_uri: https://github.com/e-trees/gupl/CHANGELOG.md
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post_install_message:
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rdoc_options: []
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require_paths:
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- lib
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required_ruby_version: !ruby/object:Gem::Requirement
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requirements:
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- - ">="
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- !ruby/object:Gem::Version
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version: 2.6.0
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required_rubygems_version: !ruby/object:Gem::Requirement
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requirements:
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- - ">="
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- !ruby/object:Gem::Version
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version: '0'
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requirements: []
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rubygems_version: 3.1.2
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signing_key:
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specification_version: 4
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summary: gupl makes UPL module.
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test_files: []
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