faiss 0.6.2 → 0.6.4

data/vendor/faiss/faiss/impl/pq_code_distance/IVFPQScanner_impl.h

@@ -29,19 +29,31 @@ struct WrappedSearchResult {
     ResultHandler& res;
     size_t nup = 0;
     idx_t list_no;
-
+    size_t list_size;
     const idx_t* ids;
     const IDSelector* sel;
+    IDSelectorContextDispatch dispatch;
 
     WrappedSearchResult(
             idx_t list_no_in,
+            size_t list_size_in,
             const idx_t* ids_in,
             const IDSelector* sel_in,
             ResultHandler& res_in)
-            : res(res_in), list_no(list_no_in), ids(ids_in), sel(sel_in) {}
+            : res(res_in),
+              list_no(list_no_in),
+              list_size(list_size_in),
+              ids(ids_in),
+              sel(sel_in),
+              // A selector implies real ids, so ids==nullptr iff store_pairs;
+              // that disables the context path exactly when ids[] is synthetic.
+              dispatch(sel_in, /*store_pairs=*/ids_in == nullptr) {}
 
     inline bool skip_entry(idx_t j) {
-        return use_sel && !sel->is_member(ids[j]);
+        return use_sel &&
+                !dispatch.is_member(
+                        ids[j],
+                        IDScanContext{ids, list_size, static_cast<size_t>(j)});
     }
 
     inline void add(idx_t j, float dis) {
@@ -204,41 +216,41 @@ struct IVFPQScannerT : QueryTables {
         }
     }
 
+    float on_the_fly_dis0 = 0;
+
+    void prepare_on_the_fly_distance() {
+        on_the_fly_dis0 = 0;
+        if (!by_residual) {
+            return;
+        }
+        if (METRIC_TYPE == METRIC_INNER_PRODUCT) {
+            ivfpq.quantizer->reconstruct(key, residual_vec);
+            on_the_fly_dis0 = fvec_inner_product_dispatch(residual_vec, qi, d);
+        } else {
+            ivfpq.quantizer->compute_residual(qi, residual_vec, key);
+        }
+    }
+
+    float distance_to_code_on_the_fly(const uint8_t* code) const {
+        pq.decode(code, decoded_vec);
+        if (METRIC_TYPE == METRIC_INNER_PRODUCT) {
+            return on_the_fly_dis0 +
+                    fvec_inner_product_dispatch(decoded_vec, qi, d);
+        }
+        const float* dvec = by_residual ? residual_vec : qi;
+        return fvec_L2sqr_dispatch(decoded_vec, dvec, d);
+    }
+
     /// nothing is precomputed: access residuals on-the-fly
     template <class SearchResultType>
     void scan_on_the_fly_dist(
             size_t ncode,
             const uint8_t* codes,
             SearchResultType& res) const {
-        const float* dvec;
-        float local_dis0 = 0;
-        if (by_residual) {
-            if (METRIC_TYPE == METRIC_INNER_PRODUCT) {
-                ivfpq.quantizer->reconstruct(key, residual_vec);
-                local_dis0 = fvec_inner_product_dispatch(residual_vec, qi, d);
-            } else {
-                ivfpq.quantizer->compute_residual(qi, residual_vec, key);
-            }
-            dvec = residual_vec;
-        } else {
-            dvec = qi;
-            local_dis0 = 0;
-        }
-
         for (size_t j = 0; j < ncode; j++, codes += pq.code_size) {
-            if (res.skip_entry(j)) {
-                continue;
-            }
-            pq.decode(codes, decoded_vec);
-
-            float dis;
-            if (METRIC_TYPE == METRIC_INNER_PRODUCT) {
-                dis = local_dis0 +
-                        fvec_inner_product_dispatch(decoded_vec, qi, d);
-            } else {
-                dis = fvec_L2sqr_dispatch(decoded_vec, dvec, d);
+            if (!res.skip_entry(j)) {
+                res.add(j, distance_to_code_on_the_fly(codes));
             }
-            res.add(j, dis);
         }
     }
 
@@ -426,7 +438,6 @@ struct IVFPQScannerT : QueryTables {
  *
  * precompute_mode is how much we precompute (2 = precompute distance tables,
  * 1 = precompute pointers to distances, 0 = compute distances one by one).
- * Currently only 2 is supported
  *
  * use_sel: store or ignore the IDSelector
  */
@@ -451,20 +462,29 @@ struct IVFPQScanner : IVFPQScannerT<idx_t, METRIC_TYPE, PQCodeDist>,
     }
 
     void set_query(const float* query) override {
-        this->init_query(query);
+        if (precompute_mode == 0) {
+            this->qi = query;
+        } else {
+            this->init_query(query);
+        }
     }
 
     void set_list(idx_t list_no_in, float coarse_dis_in) override {
         this->list_no = list_no_in;
         this->init_list(list_no_in, coarse_dis_in, precompute_mode);
+        if (precompute_mode == 0) {
+            this->prepare_on_the_fly_distance();
+        }
     }
 
     float distance_to_code(const uint8_t* code) const override {
+        if (precompute_mode == 0) {
+            return this->distance_to_code_on_the_fly(code);
+        }
         FAISS_THROW_IF_NOT(precompute_mode == 2);
-        float dis = this->dis0 +
+        return this->dis0 +
                 PQCodeDist::distance_single_code(
-                            this->pq.M, this->pq.nbits, this->sim_table, code);
-        return dis;
+                        this->pq.M, this->pq.nbits, this->sim_table, code);
     }
 
     size_t scan_codes(
@@ -474,6 +494,7 @@ struct IVFPQScanner : IVFPQScannerT<idx_t, METRIC_TYPE, PQCodeDist>,
             ResultHandler& handler) const override {
         WrappedSearchResult<C, use_sel> res(
                 this->key,
+                ncode,
                 this->store_pairs ? nullptr : ids,
                 this->sel,
                 handler);
@@ -498,27 +519,40 @@ template <SIMDLevel SL>
 InvertedListScanner* make_IVFPQInvertedListScanner(
         const IndexIVFPQ& ivfpq,
         bool store_pairs,
-        const IDSelector* sel);
+        const IDSelector* sel,
+        IndexIVFPQ::ScannerMode mode);
+
+template <SIMDLevel SL>
+inline InvertedListScanner* make_IVFPQInvertedListScanner(
+        const IndexIVFPQ& ivfpq,
+        bool store_pairs,
+        const IDSelector* sel) {
+    return make_IVFPQInvertedListScanner<SL>(
+            ivfpq, store_pairs, sel, IndexIVFPQ::ScannerMode::Precomputed);
+}
 
 // NOLINTNEXTLINE(facebook-hte-MisplacedTemplateSpecialization)
 template <>
 InvertedListScanner* make_IVFPQInvertedListScanner<THE_SIMD_LEVEL>(
         const IndexIVFPQ& ivfpq,
         bool store_pairs,
-        const IDSelector* sel) {
+        const IDSelector* sel,
+        IndexIVFPQ::ScannerMode mode) {
+    const int precompute_mode =
+            mode == IndexIVFPQ::ScannerMode::Precomputed ? 2 : 0;
     auto make = [&]<class PQCodeDist, bool use_sel>() -> InvertedListScanner* {
         if (ivfpq.metric_type == METRIC_INNER_PRODUCT) {
             return new IVFPQScanner<
                     METRIC_INNER_PRODUCT,
                     CMin<float, idx_t>,
                     PQCodeDist,
-                    use_sel>(ivfpq, store_pairs, 2, sel);
+                    use_sel>(ivfpq, store_pairs, precompute_mode, sel);
         } else if (ivfpq.metric_type == METRIC_L2) {
             return new IVFPQScanner<
                     METRIC_L2,
                     CMax<float, idx_t>,
                     PQCodeDist,
-                    use_sel>(ivfpq, store_pairs, 2, sel);
+                    use_sel>(ivfpq, store_pairs, precompute_mode, sel);
         } else {
             FAISS_THROW_MSG("unsupported metric type");
         }

data/vendor/faiss/faiss/impl/pq_code_distance/IVFPQ_QueryTables.cpp

@@ -7,7 +7,6 @@
 
 #include <faiss/impl/pq_code_distance/IVFPQ_QueryTables.h>
 
-#include <faiss/Clustering.h>
 #include <faiss/utils/distances_dispatch.h>
 
 namespace faiss {

data/vendor/faiss/faiss/impl/pq_code_distance/PQDistanceComputer_impl.h

@@ -20,23 +20,39 @@ namespace faiss {
 namespace pq_code_distance {
 
 template <class PQCodeDist>
-struct PQDistanceComputer : FlatCodesDistanceComputer {
+struct PQDistanceComputer final : FlatCodesDistanceComputer {
     using PQDecoder = typename PQCodeDist::PQDecoder;
-    size_t d;
     MetricType metric;
-    idx_t nb;
     const ProductQuantizer& pq;
     const float* sdc;
     std::vector<float> precomputed_table;
-    size_t ndis;
-    const float* q;
 
     float distance_to_code(const uint8_t* code) final {
-        ndis++;
-
-        float dis = PQCodeDist::distance_single_code(
+        return PQCodeDist::distance_single_code(
                 pq.M, pq.nbits, precomputed_table.data(), code);
-        return dis;
+    }
+
+    void distance_to_code_batch_4(
+            const uint8_t* c1,
+            const uint8_t* c2,
+            const uint8_t* c3,
+            const uint8_t* c4,
+            float& d1,
+            float& d2,
+            float& d3,
+            float& d4) override {
+        PQCodeDist::distance_four_codes(
+                pq.M,
+                pq.nbits,
+                precomputed_table.data(),
+                c1,
+                c2,
+                c3,
+                c4,
+                d1,
+                d2,
+                d3,
+                d4);
     }
 
     float symmetric_dis(idx_t i, idx_t j) override {
@@ -50,7 +66,6 @@ struct PQDistanceComputer : FlatCodesDistanceComputer {
             accu += sdci[codei.decode() + (codej.decode() << codei.nbits)];
             sdci += uint64_t(1) << (2 * codei.nbits);
         }
-        ndis++;
         return accu;
     }
 
@@ -58,18 +73,14 @@ struct PQDistanceComputer : FlatCodesDistanceComputer {
             : FlatCodesDistanceComputer(
                       storage.codes.data(),
                       storage.code_size),
-              pq(storage.pq),
-              q(nullptr) {
+              pq(storage.pq) {
         precomputed_table.resize(pq.M * pq.ksub);
-        nb = storage.ntotal;
-        d = storage.d;
         metric = storage.metric_type;
         if (pq.sdc_table.size() == pq.ksub * pq.ksub * pq.M) {
             sdc = pq.sdc_table.data();
         } else {
             sdc = nullptr;
         }
-        ndis = 0;
     }
 
     void set_query(const float* x) override {

data/vendor/faiss/faiss/impl/pq_code_distance/avx2.cpp

@@ -9,15 +9,15 @@
 
 #define THE_SIMD_LEVEL SIMDLevel::AVX2
 
-// NOLINTNEXTLINE(facebook-hte-InlineHeader)
+// NOLINTNEXTLINE(facebook-hte-InlineHeader,facebook-unused-include-check)
 #include <faiss/impl/pq_code_distance/pq_code_distance-avx2.h>
-// NOLINTNEXTLINE(facebook-hte-InlineHeader)
+// NOLINTNEXTLINE(facebook-hte-InlineHeader,facebook-unused-include-check)
 #include <faiss/utils/hamming_distance/hamming_computer-avx2.h>
 // NOLINTNEXTLINE(facebook-hte-InlineHeader,facebook-unused-include-check)
 #include <faiss/impl/pq_code_distance/pq_scan_impl.h>
-// NOLINTNEXTLINE(facebook-hte-InlineHeader)
+// NOLINTNEXTLINE(facebook-hte-InlineHeader,facebook-unused-include-check)
 #include <faiss/impl/pq_code_distance/PQDistanceComputer_impl.h>
-// NOLINTNEXTLINE(facebook-hte-InlineHeader)
+// NOLINTNEXTLINE(facebook-hte-InlineHeader,facebook-unused-include-check)
 #include <faiss/impl/pq_code_distance/IVFPQScanner_impl.h>
 
 #endif // COMPILE_SIMD_AVX2

data/vendor/faiss/faiss/impl/pq_code_distance/pq_code_distance-generic.cpp

@@ -7,7 +7,7 @@
 
 // This TU provides non-templated PQ code distance dispatch wrappers
 // (pq_code_distance_8bit_single, pq_code_distance_8bit_four) declared
-// in pq_code_distance-inl.h. These use with_simd_level to route to the
+// in pq_code_distance-inl.h. These use with_simd_level_with_sve to route to the
 // best available SIMD implementation via pq_code_distance_8bit_*_impl
 // function template specializations.
 //
@@ -34,7 +34,7 @@ void pq_scan_8bit(
         float* heap_dis,
         int64_t* heap_ids,
         bool max_heap) {
-    with_simd_level([&]<SIMDLevel SL>() {
+    with_simd_level_with_sve([&]<SIMDLevel SL>() {
         pq_scan_8bit_impl<SL>(
                 M, dis_table, codes, ncodes, k, heap_dis, heap_ids, max_heap);
     });
@@ -44,7 +44,7 @@ float pq_code_distance_8bit_single(
         size_t M,
         const float* sim_table,
         const uint8_t* code) {
-    return with_simd_level([&]<SIMDLevel SL>() {
+    return with_simd_level_with_sve([&]<SIMDLevel SL>() {
         return pq_code_distance_8bit_single_impl<SL>(M, sim_table, code);
     });
 }
@@ -60,7 +60,7 @@ void pq_code_distance_8bit_four(
         float& result1,
         float& result2,
         float& result3) {
-    with_simd_level([&]<SIMDLevel SL>() {
+    with_simd_level_with_sve([&]<SIMDLevel SL>() {
         pq_code_distance_8bit_four_impl<SL>(
                 M,
                 sim_table,

data/vendor/faiss/faiss/impl/result_handler/ResultHandler.cpp

@@ -0,0 +1,195 @@
+/*
+ * Copyright (c) Meta Platforms, Inc. and affiliates.
+ *
+ * This source code is licensed under the MIT license found in the
+ * LICENSE file in the root directory of this source tree.
+ */
+
+// Generic (NONE) implementations of Top1 and Reservoir add_results, plus the
+// runtime-dispatch method bodies.  SIMD specialisations live in
+// result_handler_avx2.cpp and result_handler_avx512.cpp.
+
+#include <faiss/impl/ResultHandler.h>
+#include <faiss/impl/simd_dispatch.h>
+
+namespace faiss {
+
+// ----------------------------------------------------------------
+// SIMD-level masks
+// ----------------------------------------------------------------
+
+// Top-1: scalar fallback + AVX2 (8-wide) + AVX512 (16-wide).
+constexpr int TOP1_SIMD_LEVELS = (1 << int(SIMDLevel::NONE)) |
+        (1 << int(SIMDLevel::AVX2)) | (1 << int(SIMDLevel::AVX512));
+
+// Reservoir: scalar fallback + AVX512 compress path.
+// VPCOMPRESSPS/VPCOMPRESSD require AVX512F so there is no AVX2 path.
+// On non-AVX512 hosts the dispatch falls back to NONE automatically.
+constexpr int RESERVOIR_SIMD_LEVELS =
+        (1 << int(SIMDLevel::NONE)) | (1 << int(SIMDLevel::AVX512));
+
+// ----------------------------------------------------------------
+// Scalar (NONE) helper implementations
+// ----------------------------------------------------------------
+
+namespace {
+
+template <class C, bool use_sel>
+void top1_add_results_none(
+        Top1BlockResultHandler<C, use_sel>* self,
+        size_t j0,
+        size_t j1,
+        const float* dis_tab_in) {
+    using T = typename C::T;
+    using TI = typename C::TI;
+
+    for (size_t qi = self->i0; qi < self->i1; qi++) {
+        const T* dis_tab_i = dis_tab_in + (j1 - j0) * (qi - self->i0) - j0;
+
+        // Hoist best_dis / best_idx into locals so the compiler keeps them in
+        // registers across the inner loop (no aliasing with dis_tab reads).
+        T best_dis = self->dis_tab[qi];
+        TI best_idx = self->ids_tab[qi];
+
+        for (size_t j = j0; j < j1; j++) {
+            if (C::cmp(best_dis, dis_tab_i[j])) {
+                best_dis = dis_tab_i[j];
+                best_idx = (TI)j;
+            }
+        }
+
+        self->dis_tab[qi] = best_dis;
+        self->ids_tab[qi] = best_idx;
+    }
+}
+
+template <class C, bool use_sel>
+void reservoir_add_results_none(
+        ReservoirBlockResultHandler<C, use_sel>* self,
+        size_t j0,
+        size_t j1,
+        const float* dis_in) {
+    using T = typename C::T;
+    using TI = typename C::TI;
+
+#pragma omp parallel for
+    for (int64_t qi = (int64_t)self->i0; qi < (int64_t)self->i1; qi++) {
+        ReservoirTopN<C>& res = self->reservoirs[qi - (int64_t)self->i0];
+        const T* dis_tab_i = dis_in + (j1 - j0) * (qi - (int64_t)self->i0) - j0;
+
+        // Hoist res.i and res.threshold into locals so the compiler keeps
+        // them in registers.
+        size_t ri = res.i;
+        T thresh = res.threshold;
+
+        for (size_t j = j0; j < j1; j++) {
+            T dis = dis_tab_i[j];
+            if (C::cmp(thresh, dis)) {
+                res.vals[ri] = dis;
+                res.ids[ri] = (TI)j;
+                ri++;
+                if (ri >= res.capacity) {
+                    res.i = ri;
+                    res.shrink_fuzzy();
+                    ri = res.i;
+                    thresh = res.threshold;
+                }
+            }
+        }
+        res.i = ri;
+    }
+}
+
+} // namespace
+
+// ----------------------------------------------------------------
+// SIMDLevel::NONE explicit specialisations
+// ----------------------------------------------------------------
+
+// Instantiate top1_add_results_tpl<C, use_sel, SIMDLevel::NONE> and
+// reservoir_add_results_tpl<C, use_sel, SIMDLevel::NONE> for all
+// (C, use_sel) combinations that the rest of FAISS uses.
+#define INSTANTIATE_NONE(C, use_sel)                                  \
+    template <>                                                       \
+    void top1_add_results_tpl<C, use_sel, SIMDLevel::NONE>(           \
+            Top1BlockResultHandler<C, use_sel> * self,                \
+            size_t j0,                                                \
+            size_t j1,                                                \
+            const float* dis_tab) {                                   \
+        top1_add_results_none<C, use_sel>(self, j0, j1, dis_tab);     \
+    }                                                                 \
+    template <>                                                       \
+    void reservoir_add_results_tpl<C, use_sel, SIMDLevel::NONE>(      \
+            ReservoirBlockResultHandler<C, use_sel> * self,           \
+            size_t j0,                                                \
+            size_t j1,                                                \
+            const float* dis_in) {                                    \
+        reservoir_add_results_none<C, use_sel>(self, j0, j1, dis_in); \
+    }
+
+// Type aliases so the comma in CMax<float, int64_t> doesn't split macro args.
+using CMaxFI = CMax<float, int64_t>;
+using CMinFI = CMin<float, int64_t>;
+
+INSTANTIATE_NONE(CMaxFI, false)
+INSTANTIATE_NONE(CMaxFI, true)
+INSTANTIATE_NONE(CMinFI, false)
+INSTANTIATE_NONE(CMinFI, true)
+
+#undef INSTANTIATE_NONE
+
+// ----------------------------------------------------------------
+// add_results method definitions — dispatch to the right SL kernel
+// ----------------------------------------------------------------
+
+template <class C, bool use_sel>
+void Top1BlockResultHandler<C, use_sel>::add_results(
+        size_t j0,
+        size_t j1,
+        const T* dis_tab_2) {
+    with_selected_simd_levels<TOP1_SIMD_LEVELS>([&]<SIMDLevel SL>() {
+        top1_add_results_tpl<C, use_sel, SL>(this, j0, j1, dis_tab_2);
+    });
+}
+
+template <class C, bool use_sel>
+void ReservoirBlockResultHandler<C, use_sel>::add_results(
+        size_t j0,
+        size_t j1,
+        const T* dis_in) {
+    with_selected_simd_levels<RESERVOIR_SIMD_LEVELS>([&]<SIMDLevel SL>() {
+        reservoir_add_results_tpl<C, use_sel, SL>(this, j0, j1, dis_in);
+    });
+}
+
+// ----------------------------------------------------------------
+// Explicit class-template instantiations (force linkage)
+// ----------------------------------------------------------------
+
+template void Top1BlockResultHandler<CMax<float, int64_t>, false>::add_results(
+        size_t,
+        size_t,
+        const float*);
+template void Top1BlockResultHandler<CMax<float, int64_t>, true>::add_results(
+        size_t,
+        size_t,
+        const float*);
+template void Top1BlockResultHandler<CMin<float, int64_t>, false>::add_results(
+        size_t,
+        size_t,
+        const float*);
+template void Top1BlockResultHandler<CMin<float, int64_t>, true>::add_results(
+        size_t,
+        size_t,
+        const float*);
+
+template void ReservoirBlockResultHandler<CMax<float, int64_t>, false>::
+        add_results(size_t, size_t, const float*);
+template void ReservoirBlockResultHandler<CMax<float, int64_t>, true>::
+        add_results(size_t, size_t, const float*);
+template void ReservoirBlockResultHandler<CMin<float, int64_t>, false>::
+        add_results(size_t, size_t, const float*);
+template void ReservoirBlockResultHandler<CMin<float, int64_t>, true>::
+        add_results(size_t, size_t, const float*);
+
+} // namespace faiss

data/vendor/faiss/faiss/impl/result_handler/avx2.cpp

@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) Meta Platforms, Inc. and affiliates.
+ *
+ * This source code is licensed under the MIT license found in the
+ * LICENSE file in the root directory of this source tree.
+ */
+
+// AVX2 specialisation of Top1 add_results (8-wide branchless argmin/argmax).
+// Reservoir stays on the NONE path — VPCOMPRESSPS requires AVX512F.
+
+#ifdef COMPILE_SIMD_AVX2
+
+#include <faiss/impl/ResultHandler.h>
+
+#include <immintrin.h>
+#include <type_traits>
+
+namespace faiss {
+
+namespace {
+
+/// Templated AVX2 implementation of Top1 add_results for both CMax (keeps the
+/// smallest distance) and CMin (keeps the largest similarity).
+template <class C, bool use_sel>
+void top1_add_results_avx2(
+        Top1BlockResultHandler<C, use_sel>* self,
+        size_t j0,
+        size_t j1,
+        const float* dis_tab_in) {
+    static_assert(
+            std::is_same<typename C::T, float>::value,
+            "This code expects float distances");
+    using TI = typename C::TI;
+    const __m256i vstep = _mm256_setr_epi32(0, 1, 2, 3, 4, 5, 6, 7);
+
+    for (size_t qi = self->i0; qi < self->i1; qi++) {
+        const float* dis_tab_i = dis_tab_in + (j1 - j0) * (qi - self->i0) - j0;
+
+        // Hoist best_dis / best_idx into locals so the compiler keeps them in
+        // registers across the inner loop (no aliasing with dis_tab reads).
+        float best_dis = self->dis_tab[qi];
+        TI best_idx = self->ids_tab[qi];
+        size_t j = j0;
+
+        __m256 vbest = _mm256_set1_ps(best_dis);
+        __m256i vbest_idx = _mm256_set1_epi32((int32_t)best_idx);
+
+        for (; j + 8 <= j1; j += 8) {
+            __m256 vdis = _mm256_loadu_ps(dis_tab_i + j);
+            __m256i vidx =
+                    _mm256_add_epi32(_mm256_set1_epi32((int32_t)j), vstep);
+
+            // CMax (L2 nearest neighbour): keep lane if dis < best.
+            // CMin (inner product):        keep lane if dis > best.
+            __m256 mask;
+            if constexpr (C::is_max) {
+                mask = _mm256_cmp_ps(vdis, vbest, _CMP_LT_OS);
+            } else {
+                mask = _mm256_cmp_ps(vdis, vbest, _CMP_GT_OS);
+            }
+            vbest = _mm256_blendv_ps(vbest, vdis, mask);
+            vbest_idx = _mm256_blendv_epi8(
+                    vbest_idx, vidx, _mm256_castps_si256(mask));
+        }
+
+        // Horizontal reduction across 8 lanes.
+        alignas(32) float best_arr[8];
+        alignas(32) int32_t idx_arr[8];
+        _mm256_store_ps(best_arr, vbest);
+        _mm256_store_si256((__m256i*)idx_arr, vbest_idx);
+        for (int k = 0; k < 8; k++) {
+            if (C::cmp(best_dis, best_arr[k])) {
+                best_dis = best_arr[k];
+                best_idx = (TI)idx_arr[k];
+            }
+        }
+
+        // Scalar tail.
+        for (; j < j1; j++) {
+            if (C::cmp(best_dis, dis_tab_i[j])) {
+                best_dis = dis_tab_i[j];
+                best_idx = (TI)j;
+            }
+        }
+
+        self->dis_tab[qi] = best_dis;
+        self->ids_tab[qi] = best_idx;
+    }
+}
+
+} // namespace
+
+// Explicit specialisations for AVX2
+
+template <>
+void top1_add_results_tpl<CMax<float, int64_t>, false, SIMDLevel::AVX2>(
+        Top1BlockResultHandler<CMax<float, int64_t>, false>* self,
+        size_t j0,
+        size_t j1,
+        const float* dis_tab) {
+    top1_add_results_avx2<CMax<float, int64_t>, false>(self, j0, j1, dis_tab);
+}
+
+template <>
+void top1_add_results_tpl<CMax<float, int64_t>, true, SIMDLevel::AVX2>(
+        Top1BlockResultHandler<CMax<float, int64_t>, true>* self,
+        size_t j0,
+        size_t j1,
+        const float* dis_tab) {
+    top1_add_results_avx2<CMax<float, int64_t>, true>(self, j0, j1, dis_tab);
+}
+
+template <>
+void top1_add_results_tpl<CMin<float, int64_t>, false, SIMDLevel::AVX2>(
+        Top1BlockResultHandler<CMin<float, int64_t>, false>* self,
+        size_t j0,
+        size_t j1,
+        const float* dis_tab) {
+    top1_add_results_avx2<CMin<float, int64_t>, false>(self, j0, j1, dis_tab);
+}
+
+template <>
+void top1_add_results_tpl<CMin<float, int64_t>, true, SIMDLevel::AVX2>(
+        Top1BlockResultHandler<CMin<float, int64_t>, true>* self,
+        size_t j0,
+        size_t j1,
+        const float* dis_tab) {
+    top1_add_results_avx2<CMin<float, int64_t>, true>(self, j0, j1, dis_tab);
+}
+
+} // namespace faiss
+
+#endif // COMPILE_SIMD_AVX2