circuits 0.8.2 → 0.9.0

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@@ -0,0 +1,80 @@
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+ require 'circuits/component/base'
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+ require 'circuits/component/nand'
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+
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+ module Circuits
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+ module Component
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+ # Positive edge triggered flip flop
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+ class D < Base
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+ def initialize
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+ super(port_mappings: { d: { type: :input, number: 0 },
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+ clk: { type: :input, number: 1 },
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+ q: { type: :output, number: 0 },
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+ not_q: { type: :output, number: 1 } })
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+ create_sub_components
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+ link_sub_components
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+ end
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+
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+ # Computes the outputs based on the inputs and previous state
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+ def tick
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+ 3.times.each do
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+ sub_components.each(&:tick)
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+ sub_components.each(&:tock)
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+ end
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+ end
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+
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+ private
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+
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+ attr_reader :and_gate, :sr_nand_clk, :sr_nand_d, :sr_nand_out,
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+ :sub_components
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+
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+ def create_sub_components
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+ @and_gate = Circuits::Component::And.new
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+ @sr_nand_clk = Circuits::Component::SrNand.new
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+ @sr_nand_d = Circuits::Component::SrNand.new
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+ @sr_nand_out = Circuits::Component::SrNand.new
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+ @sub_components = [@and_gate, @sr_nand_clk, @sr_nand_d, @sr_nand_out]
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+ end
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+
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+ def default_input_count
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+ 2
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+ end
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+
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+ def default_output_count
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+ 2
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+ end
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+
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+ def link_and_gate
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+ and_gate[:a].set sr_nand_clk[:not_q]
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+ and_gate[:b].set self[:clk]
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+ end
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+
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+ def link_outputs
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+ self[:q].set sr_nand_out[:q]
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+ self[:not_q].set sr_nand_out[:not_q]
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+ end
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+
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+ def link_sr_nand_d
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+ sr_nand_d[:not_s].set and_gate[:out]
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+ sr_nand_d[:not_r].set self[:d]
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+ end
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+
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+ def link_sr_nand_clk
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+ sr_nand_clk[:not_s].set sr_nand_d[:not_q]
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+ sr_nand_clk[:not_r].set self[:clk]
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+ end
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+
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+ def link_sr_nand_out
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+ sr_nand_out[:not_s].set sr_nand_clk[:not_q]
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+ sr_nand_out[:not_r].set sr_nand_d[:q]
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+ end
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+
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+ def link_sub_components
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+ link_outputs
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+ link_and_gate
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+ link_sr_nand_d
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+ link_sr_nand_clk
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+ link_sr_nand_out
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+ end
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+ end
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+ end
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+ end
@@ -1,5 +1,5 @@
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  # Circuits allows you to express logical circuits in code
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  module Circuits
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  # The version of the Circuits gem
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- VERSION = '0.8.2'
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+ VERSION = '0.9.0'
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  end
@@ -0,0 +1,114 @@
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+ require 'spec_helper'
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+ require 'circuits/component/d'
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+
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+ describe Circuits::Component::D do
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+ describe '#tick' do
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+ subject { Circuits::Component::D.new }
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+
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+ context 'has just been set' do
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+ before do
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+ subject[:clk].set false
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+ subject.tick
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+ subject.tock
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+ subject[:d].set true
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+ subject[:clk].set true
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+ subject.tick
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+ subject.tock
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+ subject[:d].set false
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+ subject[:clk].set false
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+ end
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+
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+ it 'is set' do
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+ expect(subject[:q].get).to eq(true)
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+ expect(subject[:not_q].get).to eq(false)
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+ end
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+
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+ it 'is stable' do
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+ subject.tick
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+ subject.tock
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+ expect(subject[:q].get).to eq(true)
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+ expect(subject[:not_q].get).to eq(false)
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+ end
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+
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+ it 'd high has no effect' do
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+ subject[:d].set true
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+ subject.tick
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+ subject.tock
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+ expect(subject[:q].get).to eq(true)
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+ expect(subject[:not_q].get).to eq(false)
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+ end
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+
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+ it 'clock has to be positive edge' do
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+ subject[:d].set false
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+ subject[:clk].set true
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+ subject.tick
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+ subject.tock
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+ expect(subject[:q].get).to eq(true)
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+ expect(subject[:not_q].get).to eq(false)
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+ end
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+
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+ it 'can be reset' do
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+ subject.tick
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+ subject.tock
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+ subject[:clk].set true
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+ subject.tick
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+ subject.tock
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+ expect(subject[:q].get).to eq(false)
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+ expect(subject[:not_q].get).to eq(true)
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+ end
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+ end
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+
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+ context 'has just been reset' do
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+ before do
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+ subject[:clk].set false
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+ subject.tick
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+ subject.tock
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+ subject[:d].set false
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+ subject[:clk].set true
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+ subject.tick
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+ subject.tock
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+ subject[:clk].set false
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+ end
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+
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+ it 'is reset' do
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+ expect(subject[:q].get).to eq(false)
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+ expect(subject[:not_q].get).to eq(true)
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+ end
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+
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+ it 'is stable' do
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+ subject.tick
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+ subject.tock
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+ expect(subject[:q].get).to eq(false)
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+ expect(subject[:not_q].get).to eq(true)
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+ end
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+
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+ it 'd high has no effect' do
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+ subject[:d].set true
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+ subject.tick
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+ subject.tock
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+ expect(subject[:q].get).to eq(false)
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+ expect(subject[:not_q].get).to eq(true)
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+ end
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+
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+ it 'clock has to be positive edge' do
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+ subject[:d].set true
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+ subject[:clk].set true
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+ subject.tick
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+ subject.tock
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+ expect(subject[:q].get).to eq(false)
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+ expect(subject[:not_q].get).to eq(true)
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+ end
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+
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+ it 'can be set' do
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+ subject.tick
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+ subject.tock
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+ subject[:d].set true
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+ subject[:clk].set true
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+ subject.tick
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+ subject.tock
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+ expect(subject[:q].get).to eq(true)
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+ expect(subject[:not_q].get).to eq(false)
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+ end
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+ end
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+ end
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+ end
metadata CHANGED
@@ -1,14 +1,14 @@
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  --- !ruby/object:Gem::Specification
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  name: circuits
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  version: !ruby/object:Gem::Version
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- version: 0.8.2
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+ version: 0.9.0
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  platform: ruby
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  authors:
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  - Henry Muru Paenga
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  autorequire:
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  bindir: bin
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  cert_chain: []
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- date: 2015-10-28 00:00:00.000000000 Z
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+ date: 2015-10-29 00:00:00.000000000 Z
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  dependencies:
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  - !ruby/object:Gem::Dependency
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  name: bundler
@@ -126,6 +126,7 @@ files:
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  - lib/circuits.rb
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  - lib/circuits/component/and.rb
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  - lib/circuits/component/base.rb
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+ - lib/circuits/component/d.rb
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  - lib/circuits/component/nand.rb
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  - lib/circuits/component/nor.rb
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  - lib/circuits/component/not.rb
@@ -140,6 +141,7 @@ files:
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  - spec/spec_helper.rb
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  - spec/unit/circuits/component/and_spec.rb
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  - spec/unit/circuits/component/base_spec.rb
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+ - spec/unit/circuits/component/d_spec.rb
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  - spec/unit/circuits/component/nand_spec.rb
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  - spec/unit/circuits/component/nor_spec.rb
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  - spec/unit/circuits/component/not_spec.rb
@@ -178,6 +180,7 @@ test_files:
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  - spec/spec_helper.rb
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  - spec/unit/circuits/component/and_spec.rb
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  - spec/unit/circuits/component/base_spec.rb
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+ - spec/unit/circuits/component/d_spec.rb
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  - spec/unit/circuits/component/nand_spec.rb
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  - spec/unit/circuits/component/nor_spec.rb
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  - spec/unit/circuits/component/not_spec.rb