circuits 0.8.2 → 0.9.0

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data/lib/circuits/component/d.rb

@@ -0,0 +1,80 @@
+require 'circuits/component/base'
+require 'circuits/component/nand'
+
+module Circuits
+  module Component
+    # Positive edge triggered flip flop
+    class D < Base
+      def initialize
+        super(port_mappings: { d: { type: :input, number: 0 },
+                               clk: { type: :input, number: 1 },
+                               q: { type: :output, number: 0 },
+                               not_q: { type: :output, number: 1 } })
+        create_sub_components
+        link_sub_components
+      end
+
+      # Computes the outputs based on the inputs and previous state
+      def tick
+        3.times.each do
+          sub_components.each(&:tick)
+          sub_components.each(&:tock)
+        end
+      end
+
+      private
+
+      attr_reader :and_gate, :sr_nand_clk, :sr_nand_d, :sr_nand_out,
+                  :sub_components
+
+      def create_sub_components
+        @and_gate = Circuits::Component::And.new
+        @sr_nand_clk = Circuits::Component::SrNand.new
+        @sr_nand_d = Circuits::Component::SrNand.new
+        @sr_nand_out = Circuits::Component::SrNand.new
+        @sub_components = [@and_gate, @sr_nand_clk, @sr_nand_d, @sr_nand_out]
+      end
+
+      def default_input_count
+        2
+      end
+
+      def default_output_count
+        2
+      end
+
+      def link_and_gate
+        and_gate[:a].set sr_nand_clk[:not_q]
+        and_gate[:b].set self[:clk]
+      end
+
+      def link_outputs
+        self[:q].set sr_nand_out[:q]
+        self[:not_q].set sr_nand_out[:not_q]
+      end
+
+      def link_sr_nand_d
+        sr_nand_d[:not_s].set and_gate[:out]
+        sr_nand_d[:not_r].set self[:d]
+      end
+
+      def link_sr_nand_clk
+        sr_nand_clk[:not_s].set sr_nand_d[:not_q]
+        sr_nand_clk[:not_r].set self[:clk]
+      end
+
+      def link_sr_nand_out
+        sr_nand_out[:not_s].set sr_nand_clk[:not_q]
+        sr_nand_out[:not_r].set sr_nand_d[:q]
+      end
+
+      def link_sub_components
+        link_outputs
+        link_and_gate
+        link_sr_nand_d
+        link_sr_nand_clk
+        link_sr_nand_out
+      end
+    end
+  end
+end

data/lib/circuits/version.rb

@@ -1,5 +1,5 @@
 # Circuits allows you to express logical circuits in code
 module Circuits
   # The version of the Circuits gem
-  VERSION = '0.8.2'
+  VERSION = '0.9.0'
 end

data/spec/unit/circuits/component/d_spec.rb

@@ -0,0 +1,114 @@
+require 'spec_helper'
+require 'circuits/component/d'
+
+describe Circuits::Component::D do
+  describe '#tick' do
+    subject { Circuits::Component::D.new }
+
+    context 'has just been set' do
+      before do
+        subject[:clk].set false
+        subject.tick
+        subject.tock
+        subject[:d].set true
+        subject[:clk].set true
+        subject.tick
+        subject.tock
+        subject[:d].set false
+        subject[:clk].set false
+      end
+
+      it 'is set' do
+        expect(subject[:q].get).to eq(true)
+        expect(subject[:not_q].get).to eq(false)
+      end
+
+      it 'is stable' do
+        subject.tick
+        subject.tock
+        expect(subject[:q].get).to eq(true)
+        expect(subject[:not_q].get).to eq(false)
+      end
+
+      it 'd high has no effect' do
+        subject[:d].set true
+        subject.tick
+        subject.tock
+        expect(subject[:q].get).to eq(true)
+        expect(subject[:not_q].get).to eq(false)
+      end
+
+      it 'clock has to be positive edge' do
+        subject[:d].set false
+        subject[:clk].set true
+        subject.tick
+        subject.tock
+        expect(subject[:q].get).to eq(true)
+        expect(subject[:not_q].get).to eq(false)
+      end
+
+      it 'can be reset' do
+        subject.tick
+        subject.tock
+        subject[:clk].set true
+        subject.tick
+        subject.tock
+        expect(subject[:q].get).to eq(false)
+        expect(subject[:not_q].get).to eq(true)
+      end
+    end
+
+    context 'has just been reset' do
+      before do
+        subject[:clk].set false
+        subject.tick
+        subject.tock
+        subject[:d].set false
+        subject[:clk].set true
+        subject.tick
+        subject.tock
+        subject[:clk].set false
+      end
+
+      it 'is reset' do
+        expect(subject[:q].get).to eq(false)
+        expect(subject[:not_q].get).to eq(true)
+      end
+
+      it 'is stable' do
+        subject.tick
+        subject.tock
+        expect(subject[:q].get).to eq(false)
+        expect(subject[:not_q].get).to eq(true)
+      end
+
+      it 'd high has no effect' do
+        subject[:d].set true
+        subject.tick
+        subject.tock
+        expect(subject[:q].get).to eq(false)
+        expect(subject[:not_q].get).to eq(true)
+      end
+
+      it 'clock has to be positive edge' do
+        subject[:d].set true
+        subject[:clk].set true
+        subject.tick
+        subject.tock
+        expect(subject[:q].get).to eq(false)
+        expect(subject[:not_q].get).to eq(true)
+      end
+
+      it 'can be set' do
+        subject.tick
+        subject.tock
+        subject[:d].set true
+        subject[:clk].set true
+        subject.tick
+        subject.tock
+        expect(subject[:q].get).to eq(true)
+        expect(subject[:not_q].get).to eq(false)
+      end
+    end
+  end
+end

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: circuits
 version: !ruby/object:Gem::Version
-  version: 0.8.2
+  version: 0.9.0
 platform: ruby
 authors:
 - Henry Muru Paenga
 autorequire: 
 bindir: bin
 cert_chain: []
-date: 2015-10-28 00:00:00.000000000 Z
+date: 2015-10-29 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: bundler
@@ -126,6 +126,7 @@ files:
 - lib/circuits.rb
 - lib/circuits/component/and.rb
 - lib/circuits/component/base.rb
+- lib/circuits/component/d.rb
 - lib/circuits/component/nand.rb
 - lib/circuits/component/nor.rb
 - lib/circuits/component/not.rb
@@ -140,6 +141,7 @@ files:
 - spec/spec_helper.rb
 - spec/unit/circuits/component/and_spec.rb
 - spec/unit/circuits/component/base_spec.rb
+- spec/unit/circuits/component/d_spec.rb
 - spec/unit/circuits/component/nand_spec.rb
 - spec/unit/circuits/component/nor_spec.rb
 - spec/unit/circuits/component/not_spec.rb
@@ -178,6 +180,7 @@ test_files:
 - spec/spec_helper.rb
 - spec/unit/circuits/component/and_spec.rb
 - spec/unit/circuits/component/base_spec.rb
+- spec/unit/circuits/component/d_spec.rb
 - spec/unit/circuits/component/nand_spec.rb
 - spec/unit/circuits/component/nor_spec.rb
 - spec/unit/circuits/component/not_spec.rb