badline 0.9.0 → 0.10.1

data/lib/badline/address_bus/roms.rb

@@ -4,18 +4,25 @@ module Badline
   class AddressBus
     # The BASIC, character and KERNAL ROMs, and which KERNAL is fitted.
     module ROMs
-      # The KERNAL ROMs a machine can be fitted with, by name: the C64's
-      # and the SX-64's.
-      KERNALS = { c64: "kernal.rom", sx64: "kernal-sx64.rom" }.freeze
+      # The KERNAL ROMs a machine can be fitted with, by name: the C64's,
+      # the SX-64's, the PET 64's and the C64GS's. The C64GS's is a 16K
+      # image of its BASIC and its KERNAL, and fits both.
+      KERNALS = {
+        c64: "kernal.rom", sx64: "kernal-sx64.rom", pet64: "kernal-pet64.rom", gs: "c64gs.rom"
+      }.freeze
 
       attr_reader :basic_rom, :character_rom, :kernal_rom, :kernal
 
-      # Fits the KERNAL ROM KERNALS names `name`, in place of the one before.
+      # Fits the KERNAL ROM KERNALS names `name`, in place of the one before,
+      # with the BASIC of a 16K image or else the C64's.
       def kernal=(name)
         raise ArgumentError, "no KERNAL named #{name}" unless KERNALS.key?(name)
 
         @kernal = name
-        @kernal_rom = ROM.load(KERNALS[name], 0xe000)
+        data = ROM.read(KERNALS[name])
+        basic = data.length == 0x4000 ? data[0, 0x2000] : ROM.read("basic.rom")
+        @basic_rom = ROM.new(basic, length: 0x2000, start: 0xa000)
+        @kernal_rom = ROM.new(data[-0x2000, 0x2000], length: 0x2000, start: 0xe000)
         update_overlays!
       end
 

data/lib/badline/address_bus.rb

@@ -3,8 +3,9 @@
 require "badline/address_bus/saved_state"
 require "badline/address_bus/sid_slots"
 require "badline/address_bus/extra_sids"
-require "badline/address_bus/ultimax_pages"
+require "badline/address_bus/pla"
 require "badline/address_bus/roms"
+require "badline/address_bus/fittings"
 
 module Badline
   # Memory layout:
@@ -34,9 +35,10 @@ module Badline
   # 0xE000-0xFFFF - KERNAL ROM / Cartridge ROM (high) - 8kb
   class AddressBus
     include Addressable
-    include UltimaxPages
+    include PLA
     include ExtraSIDs
     include ROMs
+    include Fittings
 
     # I/O 1 and 2, and the Ultimax holes, with nothing on the bus. A read
     # picks up the byte the VIC fetched in the preceding phi1 half-cycle,
@@ -68,6 +70,7 @@ module Badline
     def initialize(sid_model: :mos6581, cia_model: :mos6526, vic_model: :mos6569, region: Region::PAL,
                    ram_expansion: nil)
       @region = region
+      @board = :c64
       @ram = Memory.new(RAM_POWER_ON, length: 2**16, start: 0)
       @ram_expansion = RAMExpansion.build(ram_expansion, @ram) { update_overlays! }
       @cartridge = @reu = nil
@@ -79,7 +82,7 @@ module Badline
       @joystick1 = Joystick.new
       @joystick2 = Joystick.new
       @control_ports = ControlPorts.new(keyboard: @keyboard, joystick1: @joystick1, joystick2: @joystick2)
-      @vic  = VIC.new(self, model: vic_model, region:)
+      @vic  = VIC.new(model: vic_model, region:)
       @cia1 = CIA.new(start: 0xdc00, peripheral: @control_ports, model: cia_model, region:)
       @cia2 = CIA.new(start: 0xdd00, model: cia_model, region:)
       @control_ports.port_a_source = @cia1
@@ -92,6 +95,8 @@ module Badline
       @datasette.on_sense_change { @io_port.value = port_value }
 
       @color_ram = ColorMemory.new(@vic)
+      @vic.vic_bank.connect(cia2: @cia2, color_ram: @color_ram)
+      @vic.vic_bank.map_character_rom(character_rom)
       @open_bus = OpenBus.new(@vic)
       @cpu_off_bus = false
 
@@ -199,98 +204,18 @@ module Badline
     # so reads and writes dispatch through per-page handler tables instead
     # of range checks.
     def update_overlays!
-      @ultimax = @cartridge ? @cartridge.ultimax? : false
-      @phi1_ultimax = @cartridge ? @cartridge.phi1_ultimax? : false
-      @ram_expansion.map(@read_pages, @write_pages)
+      max = @board == :max
+      @ultimax = max || (@cartridge ? @cartridge.ultimax? : false)
+      @phi1_ultimax = max || (@cartridge ? @cartridge.phi1_ultimax? : false)
       @video_ram = @ram_expansion.video_ram
+      @vic.vic_bank.map(@video_ram, phi1_ultimax: @phi1_ultimax, ultimax: @ultimax, romh: @cartridge&.romh)
 
-      @ultimax ? map_ultimax_pages : map_banked_pages
+      map_pla_pages
       @write_pages[0xff] = @reu.trigger.wrap(@write_pages[0xff]) if @reu
     end
 
-    def map_banked_pages
-      map_rom_overlays
-      map_cartridge_ram
-      @write_pages.fill(@cartridge.romh_writes, 0xe0, 0x20) if @cartridge&.romh_writes
-
-      if io?
-        map_io_pages
-      elsif character?
-        @read_pages.fill(character_rom, 0xd0, 0x10)
-      end
-    end
-
-    # EXROM and GAME select the cartridge whether or not it has a chip
-    # there, and an empty socket leaves the bus floating.
-    def map_rom_overlays
-      @read_pages.fill(@cartridge.roml || @open_bus, 0x80, 0x20) if roml?
-      if romh?
-        @read_pages.fill(@cartridge.romh || @open_bus, 0xa0, 0x20)
-      elsif basic?
-        @read_pages.fill(basic_rom, 0xa0, 0x20)
-      end
-      @read_pages.fill(kernal_rom, 0xe0, 0x20) if kernal?
-    end
-
-    # Cartridge RAM in the ROML or ROMH window decodes writes itself,
-    # whatever the $01 lines say.
-    def map_cartridge_ram
-      return unless @cartridge&.exrom&.zero?
-
-      map_cartridge_ram_bank(@cartridge.roml, 0x80)
-      map_cartridge_ram_bank(@cartridge.romh, 0xa0) if @cartridge.game.zero?
-    end
-
-    def map_cartridge_ram_bank(bank, first_page)
-      @write_pages.fill(bank, first_page, 0x20) if bank.is_a?(Cartridge::RAMBank)
-    end
-
-    def map_io_pages
-      {
-        vic => 0xd0..0xd3, sid => 0xd4..0xd7, color_ram => 0xd8..0xdb,
-        cia1 => 0xdc..0xdc, cia2 => 0xdd..0xdd, @open_bus => 0xde..0xdf
-      }.each do |chip, pages|
-        pages.each { |p| @read_pages[p] = @write_pages[p] = chip }
-      end
-      @ram_expansion.map_io(@read_pages, @write_pages)
-      @read_pages[0xd7] = @write_pages[0xd7] = @debug_register if @debug_register
-      @read_pages[0xdf] = @write_pages[0xdf] = @reu if @reu
-      map_cartridge_io if @cartridge
-      map_extra_sids unless @sid_slots.empty?
-    end
-
-    def map_cartridge_io
-      @write_pages.fill(@cartridge, 0xde, 2)
-      @cartridge.readable_io_pages.each { |p| @read_pages[p] = @cartridge }
-    end
-
-    def basic?
-      io_port.kernal? && io_port.basic? && game_high?
-    end
-
-    def game_high?
-      @cartridge.nil? || @cartridge.game == 1
-    end
-
-    def roml?
-      @cartridge&.exrom&.zero? && io_port.kernal? && io_port.basic?
-    end
-
-    def romh?
-      @cartridge&.exrom&.zero? && @cartridge.game.zero? && io_port.kernal?
-    end
-
-    # In 16K mode LORAM alone leaves $d000 as RAM, where it still maps I/O.
-    def character?
-      (io_port.kernal? || (io_port.basic? && game_high?)) && !io_port.io?
-    end
-
-    def io?
-      (io_port.basic? || io_port.kernal?) && io_port.io?
-    end
-
-    def kernal?
-      io_port.kernal?
+    def map_ram_pages
+      @ram_expansion.map(@read_pages, @write_pages)
     end
   end
 end

data/lib/badline/chrout_trap.rb

@@ -2,7 +2,7 @@
 
 module Badline
   # Observe-only PC trap on the KERNAL CHROUT routine ($FFD2). Records each
-  # character written while the KERNAL is banked in, then lets execution fall
+  # character written while the layout finds the KERNAL mapped in, then lets execution fall
   # through to the ROM, so the screen output is unaffected. Used for headless
   # capture of program output.
   class ChroutTrap
@@ -10,14 +10,15 @@ module Badline
 
     attr_reader :output
 
-    def initialize(cpu:, bus:)
+    def initialize(cpu:, bus:, layout:)
       @cpu = cpu
       @bus = bus
+      @layout = layout
       @output = +""
     end
 
     def call
-      @output << ascii(@cpu.a) if @bus.io_port.kernal?
+      @output << ascii(@cpu.a) if @layout.kernal_mapped?(@bus)
     end
 
     def inspect

data/lib/badline/computer/attachments.rb

@@ -22,11 +22,13 @@ module Badline
         return @drive.insert(storage) if @drive
 
         @drive = KernalTrap::Drive.new(storage)
-        load_trap = KernalTrap::Load.new(cpu:, bus: address_bus, drive: @drive)
-        cpu.install_trap(KernalTrap::Load::ADDRESS) { load_trap.call }
-        @serial_trap = KernalTrap::Serial.new(cpu:, bus: address_bus, drive: @drive, device: serial_trap_device).install
-        save_trap = @save_trap = KernalTrap::Save.new(cpu:, bus: address_bus, drive: @drive)
-        cpu.install_trap(KernalTrap::Save::ADDRESS) { save_trap.call }
+        layout = KernalTrap::C64_LAYOUT
+        load_trap = KernalTrap::Load.new(cpu:, bus: address_bus, layout:, drive: @drive)
+        cpu.install_trap(layout.load) { load_trap.call }
+        @serial_trap = KernalTrap::Serial.new(cpu:, bus: address_bus, layout:, drive: @drive,
+                                              device: serial_trap_device).install
+        save_trap = @save_trap = KernalTrap::Save.new(cpu:, bus: address_bus, layout:, drive: @drive)
+        cpu.install_trap(layout.save) { save_trap.call }
       end
 
       # Takes device 8's mounted storage out, and with it the LOAD, SAVE and
@@ -35,8 +37,8 @@ module Badline
       def unmount
         return unless @drive
 
-        cpu.remove_trap(KernalTrap::Load::ADDRESS)
-        cpu.remove_trap(KernalTrap::Save::ADDRESS)
+        cpu.remove_trap(KernalTrap::C64_LAYOUT.load)
+        cpu.remove_trap(KernalTrap::C64_LAYOUT.save)
         @serial_trap.device = nil
         @serial_trap = nil
         @save_trap = nil
@@ -46,6 +48,24 @@ module Badline
       # Whether device 8 serves a disk or directory through the traps.
       def mounted? = !@drive.nil?
 
+      # The serial bus, which CIA 2's port A drives through the C64's own
+      # inverters and reads back on PA6 and PA7, with or without a drive on
+      # it.
+      attr_reader :iec_bus
+
+      # Plugs in a Drive1541, which then runs alongside the C64 on its own
+      # clock and talks to it over the serial bus. The serial traps stop
+      # answering the drive's device number, so the KERNAL's TALK, LISTEN and
+      # byte transfers reach the drive. The LOAD and SAVE traps stay, and
+      # still serve a mounted image.
+      def attach_drive1541(drive)
+        @iec_bus.detach(@drive1541) if @drive1541
+        drive.host_clock_hz = region.clock_hz
+        @drive1541 = drive
+        drive.connect(iec_bus)
+        @serial_trap&.device = serial_trap_device
+      end
+
       # Unplugs the Drive1541, leaving the serial bus with nothing on it.
       def detach_drive1541
         return unless @drive1541
@@ -57,6 +77,26 @@ module Badline
 
       private
 
+      # The device number the serial traps answer: device 8, unless a true
+      # drive is on the bus as device 8.
+      def serial_trap_device
+        @drive1541&.device == KernalTrap::Routine::DEVICE ? nil : KernalTrap::Routine::DEVICE
+      end
+
+      # CIA 2's port A drives the serial bus, which reads CLK and DATA back
+      # into it.
+      def plug_serial_bus
+        @iec_bus = IECBus.new
+        @cia2.peripheral = @iec_bus
+        @cia2.on_port_a_write { push_serial_lines }
+        push_serial_lines
+      end
+
+      # Pushes the lines CIA 2's port A pulls into the serial bus.
+      def push_serial_lines
+        @iec_bus.host_lines = @cia2.port_a_lines
+      end
+
       def save_cartridge(out)
         cartridge = address_bus.cartridge
         out.boolean(!cartridge.nil?)

data/lib/badline/computer/saved_state.rb

@@ -97,6 +97,7 @@ module Badline
         @init_handlers_lost = [input.int - @init_handlers.length, 0].max
         load_cartridge(input)
         address_bus.load_state(input)
+        push_serial_lines
         @cpu.load_state(input)
         load_trap_drive(input)
         load_serial_bus(input)

data/lib/badline/computer.rb

@@ -12,6 +12,12 @@ module Badline
 
     attr_reader :address_bus, :cpu, :cycles, :drive1541
 
+    # The path of the disk or directory device 8 serves through the traps
+    # (Attachments), or an empty one.
+    def mounted_path = @drive.nil? ? "" : @drive.path
+
+    def family = :c64
+
     def region = address_bus.region
 
     def vic = address_bus.vic
@@ -42,13 +48,12 @@ module Badline
     # TOD clocks count. The KERNAL tells PAL from NTSC by the raster, so
     # every region boots the same ROMs. reu plugs an REU of that many K
     # into the expansion port, where it drives the IRQ line and takes the
-    # bus for its transfers. kernal: names the KERNAL ROM
-    # (AddressBus::ROMs::KERNALS), and datasette: false leaves the cassette port
-    # empty, as on the SX-64.
-    def initialize(debug: false, reu: nil, kernal: :c64, datasette: true, **machine)
-      @address_bus = AddressBus.new(**machine)
-      @address_bus.kernal = kernal unless kernal == :c64
-      @address_bus.datasette.disconnect! unless datasette
+    # bus for its transfers. kernal:, datasette: and board: fit the bus
+    # afterwards (AddressBus::Fittings): the KERNAL ROM, the cassette port,
+    # which is empty on the SX-64, and the board and case.
+    def initialize(debug: false, reu: nil, **machine)
+      @address_bus = AddressBus.new(**machine.except(*AddressBus::Fittings::NAMES))
+      @address_bus.fit(**machine.slice(*AddressBus::Fittings::NAMES))
       @cpu = CPU.new(@address_bus, debug:)
       @vic = @address_bus.vic
       @vic.open_bus = -> { @address_bus.ram.peek(@cpu.program_counter) }
@@ -70,7 +75,7 @@ module Badline
       @serial_trap = nil
       @save_trap = nil
       @drive1541 = nil
-      @iec_bus = IECBus.new(host: @cia2).tap(&:plug_in!)
+      plug_serial_bus
       @reu = reu ? plug_reu(reu) : nil
     end
 
@@ -98,6 +103,40 @@ module Badline
       @cycles += 1
     end
 
+    # Runs `count` cycles, one #cycle! after another.
+    def run_cycles(count)
+      i = 0
+      while i < count
+        cycle!
+        i += 1
+      end
+    end
+
+    # Runs cycles until the block returns true or the cycle count passes
+    # `limit`, checking before each cycle.
+    def run_until(limit)
+      cycle! until yield || @cycles > limit
+    end
+
+    # The cycle at which #on_init's handlers run, once the KERNAL has booted.
+    def init_threshold
+      INIT_THRESHOLD
+    end
+
+    # The clock, the raster and the crop of the machine's region, a pixel
+    # to a window pixel.
+    def timing
+      region = address_bus.region
+      Timing.new(clock_hz: region.clock_hz, cycles_per_line: region.cycles_per_line,
+                 lines_per_frame: region.lines_per_frame, crop: region.crop, pixel_width: 1)
+    end
+
+    # The chip whose #display a front end shows.
+    def video = @vic
+
+    # The chip a front end records the machine's sound from.
+    def sound_source = @sid
+
     def load_prg(data)
       uint16(data[0], data[1]).tap do |load_addr|
         ram.write(load_addr, data[2..])
@@ -155,30 +194,16 @@ module Badline
 
     # RESTORE isn't in the key matrix. It fires a one-shot that pulses the
     # NMI line however long the key is held, modelled here as one cycle.
+    # A machine without a keyboard has no RESTORE key either.
     def press_restore
-      @restore_pulse = true
+      @restore_pulse = true if keyboard.connected?
     end
 
-    # Plugs in a Drive1541, which then runs alongside the C64 on its own
-    # clock and talks to it over the serial bus. The serial traps stop
-    # answering the drive's device number, so the KERNAL's TALK, LISTEN and
-    # byte transfers reach the drive. The LOAD and SAVE traps stay, and
-    # still serve a mounted image.
-    def attach_drive1541(drive)
-      @iec_bus.detach(@drive1541) if @drive1541
-      drive.host_clock_hz = region.clock_hz
-      @drive1541 = drive
-      drive.connect(iec_bus)
-      @serial_trap&.device = serial_trap_device
-    end
-
-    # The serial bus, which CIA 2's port A drives through the C64's own
-    # inverters and reads back on PA6 and PA7, with or without a drive on
-    # it.
-    attr_reader :iec_bus
+    # The one-shot has pulsed already, so letting go does nothing.
+    def release_restore; end
 
     def capture_output
-      @capture_output ||= ChroutTrap.new(cpu:, bus: address_bus).tap do |trap|
+      @capture_output ||= ChroutTrap.new(cpu:, bus: address_bus, layout: KernalTrap::C64_LAYOUT).tap do |trap|
         cpu.install_trap(ChroutTrap::ADDRESS) { trap.call }
       end
     end
@@ -197,12 +222,6 @@ module Badline
 
     private
 
-    # The device number the serial traps answer: device 8, unless a true
-    # drive is on the bus as device 8.
-    def serial_trap_device
-      @drive1541&.device == KernalTrap::Routine::DEVICE ? nil : KernalTrap::Routine::DEVICE
-    end
-
     # The NMI line is wired-OR between CIA 2, the cartridge and the RESTORE
     # key, and the CPU takes an interrupt on its falling edge.
     def drive_nmi
@@ -258,9 +277,5 @@ module Badline
     def handle_init
       @init_handlers.each(&:call)
     end
-
-    def init_threshold
-      INIT_THRESHOLD
-    end
   end
 end

data/lib/badline/control_ports.rb

@@ -16,13 +16,19 @@ module Badline
   # resistances; close neither and the lines float high. Reading a pot asks the
   # CIA for the current select lines, since a program sets them and then goes
   # straight to SID without touching the ports again.
+  #
+  # A matrix may have rows beyond port A's eight. Their select lines come from
+  # outside the CIA and are pushed into +extra_rows+, bit 0 for the ninth row
+  # upwards, active low like port A; idle, every line is high and none of
+  # those rows is selected. They settle with port A's lines as rows 8 and up,
+  # so their keys reach port B, but port A reads only its own eight.
   class ControlPorts
     PORT1_POTS = 0x40
     PORT2_POTS = 0x80
     FIRE = 0x10
 
     attr_reader :keyboard, :joystick1, :joystick2
-    attr_accessor :device1, :device2, :port_a_source
+    attr_accessor :device1, :device2, :port_a_source, :extra_rows
 
     def initialize(keyboard:, joystick1:, joystick2:)
       @keyboard = keyboard
@@ -31,9 +37,10 @@ module Badline
       @device1 = nil
       @device2 = nil
       @port_a_source = nil
+      @extra_rows = 0xff
     end
 
-    def read_a(port_a, port_b) = scan(port_a, port_b).first
+    def read_a(port_a, port_b) = scan(port_a, port_b).first & 0xff
 
     def read_b(port_a, port_b) = scan(port_a, port_b).last
 
@@ -58,7 +65,7 @@ module Badline
     end
 
     def scan(port_a, port_b)
-      keyboard.scan(port_a & port_bits(@joystick2, @device2),
+      keyboard.scan((port_a & port_bits(@joystick2, @device2)) | (@extra_rows << 8),
                     port_b & port_bits(@joystick1, @device1))
     end
 

data/lib/badline/core.rb

@@ -8,6 +8,7 @@
 require "badline/version"
 require "badline/integer_helper"
 require "badline/region"
+require "badline/timing"
 require "badline/model"
 require "badline/addressable"
 require "badline/memory"
@@ -40,9 +41,11 @@ require "badline/drive1541"
 require "badline/snapshot/state"
 require "badline/snapshot/setup"
 require "badline/computer"
+require "badline/vic20"
 require "badline/checkpoint"
 require "badline/storage"
 require "badline/cartridge"
 require "badline/kernal_trap"
 require "badline/chrout_trap"
 require "badline/media"
+require "badline/machine"

data/lib/badline/datasette.rb

@@ -3,7 +3,8 @@
 module Badline
   # The 1530 datasette. Plays a pulse stream into CIA 1's FLAG pin while the
   # motor runs with a key pressed, and reports the keys through the cassette
-  # sense line on the $01 port.
+  # sense line on the $01 port. With RECORD down too, it records the
+  # machine's write line onto the tape instead.
   class Datasette
     # What inserting a tape raises on a machine without a cassette port.
     class Missing < ArgumentError; end
@@ -15,6 +16,9 @@ module Badline
       @tape = tape
       @connected = true
       @playing = false
+      @recording = false
+      @write_high = true
+      @since = 0
       @motor = false
       @countdown = 0
       @flag_handler = nil
@@ -60,6 +64,30 @@ module Badline
     def play! = press(true)
     def stop! = press(false)
 
+    # Presses RECORD and PLAY together.
+    def record!
+      return if !@connected || @tape.nil?
+
+      press(true)
+      @recording = true
+      @since = 0
+    end
+
+    def recording? = @recording
+
+    # The machine's tape write line. While the deck records with its motor
+    # running, each rising edge ends a pulse on the tape, as long as the
+    # time since the edge before, and plays back as a falling edge on the
+    # read line.
+    def write_line=(high)
+      rose = high && !@write_high
+      @write_high = high
+      return unless rose && @recording && running?
+
+      @tape.record_pulse(@since)
+      @since = 0
+    end
+
     def playing? = @playing
 
     # Sense reads low while a key is down on the deck.
@@ -98,6 +126,7 @@ module Badline
 
     def cycle!
       return unless running?
+      return @since += 1 if @recording
 
       @countdown = @tape.next_pulse.to_i if @countdown.zero?
       return if @countdown.zero?
@@ -116,8 +145,17 @@ module Badline
     def press(down)
       return if down == @playing || !@connected
 
+      finish_recording unless down
       @playing = down
       @sense_handler&.call
     end
+
+    # Releasing the keys ends a recording, and writes the tape out.
+    def finish_recording
+      return unless @recording
+
+      @recording = false
+      @tape.save
+    end
   end
 end

data/lib/badline/drive1541/serial_port.rb

@@ -27,7 +27,7 @@ module Badline
 
       attr_reader :bus
 
-      def initialize(device: 8, bus: nil)
+      def initialize(device: 8, bus: IECBus.new)
         @port_b = (0xff & ~(SERIAL_INPUTS | JUMPERS)) | (((device - 8) & 0x03) << 5)
         @host = 0
         self.bus = bus
@@ -38,10 +38,10 @@ module Badline
         latch_host
       end
 
-      # Takes the C64's lines as they stand, for the drive cycles of the
-      # next host cycle.
+      # Takes the C64's lines as the machine last pushed them into the bus,
+      # for the drive cycles of the next host cycle.
       def latch_host
-        @host = @bus ? @bus.host_lines : 0
+        @host = @bus.host_lines
       end
 
       # The C64's lines as last latched. The jumpers and the bus are the
@@ -55,10 +55,7 @@ module Badline
       end
 
       # Whether the C64 has moved ATN since the last latch_host.
-      def atn_moved?
-        lines = @bus ? @bus.host_lines : 0
-        (lines ^ @host).anybits?(IECBus::HOST_ATN_OUT)
-      end
+      def atn_moved? = (@bus.host_lines ^ @host).anybits?(IECBus::HOST_ATN_OUT)
 
       def atn_low? = @bus.atn_low?(@host)
 

data/lib/badline/drive1541/sleep.rb

@@ -8,9 +8,8 @@ module Badline
     # passes go in bulk, and the rest cycle by cycle, which may find the
     # idle loop and put the drive back to sleep.
     #
-    # The drive looks at ATN only when the C64 may have moved it, on a
-    # bus that says when (IECBus#notifies?), and every host cycle on one
-    # that doesn't.
+    # The drive looks at ATN only when the machine may have moved it, as
+    # it pushes its lines into the bus (IECBus#host_lines=).
     module Sleep
       # Whether the drive is skipping its idle loop right now.
       def asleep? = @asleep
@@ -40,10 +39,10 @@ module Badline
         @wake_at = 0
       end
 
-      # A host cycle asleep that may wake the drive. The bus says whether
-      # the next ones need a look at ATN.
+      # A host cycle asleep that may wake the drive. The next ones need no
+      # look at ATN until the machine pushes its lines again.
       def doze
-        @host_still = @serial_bus.notifies?
+        @host_still = true
         if @serial_port.atn_moved?
           settle!
         elsif @slept == @wake_at

data/lib/badline/drive1541.rb

@@ -149,8 +149,8 @@ module Badline
     # The host has run this cycle already, and the drive sees what it did
     # from the next one on (see SerialPort). Asleep, the drive owes the
     # cycles instead, until ATN moves or its counters are due (see Idle).
-    # It looks at ATN only after the C64 wrote CIA 2's port A, on a bus
-    # that says so (see host_written!).
+    # It looks at ATN only after the machine pushed its lines into the bus
+    # (see host_written!).
     def host_cycle!
       if @asleep
         return if (@slept += 1) != @wake_at && @host_still
@@ -169,7 +169,7 @@ module Badline
       plan_wake if @asleep
     end
 
-    # The C64 wrote CIA 2's port A, so ATN may have moved.
+    # The machine pushed its lines into the bus, so ATN may have moved.
     def host_written!
       @host_still = false
     end