axi_tdl 0.0.7 → 0.0.12

data/lib/tdl/sdlmodule/top_module.rb

@@ -541,3 +541,4 @@ class SdlModule
 end
 
 
+

data/lib/tdl/tdl.rb

@@ -89,7 +89,11 @@ require_relative "./exlib/itegration"
 require_relative "./exlib/itegration_verb"
 require_relative "./exlib/parse_argv"
 # require_relative "./tdlmodule_ex"
-require_relative "./SDL/path_lib"     # require sdlmodule
+# require_relative "./SDL/path_lib"     # require sdlmodule
+## VSC COMPATABLE support 
+require_relative "./SDL/vcs_axi4_comptable.rb"
+require_relative "./SDL/vcs_data_c_comptable.rb"
+require_relative "./SDL/vcs_axis_comptable.rb"
 
 ## 添加 M2S方法
 require_relative "./axi_stream/axi_stream_interconnect.rb"
@@ -123,7 +127,7 @@ require_relative "./exlib/dve_tcl.rb"
 
 ## === INIT BLOCK Methods =====
 $argvs_hash = {}
-$argvs_hash = Parser.parse(ARGV) unless $_child_argv_
+$argvs_hash = Parser.parse($TdlARGV || ARGV) 
 TopModule.sim = $argvs_hash[:sim]
 
 class Tdl
@@ -254,6 +258,14 @@ class Tdl
         puts TopModule.current.test_unit.echo_units if TopModule.current
         puts(pagination("SUMMARY"))
         puts "#{TopModule.sim ? 'SIM' : 'SYNTH'} RUN SPEND #{Time.now - $__start_time__} sec @ TIME : #{Time.now}"
+
+        ## ----------- 
+        # TopModule.current.ref_modules.uniq.each do |e| 
+        #     unless  e.is_a? ClassHDL::ClearSdlModule
+        #         puts "#{e.real_sv_path}: #{e.module_name}"
+        #     end
+        # end
+        ## ===========
     end
 
 end

data/lib/tdl/tdlerror/tdlerror.rb

@@ -1,5 +1,6 @@
 class TdlError < ScriptError
     def initialize(arge)
+        Tdl.PutsEnable = false
         head_str0 = String.new("\n+_____________________________________________+\n")
         head_str1 = "\n|----------------TDL ERROR--------------------|\n"
         end_str0  = "\n+================TDL ERROR====================+\n"

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: axi_tdl
 version: !ruby/object:Gem::Version
-  version: 0.0.7
+  version: 0.0.12
 platform: ruby
 authors:
 - Cook.Darwin
 autorequire: 
 bindir: exe
 cert_chain: []
-date: 2021-02-21 00:00:00.000000000 Z
+date: 2021-03-14 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: bundler
@@ -42,43 +42,46 @@ dependencies:
   name: pry
   requirement: !ruby/object:Gem::Requirement
     requirements:
-    - - ">="
+    - - "~>"
       - !ruby/object:Gem::Version
-        version: '0'
+        version: '0.11'
   type: :development
   prerelease: false
   version_requirements: !ruby/object:Gem::Requirement
     requirements:
-    - - ">="
+    - - "~>"
       - !ruby/object:Gem::Version
-        version: '0'
+        version: '0.11'
 - !ruby/object:Gem::Dependency
   name: minitest
   requirement: !ruby/object:Gem::Requirement
     requirements:
-    - - ">="
+    - - "~>"
       - !ruby/object:Gem::Version
-        version: '0'
+        version: '5.10'
   type: :development
   prerelease: false
   version_requirements: !ruby/object:Gem::Requirement
     requirements:
-    - - ">="
+    - - "~>"
       - !ruby/object:Gem::Version
-        version: '0'
-description: 'tdl is a hardware Construction language, it like chisel, but more intresting.
-  It is a DSL and base on ruby. Finally, it convert to systemverilog. '
+        version: '5.10'
+description: 'tdl 是一种硬件构造语言, 和chisel类似, 但是更加有趣, 他是一种基于Ruby的DSL. 最终它会编译输出systemverilog
+  。 '
 email:
 - cook_darwin@hotmail.com
 executables: []
 extensions: []
 extra_rdoc_files: []
 files:
+- ".github/workflows/gem-push.yml"
+- ".github/workflows/ruby.yml"
 - ".gitignore"
+- ".travis.yml"
 - CODE_OF_CONDUCT.md
 - Gemfile
-- Gemfile.lock
 - LICENSE
+- README.EN.md
 - README.md
 - Rakefile
 - axi_tdl.gemspec
@@ -214,6 +217,7 @@ files:
 - lib/axi/AXI_stream/axi_stream_interconnect_S2M_auto.sv
 - lib/axi/AXI_stream/axi_stream_interconnect_S2M_with_info.sv
 - lib/axi/AXI_stream/axi_stream_interconnect_S2M_with_keep.sv.bak
+- lib/axi/AXI_stream/axi_stream_latency.sv
 - lib/axi/AXI_stream/axi_stream_packet_fifo_with_info.sv.bak
 - lib/axi/AXI_stream/axi_stream_partition.sv
 - lib/axi/AXI_stream/axi_stream_partition_A1.sv
@@ -252,12 +256,15 @@ files:
 - lib/axi/AXI_stream/axis_length_fill.sv
 - lib/axi/AXI_stream/axis_length_split.sv
 - lib/axi/AXI_stream/axis_length_split_with_addr.sv
+- lib/axi/AXI_stream/axis_length_split_with_user.sv
 - lib/axi/AXI_stream/axis_length_split_writh_user.sv
 - lib/axi/AXI_stream/axis_link_trigger.sv
 - lib/axi/AXI_stream/axis_master_empty.sv
 - lib/axi/AXI_stream/axis_mirror_to_master.sv
 - lib/axi/AXI_stream/axis_mirrors.sv
 - lib/axi/AXI_stream/axis_orthogonal.sv
+- lib/axi/AXI_stream/axis_pipe_sync_seam.rb
+- lib/axi/AXI_stream/axis_pipe_sync_seam.sv
 - lib/axi/AXI_stream/axis_ram_buffer.sv
 - lib/axi/AXI_stream/axis_rom_contect.rb
 - lib/axi/AXI_stream/axis_rom_contect.sv
@@ -399,6 +406,9 @@ files:
 - lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_verc_with_addr.sv
 - lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_verc_with_id.sv
 - lib/axi/data_interface/data_inf_c/data_c_pipe_latency.sv
+- lib/axi/data_interface/data_inf_c/data_c_pipe_sync.sv
+- lib/axi/data_interface/data_inf_c/data_c_pipe_sync_seam.rb
+- lib/axi/data_interface/data_inf_c/data_c_pipe_sync_seam.sv
 - lib/axi/data_interface/data_inf_c/data_c_scaler.sv
 - lib/axi/data_interface/data_inf_c/data_c_scaler_A1.sv
 - lib/axi/data_interface/data_inf_c/data_c_tmp_cache.sv
@@ -807,6 +817,9 @@ files:
 - lib/tdl/SDL/fifo/independent_clock_fifo_sdl.rb
 - lib/tdl/SDL/fifo/independent_stack_sdl.rb
 - lib/tdl/SDL/path_lib.rb
+- lib/tdl/SDL/vcs_axi4_comptable.rb
+- lib/tdl/SDL/vcs_axis_comptable.rb
+- lib/tdl/SDL/vcs_data_c_comptable.rb
 - lib/tdl/VideoInf/simple_video_gen.rb
 - lib/tdl/VideoInf/video_from_axi4.rb
 - lib/tdl/VideoInf/video_lib.rb
@@ -819,7 +832,108 @@ files:
 - lib/tdl/auto_script/import_sdl.rb
 - lib/tdl/auto_script/test_autogensdl.rb
 - lib/tdl/auto_script/tmp.rb
+- lib/tdl/auto_script/tmp/TPU_reprogram_wrapper_verb_sdl.rb
+- lib/tdl/auto_script/tmp/acce_iic_bus_upgrade_sdl.rb
+- lib/tdl/auto_script/tmp/arp_tpu_wrapper_sdl.rb
+- lib/tdl/auto_script/tmp/axi4_direct_verc_sdl.rb
+- lib/tdl/auto_script/tmp/axi4_rd_mix_interconnect_M2S_A2_sdl.rb
+- lib/tdl/auto_script/tmp/axi4_wr_auxiliary_gen_without_resp_sdl.rb
+- lib/tdl/auto_script/tmp/axi4_wr_pipe_sdl.rb
+- lib/tdl/auto_script/tmp/axi_stream_cache_35bit_sdl.rb
+- lib/tdl/auto_script/tmp/axi_stream_cache_A1_sdl.rb
+- lib/tdl/auto_script/tmp/axi_stream_cache_sdl.rb
+- lib/tdl/auto_script/tmp/axi_stream_interconnect_M2S_A1_sdl.rb
+- lib/tdl/auto_script/tmp/axi_stream_interconnect_M2S_bind_tuser_sdl.rb
+- lib/tdl/auto_script/tmp/axi_stream_interconnect_S2M_sdl.rb
+- lib/tdl/auto_script/tmp/axi_stream_latency_sdl.rb
+- lib/tdl/auto_script/tmp/axi_stream_long_fifo_sdl.rb
+- lib/tdl/auto_script/tmp/axi_stream_long_fifo_verb_sdl.rb
+- lib/tdl/auto_script/tmp/axi_stream_packet_fifo_sdl.rb
+- lib/tdl/auto_script/tmp/axi_stream_packet_long_fifo_sdl.rb
+- lib/tdl/auto_script/tmp/axi_stream_planer_sdl.rb
+- lib/tdl/auto_script/tmp/axi_streams_scaler_A1_sdl.rb
+- lib/tdl/auto_script/tmp/axis_append_A1_sdl.rb
+- lib/tdl/auto_script/tmp/axis_connect_pipe_right_shift_sdl.rb
+- lib/tdl/auto_script/tmp/axis_connect_pipe_right_shift_verb_sdl.rb
+- lib/tdl/auto_script/tmp/axis_connect_pipe_sdl.rb
+- lib/tdl/auto_script/tmp/axis_connect_pipe_with_info_sdl.rb
+- lib/tdl/auto_script/tmp/axis_direct_sdl.rb
+- lib/tdl/auto_script/tmp/axis_head_cut_sdl.rb
+- lib/tdl/auto_script/tmp/axis_head_cut_verb_sdl.rb
+- lib/tdl/auto_script/tmp/axis_intc_S2M_with_addr_inf_sdl.rb
+- lib/tdl/auto_script/tmp/axis_length_cut_sdl.rb
+- lib/tdl/auto_script/tmp/axis_length_split_with_addr_sdl.rb
+- lib/tdl/auto_script/tmp/axis_length_split_with_user_sdl.rb
+- lib/tdl/auto_script/tmp/axis_master_empty_sdl.rb
+- lib/tdl/auto_script/tmp/axis_mirror_to_master_sdl.rb
+- lib/tdl/auto_script/tmp/axis_pkt_fifo_filter_keep_A1_sdl.rb
+- lib/tdl/auto_script/tmp/axis_pkt_fifo_filter_keep_sdl.rb
+- lib/tdl/auto_script/tmp/axis_slaver_empty_sdl.rb
+- lib/tdl/auto_script/tmp/axis_uncompress_A1_sdl.rb
+- lib/tdl/auto_script/tmp/axis_valve_sdl.rb
+- lib/tdl/auto_script/tmp/axis_valve_with_pipe_sdl.rb
+- lib/tdl/auto_script/tmp/axis_vector_slaver_empty_sdl.rb
+- lib/tdl/auto_script/tmp/axis_width_combin_A1_sdl.rb
+- lib/tdl/auto_script/tmp/axis_width_convert_sdl.rb
+- lib/tdl/auto_script/tmp/axis_width_destruct_sdl.rb
+- lib/tdl/auto_script/tmp/bits_decode_nc_verb_sdl.rb
+- lib/tdl/auto_script/tmp/bits_decode_verb_sdl.rb
+- lib/tdl/auto_script/tmp/clock_rst_verb_sdl.rb
+- lib/tdl/auto_script/tmp/clock_rst_verc_sdl.rb
+- lib/tdl/auto_script/tmp/common_fifo_sdl.rb
+- lib/tdl/auto_script/tmp/data_c_cache_sdl.rb
+- lib/tdl/auto_script/tmp/data_c_pipe_force_vld_bind_data_sdl.rb
+- lib/tdl/auto_script/tmp/data_c_pipe_sync_sdl.rb
+- lib/tdl/auto_script/tmp/data_inf_c_intc_S2M_sdl.rb
+- lib/tdl/auto_script/tmp/data_inf_c_planer_A1_sdl.rb
+- lib/tdl/auto_script/tmp/data_mirrors_sdl.rb
+- lib/tdl/auto_script/tmp/data_valve_sdl.rb
+- lib/tdl/auto_script/tmp/ethernet_wrapper_sdl.rb
+- lib/tdl/auto_script/tmp/full_axi4_to_axis_partition_wr_rd_sdl.rb
+- lib/tdl/auto_script/tmp/full_axi4_to_axis_sdl.rb
+- lib/tdl/auto_script/tmp/gen_big_field_table_sdl.rb
+- lib/tdl/auto_script/tmp/gen_common_frame_table_sdl.rb
+- lib/tdl/auto_script/tmp/general_tap_ack_A3_sdl.rb
+- lib/tdl/auto_script/tmp/general_tap_ack_sdl.rb
+- lib/tdl/auto_script/tmp/general_tap_no_ack_sdl.rb
+- lib/tdl/auto_script/tmp/gvi_k7_ddr3_ip_wrapper_sdl.rb
 - lib/tdl/auto_script/tmp/hdl_test_sdl.rb
+- lib/tdl/auto_script/tmp/independent_clock_fifo_sdl.rb
+- lib/tdl/auto_script/tmp/inf_time_delay_ctrl_verb_sdl.rb
+- lib/tdl/auto_script/tmp/init_mac_sdl.rb
+- lib/tdl/auto_script/tmp/ip_check_sum_sdl.rb
+- lib/tdl/auto_script/tmp/k7_ethernet_10g_api_mask_shift_sdl.rb
+- lib/tdl/auto_script/tmp/k7_ethernet_10g_api_sdl.rb
+- lib/tdl/auto_script/tmp/mac_to_file_64b_sdl.rb
+- lib/tdl/auto_script/tmp/mac_to_file_sdl.rb
+- lib/tdl/auto_script/tmp/mdio_model_sdl.rb
+- lib/tdl/auto_script/tmp/odata_pool_axi4_A2_sdl.rb
+- lib/tdl/auto_script/tmp/odata_pool_axi4_A3_sdl.rb
+- lib/tdl/auto_script/tmp/pack_ip_mac_B1_sdl.rb
+- lib/tdl/auto_script/tmp/pack_ip_mac_verb_sdl.rb
+- lib/tdl/auto_script/tmp/parse_big_field_table_A2_sdl.rb
+- lib/tdl/auto_script/tmp/parse_big_field_table_sdl.rb
+- lib/tdl/auto_script/tmp/parse_common_frame_table_A1_sdl.rb
+- lib/tdl/auto_script/tmp/sensor_array_ddr_lvds_wrapper_sdl.rb
+- lib/tdl/auto_script/tmp/sim_arp_tpu_sdl.rb
+- lib/tdl/auto_script/tmp/sim_tpu_update_file_sdl.rb
+- lib/tdl/auto_script/tmp/tcp_check_sum_sdl.rb
+- lib/tdl/auto_script/tmp/tcp_option_split_sdl.rb
+- lib/tdl/auto_script/tmp/time_step_module_A1_sdl.rb
+- lib/tdl/auto_script/tmp/tpu_simple_boot_sdl.rb
+- lib/tdl/auto_script/tmp/trigger_data_inf_c_sdl.rb
+- lib/tdl/auto_script/tmp/udp_check_sum_sdl.rb
+- lib/tdl/auto_script/tmp/udp_ctrl_set_A1_sdl.rb
+- lib/tdl/auto_script/tmp/udp_fpga_ports_route_sdl.rb
+- lib/tdl/auto_script/tmp/udp_socket_ddr_pump_A3_sdl.rb
+- lib/tdl/auto_script/tmp/udp_socket_ddr_pump_verb_sdl.rb
+- lib/tdl/auto_script/tmp/unpack_mac_ip_udp_D1_sdl.rb
+- lib/tdl/auto_script/tmp/unpack_mac_ip_udp_tcp_sdl.rb
+- lib/tdl/auto_script/tmp/unpack_mac_ip_udp_verd_sdl.rb
+- lib/tdl/auto_script/tmp/wide_axis_to_axi4_wr_sdl.rb
+- lib/tdl/auto_script/tmp/width_convert_verb_sdl.rb
+- lib/tdl/auto_script/tmp/xilinx_hdl_dpram_sdl.rb
+- lib/tdl/auto_script/tmp/xilinx_hdl_dpram_sim_sdl.rb
 - lib/tdl/axi4/axi4_combin_wr_rd_batch_auto.rb
 - lib/tdl/axi4/axi4_direct.rb
 - lib/tdl/axi4/axi4_direct_A1_auto.rb
@@ -1283,5 +1397,5 @@ requirements: []
 rubygems_version: 3.0.6
 signing_key: 
 specification_version: 4
-summary: Axi is a light weight axi library. Tdl is a hardware Construction language
+summary: Axi 是一个轻量级的AXI4库. Tdl 是一种硬件构造语言
 test_files: []

data/Gemfile.lock

@@ -1,28 +0,0 @@
-PATH
-  remote: .
-  specs:
-    axi_tdl (0.0.7)
-
-GEM
-  remote: https://rubygems.org/
-  specs:
-    coderay (1.1.3)
-    method_source (1.0.0)
-    minitest (5.14.3)
-    pry (0.14.0)
-      coderay (~> 1.1)
-      method_source (~> 1.0)
-    rake (10.5.0)
-
-PLATFORMS
-  ruby
-
-DEPENDENCIES
-  axi_tdl!
-  bundler (~> 1.16)
-  minitest
-  pry
-  rake (~> 10.0)
-
-BUNDLED WITH
-   1.17.3