aarch64 2.0.0 → 2.0.1

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (266) hide show
  1. checksums.yaml +4 -4
  2. data/README.md +1 -1
  3. data/lib/aarch64/instructions/adc.rb +1 -1
  4. data/lib/aarch64/instructions/adcs.rb +1 -1
  5. data/lib/aarch64/instructions/add_addsub_ext.rb +1 -1
  6. data/lib/aarch64/instructions/add_addsub_imm.rb +1 -1
  7. data/lib/aarch64/instructions/add_addsub_shift.rb +1 -1
  8. data/lib/aarch64/instructions/addg.rb +1 -1
  9. data/lib/aarch64/instructions/adds_addsub_ext.rb +1 -1
  10. data/lib/aarch64/instructions/adds_addsub_imm.rb +1 -1
  11. data/lib/aarch64/instructions/adds_addsub_shift.rb +1 -1
  12. data/lib/aarch64/instructions/adr.rb +7 -3
  13. data/lib/aarch64/instructions/adrp.rb +1 -1
  14. data/lib/aarch64/instructions/and_log_imm.rb +1 -1
  15. data/lib/aarch64/instructions/and_log_shift.rb +1 -1
  16. data/lib/aarch64/instructions/ands_log_imm.rb +1 -1
  17. data/lib/aarch64/instructions/ands_log_shift.rb +1 -1
  18. data/lib/aarch64/instructions/asrv.rb +1 -1
  19. data/lib/aarch64/instructions/autda.rb +1 -1
  20. data/lib/aarch64/instructions/autdb.rb +1 -1
  21. data/lib/aarch64/instructions/autia.rb +1 -1
  22. data/lib/aarch64/instructions/autib.rb +1 -1
  23. data/lib/aarch64/instructions/axflag.rb +1 -1
  24. data/lib/aarch64/instructions/b_cond.rb +2 -2
  25. data/lib/aarch64/instructions/b_uncond.rb +2 -2
  26. data/lib/aarch64/instructions/bc_cond.rb +2 -2
  27. data/lib/aarch64/instructions/bfm.rb +1 -1
  28. data/lib/aarch64/instructions/bic_log_shift.rb +1 -1
  29. data/lib/aarch64/instructions/bics.rb +1 -1
  30. data/lib/aarch64/instructions/bl.rb +2 -2
  31. data/lib/aarch64/instructions/blr.rb +1 -1
  32. data/lib/aarch64/instructions/blra.rb +1 -1
  33. data/lib/aarch64/instructions/br.rb +1 -1
  34. data/lib/aarch64/instructions/bra.rb +1 -1
  35. data/lib/aarch64/instructions/brk.rb +1 -1
  36. data/lib/aarch64/instructions/bti.rb +1 -1
  37. data/lib/aarch64/instructions/cas.rb +1 -1
  38. data/lib/aarch64/instructions/casb.rb +1 -1
  39. data/lib/aarch64/instructions/cash.rb +1 -1
  40. data/lib/aarch64/instructions/casp.rb +1 -1
  41. data/lib/aarch64/instructions/cbnz.rb +2 -2
  42. data/lib/aarch64/instructions/cbz.rb +2 -2
  43. data/lib/aarch64/instructions/ccmn_imm.rb +1 -1
  44. data/lib/aarch64/instructions/ccmn_reg.rb +1 -1
  45. data/lib/aarch64/instructions/ccmp_imm.rb +1 -1
  46. data/lib/aarch64/instructions/ccmp_reg.rb +1 -1
  47. data/lib/aarch64/instructions/cfinv.rb +1 -1
  48. data/lib/aarch64/instructions/clrex.rb +1 -1
  49. data/lib/aarch64/instructions/cls_int.rb +1 -1
  50. data/lib/aarch64/instructions/clz_int.rb +1 -1
  51. data/lib/aarch64/instructions/crc32.rb +1 -1
  52. data/lib/aarch64/instructions/crc32c.rb +1 -1
  53. data/lib/aarch64/instructions/csdb.rb +1 -1
  54. data/lib/aarch64/instructions/csel.rb +1 -1
  55. data/lib/aarch64/instructions/csinc.rb +1 -1
  56. data/lib/aarch64/instructions/csinv.rb +1 -1
  57. data/lib/aarch64/instructions/csneg.rb +1 -1
  58. data/lib/aarch64/instructions/dcps.rb +1 -1
  59. data/lib/aarch64/instructions/dgh.rb +1 -1
  60. data/lib/aarch64/instructions/dmb.rb +1 -1
  61. data/lib/aarch64/instructions/drps.rb +1 -1
  62. data/lib/aarch64/instructions/dsb.rb +1 -1
  63. data/lib/aarch64/instructions/eon.rb +1 -1
  64. data/lib/aarch64/instructions/eor_log_imm.rb +1 -1
  65. data/lib/aarch64/instructions/eor_log_shift.rb +1 -1
  66. data/lib/aarch64/instructions/eret.rb +1 -1
  67. data/lib/aarch64/instructions/ereta.rb +1 -1
  68. data/lib/aarch64/instructions/esb.rb +1 -1
  69. data/lib/aarch64/instructions/extr.rb +1 -1
  70. data/lib/aarch64/instructions/gmi.rb +1 -1
  71. data/lib/aarch64/instructions/hint.rb +1 -1
  72. data/lib/aarch64/instructions/hlt.rb +1 -1
  73. data/lib/aarch64/instructions/hvc.rb +1 -1
  74. data/lib/aarch64/instructions/irg.rb +1 -1
  75. data/lib/aarch64/instructions/isb.rb +1 -1
  76. data/lib/aarch64/instructions/ld64b.rb +1 -1
  77. data/lib/aarch64/instructions/ldadd.rb +1 -1
  78. data/lib/aarch64/instructions/ldaddb.rb +1 -1
  79. data/lib/aarch64/instructions/ldaddh.rb +1 -1
  80. data/lib/aarch64/instructions/ldapr.rb +1 -1
  81. data/lib/aarch64/instructions/ldaprb.rb +1 -1
  82. data/lib/aarch64/instructions/ldaprh.rb +1 -1
  83. data/lib/aarch64/instructions/ldapur_gen.rb +1 -1
  84. data/lib/aarch64/instructions/ldar.rb +1 -1
  85. data/lib/aarch64/instructions/ldaxp.rb +1 -1
  86. data/lib/aarch64/instructions/ldaxr.rb +1 -1
  87. data/lib/aarch64/instructions/ldclr.rb +1 -1
  88. data/lib/aarch64/instructions/ldclrb.rb +1 -1
  89. data/lib/aarch64/instructions/ldeor.rb +1 -1
  90. data/lib/aarch64/instructions/ldg.rb +1 -1
  91. data/lib/aarch64/instructions/ldgm.rb +1 -1
  92. data/lib/aarch64/instructions/ldlar.rb +1 -1
  93. data/lib/aarch64/instructions/ldnp_gen.rb +1 -1
  94. data/lib/aarch64/instructions/ldp_gen.rb +1 -1
  95. data/lib/aarch64/instructions/ldpsw.rb +1 -1
  96. data/lib/aarch64/instructions/ldr_imm_gen.rb +1 -1
  97. data/lib/aarch64/instructions/ldr_imm_unsigned.rb +1 -1
  98. data/lib/aarch64/instructions/ldr_lit_gen.rb +2 -2
  99. data/lib/aarch64/instructions/ldr_reg_gen.rb +1 -1
  100. data/lib/aarch64/instructions/ldra.rb +1 -1
  101. data/lib/aarch64/instructions/ldrb_imm.rb +1 -1
  102. data/lib/aarch64/instructions/ldrb_reg.rb +1 -1
  103. data/lib/aarch64/instructions/ldrb_unsigned.rb +1 -1
  104. data/lib/aarch64/instructions/ldrh_imm.rb +1 -1
  105. data/lib/aarch64/instructions/ldrh_reg.rb +1 -1
  106. data/lib/aarch64/instructions/ldrh_unsigned.rb +1 -1
  107. data/lib/aarch64/instructions/ldrsb_imm.rb +1 -1
  108. data/lib/aarch64/instructions/ldrsb_reg.rb +1 -1
  109. data/lib/aarch64/instructions/ldrsb_unsigned.rb +1 -1
  110. data/lib/aarch64/instructions/ldrsh_imm.rb +1 -1
  111. data/lib/aarch64/instructions/ldrsh_reg.rb +1 -1
  112. data/lib/aarch64/instructions/ldrsh_unsigned.rb +1 -1
  113. data/lib/aarch64/instructions/ldrsw_imm.rb +1 -1
  114. data/lib/aarch64/instructions/ldrsw_lit.rb +2 -2
  115. data/lib/aarch64/instructions/ldrsw_reg.rb +1 -1
  116. data/lib/aarch64/instructions/ldrsw_unsigned.rb +1 -1
  117. data/lib/aarch64/instructions/ldset.rb +1 -1
  118. data/lib/aarch64/instructions/ldsetb.rb +1 -1
  119. data/lib/aarch64/instructions/ldseth.rb +1 -1
  120. data/lib/aarch64/instructions/ldsmax.rb +1 -1
  121. data/lib/aarch64/instructions/ldsmaxb.rb +1 -1
  122. data/lib/aarch64/instructions/ldsmaxh.rb +1 -1
  123. data/lib/aarch64/instructions/ldsmin.rb +1 -1
  124. data/lib/aarch64/instructions/ldsminb.rb +1 -1
  125. data/lib/aarch64/instructions/ldsminh.rb +1 -1
  126. data/lib/aarch64/instructions/ldtr.rb +1 -1
  127. data/lib/aarch64/instructions/ldtrb.rb +1 -1
  128. data/lib/aarch64/instructions/ldtrh.rb +1 -1
  129. data/lib/aarch64/instructions/ldtrsb.rb +1 -1
  130. data/lib/aarch64/instructions/ldtrsh.rb +1 -1
  131. data/lib/aarch64/instructions/ldtrsw.rb +1 -1
  132. data/lib/aarch64/instructions/ldumax.rb +1 -1
  133. data/lib/aarch64/instructions/ldumaxb.rb +1 -1
  134. data/lib/aarch64/instructions/ldumaxh.rb +1 -1
  135. data/lib/aarch64/instructions/ldumin.rb +1 -1
  136. data/lib/aarch64/instructions/lduminb.rb +1 -1
  137. data/lib/aarch64/instructions/lduminh.rb +1 -1
  138. data/lib/aarch64/instructions/ldur_gen.rb +1 -1
  139. data/lib/aarch64/instructions/ldursb.rb +1 -1
  140. data/lib/aarch64/instructions/ldursh.rb +1 -1
  141. data/lib/aarch64/instructions/ldursw.rb +1 -1
  142. data/lib/aarch64/instructions/ldxp.rb +1 -1
  143. data/lib/aarch64/instructions/ldxr.rb +1 -1
  144. data/lib/aarch64/instructions/lslv.rb +1 -1
  145. data/lib/aarch64/instructions/lsrv.rb +1 -1
  146. data/lib/aarch64/instructions/madd.rb +1 -1
  147. data/lib/aarch64/instructions/movk.rb +1 -1
  148. data/lib/aarch64/instructions/movn.rb +1 -1
  149. data/lib/aarch64/instructions/movz.rb +1 -1
  150. data/lib/aarch64/instructions/mrs.rb +1 -1
  151. data/lib/aarch64/instructions/msr_imm.rb +1 -1
  152. data/lib/aarch64/instructions/msr_reg.rb +1 -1
  153. data/lib/aarch64/instructions/msub.rb +1 -1
  154. data/lib/aarch64/instructions/nop.rb +1 -1
  155. data/lib/aarch64/instructions/orn_log_shift.rb +1 -1
  156. data/lib/aarch64/instructions/orr_log_imm.rb +1 -1
  157. data/lib/aarch64/instructions/orr_log_shift.rb +1 -1
  158. data/lib/aarch64/instructions/pacda.rb +1 -1
  159. data/lib/aarch64/instructions/pacdb.rb +1 -1
  160. data/lib/aarch64/instructions/pacga.rb +1 -1
  161. data/lib/aarch64/instructions/pacia.rb +1 -1
  162. data/lib/aarch64/instructions/pacia2.rb +1 -1
  163. data/lib/aarch64/instructions/pacib.rb +1 -1
  164. data/lib/aarch64/instructions/prfm_imm.rb +1 -1
  165. data/lib/aarch64/instructions/prfm_lit.rb +2 -2
  166. data/lib/aarch64/instructions/prfm_reg.rb +1 -1
  167. data/lib/aarch64/instructions/prfum.rb +1 -1
  168. data/lib/aarch64/instructions/psb.rb +1 -1
  169. data/lib/aarch64/instructions/rbit_int.rb +1 -1
  170. data/lib/aarch64/instructions/ret.rb +1 -1
  171. data/lib/aarch64/instructions/reta.rb +1 -1
  172. data/lib/aarch64/instructions/rev.rb +1 -1
  173. data/lib/aarch64/instructions/rmif.rb +1 -1
  174. data/lib/aarch64/instructions/rorv.rb +1 -1
  175. data/lib/aarch64/instructions/sb.rb +1 -1
  176. data/lib/aarch64/instructions/sbc.rb +1 -1
  177. data/lib/aarch64/instructions/sbcs.rb +1 -1
  178. data/lib/aarch64/instructions/sbfm.rb +1 -1
  179. data/lib/aarch64/instructions/sdiv.rb +1 -1
  180. data/lib/aarch64/instructions/setf.rb +1 -1
  181. data/lib/aarch64/instructions/sev.rb +1 -1
  182. data/lib/aarch64/instructions/sevl.rb +1 -1
  183. data/lib/aarch64/instructions/smaddl.rb +1 -1
  184. data/lib/aarch64/instructions/smc.rb +1 -1
  185. data/lib/aarch64/instructions/smsubl.rb +1 -1
  186. data/lib/aarch64/instructions/smulh.rb +1 -1
  187. data/lib/aarch64/instructions/st2g.rb +1 -1
  188. data/lib/aarch64/instructions/st64b.rb +1 -1
  189. data/lib/aarch64/instructions/st64bv.rb +1 -1
  190. data/lib/aarch64/instructions/st64bv0.rb +1 -1
  191. data/lib/aarch64/instructions/stg.rb +1 -1
  192. data/lib/aarch64/instructions/stgm.rb +1 -1
  193. data/lib/aarch64/instructions/stgp.rb +1 -1
  194. data/lib/aarch64/instructions/stllr.rb +1 -1
  195. data/lib/aarch64/instructions/stllrb.rb +1 -1
  196. data/lib/aarch64/instructions/stllrh.rb +1 -1
  197. data/lib/aarch64/instructions/stlr.rb +1 -1
  198. data/lib/aarch64/instructions/stlrb.rb +1 -1
  199. data/lib/aarch64/instructions/stlrh.rb +1 -1
  200. data/lib/aarch64/instructions/stlur_gen.rb +1 -1
  201. data/lib/aarch64/instructions/stlxp.rb +1 -1
  202. data/lib/aarch64/instructions/stlxr.rb +1 -1
  203. data/lib/aarch64/instructions/stlxrb.rb +1 -1
  204. data/lib/aarch64/instructions/stlxrh.rb +1 -1
  205. data/lib/aarch64/instructions/stnp_gen.rb +1 -1
  206. data/lib/aarch64/instructions/stp_gen.rb +1 -1
  207. data/lib/aarch64/instructions/str_imm_gen.rb +1 -1
  208. data/lib/aarch64/instructions/str_imm_unsigned.rb +1 -1
  209. data/lib/aarch64/instructions/str_reg_gen.rb +1 -1
  210. data/lib/aarch64/instructions/strb_imm.rb +1 -1
  211. data/lib/aarch64/instructions/strb_imm_unsigned.rb +1 -1
  212. data/lib/aarch64/instructions/strb_reg.rb +1 -1
  213. data/lib/aarch64/instructions/strh_imm.rb +1 -1
  214. data/lib/aarch64/instructions/strh_imm_unsigned.rb +1 -1
  215. data/lib/aarch64/instructions/strh_reg.rb +1 -1
  216. data/lib/aarch64/instructions/sttr.rb +1 -1
  217. data/lib/aarch64/instructions/stur_gen.rb +1 -1
  218. data/lib/aarch64/instructions/stxp.rb +1 -1
  219. data/lib/aarch64/instructions/stxr.rb +1 -1
  220. data/lib/aarch64/instructions/stxrb.rb +1 -1
  221. data/lib/aarch64/instructions/stxrh.rb +1 -1
  222. data/lib/aarch64/instructions/stz2g.rb +1 -1
  223. data/lib/aarch64/instructions/stzg.rb +1 -1
  224. data/lib/aarch64/instructions/stzgm.rb +1 -1
  225. data/lib/aarch64/instructions/sub_addsub_ext.rb +1 -1
  226. data/lib/aarch64/instructions/sub_addsub_imm.rb +1 -1
  227. data/lib/aarch64/instructions/sub_addsub_shift.rb +1 -1
  228. data/lib/aarch64/instructions/subg.rb +1 -1
  229. data/lib/aarch64/instructions/subp.rb +1 -1
  230. data/lib/aarch64/instructions/subps.rb +1 -1
  231. data/lib/aarch64/instructions/subs_addsub_ext.rb +1 -1
  232. data/lib/aarch64/instructions/subs_addsub_imm.rb +1 -1
  233. data/lib/aarch64/instructions/subs_addsub_shift.rb +1 -1
  234. data/lib/aarch64/instructions/svc.rb +1 -1
  235. data/lib/aarch64/instructions/swp.rb +1 -1
  236. data/lib/aarch64/instructions/swpb.rb +1 -1
  237. data/lib/aarch64/instructions/swph.rb +1 -1
  238. data/lib/aarch64/instructions/sys.rb +1 -1
  239. data/lib/aarch64/instructions/sysl.rb +1 -1
  240. data/lib/aarch64/instructions/tbnz.rb +2 -2
  241. data/lib/aarch64/instructions/tbz.rb +2 -2
  242. data/lib/aarch64/instructions/tsb.rb +1 -1
  243. data/lib/aarch64/instructions/ubfm.rb +1 -1
  244. data/lib/aarch64/instructions/udf_perm_undef.rb +1 -1
  245. data/lib/aarch64/instructions/udiv.rb +1 -1
  246. data/lib/aarch64/instructions/umaddl.rb +1 -1
  247. data/lib/aarch64/instructions/umsubl.rb +1 -1
  248. data/lib/aarch64/instructions/umulh.rb +1 -1
  249. data/lib/aarch64/instructions/wfe.rb +1 -1
  250. data/lib/aarch64/instructions/wfet.rb +1 -1
  251. data/lib/aarch64/instructions/wfi.rb +1 -1
  252. data/lib/aarch64/instructions/wfit.rb +1 -1
  253. data/lib/aarch64/instructions/xaflag.rb +1 -1
  254. data/lib/aarch64/instructions/xpac.rb +1 -1
  255. data/lib/aarch64/instructions/xpaclri.rb +1 -1
  256. data/lib/aarch64/instructions/yield.rb +1 -1
  257. data/lib/aarch64/instructions.rb +6 -2
  258. data/lib/aarch64/parser.rb +1 -1
  259. data/lib/aarch64/parser.tab.rb +223 -215
  260. data/lib/aarch64/parser.y +41 -31
  261. data/lib/aarch64/utils.rb +12 -1
  262. data/lib/aarch64/version.rb +1 -1
  263. data/lib/aarch64.rb +22 -11
  264. data/test/base_instructions_test.rb +58 -0
  265. data/test/helper.rb +2 -0
  266. metadata +3 -3
data/lib/aarch64/parser.y CHANGED
@@ -532,11 +532,11 @@ rule
532
532
  ;
533
533
 
534
534
  load_to_w
535
- : Wd COMMA read_reg RSQ { result = TwoArg.new(val[0], val[2]) }
535
+ : Wd COMMA read_reg RSQ { result = TwoArg.new(val[0], [val[2]]) }
536
536
  ;
537
537
 
538
538
  load_to_x
539
- : Xd COMMA read_reg RSQ { result = TwoArg.new(val[0], val[2]) }
539
+ : Xd COMMA read_reg RSQ { result = TwoArg.new(val[0], [val[2]]) }
540
540
  ;
541
541
 
542
542
  w_load_insns
@@ -579,8 +579,14 @@ rule
579
579
  ;
580
580
 
581
581
  reg_reg_load
582
- : x_x_load RSQ { result = ThreeArg.new(*val[0]) }
583
- | w_w_load RSQ { result = ThreeArg.new(*val[0]) }
582
+ : x_x_load RSQ {
583
+ reg, reg1, l = *val[0]
584
+ result = ThreeArg.new(reg, reg1, [l])
585
+ }
586
+ | w_w_load RSQ {
587
+ reg, reg1, l = *val[0]
588
+ result = ThreeArg.new(reg, reg1, [l])
589
+ }
584
590
  ;
585
591
 
586
592
  ldaxp
@@ -617,11 +623,11 @@ rule
617
623
  | ldp_signed_offset BANG { result = FourArg.new(*val[0], :!) }
618
624
  | reg_reg_load COMMA imm {
619
625
  rt1, rt2, rn = *val[0].to_a
620
- result = FourArg.new(rt1, rt2, [rn], val[2])
626
+ result = FourArg.new(rt1, rt2, rn, val[2])
621
627
  }
622
628
  | reg_reg_load {
623
629
  rt1, rt2, rn = *val[0].to_a
624
- result = ThreeArg.new(rt1, rt2, [rn])
630
+ result = ThreeArg.new(rt1, rt2, rn)
625
631
  }
626
632
  ;
627
633
 
@@ -690,12 +696,12 @@ rule
690
696
 
691
697
  ldtr_32
692
698
  : Wd COMMA read_reg_imm RSQ { result = TwoArg.new(val[0], val[2]) }
693
- | Wd COMMA read_reg RSQ { result = TwoArg.new(val[0], val[2]) }
699
+ | Wd COMMA read_reg RSQ { result = TwoArg.new(val[0], [val[2]]) }
694
700
  ;
695
701
 
696
702
  ldtr_64
697
703
  : Xd COMMA read_reg_imm RSQ { result = TwoArg.new(val[0], val[2]) }
698
- | Xd COMMA read_reg RSQ { result = TwoArg.new(val[0], val[2]) }
704
+ | Xd COMMA read_reg RSQ { result = TwoArg.new(val[0], [val[2]]) }
699
705
  ;
700
706
 
701
707
  ldtr_32s
@@ -728,21 +734,21 @@ rule
728
734
  ;
729
735
 
730
736
  ldxp
731
- : LDXP Wd COMMA Wd COMMA read_reg RSQ { @asm.ldxp(val[1], val[3], val[5]) }
732
- | LDXP Xd COMMA Xd COMMA read_reg RSQ { @asm.ldxp(val[1], val[3], val[5]) }
737
+ : LDXP Wd COMMA Wd COMMA read_reg RSQ { @asm.ldxp(val[1], val[3], [val[5]]) }
738
+ | LDXP Xd COMMA Xd COMMA read_reg RSQ { @asm.ldxp(val[1], val[3], [val[5]]) }
733
739
  ;
734
740
 
735
741
  ldxr
736
- : LDXR Wd COMMA read_reg RSQ { @asm.ldxr(val[1], val[3]) }
737
- | LDXR Xd COMMA read_reg RSQ { @asm.ldxr(val[1], val[3]) }
742
+ : LDXR Wd COMMA read_reg RSQ { @asm.ldxr(val[1], [val[3]]) }
743
+ | LDXR Xd COMMA read_reg RSQ { @asm.ldxr(val[1], [val[3]]) }
738
744
  ;
739
745
 
740
746
  ldxrb
741
- : LDXRB Wd COMMA read_reg RSQ { @asm.ldxrb(val[1], val[3]) }
747
+ : LDXRB Wd COMMA read_reg RSQ { @asm.ldxrb(val[1], [val[3]]) }
742
748
  ;
743
749
 
744
750
  ldxrh
745
- : LDXRH Wd COMMA read_reg RSQ { @asm.ldxrh(val[1], val[3]) }
751
+ : LDXRH Wd COMMA read_reg RSQ { @asm.ldxrh(val[1], [val[3]]) }
746
752
  ;
747
753
 
748
754
  lsl
@@ -852,16 +858,16 @@ rule
852
858
  ;
853
859
 
854
860
  stlr
855
- : STLR Wd COMMA read_reg RSQ { @asm.stlr(val[1], val[3]) }
856
- | STLR Xd COMMA read_reg RSQ { @asm.stlr(val[1], val[3]) }
861
+ : STLR Wd COMMA read_reg RSQ { @asm.stlr(val[1], [val[3]]) }
862
+ | STLR Xd COMMA read_reg RSQ { @asm.stlr(val[1], [val[3]]) }
857
863
  ;
858
864
 
859
865
  stlrb
860
- : STLRB Wd COMMA read_reg RSQ { @asm.stlrb(val[1], val[3]) }
866
+ : STLRB Wd COMMA read_reg RSQ { @asm.stlrb(val[1], [val[3]]) }
861
867
  ;
862
868
 
863
869
  stlrh
864
- : STLRH Wd COMMA read_reg RSQ { @asm.stlrh(val[1], val[3]) }
870
+ : STLRH Wd COMMA read_reg RSQ { @asm.stlrh(val[1], [val[3]]) }
865
871
  ;
866
872
 
867
873
  smaddl_params
@@ -872,17 +878,20 @@ rule
872
878
 
873
879
  stlxp_body
874
880
  : Wd COMMA Xd COMMA Xd COMMA read_reg RSQ {
875
- result = FourArg.new(*val.values_at(0, 2, 4, 6))
881
+ wd, xd1, xd2, r = *val.values_at(0, 2, 4, 6)
882
+ result = FourArg.new(wd, xd1, xd2, [r])
876
883
  }
877
884
  | Wd COMMA Wd COMMA Wd COMMA read_reg RSQ {
878
- result = FourArg.new(*val.values_at(0, 2, 4, 6))
885
+ wd, wd1, wd2, r = *val.values_at(0, 2, 4, 6)
886
+ result = FourArg.new(wd, wd1, wd2, [r])
879
887
  }
880
888
  ;
881
889
 
882
890
  stlxr_body
883
891
  : wd_wd_read_reg
884
892
  | Wd COMMA Xd COMMA read_reg RSQ {
885
- result = ThreeArg.new(*val.values_at(0, 2, 4))
893
+ wd, xd, rd = *val.values_at(0, 2, 4)
894
+ result = ThreeArg.new(wd, xd, [rd])
886
895
  }
887
896
  ;
888
897
 
@@ -898,7 +907,8 @@ rule
898
907
  FourArg.new(*val[1].to_a, :!).apply(@asm, val[0])
899
908
  }
900
909
  | STP reg_reg_read_reg RSQ COMMA imm {
901
- FourArg.new(*val[1].to_a, val[4]).apply(@asm, val[0])
910
+ rt, rt2, rn = *val[1].to_a
911
+ FourArg.new(rt, rt2, [rn], val[4]).apply(@asm, val[0])
902
912
  }
903
913
  | STP reg_reg_read_reg RSQ {
904
914
  a, b, c = *val[1].to_a
@@ -917,7 +927,7 @@ rule
917
927
  result = ThreeArg.new(val[0], val[2], :!)
918
928
  }
919
929
  | register COMMA read_reg RSQ COMMA imm {
920
- result = ThreeArg.new(val[0], val[2], val[5])
930
+ result = ThreeArg.new(val[0], [val[2]], val[5])
921
931
  }
922
932
  | register COMMA read_reg RSQ {
923
933
  result = TwoArg.new(val[0], [val[2]])
@@ -951,7 +961,7 @@ rule
951
961
  result = TwoArg.new(val[0], [val[2]])
952
962
  }
953
963
  | Wd COMMA read_reg RSQ COMMA imm {
954
- result = ThreeArg.new(val[0], val[2], val[5])
964
+ result = ThreeArg.new(val[0], [val[2]], val[5])
955
965
  }
956
966
  ;
957
967
 
@@ -991,31 +1001,31 @@ rule
991
1001
 
992
1002
  stxp
993
1003
  : STXP wd_wd_wd COMMA read_reg RSQ {
994
- FourArg.new(*val[1].to_a, val[3]).apply(@asm, val[0])
1004
+ FourArg.new(*val[1].to_a, [val[3]]).apply(@asm, val[0])
995
1005
  }
996
1006
  | STXP wd_xd_xd COMMA read_reg RSQ {
997
- FourArg.new(*val[1].to_a, val[3]).apply(@asm, val[0])
1007
+ FourArg.new(*val[1].to_a, [val[3]]).apply(@asm, val[0])
998
1008
  }
999
1009
  ;
1000
1010
 
1001
1011
  stxr
1002
1012
  : STXR wd_wd COMMA read_reg RSQ {
1003
- ThreeArg.new(*val[1].to_a, val[3]).apply(@asm, val[0])
1013
+ ThreeArg.new(*val[1].to_a, [val[3]]).apply(@asm, val[0])
1004
1014
  }
1005
1015
  | STXR wd_xd COMMA read_reg RSQ {
1006
- ThreeArg.new(*val[1].to_a, val[3]).apply(@asm, val[0])
1016
+ ThreeArg.new(*val[1].to_a, [val[3]]).apply(@asm, val[0])
1007
1017
  }
1008
1018
  ;
1009
1019
 
1010
1020
  stxrb
1011
1021
  : STXRB wd_wd COMMA read_reg RSQ {
1012
- ThreeArg.new(*val[1].to_a, val[3]).apply(@asm, val[0])
1022
+ ThreeArg.new(*val[1].to_a, [val[3]]).apply(@asm, val[0])
1013
1023
  }
1014
1024
  ;
1015
1025
 
1016
1026
  stxrh
1017
1027
  : STXRH wd_wd COMMA read_reg RSQ {
1018
- ThreeArg.new(*val[1].to_a, val[3]).apply(@asm, val[0])
1028
+ ThreeArg.new(*val[1].to_a, [val[3]]).apply(@asm, val[0])
1019
1029
  }
1020
1030
  ;
1021
1031
 
@@ -1075,7 +1085,7 @@ rule
1075
1085
 
1076
1086
  wd_wd_read_reg
1077
1087
  : Wd COMMA Wd COMMA read_reg RSQ {
1078
- result = ThreeArg.new(*val.values_at(0, 2, 4))
1088
+ result = ThreeArg.new(val[0], val[2], [val[4]])
1079
1089
  }
1080
1090
  ;
1081
1091
 
data/lib/aarch64/utils.rb CHANGED
@@ -1,8 +1,19 @@
1
1
  # frozen_string_literal: true
2
2
 
3
3
  module AArch64
4
+ module ClassGen
5
+ def self.pos *names
6
+ Class.new do
7
+ attr_reader(*names)
8
+ sig = names.map { "#{_1}" }.join(", ")
9
+ init = names.map { "@#{_1} = #{_1}" }.join(";")
10
+ class_eval("def initialize #{sig}; #{init}; end")
11
+ end
12
+ end
13
+ end
14
+
4
15
  module Utils
5
- EncodedMask = Struct.new(:n, :immr, :imms)
16
+ EncodedMask = ClassGen.pos(:n, :immr, :imms)
6
17
 
7
18
  MAX_INT_64 = 0xFFFFFFFFFFFFFFFF
8
19
 
@@ -1,3 +1,3 @@
1
1
  module AArch64
2
- VERSION = "2.0.0"
2
+ VERSION = "2.0.1"
3
3
  end
data/lib/aarch64.rb CHANGED
@@ -6,7 +6,9 @@ require "aarch64/utils"
6
6
 
7
7
  module AArch64
8
8
  module Registers
9
- class Register < Struct.new(:to_i, :sp?, :zr?)
9
+ class Register < ClassGen.pos(:to_i, :sp, :zr)
10
+ alias sp? sp
11
+ alias zr? zr
10
12
  def integer?; false; end
11
13
  end
12
14
 
@@ -78,7 +80,7 @@ module AArch64
78
80
  end
79
81
 
80
82
  module Extends
81
- class Extend < Struct.new(:amount, :type, :name)
83
+ class Extend < ClassGen.pos(:amount, :type, :name)
82
84
  def extend?; true; end
83
85
  def shift?; false; end
84
86
  end
@@ -99,7 +101,7 @@ module AArch64
99
101
  end
100
102
 
101
103
  module Shifts
102
- class Shift < Struct.new(:amount, :type, :name)
104
+ class Shift < ClassGen.pos(:amount, :type, :name)
103
105
  def extend?; false; end
104
106
  def shift?; true; end
105
107
  end
@@ -125,6 +127,18 @@ module AArch64
125
127
  include Instructions
126
128
  include Registers
127
129
 
130
+ class Immediate
131
+ def initialize offset
132
+ @offset = offset
133
+ freeze
134
+ end
135
+
136
+ def unwrap_label
137
+ @offset
138
+ end
139
+ def immediate?; true; end
140
+ end
141
+
128
142
  class Label
129
143
  attr_reader :offset
130
144
 
@@ -146,6 +160,7 @@ module AArch64
146
160
  @offset
147
161
  end
148
162
 
163
+ def immediate?; false; end
149
164
  def integer?; false; end
150
165
  end
151
166
 
@@ -172,7 +187,7 @@ module AArch64
172
187
 
173
188
  # Puts the label at the current position. Labels can only be placed once.
174
189
  def put_label label
175
- label.set_offset(@insns.length * 4)
190
+ label.set_offset(@insns.length)
176
191
  self
177
192
  end
178
193
 
@@ -265,9 +280,7 @@ module AArch64
265
280
  end
266
281
 
267
282
  def adr xd, label
268
- if label.integer?
269
- label = wrap_offset_with_label label
270
- end
283
+ label = Immediate.new(label) if label.integer?
271
284
  a ADR.new(xd, label)
272
285
  end
273
286
 
@@ -2819,7 +2832,7 @@ module AArch64
2819
2832
  end
2820
2833
 
2821
2834
  def to_binary
2822
- @insns.map(&:encode).pack("L<*")
2835
+ @insns.map.with_index { _1.encode(_2) }.pack("L<*")
2823
2836
  end
2824
2837
 
2825
2838
  private
@@ -2830,9 +2843,7 @@ module AArch64
2830
2843
  end
2831
2844
 
2832
2845
  def wrap_offset_with_label offset
2833
- label = Label.new :none
2834
- label.set_offset offset
2835
- label
2846
+ Immediate.new(offset / 4)
2836
2847
  end
2837
2848
  end
2838
2849
  end
@@ -387,6 +387,64 @@ class BaseInstructionsTest < AArch64::Test
387
387
  assert_one_insn "b #8"
388
388
  end
389
389
 
390
+ def test_b_first
391
+ label = asm.make_label :foo
392
+ asm.b label
393
+ asm.put_label label
394
+ asm.ret
395
+
396
+ jit_buffer = StringIO.new
397
+ asm.write_to jit_buffer
398
+
399
+ b = disasm(jit_buffer.string)[0]
400
+ ret = disasm(jit_buffer.string).last
401
+ expected = ret.address - b.address
402
+ assert_equal "b", b.mnemonic
403
+ assert_equal expected, b.op_str[/[^#]+$/].to_i(16)
404
+ end
405
+
406
+ def test_b_first_with_others
407
+ label = asm.make_label :foo
408
+ asm.b label
409
+ asm.mov x0, 2
410
+ asm.mov x0, 3
411
+ asm.put_label label
412
+ asm.ret
413
+
414
+ jit_buffer = StringIO.new
415
+ asm.write_to jit_buffer
416
+
417
+ b = disasm(jit_buffer.string)[0]
418
+ ret = disasm(jit_buffer.string).last
419
+ expected = ret.address - b.address
420
+ assert_equal "b", b.mnemonic
421
+ assert_equal 12, b.op_str[/[^#]+$/].to_i(16)
422
+ assert_equal expected, b.op_str[/[^#]+$/].to_i(16)
423
+ end
424
+
425
+ def test_b_not_first
426
+ label = asm.make_label :foo
427
+ asm.mov x0, 1
428
+ asm.mov x0, 1
429
+ asm.mov x0, 1
430
+ asm.mov x0, 1
431
+ asm.b label
432
+ asm.mov x0, 2
433
+ asm.mov x0, 3
434
+ asm.put_label label
435
+ asm.ret
436
+
437
+ jit_buffer = StringIO.new
438
+ asm.write_to jit_buffer
439
+
440
+ # capstone turns the jump targets in to absolute targets,
441
+ # so to test the target is correct we need to compare the address
442
+ # of the target against the address from the branch instruction
443
+ b = disasm(jit_buffer.string).find { |insn| insn.mnemonic == "b" }
444
+ ret = disasm(jit_buffer.string).last
445
+ assert_equal ret.address, b.op_str[/[^#]+$/].to_i(16)
446
+ end
447
+
390
448
  def test_b_with_label
391
449
  label = asm.make_label :foo
392
450
  asm.b label
data/test/helper.rb CHANGED
@@ -1,3 +1,5 @@
1
+ ENV["MT_NO_PLUGINS"] = "1"
2
+
1
3
  require "aarch64"
2
4
  require "aarch64/parser"
3
5
  require "minitest/autorun"
metadata CHANGED
@@ -1,14 +1,14 @@
1
1
  --- !ruby/object:Gem::Specification
2
2
  name: aarch64
3
3
  version: !ruby/object:Gem::Version
4
- version: 2.0.0
4
+ version: 2.0.1
5
5
  platform: ruby
6
6
  authors:
7
7
  - Aaron Patterson
8
8
  autorequire:
9
9
  bindir: bin
10
10
  cert_chain: []
11
- date: 2022-08-29 00:00:00.000000000 Z
11
+ date: 2023-01-19 00:00:00.000000000 Z
12
12
  dependencies:
13
13
  - !ruby/object:Gem::Dependency
14
14
  name: hatstone
@@ -380,7 +380,7 @@ required_rubygems_version: !ruby/object:Gem::Requirement
380
380
  - !ruby/object:Gem::Version
381
381
  version: '0'
382
382
  requirements: []
383
- rubygems_version: 3.4.0.dev
383
+ rubygems_version: 3.5.0.dev
384
384
  signing_key:
385
385
  specification_version: 4
386
386
  summary: Write ARM64 assembly in Ruby!