aarch64 2.0.0 → 2.0.1

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (266) hide show
  1. checksums.yaml +4 -4
  2. data/README.md +1 -1
  3. data/lib/aarch64/instructions/adc.rb +1 -1
  4. data/lib/aarch64/instructions/adcs.rb +1 -1
  5. data/lib/aarch64/instructions/add_addsub_ext.rb +1 -1
  6. data/lib/aarch64/instructions/add_addsub_imm.rb +1 -1
  7. data/lib/aarch64/instructions/add_addsub_shift.rb +1 -1
  8. data/lib/aarch64/instructions/addg.rb +1 -1
  9. data/lib/aarch64/instructions/adds_addsub_ext.rb +1 -1
  10. data/lib/aarch64/instructions/adds_addsub_imm.rb +1 -1
  11. data/lib/aarch64/instructions/adds_addsub_shift.rb +1 -1
  12. data/lib/aarch64/instructions/adr.rb +7 -3
  13. data/lib/aarch64/instructions/adrp.rb +1 -1
  14. data/lib/aarch64/instructions/and_log_imm.rb +1 -1
  15. data/lib/aarch64/instructions/and_log_shift.rb +1 -1
  16. data/lib/aarch64/instructions/ands_log_imm.rb +1 -1
  17. data/lib/aarch64/instructions/ands_log_shift.rb +1 -1
  18. data/lib/aarch64/instructions/asrv.rb +1 -1
  19. data/lib/aarch64/instructions/autda.rb +1 -1
  20. data/lib/aarch64/instructions/autdb.rb +1 -1
  21. data/lib/aarch64/instructions/autia.rb +1 -1
  22. data/lib/aarch64/instructions/autib.rb +1 -1
  23. data/lib/aarch64/instructions/axflag.rb +1 -1
  24. data/lib/aarch64/instructions/b_cond.rb +2 -2
  25. data/lib/aarch64/instructions/b_uncond.rb +2 -2
  26. data/lib/aarch64/instructions/bc_cond.rb +2 -2
  27. data/lib/aarch64/instructions/bfm.rb +1 -1
  28. data/lib/aarch64/instructions/bic_log_shift.rb +1 -1
  29. data/lib/aarch64/instructions/bics.rb +1 -1
  30. data/lib/aarch64/instructions/bl.rb +2 -2
  31. data/lib/aarch64/instructions/blr.rb +1 -1
  32. data/lib/aarch64/instructions/blra.rb +1 -1
  33. data/lib/aarch64/instructions/br.rb +1 -1
  34. data/lib/aarch64/instructions/bra.rb +1 -1
  35. data/lib/aarch64/instructions/brk.rb +1 -1
  36. data/lib/aarch64/instructions/bti.rb +1 -1
  37. data/lib/aarch64/instructions/cas.rb +1 -1
  38. data/lib/aarch64/instructions/casb.rb +1 -1
  39. data/lib/aarch64/instructions/cash.rb +1 -1
  40. data/lib/aarch64/instructions/casp.rb +1 -1
  41. data/lib/aarch64/instructions/cbnz.rb +2 -2
  42. data/lib/aarch64/instructions/cbz.rb +2 -2
  43. data/lib/aarch64/instructions/ccmn_imm.rb +1 -1
  44. data/lib/aarch64/instructions/ccmn_reg.rb +1 -1
  45. data/lib/aarch64/instructions/ccmp_imm.rb +1 -1
  46. data/lib/aarch64/instructions/ccmp_reg.rb +1 -1
  47. data/lib/aarch64/instructions/cfinv.rb +1 -1
  48. data/lib/aarch64/instructions/clrex.rb +1 -1
  49. data/lib/aarch64/instructions/cls_int.rb +1 -1
  50. data/lib/aarch64/instructions/clz_int.rb +1 -1
  51. data/lib/aarch64/instructions/crc32.rb +1 -1
  52. data/lib/aarch64/instructions/crc32c.rb +1 -1
  53. data/lib/aarch64/instructions/csdb.rb +1 -1
  54. data/lib/aarch64/instructions/csel.rb +1 -1
  55. data/lib/aarch64/instructions/csinc.rb +1 -1
  56. data/lib/aarch64/instructions/csinv.rb +1 -1
  57. data/lib/aarch64/instructions/csneg.rb +1 -1
  58. data/lib/aarch64/instructions/dcps.rb +1 -1
  59. data/lib/aarch64/instructions/dgh.rb +1 -1
  60. data/lib/aarch64/instructions/dmb.rb +1 -1
  61. data/lib/aarch64/instructions/drps.rb +1 -1
  62. data/lib/aarch64/instructions/dsb.rb +1 -1
  63. data/lib/aarch64/instructions/eon.rb +1 -1
  64. data/lib/aarch64/instructions/eor_log_imm.rb +1 -1
  65. data/lib/aarch64/instructions/eor_log_shift.rb +1 -1
  66. data/lib/aarch64/instructions/eret.rb +1 -1
  67. data/lib/aarch64/instructions/ereta.rb +1 -1
  68. data/lib/aarch64/instructions/esb.rb +1 -1
  69. data/lib/aarch64/instructions/extr.rb +1 -1
  70. data/lib/aarch64/instructions/gmi.rb +1 -1
  71. data/lib/aarch64/instructions/hint.rb +1 -1
  72. data/lib/aarch64/instructions/hlt.rb +1 -1
  73. data/lib/aarch64/instructions/hvc.rb +1 -1
  74. data/lib/aarch64/instructions/irg.rb +1 -1
  75. data/lib/aarch64/instructions/isb.rb +1 -1
  76. data/lib/aarch64/instructions/ld64b.rb +1 -1
  77. data/lib/aarch64/instructions/ldadd.rb +1 -1
  78. data/lib/aarch64/instructions/ldaddb.rb +1 -1
  79. data/lib/aarch64/instructions/ldaddh.rb +1 -1
  80. data/lib/aarch64/instructions/ldapr.rb +1 -1
  81. data/lib/aarch64/instructions/ldaprb.rb +1 -1
  82. data/lib/aarch64/instructions/ldaprh.rb +1 -1
  83. data/lib/aarch64/instructions/ldapur_gen.rb +1 -1
  84. data/lib/aarch64/instructions/ldar.rb +1 -1
  85. data/lib/aarch64/instructions/ldaxp.rb +1 -1
  86. data/lib/aarch64/instructions/ldaxr.rb +1 -1
  87. data/lib/aarch64/instructions/ldclr.rb +1 -1
  88. data/lib/aarch64/instructions/ldclrb.rb +1 -1
  89. data/lib/aarch64/instructions/ldeor.rb +1 -1
  90. data/lib/aarch64/instructions/ldg.rb +1 -1
  91. data/lib/aarch64/instructions/ldgm.rb +1 -1
  92. data/lib/aarch64/instructions/ldlar.rb +1 -1
  93. data/lib/aarch64/instructions/ldnp_gen.rb +1 -1
  94. data/lib/aarch64/instructions/ldp_gen.rb +1 -1
  95. data/lib/aarch64/instructions/ldpsw.rb +1 -1
  96. data/lib/aarch64/instructions/ldr_imm_gen.rb +1 -1
  97. data/lib/aarch64/instructions/ldr_imm_unsigned.rb +1 -1
  98. data/lib/aarch64/instructions/ldr_lit_gen.rb +2 -2
  99. data/lib/aarch64/instructions/ldr_reg_gen.rb +1 -1
  100. data/lib/aarch64/instructions/ldra.rb +1 -1
  101. data/lib/aarch64/instructions/ldrb_imm.rb +1 -1
  102. data/lib/aarch64/instructions/ldrb_reg.rb +1 -1
  103. data/lib/aarch64/instructions/ldrb_unsigned.rb +1 -1
  104. data/lib/aarch64/instructions/ldrh_imm.rb +1 -1
  105. data/lib/aarch64/instructions/ldrh_reg.rb +1 -1
  106. data/lib/aarch64/instructions/ldrh_unsigned.rb +1 -1
  107. data/lib/aarch64/instructions/ldrsb_imm.rb +1 -1
  108. data/lib/aarch64/instructions/ldrsb_reg.rb +1 -1
  109. data/lib/aarch64/instructions/ldrsb_unsigned.rb +1 -1
  110. data/lib/aarch64/instructions/ldrsh_imm.rb +1 -1
  111. data/lib/aarch64/instructions/ldrsh_reg.rb +1 -1
  112. data/lib/aarch64/instructions/ldrsh_unsigned.rb +1 -1
  113. data/lib/aarch64/instructions/ldrsw_imm.rb +1 -1
  114. data/lib/aarch64/instructions/ldrsw_lit.rb +2 -2
  115. data/lib/aarch64/instructions/ldrsw_reg.rb +1 -1
  116. data/lib/aarch64/instructions/ldrsw_unsigned.rb +1 -1
  117. data/lib/aarch64/instructions/ldset.rb +1 -1
  118. data/lib/aarch64/instructions/ldsetb.rb +1 -1
  119. data/lib/aarch64/instructions/ldseth.rb +1 -1
  120. data/lib/aarch64/instructions/ldsmax.rb +1 -1
  121. data/lib/aarch64/instructions/ldsmaxb.rb +1 -1
  122. data/lib/aarch64/instructions/ldsmaxh.rb +1 -1
  123. data/lib/aarch64/instructions/ldsmin.rb +1 -1
  124. data/lib/aarch64/instructions/ldsminb.rb +1 -1
  125. data/lib/aarch64/instructions/ldsminh.rb +1 -1
  126. data/lib/aarch64/instructions/ldtr.rb +1 -1
  127. data/lib/aarch64/instructions/ldtrb.rb +1 -1
  128. data/lib/aarch64/instructions/ldtrh.rb +1 -1
  129. data/lib/aarch64/instructions/ldtrsb.rb +1 -1
  130. data/lib/aarch64/instructions/ldtrsh.rb +1 -1
  131. data/lib/aarch64/instructions/ldtrsw.rb +1 -1
  132. data/lib/aarch64/instructions/ldumax.rb +1 -1
  133. data/lib/aarch64/instructions/ldumaxb.rb +1 -1
  134. data/lib/aarch64/instructions/ldumaxh.rb +1 -1
  135. data/lib/aarch64/instructions/ldumin.rb +1 -1
  136. data/lib/aarch64/instructions/lduminb.rb +1 -1
  137. data/lib/aarch64/instructions/lduminh.rb +1 -1
  138. data/lib/aarch64/instructions/ldur_gen.rb +1 -1
  139. data/lib/aarch64/instructions/ldursb.rb +1 -1
  140. data/lib/aarch64/instructions/ldursh.rb +1 -1
  141. data/lib/aarch64/instructions/ldursw.rb +1 -1
  142. data/lib/aarch64/instructions/ldxp.rb +1 -1
  143. data/lib/aarch64/instructions/ldxr.rb +1 -1
  144. data/lib/aarch64/instructions/lslv.rb +1 -1
  145. data/lib/aarch64/instructions/lsrv.rb +1 -1
  146. data/lib/aarch64/instructions/madd.rb +1 -1
  147. data/lib/aarch64/instructions/movk.rb +1 -1
  148. data/lib/aarch64/instructions/movn.rb +1 -1
  149. data/lib/aarch64/instructions/movz.rb +1 -1
  150. data/lib/aarch64/instructions/mrs.rb +1 -1
  151. data/lib/aarch64/instructions/msr_imm.rb +1 -1
  152. data/lib/aarch64/instructions/msr_reg.rb +1 -1
  153. data/lib/aarch64/instructions/msub.rb +1 -1
  154. data/lib/aarch64/instructions/nop.rb +1 -1
  155. data/lib/aarch64/instructions/orn_log_shift.rb +1 -1
  156. data/lib/aarch64/instructions/orr_log_imm.rb +1 -1
  157. data/lib/aarch64/instructions/orr_log_shift.rb +1 -1
  158. data/lib/aarch64/instructions/pacda.rb +1 -1
  159. data/lib/aarch64/instructions/pacdb.rb +1 -1
  160. data/lib/aarch64/instructions/pacga.rb +1 -1
  161. data/lib/aarch64/instructions/pacia.rb +1 -1
  162. data/lib/aarch64/instructions/pacia2.rb +1 -1
  163. data/lib/aarch64/instructions/pacib.rb +1 -1
  164. data/lib/aarch64/instructions/prfm_imm.rb +1 -1
  165. data/lib/aarch64/instructions/prfm_lit.rb +2 -2
  166. data/lib/aarch64/instructions/prfm_reg.rb +1 -1
  167. data/lib/aarch64/instructions/prfum.rb +1 -1
  168. data/lib/aarch64/instructions/psb.rb +1 -1
  169. data/lib/aarch64/instructions/rbit_int.rb +1 -1
  170. data/lib/aarch64/instructions/ret.rb +1 -1
  171. data/lib/aarch64/instructions/reta.rb +1 -1
  172. data/lib/aarch64/instructions/rev.rb +1 -1
  173. data/lib/aarch64/instructions/rmif.rb +1 -1
  174. data/lib/aarch64/instructions/rorv.rb +1 -1
  175. data/lib/aarch64/instructions/sb.rb +1 -1
  176. data/lib/aarch64/instructions/sbc.rb +1 -1
  177. data/lib/aarch64/instructions/sbcs.rb +1 -1
  178. data/lib/aarch64/instructions/sbfm.rb +1 -1
  179. data/lib/aarch64/instructions/sdiv.rb +1 -1
  180. data/lib/aarch64/instructions/setf.rb +1 -1
  181. data/lib/aarch64/instructions/sev.rb +1 -1
  182. data/lib/aarch64/instructions/sevl.rb +1 -1
  183. data/lib/aarch64/instructions/smaddl.rb +1 -1
  184. data/lib/aarch64/instructions/smc.rb +1 -1
  185. data/lib/aarch64/instructions/smsubl.rb +1 -1
  186. data/lib/aarch64/instructions/smulh.rb +1 -1
  187. data/lib/aarch64/instructions/st2g.rb +1 -1
  188. data/lib/aarch64/instructions/st64b.rb +1 -1
  189. data/lib/aarch64/instructions/st64bv.rb +1 -1
  190. data/lib/aarch64/instructions/st64bv0.rb +1 -1
  191. data/lib/aarch64/instructions/stg.rb +1 -1
  192. data/lib/aarch64/instructions/stgm.rb +1 -1
  193. data/lib/aarch64/instructions/stgp.rb +1 -1
  194. data/lib/aarch64/instructions/stllr.rb +1 -1
  195. data/lib/aarch64/instructions/stllrb.rb +1 -1
  196. data/lib/aarch64/instructions/stllrh.rb +1 -1
  197. data/lib/aarch64/instructions/stlr.rb +1 -1
  198. data/lib/aarch64/instructions/stlrb.rb +1 -1
  199. data/lib/aarch64/instructions/stlrh.rb +1 -1
  200. data/lib/aarch64/instructions/stlur_gen.rb +1 -1
  201. data/lib/aarch64/instructions/stlxp.rb +1 -1
  202. data/lib/aarch64/instructions/stlxr.rb +1 -1
  203. data/lib/aarch64/instructions/stlxrb.rb +1 -1
  204. data/lib/aarch64/instructions/stlxrh.rb +1 -1
  205. data/lib/aarch64/instructions/stnp_gen.rb +1 -1
  206. data/lib/aarch64/instructions/stp_gen.rb +1 -1
  207. data/lib/aarch64/instructions/str_imm_gen.rb +1 -1
  208. data/lib/aarch64/instructions/str_imm_unsigned.rb +1 -1
  209. data/lib/aarch64/instructions/str_reg_gen.rb +1 -1
  210. data/lib/aarch64/instructions/strb_imm.rb +1 -1
  211. data/lib/aarch64/instructions/strb_imm_unsigned.rb +1 -1
  212. data/lib/aarch64/instructions/strb_reg.rb +1 -1
  213. data/lib/aarch64/instructions/strh_imm.rb +1 -1
  214. data/lib/aarch64/instructions/strh_imm_unsigned.rb +1 -1
  215. data/lib/aarch64/instructions/strh_reg.rb +1 -1
  216. data/lib/aarch64/instructions/sttr.rb +1 -1
  217. data/lib/aarch64/instructions/stur_gen.rb +1 -1
  218. data/lib/aarch64/instructions/stxp.rb +1 -1
  219. data/lib/aarch64/instructions/stxr.rb +1 -1
  220. data/lib/aarch64/instructions/stxrb.rb +1 -1
  221. data/lib/aarch64/instructions/stxrh.rb +1 -1
  222. data/lib/aarch64/instructions/stz2g.rb +1 -1
  223. data/lib/aarch64/instructions/stzg.rb +1 -1
  224. data/lib/aarch64/instructions/stzgm.rb +1 -1
  225. data/lib/aarch64/instructions/sub_addsub_ext.rb +1 -1
  226. data/lib/aarch64/instructions/sub_addsub_imm.rb +1 -1
  227. data/lib/aarch64/instructions/sub_addsub_shift.rb +1 -1
  228. data/lib/aarch64/instructions/subg.rb +1 -1
  229. data/lib/aarch64/instructions/subp.rb +1 -1
  230. data/lib/aarch64/instructions/subps.rb +1 -1
  231. data/lib/aarch64/instructions/subs_addsub_ext.rb +1 -1
  232. data/lib/aarch64/instructions/subs_addsub_imm.rb +1 -1
  233. data/lib/aarch64/instructions/subs_addsub_shift.rb +1 -1
  234. data/lib/aarch64/instructions/svc.rb +1 -1
  235. data/lib/aarch64/instructions/swp.rb +1 -1
  236. data/lib/aarch64/instructions/swpb.rb +1 -1
  237. data/lib/aarch64/instructions/swph.rb +1 -1
  238. data/lib/aarch64/instructions/sys.rb +1 -1
  239. data/lib/aarch64/instructions/sysl.rb +1 -1
  240. data/lib/aarch64/instructions/tbnz.rb +2 -2
  241. data/lib/aarch64/instructions/tbz.rb +2 -2
  242. data/lib/aarch64/instructions/tsb.rb +1 -1
  243. data/lib/aarch64/instructions/ubfm.rb +1 -1
  244. data/lib/aarch64/instructions/udf_perm_undef.rb +1 -1
  245. data/lib/aarch64/instructions/udiv.rb +1 -1
  246. data/lib/aarch64/instructions/umaddl.rb +1 -1
  247. data/lib/aarch64/instructions/umsubl.rb +1 -1
  248. data/lib/aarch64/instructions/umulh.rb +1 -1
  249. data/lib/aarch64/instructions/wfe.rb +1 -1
  250. data/lib/aarch64/instructions/wfet.rb +1 -1
  251. data/lib/aarch64/instructions/wfi.rb +1 -1
  252. data/lib/aarch64/instructions/wfit.rb +1 -1
  253. data/lib/aarch64/instructions/xaflag.rb +1 -1
  254. data/lib/aarch64/instructions/xpac.rb +1 -1
  255. data/lib/aarch64/instructions/xpaclri.rb +1 -1
  256. data/lib/aarch64/instructions/yield.rb +1 -1
  257. data/lib/aarch64/instructions.rb +6 -2
  258. data/lib/aarch64/parser.rb +1 -1
  259. data/lib/aarch64/parser.tab.rb +223 -215
  260. data/lib/aarch64/parser.y +41 -31
  261. data/lib/aarch64/utils.rb +12 -1
  262. data/lib/aarch64/version.rb +1 -1
  263. data/lib/aarch64.rb +22 -11
  264. data/test/base_instructions_test.rb +58 -0
  265. data/test/helper.rb +2 -0
  266. metadata +3 -3
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data/README.md CHANGED
@@ -50,7 +50,7 @@ asm.movk AArch64::Registers::X0, 0xF00D, lsl: 16
50
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  asm.ret
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52
52
  # Write the instructions to a JIT buffer
53
- jit_buffer.writable!
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+ jit_buffer.writeable!
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  asm.write_to jit_buffer
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  jit_buffer.executable!
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56
 
@@ -12,7 +12,7 @@ module AArch64
12
12
  @sf = check_mask(sf, 0x01)
13
13
  end
14
14
 
15
- def encode
15
+ def encode _
16
16
  ADC(@sf, @rm, @rn, @rd)
17
17
  end
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18
 
@@ -11,7 +11,7 @@ module AArch64
11
11
  @sf = check_mask(sf, 0x01)
12
12
  end
13
13
 
14
- def encode
14
+ def encode _
15
15
  ADCS(@sf, @rm, @rn, @rd)
16
16
  end
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@@ -14,7 +14,7 @@ module AArch64
14
14
  @sf = check_mask(sf, 0x01)
15
15
  end
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17
- def encode
17
+ def encode _
18
18
  ADD_addsub_ext(@sf, @rm, @extend, @amount, @rn, @rd)
19
19
  end
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@@ -12,7 +12,7 @@ module AArch64
12
12
  @sf = check_mask(sf, 0x01)
13
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  end
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15
- def encode
15
+ def encode _
16
16
  ADD_addsub_imm(@sf, @sh, @imm12, @rn, @rd)
17
17
  end
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@@ -14,7 +14,7 @@ module AArch64
14
14
  @sf = check_mask(sf, 0x01)
15
15
  end
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17
- def encode
17
+ def encode _
18
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  ADD_addsub_shift(@sf, @shift, @xm, @amount, @xn, @xd)
19
19
  end
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@@ -11,7 +11,7 @@ module AArch64
11
11
  @imm4 = check_mask(imm4, 0x0f)
12
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  end
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14
- def encode
14
+ def encode _
15
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  ADDG(@imm6, @imm4, @xn, @xd)
16
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  end
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@@ -14,7 +14,7 @@ module AArch64
14
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  @sf = check_mask(sf, 0x01)
15
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  end
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16
 
17
- def encode
17
+ def encode _
18
18
  ADDS_addsub_ext(@sf, @m, @extend, @amount, @n, @d)
19
19
  end
20
20
 
@@ -13,7 +13,7 @@ module AArch64
13
13
  @sf = check_mask(sf, 0x01)
14
14
  end
15
15
 
16
- def encode
16
+ def encode _
17
17
  ADDS_addsub_imm(@sf, @shift, @imm, @n, @d)
18
18
  end
19
19
 
@@ -14,7 +14,7 @@ module AArch64
14
14
  @sf = check_mask(sf, 0x01)
15
15
  end
16
16
 
17
- def encode
17
+ def encode _
18
18
  ADDS_addsub_shift(@sf, @shift, @xm, @amount, @xn, @xd)
19
19
  end
20
20
 
@@ -9,9 +9,13 @@ module AArch64
9
9
  @label = label
10
10
  end
11
11
 
12
- def encode
13
- label = @label.unwrap_label
14
- ADR(label & 0x3, check_mask((label >> 2), 0x7ffff), @xd)
12
+ def encode position
13
+ label = if @label.immediate?
14
+ @label.unwrap_label
15
+ else
16
+ unwrap_label(@label, position) * 4
17
+ end
18
+ ADR(label & 0x3, check_mask(label >> 2, 0x7ffff), @xd)
15
19
  end
16
20
 
17
21
  private
@@ -9,7 +9,7 @@ module AArch64
9
9
  @label = label
10
10
  end
11
11
 
12
- def encode
12
+ def encode _
13
13
  label = @label / 4096
14
14
  ADRP(label & 0x3, check_mask(label >> 2, 0x7ffff), @xd)
15
15
  end
@@ -14,7 +14,7 @@ module AArch64
14
14
  @sf = check_mask(sf, 0x01)
15
15
  end
16
16
 
17
- def encode
17
+ def encode _
18
18
  AND_log_imm(@sf, @n, @immr, @imms, @rn, @rd)
19
19
  end
20
20
 
@@ -14,7 +14,7 @@ module AArch64
14
14
  @sf = check_mask(sf, 0x01)
15
15
  end
16
16
 
17
- def encode
17
+ def encode _
18
18
  AND_log_shift(@sf, @shift, @xm, @amount, @xn, @xd)
19
19
  end
20
20
 
@@ -14,7 +14,7 @@ module AArch64
14
14
  @sf = check_mask(sf, 0x01)
15
15
  end
16
16
 
17
- def encode
17
+ def encode _
18
18
  ANDS_log_imm(@sf, @n, @immr, @imms, @rn, @rd)
19
19
  end
20
20
 
@@ -14,7 +14,7 @@ module AArch64
14
14
  @sf = check_mask(sf, 0x01)
15
15
  end
16
16
 
17
- def encode
17
+ def encode _
18
18
  ANDS_log_shift(@sf, @shift, @xm, @amount, @xn, @xd)
19
19
  end
20
20
 
@@ -12,7 +12,7 @@ module AArch64
12
12
  @sf = check_mask(sf, 0x01)
13
13
  end
14
14
 
15
- def encode
15
+ def encode _
16
16
  ASRV(@sf, @rm, @rn, @rd)
17
17
  end
18
18
 
@@ -11,7 +11,7 @@ module AArch64
11
11
  @rn = check_mask(rn, 0x1f)
12
12
  end
13
13
 
14
- def encode
14
+ def encode _
15
15
  AUTDA(@z, @rn, @rd)
16
16
  end
17
17
 
@@ -11,7 +11,7 @@ module AArch64
11
11
  @rn = check_mask(rn, 0x1f)
12
12
  end
13
13
 
14
- def encode
14
+ def encode _
15
15
  AUTDB(@z, @rn, @rd)
16
16
  end
17
17
 
@@ -14,7 +14,7 @@ module AArch64
14
14
  @rn = check_mask(rn, 0x1f)
15
15
  end
16
16
 
17
- def encode
17
+ def encode _
18
18
  AUTIA(@z, @rn, @rd)
19
19
  end
20
20
 
@@ -14,7 +14,7 @@ module AArch64
14
14
  @rn = check_mask(rn, 0x1f)
15
15
  end
16
16
 
17
- def encode
17
+ def encode _
18
18
  AUTIB(@z, @rn, @rd)
19
19
  end
20
20
 
@@ -4,7 +4,7 @@ module AArch64
4
4
  # Convert floating-point condition flags from Arm to external format
5
5
  # AXFLAG
6
6
  class AXFLAG < Instruction
7
- def encode
7
+ def encode _
8
8
  0b1101010100_0_00_000_0100_0000_010_11111
9
9
  end
10
10
  end
@@ -9,8 +9,8 @@ module AArch64
9
9
  @label = label
10
10
  end
11
11
 
12
- def encode
13
- B_cond(check_mask(unwrap_label(@label), 0x7ffff), @cond)
12
+ def encode pos
13
+ B_cond(check_mask(unwrap_label(@label, pos), 0x7ffff), @cond)
14
14
  end
15
15
 
16
16
  private
@@ -8,8 +8,8 @@ module AArch64
8
8
  @label = label
9
9
  end
10
10
 
11
- def encode
12
- B_uncond(check_mask(unwrap_label(@label), 0x3ffffff))
11
+ def encode pos
12
+ B_uncond(check_mask(unwrap_label(@label, pos), 0x3ffffff))
13
13
  end
14
14
 
15
15
  private
@@ -9,8 +9,8 @@ module AArch64
9
9
  @label = label
10
10
  end
11
11
 
12
- def encode
13
- BC_cond(check_mask(unwrap_label(@label), 0x7ffff), @cond)
12
+ def encode pos
13
+ BC_cond(check_mask(unwrap_label(@label, pos), 0x7ffff), @cond)
14
14
  end
15
15
 
16
16
  private
@@ -13,7 +13,7 @@ module AArch64
13
13
  @sf = check_mask(sf, 0x01)
14
14
  end
15
15
 
16
- def encode
16
+ def encode _
17
17
  BFM(@sf, @sf, @immr, @imms, @n, @d)
18
18
  end
19
19
 
@@ -14,7 +14,7 @@ module AArch64
14
14
  @sf = check_mask(sf, 0x01)
15
15
  end
16
16
 
17
- def encode
17
+ def encode _
18
18
  BIC_log_shift(@sf, @shift, @m, @amount, @n, @d)
19
19
  end
20
20
 
@@ -14,7 +14,7 @@ module AArch64
14
14
  @sf = check_mask(sf, 0x01)
15
15
  end
16
16
 
17
- def encode
17
+ def encode _
18
18
  BICS(@sf, @shift, @m, @amount, @n, @d)
19
19
  end
20
20
 
@@ -8,8 +8,8 @@ module AArch64
8
8
  @label = label
9
9
  end
10
10
 
11
- def encode
12
- BL(check_mask(unwrap_label(@label), 0x3ffffff))
11
+ def encode pos
12
+ BL(check_mask(unwrap_label(@label, pos), 0x3ffffff))
13
13
  end
14
14
 
15
15
  private
@@ -8,7 +8,7 @@ module AArch64
8
8
  @n = check_mask(n, 0x1f)
9
9
  end
10
10
 
11
- def encode
11
+ def encode _
12
12
  BLR(@n)
13
13
  end
14
14
 
@@ -14,7 +14,7 @@ module AArch64
14
14
  @m = check_mask(m, 0x01)
15
15
  end
16
16
 
17
- def encode
17
+ def encode _
18
18
  BLRA(@z, @m, @rn, @rm)
19
19
  end
20
20
 
@@ -8,7 +8,7 @@ module AArch64
8
8
  @rn = check_mask(rn, 0x1f)
9
9
  end
10
10
 
11
- def encode
11
+ def encode _
12
12
  BR(@rn)
13
13
  end
14
14
 
@@ -14,7 +14,7 @@ module AArch64
14
14
  @m = check_mask(m, 0x01)
15
15
  end
16
16
 
17
- def encode
17
+ def encode _
18
18
  BRA(@z, @m, @rn, @rm)
19
19
  end
20
20
 
@@ -8,7 +8,7 @@ module AArch64
8
8
  @imm = check_mask(imm, 0xffff)
9
9
  end
10
10
 
11
- def encode
11
+ def encode _
12
12
  BRK(@imm)
13
13
  end
14
14
 
@@ -8,7 +8,7 @@ module AArch64
8
8
  @target = check_mask(target, 0x03)
9
9
  end
10
10
 
11
- def encode
11
+ def encode _
12
12
  BTI(@target)
13
13
  end
14
14
 
@@ -20,7 +20,7 @@ module AArch64
20
20
  @sf = check_mask(sf, 0x01)
21
21
  end
22
22
 
23
- def encode
23
+ def encode _
24
24
  CAS(@sf, @l, @s, @o0, @n, @t)
25
25
  end
26
26
 
@@ -15,7 +15,7 @@ module AArch64
15
15
  @o0 = check_mask(o0, 0x01)
16
16
  end
17
17
 
18
- def encode
18
+ def encode _
19
19
  CASB(@l, @rs, @o0, @rn, @rt)
20
20
  end
21
21
 
@@ -15,7 +15,7 @@ module AArch64
15
15
  @o0 = check_mask(o0, 0x01)
16
16
  end
17
17
 
18
- def encode
18
+ def encode _
19
19
  CASH(@l, @rs, @o0, @rn, @rt)
20
20
  end
21
21
 
@@ -20,7 +20,7 @@ module AArch64
20
20
  @sf = check_mask(sf, 0x01)
21
21
  end
22
22
 
23
- def encode
23
+ def encode _
24
24
  CASP(@sf, @l, @rs, @o0, @rn, @rt)
25
25
  end
26
26
 
@@ -11,8 +11,8 @@ module AArch64
11
11
  @sf = check_mask(sf, 0x1)
12
12
  end
13
13
 
14
- def encode
15
- CBNZ(@sf, check_mask(unwrap_label(@label), 0x7ffff), @rt)
14
+ def encode pos
15
+ CBNZ(@sf, check_mask(unwrap_label(@label, pos), 0x7ffff), @rt)
16
16
  end
17
17
 
18
18
  private
@@ -11,8 +11,8 @@ module AArch64
11
11
  @sf = check_mask(sf, 0x1)
12
12
  end
13
13
 
14
- def encode
15
- CBZ(@sf, check_mask(unwrap_label(@label), 0x7ffff), @rt)
14
+ def encode pos
15
+ CBZ(@sf, check_mask(unwrap_label(@label, pos), 0x7ffff), @rt)
16
16
  end
17
17
 
18
18
  private
@@ -13,7 +13,7 @@ module AArch64
13
13
  @sf = check_mask(sf, 0x01)
14
14
  end
15
15
 
16
- def encode
16
+ def encode _
17
17
  CCMN_imm(@sf, @imm, @cond, @rn, @nzcv)
18
18
  end
19
19
 
@@ -13,7 +13,7 @@ module AArch64
13
13
  @sf = check_mask(sf, 0x01)
14
14
  end
15
15
 
16
- def encode
16
+ def encode _
17
17
  CCMN_reg(@sf, @rm, @cond, @rn, @nzcv)
18
18
  end
19
19
 
@@ -13,7 +13,7 @@ module AArch64
13
13
  @sf = check_mask(sf, 0x01)
14
14
  end
15
15
 
16
- def encode
16
+ def encode _
17
17
  CCMP_imm(@sf, @imm, @cond, @rn, @nzcv)
18
18
  end
19
19
 
@@ -13,7 +13,7 @@ module AArch64
13
13
  @sf = check_mask(sf, 0x01)
14
14
  end
15
15
 
16
- def encode
16
+ def encode _
17
17
  CCMP_reg(@sf, @rm, @cond, @rn, @nzcv)
18
18
  end
19
19
 
@@ -4,7 +4,7 @@ module AArch64
4
4
  # Invert Carry Flag
5
5
  # CFINV
6
6
  class CFINV < Instruction
7
- def encode
7
+ def encode _
8
8
  0b1101010100_0_0_0_000_0100_0000_000_11111
9
9
  end
10
10
  end
@@ -8,7 +8,7 @@ module AArch64
8
8
  @imm = check_mask(imm, 0x0f)
9
9
  end
10
10
 
11
- def encode
11
+ def encode _
12
12
  CLREX(@imm)
13
13
  end
14
14
 
@@ -11,7 +11,7 @@ module AArch64
11
11
  @sf = check_mask(sf, 0x01)
12
12
  end
13
13
 
14
- def encode
14
+ def encode _
15
15
  CLS_int(@sf, @rn, @rd)
16
16
  end
17
17
 
@@ -11,7 +11,7 @@ module AArch64
11
11
  @sf = check_mask(sf, 0x01)
12
12
  end
13
13
 
14
- def encode
14
+ def encode _
15
15
  CLZ_int(@sf, @rn, @rd)
16
16
  end
17
17
 
@@ -15,7 +15,7 @@ module AArch64
15
15
  @sf = check_mask(sf, 0x01)
16
16
  end
17
17
 
18
- def encode
18
+ def encode _
19
19
  CRC32(@sf, @rm, @sz, @rn, @rd)
20
20
  end
21
21
 
@@ -15,7 +15,7 @@ module AArch64
15
15
  @sf = check_mask(sf, 0x01)
16
16
  end
17
17
 
18
- def encode
18
+ def encode _
19
19
  CRC32C(@sf, @rm, @sz, @rn, @rd)
20
20
  end
21
21
 
@@ -4,7 +4,7 @@ module AArch64
4
4
  # Consumption of Speculative Data Barrier
5
5
  # CSDB
6
6
  class CSDB < Instruction
7
- def encode
7
+ def encode _
8
8
  0b1101010100_0_00_011_0010_0010_100_11111
9
9
  end
10
10
  end
@@ -13,7 +13,7 @@ module AArch64
13
13
  @sf = check_mask(sf, 0x01)
14
14
  end
15
15
 
16
- def encode
16
+ def encode _
17
17
  CSEL @sf, @rm, @cond, @rn, @rd
18
18
  end
19
19
 
@@ -13,7 +13,7 @@ module AArch64
13
13
  @sf = check_mask(sf, 0x01)
14
14
  end
15
15
 
16
- def encode
16
+ def encode _
17
17
  CSINC(@sf, @rm, @cond, @rn, @rd)
18
18
  end
19
19
 
@@ -13,7 +13,7 @@ module AArch64
13
13
  @sf = check_mask(sf, 0x01)
14
14
  end
15
15
 
16
- def encode
16
+ def encode _
17
17
  CSINV(@sf, @rm, @cond, @rn, @rd)
18
18
  end
19
19
 
@@ -13,7 +13,7 @@ module AArch64
13
13
  @sf = check_mask(sf, 0x01)
14
14
  end
15
15
 
16
- def encode
16
+ def encode _
17
17
  CSNEG(@sf, @rm, @cond, @rn, @rd)
18
18
  end
19
19
 
@@ -9,7 +9,7 @@ module AArch64
9
9
  @ll = check_mask(ll, 0x03)
10
10
  end
11
11
 
12
- def encode
12
+ def encode _
13
13
  DCPS(@imm, @ll)
14
14
  end
15
15
 
@@ -4,7 +4,7 @@ module AArch64
4
4
  # Data Gathering Hint
5
5
  # DGH
6
6
  class DGH < Instruction
7
- def encode
7
+ def encode _
8
8
  0b1101010100_0_00_011_0010_0000_110_11111
9
9
  end
10
10
  end
@@ -8,7 +8,7 @@ module AArch64
8
8
  @imm = check_mask(imm, 0x0f)
9
9
  end
10
10
 
11
- def encode
11
+ def encode _
12
12
  DMB(@imm)
13
13
  end
14
14
 
@@ -4,7 +4,7 @@ module AArch64
4
4
  # Debug restore process state
5
5
  # DRPS
6
6
  class DRPS < Instruction
7
- def encode
7
+ def encode _
8
8
  0b1101011_0101_11111_000000_11111_00000
9
9
  end
10
10
  end
@@ -9,7 +9,7 @@ module AArch64
9
9
  @imm = check_mask(imm, 0x0f)
10
10
  end
11
11
 
12
- def encode
12
+ def encode _
13
13
  DSB(@imm)
14
14
  end
15
15