HDLRuby 3.9.5 → 3.9.7

data/ext/hruby_sim/hruby_sim_tree_calc.c

@@ -471,6 +471,43 @@ void execute_statement(Statement stmnt, int mode, Behavior behavior) {
                 }
                 break;
             }
+        case HCASEZ:
+            {
+                HCaseZ hcasez = (HCaseZ)stmnt;
+                /* Calculation the value to check. */
+                // Value value = calc_expression(hcasez->value);
+                Value value = get_value();
+                value = calc_expression(hcasez->value,value);
+                /* Tell if a casez if matched. */
+                int met = 0;
+                /* Check each case. */
+                Value cmp = get_value();
+                for(int i=0; i<hcasez->num_whens; ++i) {
+                    // cmp = equal_value_z_c(value,calc_expression(hcasez->matches[i]),
+                    //         cmp);
+                    Value match = get_value();
+                    match = calc_expression(hcasez->matches[i],match);
+                    cmp = equal_value_z_c(value,match,cmp);
+                    if (is_defined_value(cmp) && value2integer(cmp)) {
+                        /* Found the right case, execute the corresponding
+                         * statement. */
+                        execute_statement(hcasez->stmnts[i],mode,behavior);
+                        /* And remeber it. */
+                        met = 1;
+                        free_value();
+                        break;
+                    }
+                    free_value();
+                }
+                free_value();
+                free_value();
+                /* Was no case found and is there a default statement? */
+                if (!met && hcasez->defolt) {
+                    /* Yes, execute the default statement. */
+                    execute_statement(hcasez->defolt,mode,behavior);
+                }
+                break;
+            }
         case TIME_WAIT:
             {
                 /* Get the value of the delay. */

data/lib/HDLRuby/hdr_samples/case_bench.rb

@@ -1,4 +1,4 @@
-# Test the comparison operators.
+# Test the case.
 
 # A benchmark for the case statement.
 system :case_bench do

data/lib/HDLRuby/hdr_samples/logic_bench.rb

@@ -2,25 +2,25 @@
 # A benchmark for the logic operations.
 system :logic_bench do
     [3].inner :x,:y
-    [3].inner :s_not, :s_and, :s_or, :s_xor, :s_nxor
+    [3].inner :s_not, :s_and, :s_or, :s_xor, :s_eq
     
     signed[16].inner :a,:b,:shl,:shr
 
     timed do
         8.times do |i|
             8.times do |j|
-                x      <= i
-                y      <= j
-                s_not  <= ~x
-                s_and  <= x & y
-                s_or   <= x | y
-                s_xor  <= x ^ y
-                s_nxor <= (x == y)
+                x     <= i
+                y     <= j
+                s_not <= ~x
+                s_and <= x & y
+                s_or  <= x | y
+                s_xor <= x ^ y
+                s_eq  <= (x == y)
                 !10.ns
-                a      <= i
-                b      <= j
-                shl    <= (a << b)
-                shr    <= (a >> b)
+                a     <= i
+                b     <= j
+                shl   <= (a << b)
+                shr   <= (a >> b)
             end
         end
     end

data/lib/HDLRuby/hdr_samples/with_assign_to_slice.rb

@@ -0,0 +1,19 @@
+system :assign_to_slice do
+  [8].inner :reg
+
+  timed do
+    !10.ns
+    reg[1..0] <= _b00
+    !10.ns
+    reg[3..2] <= _b01
+    !10.ns
+    reg[5..4] <= _b10
+    !10.ns
+    reg[7..6] <= _b11
+    !10.ns
+    reg[3..0] <= _ha
+    !10.ns
+    reg[7..4] <= _h5
+    !10.ns
+  end
+end

data/lib/HDLRuby/hdr_samples/with_auto_connect.rb

@@ -0,0 +1,40 @@
+# A test of auto connection.
+
+
+system :adder8 do
+  [8].input :x, :y
+  [8].output :z
+
+  z <= x + y
+end
+
+system :adder do |n|
+  [n].input :x, :y
+  [n].output :s
+
+  s <= x + y
+end
+
+
+# A benchmark for testing the auto connection.
+system :auto_connect_bench do
+
+  [8].inner :x, :y, :z #, :s # For checking non-existant signal
+
+  adder8(:my_adder8).auto_connect
+  adder(8).(:my_adder).auto_connect
+
+  timed do
+    x <= 0
+    y <= 0
+    !10.ns
+    x <= x + 1
+    !10.ns
+    y <= y + 1
+    !10.ns
+    x <= x + 1
+    !10.ns
+    y <= y + 1
+    !10.ns
+  end
+end

data/lib/HDLRuby/hdr_samples/with_casez.rb

@@ -0,0 +1,35 @@
+# Test the casez statement.
+
+# A benchmark for the case statement.
+system :case_bench do
+    [8].inner :x, :z
+
+    par do
+        hcasez(x)
+        hwhen(_b0000_0000)  { z <= 0 }
+        hwhen(_b000z_0001)  { z <= 1 }
+        hwhen(_b00z0_0010)  { z <= 4 }
+        hwhen(_b00zz_0011)  { z <= 9 }
+        hwhen(_b0z00_0100)  { z <= 16 }
+        hwhen(_b0z0z_0101)  { z <= 25 }
+        hwhen(_b0zz0_0110)  { z <= 36 }
+        hwhen(_b0zzz_0111)  { z <= 49 }
+        hwhen(_bz000_1000)  { z <= 64 }
+        hwhen(_bz00z_1001)  { z <= 81 }
+        hwhen(_bz0z0_1010) { z <= 100 }
+        hwhen(_bz0zz_1011) { z <= 121 }
+        hwhen(_bzz00_1100) { z <= 144 }
+        hwhen(_bzz0z_1101) { z <= 169 }
+        hwhen(_bzzz0_1110) { z <= 196 }
+        hwhen(_bzzzz_1111) { z <= 225 }
+        helse    { z <= _zzzzzzzz }
+    end
+
+    timed do
+        !10.ns
+        20.times do |i|
+            x <= i
+            !10.ns
+        end
+    end
+end

data/lib/HDLRuby/hdr_samples/with_expr_decoder.rb

@@ -0,0 +1,38 @@
+# Test the expression decodor syntatic sugars.
+
+# A benchmark for the expression decoder.
+system :expr_decoder_bench do
+  [8].inner :x, :y, :z
+  inner :a,:b,:c, :u, :v, :w, :s
+
+  seq do
+    decoder(x,y,z).(u,[1,2,3]).(v,[1]).(w,[nil,nil,3])
+    [a,b,c] <= decoder(x,1,2,3)
+    decoder(x,y,z,:|).(s,[1,2,3])
+  end
+
+  timed do
+    !10.ns
+    x <= 0
+    y <= 1
+    z <= 2
+    !10.ns
+    x <= 0
+    y <= 1
+    z <= 3
+    !10.ns
+    x <= 1
+    y <= 2
+    z <= 0
+    !10.ns
+    x <= 1
+    y <= 2
+    z <= 3
+    !10.ns
+    x <= 2
+    !10.ns
+    x <= 3
+    !10.ns
+  end
+end
+

data/lib/HDLRuby/hdr_samples/with_expr_hif.rb

@@ -0,0 +1,34 @@
+# Test the expression if syntatic sugars.
+
+# A benchmark for the expression if.
+system :expr_if_bench do
+  [8].inner :x, :y, :z, :a, :b, :c, :d, :u, :v, :w, :s
+
+  seq do
+    u <= hif(x < y, a, b)
+    v <= hif(x < y, a).(b)
+    w <= hif(x < y, a).(x < z, b, c)
+    s <= hif(x < y, a).(x < z, b).(y < z, c, d)
+  end
+
+  timed do
+    !10.ns
+    a <= 1
+    b <= 2
+    c <= 3
+    d <= 4
+    x <= 0
+    y <= 1
+    z <= 2
+    !10.ns
+    x <= x + 1
+    !10.ns 
+    x <= x + 1
+    !10.ns
+    x <= x + 1
+    !10.ns
+    y <= x
+    !10.ns
+  end
+end
+

data/lib/HDLRuby/hdr_samples/with_hbreak.rb

@@ -0,0 +1,42 @@
+system :with_hbreak do
+
+    # The clock and reset
+    inner :clk, :rst
+
+    # A counter.
+    [8].inner :count
+
+    par(clk.posedge) do
+      hif(rst) do
+        count <= 0
+        hbreak
+      end
+      # helse { count <= count + 1 }
+      count <= count + 1
+    end
+
+
+    timed do
+        clk <= 0
+        rst <= 0
+        !10.ns
+        clk <= 1
+        !10.ns
+        clk <= 0
+        rst <= 1
+        !10.ns
+        clk <= 1
+        !10.ns
+        clk <= 0
+        rst <= 0
+        !10.ns
+        clk <= 1
+        !10.ns
+        64.times do
+            clk <= 0
+            !10.ns
+            clk <= 1
+            !10.ns
+        end
+    end
+end

data/lib/HDLRuby/hdr_samples/with_henumerable.rb

@@ -344,7 +344,7 @@ system :henmerable_checks do
 
   par(clk.posedge) do
     # hprint("}0\n")
-    vals.hzip([_h12]*8).each_with_index { |(a,b),i| res62[i] <= a+b }
+    vals.hzip([_h12]*8).heach_with_index { |(a,b),i| res62[i] <= a+b }
   end
 
   # Test enumerators of values.

data/lib/HDLRuby/hdr_samples/with_values.rb

@@ -75,5 +75,8 @@ system :with_values do
         !10.ns
         v8 <= _CST
         !10.ns
+        v8 <= _8b1
+        v16 <= _16hx
+        !10.ns
     end
 end