BOAST 1.0.7 → 1.0.8

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
checksums.yaml CHANGED
@@ -1,7 +1,7 @@
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  ---
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  SHA1:
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- data.tar.gz: 2edec679ab6ac265fb66a3190b7693b5cde5fce7
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- data.tar.gz: 76d2966d546378fa0901656711d76703218649e601534f7da7acfeae2d50e89604737f27924c97888d472ae77f7646596ed474a5fb9c0e87a608237864de0760
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+ data.tar.gz: 09b6fce380eb9daa8090d1d1c2509bda205854ebffbb24a340fe0276c57372fff1e87df67d879213d275a098f0bf787ba9e85891eed0c6bf37dde4a5036eb8ce
data/BOAST.gemspec CHANGED
@@ -1,6 +1,6 @@
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  Gem::Specification.new do |s|
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  s.name = 'BOAST'
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- s.version = "1.0.7"
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+ s.version = "1.0.8"
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  s.author = "Brice Videau"
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  s.email = "brice.videau@imag.fr"
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  s.homepage = "https://github.com/Nanosim-LIG/boast"
@@ -17,5 +17,6 @@ Gem::Specification.new do |s|
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  s.add_dependency 'os', '~> 0.9', '>=0.9.6'
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  s.add_dependency 'PAPI', '~> 0', '>=0.101'
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  s.add_dependency 'ffi', '~> 1.9', '>=1.9.3'
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+ s.add_dependency 'rgl', '~> 0.5', '>=0.5.1'
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  s.add_dependency 'rake', '>=0.9'
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  end
@@ -12,7 +12,7 @@ module BOAST
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  module PrivateStateAccessor
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- private_state_accessor :output, :lang, :architecture
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+ private_state_accessor :output, :lang, :architecture, :model, :address_size
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  private_state_accessor :default_int_size, :default_real_size
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  private_state_accessor :default_align
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  private_state_accessor :array_start
@@ -48,7 +48,7 @@ module BOAST
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  end
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- state_accessor :output, :lang, :architecture
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+ state_accessor :output, :lang, :architecture, :model, :address_size
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  state_accessor :default_int_size, :default_real_size
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  state_accessor :default_align
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  state_accessor :array_start
@@ -61,40 +61,45 @@ module BOAST
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  boolean_state_accessor :use_vla
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  boolean_state_accessor :decl_module
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- module_function
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-
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- def get_default_lang
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- lang = const_get(ENV["BOAST_LANG"]) if ENV["BOAST_LANG"]
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- return lang if lang
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- return FORTRAN
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+ default_state_getter :address_size, OS.bits/8
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+ default_state_getter :lang, FORTRAN, '"const_get(#{envs})"', :BOAST_LANG
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+ default_state_getter :model, "native"
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+ default_state_getter :debug, false
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+ default_state_getter :use_vla, false
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+ default_state_getter :replace_constants, true
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+ default_state_getter :default_int_signed, true
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+ default_state_getter :default_int_size, 4
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+ default_state_getter :default_real_size, 8
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+ default_state_getter :default_align, 1
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+ default_state_getter :indent_level, 0
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+ default_state_getter :indent_increment, 2
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+ default_state_getter :array_start, 1
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+
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+ alias use_vla_old? use_vla?
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+ class << self
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+ alias use_vla_old? use_vla?
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  end
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- def get_default_debug
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- debug = false
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- debug = ENV["DEBUG"] if ENV["DEBUG"]
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- return debug
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+ def use_vla?
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+ return false if [CL,CUDA].include?(lang)
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+ return use_vla_old?
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  end
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- def get_default_use_vla
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- use_vla = false
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- use_vla = ENV["USE_VLA"] if ENV["USE_VLA"]
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- return use_vla
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+ module_function :use_vla?
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+
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+ module_function
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+
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+ def get_default_architecture
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+ architecture = const_get(ENV["ARCHITECTURE"]) if ENV["ARCHITECTURE"]
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+ architecture = const_get(ENV["ARCH"]) if not architecture and ENV["ARCH"]
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+ return architecture if architecture
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+ return ARM if YAML::load( OS.report )["host_cpu"].match("arm")
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+ return X86
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  end
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  @@output = STDOUT
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- @@lang = get_default_lang
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- @@replace_constants = true
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- @@default_int_size = 4
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- @@default_int_signed = true
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- @@default_real_size = 8
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- @@default_align = 1
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- @@indent_level = 0
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- @@indent_increment = 2
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- @@array_start = 1
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  @@chain_code = false
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- @@architecture = X86
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- @@debug = get_default_debug
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- @@use_vla = get_default_use_vla
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+ @@architecture = get_default_architecture
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  @@decl_module = false
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  @@env = Hash::new{|h, k| h[k] = []}
@@ -0,0 +1,210 @@
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+ module BOAST
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+ X86architectures ={"pentium2"=>["MMX"],
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+ "pentium3"=>["MMX", "SSE"],
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+ "pentium3m"=>["MMX", "SSE"],
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+ "pentium-m"=>["MMX", "SSE", "SSE2"],
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+ "pentium4"=>["MMX", "SSE", "SSE2"],
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+ "pentium4m"=>["MMX", "SSE", "SSE2"],
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+ "prescott"=>["MMX", "SSE", "SSE2", "SSE3"],
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+ "nocona"=>["MMX", "SSE", "SSE2", "SSE3"],
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+ "core2"=>["MMX", "SSE", "SSE2", "SSE3", "SSSE3"],
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+ "nehalem"=>
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+ ["MMX", "SSE", "SSE2", "SSE3", "SSSE3", "SSE4.1", "SSE4.2", "POPCNT"],
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+ "westmere"=>
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+ ["MMX",
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+ "SSE",
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+ "SSE2",
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+ "SSE3",
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+ "SSSE3",
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+ "SSE4.1",
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+ "SSE4.2",
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+ "POPCNT",
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+ "AES",
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+ "PCLMUL"],
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+ "sandybridge"=>
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+ ["MMX",
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+ "SSE",
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+ "SSE2",
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+ "SSE3",
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+ "SSSE3",
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+ "SSE4.1",
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+ "SSE4.2",
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+ "POPCNT",
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+ "AVX",
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+ "AES",
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+ "PCLMUL"],
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+ "ivybridge"=>
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+ ["MMX",
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+ "SSE",
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+ "SSE2",
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+ "SSE3",
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+ "SSSE3",
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+ "SSE4.1",
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+ "SSE4.2",
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+ "POPCNT",
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+ "AVX",
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+ "AES",
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+ "PCLMUL",
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+ "FSGSBASE",
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+ "RDRND",
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+ "F16C"],
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+ "haswell"=>
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+ ["MOVBE",
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+ "MMX",
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+ "SSE",
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+ "SSE2",
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+ "SSE3",
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+ "SSSE3",
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+ "SSE4.1",
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+ "SSE4.2",
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+ "POPCNT",
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+ "AVX",
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+ "AVX2",
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+ "AES",
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+ "PCLMUL",
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+ "FSGSBASE",
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+ "RDRND",
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+ "FMA",
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+ "BMI",
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+ "BMI2",
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+ "F16C"],
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+ "broadwell"=>
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+ ["MOVBE",
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+ "MMX",
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+ "SSE",
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+ "SSE2",
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+ "SSE3",
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+ "SSSE3",
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+ "SSE4.1",
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+ "SSE4.2",
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+ "POPCNT",
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+ "AVX",
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+ "AVX2",
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+ "AES",
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+ "PCLMUL",
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+ "FSGSBASE",
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+ "RDRND",
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+ "FMA",
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+ "BMI",
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+ "BMI2",
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+ "F16C",
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+ "RDSEED",
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+ "ADCX",
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+ "PREFETCHW"],
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+ "bonnell"=>["MOVBE", "MMX", "SSE", "SSE2", "SSE3", "SSSE3"],
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+ "silvermont"=>
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+ ["MOVBE",
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+ "MMX",
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+ "SSE",
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+ "SSE2",
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+ "SSE3",
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+ "SSSE3",
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+ "SSE4.1",
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+ "SSE4.2",
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+ "POPCNT",
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+ "AES",
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+ "PCLMUL",
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+ "RDRND"],
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+ "bdver1"=>
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+ ["FMA4",
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+ "AVX",
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+ "XOP",
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+ "LWP",
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+ "AES",
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+ "PCL_MUL",
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+ "CX16",
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+ "MMX",
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+ "SSE",
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+ "SSE2",
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+ "SSE3",
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+ "SSE4A",
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+ "SSSE3",
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+ "SSE4.1",
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+ "SSE4.2",
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+ "ABM"],
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+ "bdver2"=>
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+ ["BMI",
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+ "TBM",
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+ "F16C",
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+ "FMA",
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+ "FMA4",
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+ "AVX",
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+ "XOP",
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+ "LWP",
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+ "AES",
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+ "PCL_MUL",
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+ "CX16",
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+ "MMX",
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+ "SSE",
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+ "SSE2",
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+ "SSE3",
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+ "SSE4A",
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+ "SSSE3",
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+ "SSE4.1",
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+ "SSE4.2",
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+ "ABM"],
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+ "bdver3"=>
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+ ["BMI",
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+ "TBM",
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+ "F16C",
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+ "FMA",
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+ "FMA4",
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+ "FSGSBASE",
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+ "AVX",
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+ "XOP",
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+ "LWP",
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+ "AES",
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+ "PCL_MUL",
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+ "CX16",
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+ "MMX",
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+ "SSE",
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+ "SSE2",
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+ "SSE3",
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+ "SSE4A",
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+ "SSSE3",
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+ "SSE4.1",
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+ "SSE4.2",
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+ "ABM"],
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+ "bdver4"=>
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+ ["BMI2",
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+ "TBM",
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+ "F16C",
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+ "FMA",
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+ "FMA4",
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+ "FSGSBASE",
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+ "AVX",
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+ "AVX2",
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+ "XOP",
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+ "LWP",
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+ "AES",
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+ "PCL_MUL",
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+ "CX16",
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+ "MOVBE",
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+ "MMX",
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+ "SSE",
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+ "SSE2",
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+ "SSE3",
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+ "SSE4A",
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+ "SSSE3",
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+ "SSE4.1",
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+ "SSE4.2",
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+ "ABM"],
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+ "btver1"=>["MMX", "SSE", "SSE2", "SSE3", "SSSE3", "SSE4A", "CX16", "ABM"],
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+ "btver2"=>
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+ ["MOVBE",
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+ "F16C",
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+ "BMI",
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+ "AVX",
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+ "PCL_MUL",
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+ "AES",
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+ "SSE4.2",
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+ "SSE4.1",
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+ "CX16",
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+ "ABM",
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+ "SSE4A",
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+ "SSSE3",
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+ "SSE3",
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+ "SSE2",
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+ "SSE",
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+ "MMX"]}
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+ end