yowasp-yosys 0.57.0.0.post986__py3-none-any.whl → 0.59.0.0.post1038__py3-none-any.whl

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Files changed (70) hide show
  1. yowasp_yosys/share/ecp5/ccu2c_sim.vh +61 -0
  2. yowasp_yosys/share/ecp5/cells_bb.v +1882 -751
  3. yowasp_yosys/share/ecp5/cells_sim.v +2 -457
  4. yowasp_yosys/share/ecp5/common_sim.vh +411 -0
  5. yowasp_yosys/share/gatemate/cells_bb.v +2 -2
  6. yowasp_yosys/share/gowin/brams.txt +8 -4
  7. yowasp_yosys/share/gowin/brams_map_gw5a.v +399 -0
  8. yowasp_yosys/share/gowin/cells_sim.v +0 -8
  9. yowasp_yosys/share/gowin/cells_xtra_gw1n.v +7 -0
  10. yowasp_yosys/share/gowin/cells_xtra_gw2a.v +12 -0
  11. yowasp_yosys/share/gowin/cells_xtra_gw5a.v +276 -12
  12. yowasp_yosys/share/include/backends/rtlil/rtlil_backend.h +1 -0
  13. yowasp_yosys/share/include/frontends/ast/ast.h +6 -1
  14. yowasp_yosys/share/include/kernel/bitpattern.h +1 -1
  15. yowasp_yosys/share/include/kernel/celltypes.h +19 -9
  16. yowasp_yosys/share/include/kernel/consteval.h +2 -2
  17. yowasp_yosys/share/include/kernel/constids.inc +859 -137
  18. yowasp_yosys/share/include/kernel/drivertools.h +6 -5
  19. yowasp_yosys/share/include/kernel/ffinit.h +5 -5
  20. yowasp_yosys/share/include/kernel/hashlib.h +85 -30
  21. yowasp_yosys/share/include/kernel/io.h +20 -2
  22. yowasp_yosys/share/include/kernel/log.h +102 -31
  23. yowasp_yosys/share/include/kernel/macc.h +1 -1
  24. yowasp_yosys/share/include/kernel/mem.h +4 -2
  25. yowasp_yosys/share/include/kernel/rtlil.h +520 -114
  26. yowasp_yosys/share/include/kernel/satgen.h +1 -1
  27. yowasp_yosys/share/include/kernel/threading.h +186 -0
  28. yowasp_yosys/share/include/kernel/utils.h +23 -0
  29. yowasp_yosys/share/include/kernel/yosys.h +2 -2
  30. yowasp_yosys/share/include/kernel/yosys_common.h +9 -17
  31. yowasp_yosys/share/include/passes/fsm/fsmdata.h +18 -33
  32. yowasp_yosys/share/include/passes/techmap/libparse.h +10 -6
  33. yowasp_yosys/share/lattice/cells_bb_ecp5.v +0 -198
  34. yowasp_yosys/share/lattice/cells_bb_nexus.v +10389 -0
  35. yowasp_yosys/share/lattice/cells_sim_ecp5.v +217 -0
  36. yowasp_yosys/share/lattice/cells_sim_nexus.v +1058 -0
  37. yowasp_yosys/share/lattice/common_sim.vh +1 -1
  38. yowasp_yosys/share/lattice/parse_init.vh +33 -0
  39. yowasp_yosys/share/python3/sby_core.py +3 -0
  40. yowasp_yosys/share/python3/sby_engine_abc.py +5 -2
  41. yowasp_yosys/share/python3/sby_sim.py +2 -0
  42. yowasp_yosys/share/simlib.v +34 -0
  43. yowasp_yosys/share/techmap.v +34 -2
  44. yowasp_yosys/yosys.wasm +0 -0
  45. {yowasp_yosys-0.57.0.0.post986.dist-info → yowasp_yosys-0.59.0.0.post1038.dist-info}/METADATA +1 -1
  46. {yowasp_yosys-0.57.0.0.post986.dist-info → yowasp_yosys-0.59.0.0.post1038.dist-info}/RECORD +61 -63
  47. yowasp_yosys/share/ecp5/arith_map.v +0 -90
  48. yowasp_yosys/share/ecp5/brams.txt +0 -52
  49. yowasp_yosys/share/ecp5/brams_map.v +0 -489
  50. yowasp_yosys/share/ecp5/dsp_map.v +0 -17
  51. yowasp_yosys/share/ecp5/latches_map.v +0 -11
  52. yowasp_yosys/share/lattice/cells_map.v +0 -191
  53. yowasp_yosys/share/lattice/lutrams.txt +0 -12
  54. yowasp_yosys/share/lattice/lutrams_map.v +0 -30
  55. yowasp_yosys/share/nexus/latches_map.v +0 -11
  56. /yowasp_yosys/share/{nexus/arith_map.v → lattice/arith_map_nexus.v} +0 -0
  57. /yowasp_yosys/share/{nexus/brams_map.v → lattice/brams_map_nexus.v} +0 -0
  58. /yowasp_yosys/share/{nexus/brams.txt → lattice/brams_nexus.txt} +0 -0
  59. /yowasp_yosys/share/{nexus/cells_map.v → lattice/cells_map_nexus.v} +0 -0
  60. /yowasp_yosys/share/{ecp5/cells_map.v → lattice/cells_map_trellis.v} +0 -0
  61. /yowasp_yosys/share/{nexus/dsp_map.v → lattice/dsp_map_nexus.v} +0 -0
  62. /yowasp_yosys/share/{nexus/lrams_map.v → lattice/lrams_map_nexus.v} +0 -0
  63. /yowasp_yosys/share/{nexus/lrams.txt → lattice/lrams_nexus.txt} +0 -0
  64. /yowasp_yosys/share/{nexus/lutrams_map.v → lattice/lutrams_map_nexus.v} +0 -0
  65. /yowasp_yosys/share/{ecp5/lutrams_map.v → lattice/lutrams_map_trellis.v} +0 -0
  66. /yowasp_yosys/share/{nexus/lutrams.txt → lattice/lutrams_nexus.txt} +0 -0
  67. /yowasp_yosys/share/{ecp5/lutrams.txt → lattice/lutrams_trellis.txt} +0 -0
  68. {yowasp_yosys-0.57.0.0.post986.dist-info → yowasp_yosys-0.59.0.0.post1038.dist-info}/WHEEL +0 -0
  69. {yowasp_yosys-0.57.0.0.post986.dist-info → yowasp_yosys-0.59.0.0.post1038.dist-info}/entry_points.txt +0 -0
  70. {yowasp_yosys-0.57.0.0.post986.dist-info → yowasp_yosys-0.59.0.0.post1038.dist-info}/top_level.txt +0 -0
yowasp_yosys/share/ecp5/ccu2c_sim.vh ADDED
@@ -0,0 +1,61 @@
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+ // ---------------------------------------
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+ (* abc9_box, lib_whitebox *)
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+ module CCU2C(
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+ (* abc9_carry *)
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+ input CIN,
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+ input A0, B0, C0, D0, A1, B1, C1, D1,
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+ output S0, S1,
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+ (* abc9_carry *)
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+ output COUT
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+ );
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+ parameter [15:0] INIT0 = 16'h0000;
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+ parameter [15:0] INIT1 = 16'h0000;
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+ parameter INJECT1_0 = "YES";
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+ parameter INJECT1_1 = "YES";
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+
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+ // First half
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+ wire LUT4_0, LUT2_0;
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+ LUT4 #(.INIT(INIT0)) lut4_0(.A(A0), .B(B0), .C(C0), .D(D0), .Z(LUT4_0));
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+ LUT2 #(.INIT(INIT0[3:0])) lut2_0(.A(A0), .B(B0), .Z(LUT2_0));
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+ wire gated_cin_0 = (INJECT1_0 == "YES") ? 1'b0 : CIN;
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+ assign S0 = LUT4_0 ^ gated_cin_0;
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+
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+ wire gated_lut2_0 = (INJECT1_0 == "YES") ? 1'b0 : LUT2_0;
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+ wire cout_0 = (~LUT4_0 & gated_lut2_0) | (LUT4_0 & CIN);
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+
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+ // Second half
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+ wire LUT4_1, LUT2_1;
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+ LUT4 #(.INIT(INIT1)) lut4_1(.A(A1), .B(B1), .C(C1), .D(D1), .Z(LUT4_1));
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+ LUT2 #(.INIT(INIT1[3:0])) lut2_1(.A(A1), .B(B1), .Z(LUT2_1));
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+ wire gated_cin_1 = (INJECT1_1 == "YES") ? 1'b0 : cout_0;
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+ assign S1 = LUT4_1 ^ gated_cin_1;
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+
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+ wire gated_lut2_1 = (INJECT1_1 == "YES") ? 1'b0 : LUT2_1;
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+ assign COUT = (~LUT4_1 & gated_lut2_1) | (LUT4_1 & cout_0);
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+
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+ specify
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+ (A0 => S0) = 379;
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+ (B0 => S0) = 379;
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+ (C0 => S0) = 275;
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+ (D0 => S0) = 141;
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+ (CIN => S0) = 257;
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+ (A0 => S1) = 630;
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+ (B0 => S1) = 630;
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+ (C0 => S1) = 526;
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+ (D0 => S1) = 392;
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+ (A1 => S1) = 379;
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+ (B1 => S1) = 379;
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+ (C1 => S1) = 275;
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+ (D1 => S1) = 141;
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+ (CIN => S1) = 273;
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+ (A0 => COUT) = 516;
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+ (B0 => COUT) = 516;
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+ (C0 => COUT) = 412;
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+ (D0 => COUT) = 278;
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+ (A1 => COUT) = 516;
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+ (B1 => COUT) = 516;
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+ (C1 => COUT) = 412;
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+ (D1 => COUT) = 278;
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+ (CIN => COUT) = 43;
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+ endspecify
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+ endmodule