xmos-ai-tools 1.3.2.dev180__py3-none-macosx_10_15_universal2.whl

xmos_ai_tools/runtime/include/lib_nn/api/nn_op_helper.h

@@ -0,0 +1,132 @@
+// Copyright 2020-2021 XMOS LIMITED.
+// This Software is subject to the terms of the XMOS Public Licence: Version 1.
+
+#ifndef NN_OP_HELPER_H_
+#define NN_OP_HELPER_H_
+#include <stdint.h>
+
+#include "xs3_vpu.h"
+
+/** Get address of array element.
+ *
+ * For compatibility with (non-xcore) builds with 64-bit addresses, when getting
+ * the address of an array element, the indexes should be signed, or else
+ * badness ensues.
+ *
+ * @note This macro gets the address of an array *element*. So if `V` is
+ * `int16_t`, the address is adjusted by `2*INDEX` *bytes*.
+ *
+ * @param V         Array
+ * @param INDEX     Element index within array.
+ */
+#define ADDR(V, INDEX) &(V)[((int)(INDEX))]
+
+static inline int8_t sat_s8(const int32_t acc32, const int8_t sat_lo,
+                            const int8_t sat_hi) {
+  if (acc32 > VPU_INT8_MAX) return sat_hi;
+  if (acc32 < VPU_INT8_MIN) return sat_lo;
+
+  return (int8_t)acc32;
+}
+
+static inline int16_t sat_s16(const int32_t acc32) {
+  if (acc32 >= VPU_INT16_MAX) return VPU_INT16_MAX;
+  if (acc32 <= VPU_INT16_MIN) return VPU_INT16_MIN;
+
+  return (int16_t)acc32;
+}
+
+static inline int32_t sat_s32(const int64_t acc64) {
+  if (acc64 >= VPU_INT32_MAX) return VPU_INT32_MAX;
+  if (acc64 <= VPU_INT32_MIN) return VPU_INT32_MIN;
+
+  return (int32_t)acc64;
+}
+
+// static inline void mulsat_s32(int32_t* acc32, const int8_t a, const int8_t b)
+// {
+//     int64_t acc64 = *acc32 + a*b;
+//     *acc32 = sat_s32(acc64);
+// }
+
+static inline int8_t vlsat_single_s8(int32_t acc, uint16_t shr,
+                                     const int8_t sat_lo, const int8_t sat_hi) {
+  int64_t acc64 = acc;
+  if (shr > 0) acc64 += 1 << (shr - 1);
+  return sat_s8(acc64 >> shr, sat_lo, sat_hi);
+}
+
+static inline int16_t vlsat_single_s16(int32_t acc, uint16_t shr) {
+  if (shr > 0) acc += 1 << (shr - 1);
+  return sat_s16(acc >> shr);
+}
+
+static inline int16_t vlmul_single_s16(int16_t vR, int16_t mem) {
+  int32_t p = ((int32_t)vR) * mem;
+  p = vlsat_single_s16(p, 14);
+  return (int16_t)p;
+}
+
+static inline int8_t vlmul_single_s8(int8_t vR, int8_t mem) {
+  int32_t p = ((int32_t)vR) * mem;
+  p = vlsat_single_s8(p, 6, VPU_INT8_MIN, VPU_INT8_MAX);
+  return (int8_t)p;
+}
+
+static inline int8_t vdepth8_single_s16(int16_t vR) {
+  return vlsat_single_s8(vR, 8, VPU_INT8_MIN, VPU_INT8_MAX);
+}
+
+static inline unsigned in_bounds(
+    const unsigned region_top, const unsigned region_left,
+    const unsigned region_bottom, const unsigned region_right,
+    const unsigned bounds_top, const unsigned bounds_left,
+    const unsigned bounds_bottom, const unsigned bounds_right) {
+  return region_top > bounds_bottom || region_bottom < bounds_top ||
+         region_left > bounds_right || region_right < bounds_left;
+}
+
+static inline unsigned clip(const unsigned low, const unsigned val,
+                            const unsigned high) {
+  if (val <= low)
+    return low;
+  else if (val >= high)
+    return high;
+  else
+    return val;
+}
+
+static inline unsigned smax(const unsigned a, const unsigned b) {
+  return (a >= b) ? a : b;
+}
+
+static inline unsigned smin(const unsigned a, const unsigned b) {
+  return (a <= b) ? a : b;
+}
+
+static inline int ceil_log2(uint32_t a) {
+  if (a == 0) return -1;
+#ifdef __XS3A__
+  unsigned x;
+  asm("clz %0, %1" : "=r"(x) : "r"(a));
+  unsigned y = 31 - x;
+
+  //  clz(1) = 31 -> 31-31 = 0 -> 2^0 = 1
+  //  clz(2) = 30 -> 31-30 = 1 -> 2^1 = 2
+  //  clz(3) = 30 -> 31-30 = 1 -> 2^1 = 2
+  //      2^(y) <= a < 2^(y+1)
+  //  check for the lower bound, which yields a different result
+  if (a == (1 << y)) return y;
+  return y + 1;
+
+#else
+  for (unsigned i = 0; i < 31; i++) {
+    if ((((unsigned)1) << i) >= a) {
+      return i;
+    }
+  }
+#endif
+  return -1;
+}
+
+#endif  // NN_OP_HELPER_H_

xmos_ai_tools/runtime/include/lib_nn/api/nn_op_utils.h

@@ -0,0 +1,153 @@
+// Copyright 2020-2021 XMOS LIMITED.
+// This Software is subject to the terms of the XMOS Public Licence: Version 1.
+#ifndef NN_OP_UTILS_H_
+#define NN_OP_UTILS_H_
+
+#include <stdint.h>
+#include <string.h>
+
+#include "xs3_vpu.h"
+
+C_API int calculateAlignedThreadSplit(int tc, int split_size, int split_start[], int split_end[]);
+C_API int calculateThreadSplit(int tc, int split_size, int split_start[], int split_end[], int alignment);
+
+#ifdef __XC__
+extern "C" {
+#endif
+
+/** Helper for computing offsets between pixels in an 8-bit image.
+ *
+ * Gives the address delta associated with moving the specified number of
+ * rows, columns and channels through an image with the specified parameters.
+ *
+ * \param IMG           (nn_image_params_t*) Pointer to image params.
+ * \param DELTA_ROWS    (signed int) Number of rows
+ * \param DELTA_COLS    (signed int) Number of columns
+ * \param DELTA_CHANS   (signed int) Number of channels
+ */
+#define IMG_ADDRESS_VECT(IMG, DELTA_ROWS, DELTA_COLS, DELTA_CHANS)             \
+  (((DELTA_ROWS) * (IMG)->width * (IMG)->channels) +                           \
+   ((DELTA_COLS) * (IMG)->channels) + (DELTA_CHANS))
+
+/** Get the number of output channel groups given the number of output channels.
+ *
+ * This macro gives the minimum number of groups required to handle `CHANNELS`
+ * channels, which means it is effectively `(int) ceil(CHANNELS / 16.0f)`.
+ *
+ * \param CHANNELS  Number of channels
+ */
+#define OUT_CHANNEL_GROUPS(CHANNELS)                                           \
+  (((CHANNELS) + (VPU_INT8_ACC_PERIOD - 1)) >> VPU_INT8_ACC_PERIOD_LOG2)
+
+#ifdef NN_USE_REF
+#define USING_C_REFERENCE (1)
+#else
+#define USING_C_REFERENCE (0)
+#endif // NN_USE_REF
+
+#define MEMCPY_VECT_EXT_BYTES (128)
+#define MEMCPY_VECT_INT_BYTES (32)
+
+/**
+ * @brief Copy `size` bytes from `src` to `dst`.
+ *
+ * `dst` and `src` both must be word-aligned addresses.
+ *
+ * `size` need not be an integer number of words.
+ *
+ * @param dst  [out]    Destination address
+ * @param src  [in]     Source address
+ * @param byte_count [in]     Number of bytes to be copied
+ */
+void vpu_memcpy(void *dst, const void *src, size_t byte_count);
+
+/**
+ * @brief Copy `size` bytes from `src` to `dst`.
+ * Faster for copies from internal SRAM.
+ *
+ * `dst` and `src` both must be word-aligned addresses.
+ *
+ * `size` need not be an integer number of words.
+ *
+ * @param dst  [out]    Destination address
+ * @param src  [in]     Source address
+ * @param byte_count [in]     Number of bytes to be copied
+ */
+void vpu_memcpy_int(void *dst, const void *src, size_t byte_count);
+
+/**
+ * @brief Copy `size` bytes from `src` to `dst`.
+ * Faster for copies from external flash and DDR.
+ *
+ * `dst` and `src` both must be word-aligned addresses.
+ *
+ * `size` need not be an integer number of words.
+ *
+ * @param dst  [out]    Destination address
+ * @param src  [in]     Source address
+ * @param byte_count [in]     Number of bytes to be copied
+ */
+void vpu_memcpy_ext(void *dst, const void *src, size_t byte_count);
+
+/**
+ * @brief Copy `vector_count` multiples of MEMCPY_VECT_EXT_BYTES bytes
+ * from `src` to `dst`.
+ * Faster for copies from external flash and DDR.
+ *
+ * `dst` and `src` both must be word-aligned addresses.
+ *
+ * `size` need not be an integer number of words.
+ *
+ * @param dst  [out]    Destination address
+ * @param src  [in]     Source address
+ * @param vector_count [in]     Number of MEMCPY_VECT_EXT_BYTES bytes copies to
+ * be bytes to be performed
+ */
+void vpu_memcpy_vector_ext(void *dst, const void *src, int vector_count);
+
+/**
+ * @brief Copy `vector_count` multiples of MEMCPY_VECT_INT_BYTES bytes
+ * from `src` to `dst`.
+ * Faster for copies from internal SRAM.
+ *
+ * `dst` and `src` both must be word-aligned addresses.
+ *
+ * `size` need not be an integer number of words.
+ *
+ * @param dst  [out]    Destination address
+ * @param src  [in]     Source address
+ * @param vector_count [in]     Number of MEMCPY_VECT_INT_BYTES bytes copies to
+ * be bytes to be performed
+ */
+void vpu_memcpy_vector_int(void *dst, const void *src, int vector_count);
+
+/**
+ * @brief set `word_count` words from `value` to `dst`.
+ *
+ * `dst` must be a word-aligned address.
+ *
+ * @param dst  [out]    Destination address, must be word aligned
+ * @param value  [in]   Source value.
+ * @param size [in]     Number of 32 bit words to be copied
+ */
+void vpu_memset_32(void *dst, const int32_t value, const int word_count);
+
+#define VPU_MEMSET_VECTOR_WORDS XS3_VPU_VREG_WIDTH_WORDS
+
+/**
+ * @brief set `vector_count` vector words from `value` to `dst`.
+ *
+ * `dst` must be a word-aligned address.
+ *
+ * @param dst  [out]            Destination address, must be word aligned
+ * @param value  [in]           Source value.
+ * @param vector_count [in]     Number of VPU_MEMSET_VECTOR_WORDS words vectors
+ * to be copied.
+ */
+void vpu_memset_vector(void *dst, const int32_t value, const int vector_count);
+
+#ifdef __XC__
+} // extern "C"
+#endif
+
+#endif // NN_OP_UTILS_H_

xmos_ai_tools/runtime/include/lib_nn/api/nn_operator.h

@@ -0,0 +1,18 @@
+// Copyright 2020-2021 XMOS LIMITED.
+// This Software is subject to the terms of the XMOS Public Licence: Version 1.
+#ifndef NN_OPERATOR_H_
+#define NN_OPERATOR_H_
+
+#ifdef __XC__
+extern "C" {
+#endif
+
+#include "nn_layers.h"
+#include "nn_op_utils.h"
+#include "nn_pooling.h"
+
+#ifdef __XC__
+}  // extern "C"
+#endif
+
+#endif  // NN_OPERATOR_H_