siliconcompiler 0.35.2__py3-none-any.whl → 0.35.4__py3-none-any.whl
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- siliconcompiler/_metadata.py +1 -1
- siliconcompiler/apps/sc_issue.py +18 -2
- siliconcompiler/apps/smake.py +106 -100
- siliconcompiler/checklist.py +2 -1
- siliconcompiler/constraints/asic_component.py +49 -11
- siliconcompiler/constraints/asic_floorplan.py +23 -21
- siliconcompiler/constraints/asic_pins.py +55 -17
- siliconcompiler/constraints/asic_timing.py +53 -22
- siliconcompiler/constraints/fpga_timing.py +5 -6
- siliconcompiler/data/templates/replay/replay.sh.j2 +27 -14
- siliconcompiler/flowgraph.py +418 -129
- siliconcompiler/library.py +5 -4
- siliconcompiler/package/__init__.py +17 -6
- siliconcompiler/package/https.py +10 -5
- siliconcompiler/project.py +92 -33
- siliconcompiler/remote/client.py +17 -6
- siliconcompiler/scheduler/docker.py +24 -25
- siliconcompiler/scheduler/scheduler.py +284 -121
- siliconcompiler/scheduler/schedulernode.py +196 -90
- siliconcompiler/scheduler/slurm.py +113 -29
- siliconcompiler/scheduler/taskscheduler.py +0 -7
- siliconcompiler/schema/__init__.py +3 -2
- siliconcompiler/schema/_metadata.py +1 -1
- siliconcompiler/schema/baseschema.py +205 -93
- siliconcompiler/schema/editableschema.py +29 -0
- siliconcompiler/schema/namedschema.py +21 -13
- siliconcompiler/schema/parametervalue.py +14 -2
- siliconcompiler/schema/safeschema.py +18 -7
- siliconcompiler/schema_support/dependencyschema.py +4 -3
- siliconcompiler/schema_support/option.py +82 -1
- siliconcompiler/schema_support/pathschema.py +14 -15
- siliconcompiler/schema_support/record.py +5 -4
- siliconcompiler/targets/asap7_demo.py +4 -1
- siliconcompiler/tool.py +56 -29
- siliconcompiler/tools/builtin/__init__.py +2 -0
- siliconcompiler/tools/builtin/filter.py +8 -1
- siliconcompiler/tools/builtin/importfiles.py +2 -0
- siliconcompiler/tools/klayout/__init__.py +3 -0
- siliconcompiler/tools/klayout/scripts/klayout_convert_drc_db.py +1 -0
- siliconcompiler/tools/klayout/scripts/klayout_export.py +1 -0
- siliconcompiler/tools/klayout/scripts/klayout_operations.py +1 -0
- siliconcompiler/tools/klayout/scripts/klayout_show.py +2 -1
- siliconcompiler/tools/klayout/scripts/klayout_utils.py +3 -4
- siliconcompiler/tools/klayout/show.py +17 -5
- siliconcompiler/tools/openroad/__init__.py +27 -1
- siliconcompiler/tools/openroad/_apr.py +81 -4
- siliconcompiler/tools/openroad/clock_tree_synthesis.py +1 -0
- siliconcompiler/tools/openroad/global_placement.py +1 -0
- siliconcompiler/tools/openroad/init_floorplan.py +116 -7
- siliconcompiler/tools/openroad/power_grid_analysis.py +174 -0
- siliconcompiler/tools/openroad/repair_design.py +1 -0
- siliconcompiler/tools/openroad/repair_timing.py +1 -0
- siliconcompiler/tools/openroad/scripts/apr/preamble.tcl +1 -1
- siliconcompiler/tools/openroad/scripts/apr/sc_init_floorplan.tcl +42 -4
- siliconcompiler/tools/openroad/scripts/apr/sc_irdrop.tcl +146 -0
- siliconcompiler/tools/openroad/scripts/apr/sc_repair_design.tcl +1 -1
- siliconcompiler/tools/openroad/scripts/apr/sc_write_data.tcl +4 -6
- siliconcompiler/tools/openroad/scripts/common/procs.tcl +1 -1
- siliconcompiler/tools/openroad/scripts/common/reports.tcl +1 -1
- siliconcompiler/tools/openroad/scripts/rcx/sc_rcx_bench.tcl +2 -4
- siliconcompiler/tools/opensta/__init__.py +1 -1
- siliconcompiler/tools/opensta/scripts/sc_timing.tcl +17 -12
- siliconcompiler/tools/vivado/scripts/sc_bitstream.tcl +11 -0
- siliconcompiler/tools/vivado/scripts/sc_place.tcl +11 -0
- siliconcompiler/tools/vivado/scripts/sc_route.tcl +11 -0
- siliconcompiler/tools/vivado/scripts/sc_syn_fpga.tcl +10 -0
- siliconcompiler/tools/vpr/__init__.py +28 -0
- siliconcompiler/tools/yosys/prepareLib.py +7 -2
- siliconcompiler/tools/yosys/scripts/sc_screenshot.tcl +1 -1
- siliconcompiler/tools/yosys/scripts/sc_synth_asic.tcl +40 -4
- siliconcompiler/tools/yosys/scripts/sc_synth_fpga.tcl +15 -5
- siliconcompiler/tools/yosys/syn_asic.py +62 -2
- siliconcompiler/tools/yosys/syn_fpga.py +8 -0
- siliconcompiler/toolscripts/_tools.json +6 -6
- siliconcompiler/utils/__init__.py +243 -51
- siliconcompiler/utils/curation.py +89 -56
- siliconcompiler/utils/issue.py +6 -1
- siliconcompiler/utils/multiprocessing.py +35 -2
- siliconcompiler/utils/paths.py +21 -0
- siliconcompiler/utils/settings.py +141 -0
- {siliconcompiler-0.35.2.dist-info → siliconcompiler-0.35.4.dist-info}/METADATA +5 -4
- {siliconcompiler-0.35.2.dist-info → siliconcompiler-0.35.4.dist-info}/RECORD +86 -83
- {siliconcompiler-0.35.2.dist-info → siliconcompiler-0.35.4.dist-info}/WHEEL +0 -0
- {siliconcompiler-0.35.2.dist-info → siliconcompiler-0.35.4.dist-info}/entry_points.txt +0 -0
- {siliconcompiler-0.35.2.dist-info → siliconcompiler-0.35.4.dist-info}/licenses/LICENSE +0 -0
- {siliconcompiler-0.35.2.dist-info → siliconcompiler-0.35.4.dist-info}/top_level.txt +0 -0
siliconcompiler/_metadata.py
CHANGED
siliconcompiler/apps/sc_issue.py
CHANGED
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@@ -72,6 +72,21 @@ To run a testcase, use:
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if not issue.get("cmdarg", "run"):
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project: Project = Project.from_manifest(filepath=issue.get("cmdarg", "cfg"))
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# Determine abs path for build dir
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builddir = project.option.get_builddir()
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if isinstance(builddir, str) and not os.path.isabs(builddir):
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builddirname = os.path.basename(builddir)
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fullpath = os.path.dirname(os.path.abspath(issue.get("cmdarg", "cfg")))
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while True:
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if os.path.basename(fullpath) == builddirname:
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project.option.set_builddir(fullpath)
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break
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parent = os.path.dirname(fullpath)
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if parent == fullpath:
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# Reached filesystem root without finding a match
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break
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fullpath = parent
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if issue.get("arg", "step"):
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project.set("arg", "step", issue.get("arg", "step"))
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if issue.get("arg", "index"):
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# Modify run environment to point to extracted files
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builddir_key = ['option', 'builddir']
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new_builddir =
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new_builddir = os.path.abspath(
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os.path.join(test_dir, f"{os.path.basename(project.get(*builddir_key))}"))
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project.logger.info(f"Changing [{','.join(builddir_key)}] to '{new_builddir}'")
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project.set(*builddir_key, new_builddir)
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# Run task
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siliconcompiler/apps/smake.py
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"""
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import argparse
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import sys
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import tempfile
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import importlib.util
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import os.path
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from typing import Union, Tuple, Optional, Dict
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__default_source_file = "make.py"
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def __process_file(path: Union[Path, str]) -> Tuple[Dict, Optional[str], Optional[str]]:
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def __process_file(path: Union[Path, str], dir: str) -> Tuple[Dict, Optional[str], Optional[str]]:
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"""
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Dynamically loads a Python module and inspects it for runnable targets.
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if not os.path.exists(path):
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return {}, None, None
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mod_name, _ = os.path.splitext(os.path.basename(path))
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# Dynamically load the specified file as a Python module.
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sys.modules[mod_name] = make
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syspath = sys.path.copy()
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with open(os.path.join(dir, "sc_module_load.py"), "w") as f:
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f.write(f"import {mod_name} as make\n")
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sys.path.insert(0, os.getcwd())
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sys.path.insert(0, os.path.dirname(path))
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# Load newly created file
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import sc_module_load
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make = sc_module_load.make
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# Inspect the module for public functions to treat as targets.
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print(f"Error: Unable to change directory to {source_dir}")
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return 1
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if module_help:
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description += f"\n\n{module_help}\n\n"
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description += "-----------------------------------------------------------"
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parser = argparse.ArgumentParser(
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progname,
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description=description,
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formatter_class=argparse.RawDescriptionHelpFormatter)
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parser.add_argument(
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'--file', '-f',
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metavar='<file>',
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help=f'Use file as makefile, default is {__default_source_file}')
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parser.add_argument(
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'--directory', '-C',
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metavar='<directory>',
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help='Change to directory <directory> before reading the makefile.')
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parser.add_argument(
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action='version',
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version=f"%(prog)s {version}")
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dest='target',
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help='Target to execute')
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for arg, info in make_args.items():
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subparse = targetparsers.add_parser(
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arg,
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description=info['full_help'],
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formatter_class=argparse.RawDescriptionHelpFormatter)
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with tempfile.TemporaryDirectory(prefix="smake") as dir:
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sys.path.insert(0, dir)
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# Handle boolean arguments correctly.
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def str2bool(v):
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subparse.add_argument(
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dest=f'sub_{subarg}',
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type=arg_type,
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**add_args)
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print(f"Error: Unable to load makefile '{source_file}'.")
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return 1
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# --- Process the source file to discover targets ---
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if source_file else ({}, None, None)
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description += f"\n\n{module_help}\n\n"
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description += "-----------------------------------------------------------"
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call_args[arg] = args_vars[arg_key]
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# --- Set up the main argument parser ---
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parser = argparse.ArgumentParser(
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progname,
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description=description,
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formatter_class=argparse.RawDescriptionHelpFormatter)
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parser.add_argument(
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help=f'Use file as makefile, default is {__default_source_file}')
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parser.add_argument(
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metavar='<directory>',
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help='Change to directory <directory> before reading the makefile.')
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parser.add_argument(
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action='version',
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version=f"%(prog)s {version}")
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dest='target',
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metavar='<target>',
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help='Target to execute')
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arg,
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description=info['full_help'],
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formatter_class=argparse.RawDescriptionHelpFormatter)
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# Add arguments for each parameter of the target function.
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for subarg, subarg_info in info['args'].items():
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add_args["required"] = True
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else:
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if arg_type is bool:
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# Use a custom string-to-boolean converter.
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def str2bool(v):
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val = str(v).lower()
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if val in ('y', 'yes', 't', 'true', 'on', '1'):
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return True
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elif val in ('n', 'no', 'f', 'false', 'off', '0'):
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raise ValueError(f"invalid truth value {val!r}")
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subparse.add_argument(
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f'--{subarg}',
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dest=f'sub_{subarg}',
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metavar=f'<{subarg}>',
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type=arg_type,
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**add_args)
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# --- Parse arguments and execute the target ---
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args = parser.parse_args()
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target = args.target or default_arg
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if not target:
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if make_args:
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print("Error: No target specified and no default target found.")
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parser.print_help()
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else:
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print(f"Error: Unable to load makefile '{source_file}'.")
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+
return 1
|
|
260
|
+
|
|
261
|
+
if target not in make_args:
|
|
262
|
+
print(f"Error: Target '{target}' not found in '{source_file}'.")
|
|
263
|
+
return 1
|
|
264
|
+
|
|
265
|
+
# Prepare arguments to pass to the target function.
|
|
266
|
+
call_args = {}
|
|
267
|
+
args_vars = vars(args)
|
|
268
|
+
for arg in make_args[target]["args"]:
|
|
269
|
+
arg_key = f'sub_{arg}'
|
|
270
|
+
if arg_key in args_vars and args_vars[arg_key] is not None:
|
|
271
|
+
call_args[arg] = args_vars[arg_key]
|
|
272
|
+
|
|
273
|
+
# Call the selected function with its arguments.
|
|
274
|
+
make_args[target]["function"](**call_args)
|
|
269
275
|
|
|
270
276
|
return 0
|
|
271
277
|
|
siliconcompiler/checklist.py
CHANGED
|
@@ -6,6 +6,7 @@ from typing import Tuple, List, Optional, Union, Dict, Iterable
|
|
|
6
6
|
from siliconcompiler.schema import NamedSchema, EditableSchema, Parameter, Scope, BaseSchema
|
|
7
7
|
from siliconcompiler.schema.utils import trim
|
|
8
8
|
from siliconcompiler import NodeStatus, utils
|
|
9
|
+
from siliconcompiler.utils.paths import cwdirsafe
|
|
9
10
|
|
|
10
11
|
|
|
11
12
|
class Criteria(NamedSchema):
|
|
@@ -328,7 +329,7 @@ class Checklist(NamedSchema):
|
|
|
328
329
|
|
|
329
330
|
schema_root = self._parent(root=True)
|
|
330
331
|
logger = getattr(schema_root, "logger", None)
|
|
331
|
-
cwd =
|
|
332
|
+
cwd = cwdirsafe(schema_root)
|
|
332
333
|
|
|
333
334
|
assert hasattr(schema_root, "history"), f"{schema_root}"
|
|
334
335
|
|
|
@@ -1,4 +1,4 @@
|
|
|
1
|
-
from typing import Tuple, Union
|
|
1
|
+
from typing import Tuple, Union, Optional
|
|
2
2
|
|
|
3
3
|
from siliconcompiler.schema import BaseSchema, NamedSchema, EditableSchema, Parameter, \
|
|
4
4
|
PerNode, Scope
|
|
@@ -13,7 +13,7 @@ class ASICComponentConstraint(NamedSchema):
|
|
|
13
13
|
keepout halo, and rotation.
|
|
14
14
|
"""
|
|
15
15
|
|
|
16
|
-
def __init__(self, name: str = None):
|
|
16
|
+
def __init__(self, name: Optional[str] = None):
|
|
17
17
|
super().__init__()
|
|
18
18
|
self.set_name(name)
|
|
19
19
|
|
|
@@ -113,7 +113,8 @@ class ASICComponentConstraint(NamedSchema):
|
|
|
113
113
|
270 deg ccw
|
|
114
114
|
"""))
|
|
115
115
|
|
|
116
|
-
def set_placement(self, x: float, y: float,
|
|
116
|
+
def set_placement(self, x: float, y: float,
|
|
117
|
+
step: Optional[str] = None, index: Optional[Union[str, int]] = None):
|
|
117
118
|
"""
|
|
118
119
|
Sets the placement constraint for the component.
|
|
119
120
|
|
|
@@ -134,7 +135,8 @@ class ASICComponentConstraint(NamedSchema):
|
|
|
134
135
|
raise TypeError("y must be a number")
|
|
135
136
|
return self.set("placement", (x, y), step=step, index=index)
|
|
136
137
|
|
|
137
|
-
def get_placement(self, step: str = None, index: Union[str, int] = None)
|
|
138
|
+
def get_placement(self, step: Optional[str] = None, index: Optional[Union[str, int]] = None) \
|
|
139
|
+
-> Tuple[float, float]:
|
|
138
140
|
"""
|
|
139
141
|
Retrieves the current placement constraint of the component.
|
|
140
142
|
|
|
@@ -148,7 +150,8 @@ class ASICComponentConstraint(NamedSchema):
|
|
|
148
150
|
"""
|
|
149
151
|
return self.get("placement", step=step, index=index)
|
|
150
152
|
|
|
151
|
-
def set_partname(self, name: str,
|
|
153
|
+
def set_partname(self, name: str,
|
|
154
|
+
step: Optional[str] = None, index: Optional[Union[str, int]] = None):
|
|
152
155
|
"""
|
|
153
156
|
Sets the part name (cell name) constraint for the component.
|
|
154
157
|
|
|
@@ -165,7 +168,8 @@ class ASICComponentConstraint(NamedSchema):
|
|
|
165
168
|
raise ValueError("a partname is required")
|
|
166
169
|
return self.set("partname", name, step=step, index=index)
|
|
167
170
|
|
|
168
|
-
def get_partname(self, step: str = None, index: Union[str, int] = None)
|
|
171
|
+
def get_partname(self, step: Optional[str] = None, index: Optional[Union[str, int]] = None) \
|
|
172
|
+
-> str:
|
|
169
173
|
"""
|
|
170
174
|
Retrieves the current part name (cell name) constraint of the component.
|
|
171
175
|
|
|
@@ -178,7 +182,8 @@ class ASICComponentConstraint(NamedSchema):
|
|
|
178
182
|
"""
|
|
179
183
|
return self.get("partname", step=step, index=index)
|
|
180
184
|
|
|
181
|
-
def set_halo(self, x: float, y: float,
|
|
185
|
+
def set_halo(self, x: float, y: float,
|
|
186
|
+
step: Optional[str] = None, index: Optional[Union[str, int]] = None):
|
|
182
187
|
"""
|
|
183
188
|
Sets the placement keepout halo constraint around the component.
|
|
184
189
|
|
|
@@ -204,7 +209,8 @@ class ASICComponentConstraint(NamedSchema):
|
|
|
204
209
|
raise ValueError("y must be a positive number")
|
|
205
210
|
return self.set("halo", (x, y), step=step, index=index)
|
|
206
211
|
|
|
207
|
-
def get_halo(self, step: str = None, index: Union[str, int] = None)
|
|
212
|
+
def get_halo(self, step: Optional[str] = None, index: Optional[Union[str, int]] = None) \
|
|
213
|
+
-> Tuple[float, float]:
|
|
208
214
|
"""
|
|
209
215
|
Retrieves the current placement keepout halo constraint of the component.
|
|
210
216
|
|
|
@@ -218,7 +224,8 @@ class ASICComponentConstraint(NamedSchema):
|
|
|
218
224
|
"""
|
|
219
225
|
return self.get("halo", step=step, index=index)
|
|
220
226
|
|
|
221
|
-
def set_rotation(self, rotation: str,
|
|
227
|
+
def set_rotation(self, rotation: str,
|
|
228
|
+
step: Optional[str] = None, index: Optional[Union[str, int]] = None):
|
|
222
229
|
"""
|
|
223
230
|
Sets the rotation constraint for the component.
|
|
224
231
|
|
|
@@ -231,7 +238,8 @@ class ASICComponentConstraint(NamedSchema):
|
|
|
231
238
|
"""
|
|
232
239
|
return self.set("rotation", rotation, step=step, index=index)
|
|
233
240
|
|
|
234
|
-
def get_rotation(self, step: str = None, index: Union[str, int] = None)
|
|
241
|
+
def get_rotation(self, step: Optional[str] = None, index: Optional[Union[str, int]] = None) \
|
|
242
|
+
-> str:
|
|
235
243
|
"""
|
|
236
244
|
Retrieves the current rotation constraint of the component.
|
|
237
245
|
|
|
@@ -286,7 +294,7 @@ class ASICComponentConstraints(BaseSchema):
|
|
|
286
294
|
|
|
287
295
|
EditableSchema(self).insert(component.name, component, clobber=True)
|
|
288
296
|
|
|
289
|
-
def get_component(self, component: str = None):
|
|
297
|
+
def get_component(self, component: Optional[str] = None):
|
|
290
298
|
"""
|
|
291
299
|
Retrieves one or all component constraints from the configuration.
|
|
292
300
|
|
|
@@ -350,6 +358,36 @@ class ASICComponentConstraints(BaseSchema):
|
|
|
350
358
|
self.add_component(constraint)
|
|
351
359
|
return constraint
|
|
352
360
|
|
|
361
|
+
def copy_component(self, component: str, name: str, insert: bool = True) \
|
|
362
|
+
-> ASICComponentConstraint:
|
|
363
|
+
"""
|
|
364
|
+
Copies an existing component constraint, renames it, and optionally adds it to the design.
|
|
365
|
+
|
|
366
|
+
This method retrieves the component constraint identified by ``component``, creates a
|
|
367
|
+
deep copy of it, and renames the copy to ``name``. If ``insert`` is True,
|
|
368
|
+
the new constraint is immediately added to the configuration.
|
|
369
|
+
|
|
370
|
+
Args:
|
|
371
|
+
component (str): The name of the existing component constraint to be copied.
|
|
372
|
+
name (str): The name to assign to the new copied constraint.
|
|
373
|
+
insert (bool, optional): Whether to add the newly created constraint
|
|
374
|
+
to the configuration. Defaults to True.
|
|
375
|
+
|
|
376
|
+
Returns:
|
|
377
|
+
ASICComponentConstraint: The newly created copy of the component constraint.
|
|
378
|
+
|
|
379
|
+
Raises:
|
|
380
|
+
LookupError: If the source component constraint specified by ``component`` does not
|
|
381
|
+
exist.
|
|
382
|
+
"""
|
|
383
|
+
constraint = EditableSchema(self.get_component(component)).copy()
|
|
384
|
+
EditableSchema(constraint).rename(name)
|
|
385
|
+
if insert:
|
|
386
|
+
if self.valid(name):
|
|
387
|
+
raise ValueError(f"{name} already exists")
|
|
388
|
+
self.add_component(constraint)
|
|
389
|
+
return constraint
|
|
390
|
+
|
|
353
391
|
def remove_component(self, component: str) -> bool:
|
|
354
392
|
"""
|
|
355
393
|
Removes a component constraint from the design configuration.
|
|
@@ -1,4 +1,4 @@
|
|
|
1
|
-
from typing import Union, List, Tuple
|
|
1
|
+
from typing import Union, List, Tuple, Optional
|
|
2
2
|
|
|
3
3
|
from siliconcompiler.schema import BaseSchema, EditableSchema, Parameter, PerNode, Scope
|
|
4
4
|
|
|
@@ -99,9 +99,9 @@ class ASICAreaConstraint(BaseSchema):
|
|
|
99
99
|
|
|
100
100
|
def set_density(self,
|
|
101
101
|
density: float,
|
|
102
|
-
aspectratio: float = None,
|
|
103
|
-
coremargin: float = None,
|
|
104
|
-
step: str = None, index: Union[str, int] = None):
|
|
102
|
+
aspectratio: Optional[float] = None,
|
|
103
|
+
coremargin: Optional[float] = None,
|
|
104
|
+
step: Optional[str] = None, index: Optional[Union[str, int]] = None):
|
|
105
105
|
"""
|
|
106
106
|
Sets the target layout density.
|
|
107
107
|
|
|
@@ -145,7 +145,8 @@ class ASICAreaConstraint(BaseSchema):
|
|
|
145
145
|
params.append(self.set_coremargin(coremargin, step=step, index=index))
|
|
146
146
|
return params
|
|
147
147
|
|
|
148
|
-
def get_density(self, step: str = None, index: Union[str, int] = None)
|
|
148
|
+
def get_density(self, step: Optional[str] = None, index: Optional[Union[str, int]] = None) \
|
|
149
|
+
-> float:
|
|
149
150
|
"""
|
|
150
151
|
Retrieves the current target layout density.
|
|
151
152
|
|
|
@@ -162,7 +163,7 @@ class ASICAreaConstraint(BaseSchema):
|
|
|
162
163
|
|
|
163
164
|
def set_aspectratio(self,
|
|
164
165
|
aspectratio: float,
|
|
165
|
-
step: str = None, index: Union[str, int] = None):
|
|
166
|
+
step: Optional[str] = None, index: Optional[Union[str, int]] = None):
|
|
166
167
|
"""
|
|
167
168
|
Sets the layout aspect ratio.
|
|
168
169
|
|
|
@@ -192,8 +193,8 @@ class ASICAreaConstraint(BaseSchema):
|
|
|
192
193
|
|
|
193
194
|
return self.set("aspectratio", aspectratio, step=step, index=index)
|
|
194
195
|
|
|
195
|
-
def get_aspectratio(self,
|
|
196
|
-
|
|
196
|
+
def get_aspectratio(self, step: Optional[str] = None, index: Optional[Union[str, int]] = None) \
|
|
197
|
+
-> float:
|
|
197
198
|
"""
|
|
198
199
|
Retrieves the current layout aspect ratio.
|
|
199
200
|
|
|
@@ -210,7 +211,7 @@ class ASICAreaConstraint(BaseSchema):
|
|
|
210
211
|
|
|
211
212
|
def set_coremargin(self,
|
|
212
213
|
coremargin: float,
|
|
213
|
-
step: str = None, index: Union[str, int] = None):
|
|
214
|
+
step: Optional[str] = None, index: Optional[Union[str, int]] = None):
|
|
214
215
|
"""
|
|
215
216
|
Sets the core margin.
|
|
216
217
|
|
|
@@ -240,8 +241,8 @@ class ASICAreaConstraint(BaseSchema):
|
|
|
240
241
|
|
|
241
242
|
return self.set("coremargin", coremargin, step=step, index=index)
|
|
242
243
|
|
|
243
|
-
def get_coremargin(self,
|
|
244
|
-
|
|
244
|
+
def get_coremargin(self, step: Optional[str] = None, index: Optional[Union[str, int]] = None) \
|
|
245
|
+
-> float:
|
|
245
246
|
"""
|
|
246
247
|
Retrieves the current core margin.
|
|
247
248
|
|
|
@@ -259,8 +260,8 @@ class ASICAreaConstraint(BaseSchema):
|
|
|
259
260
|
def set_diearea_rectangle(self,
|
|
260
261
|
height: float,
|
|
261
262
|
width: float,
|
|
262
|
-
coremargin: Union[float, Tuple[float, float]] = None,
|
|
263
|
-
step: str = None, index: Union[str, int] = None):
|
|
263
|
+
coremargin: Optional[Union[float, Tuple[float, float]]] = None,
|
|
264
|
+
step: Optional[str] = None, index: Optional[Union[str, int]] = None):
|
|
264
265
|
"""
|
|
265
266
|
Sets the die area as a rectangle with its bottom-left corner at (0,0).
|
|
266
267
|
|
|
@@ -311,7 +312,7 @@ class ASICAreaConstraint(BaseSchema):
|
|
|
311
312
|
dieheight: float,
|
|
312
313
|
diewidth: float,
|
|
313
314
|
coremargin: Union[float, Tuple[float, float]],
|
|
314
|
-
step: str = None, index: Union[str, int] = None):
|
|
315
|
+
step: Optional[str] = None, index: Optional[Union[str, int]] = None):
|
|
315
316
|
"""
|
|
316
317
|
Sets the core area as a rectangle within a die area, based on margins.
|
|
317
318
|
|
|
@@ -378,7 +379,7 @@ class ASICAreaConstraint(BaseSchema):
|
|
|
378
379
|
|
|
379
380
|
def set_diearea(self,
|
|
380
381
|
points: List[Tuple[float, float]],
|
|
381
|
-
step: str = None, index: Union[str, int] = None):
|
|
382
|
+
step: Optional[str] = None, index: Optional[Union[str, int]] = None):
|
|
382
383
|
"""
|
|
383
384
|
Sets the die area using a list of points defining its boundary.
|
|
384
385
|
|
|
@@ -396,8 +397,8 @@ class ASICAreaConstraint(BaseSchema):
|
|
|
396
397
|
"""
|
|
397
398
|
return self.set("diearea", points, step=step, index=index)
|
|
398
399
|
|
|
399
|
-
def get_diearea(self,
|
|
400
|
-
|
|
400
|
+
def get_diearea(self, step: Optional[str] = None, index: Optional[Union[str, int]] = None) \
|
|
401
|
+
-> List[Tuple[float, float]]:
|
|
401
402
|
"""
|
|
402
403
|
Retrieves the current die area definition.
|
|
403
404
|
|
|
@@ -415,7 +416,7 @@ class ASICAreaConstraint(BaseSchema):
|
|
|
415
416
|
|
|
416
417
|
def set_corearea(self,
|
|
417
418
|
points: List[Tuple[float, float]],
|
|
418
|
-
step: str = None, index: Union[str, int] = None):
|
|
419
|
+
step: Optional[str] = None, index: Optional[Union[str, int]] = None):
|
|
419
420
|
"""
|
|
420
421
|
Sets the core area using a list of points defining its boundary.
|
|
421
422
|
|
|
@@ -432,8 +433,8 @@ class ASICAreaConstraint(BaseSchema):
|
|
|
432
433
|
"""
|
|
433
434
|
return self.set("corearea", points, step=step, index=index)
|
|
434
435
|
|
|
435
|
-
def get_corearea(self,
|
|
436
|
-
|
|
436
|
+
def get_corearea(self, step: Optional[str] = None, index: Optional[Union[str, int]] = None) \
|
|
437
|
+
-> List[Tuple[float, float]]:
|
|
437
438
|
"""
|
|
438
439
|
Retrieves the current core area definition.
|
|
439
440
|
|
|
@@ -449,7 +450,8 @@ class ASICAreaConstraint(BaseSchema):
|
|
|
449
450
|
"""
|
|
450
451
|
return self.get("corearea", step=step, index=index)
|
|
451
452
|
|
|
452
|
-
def calc_diearea(self, step: str = None, index: str = None)
|
|
453
|
+
def calc_diearea(self, step: Optional[str] = None, index: Optional[Union[str, int]] = None) \
|
|
454
|
+
-> float:
|
|
453
455
|
'''Calculates the area of a rectilinear die.
|
|
454
456
|
|
|
455
457
|
Uses the shoelace formula to calculate the design area from the (x,y)
|