siliconcompiler 0.33.0__py3-none-any.whl → 0.33.1__py3-none-any.whl

siliconcompiler/tool.py

@@ -1,4 +1,5 @@
 import contextlib
+import logging
 import os
 import psutil
 import re
@@ -32,8 +33,7 @@ from siliconcompiler import utils
 from siliconcompiler import sc_open
 
 from siliconcompiler.record import RecordTool
-
-from siliconcompiler.scheduler import print_traceback
+from siliconcompiler.flowgraph import RuntimeFlowgraph
 
 
 class TaskError(Exception):
@@ -93,7 +93,7 @@ class ToolSchema(NamedSchema):
 
         self.set_runtime(None)
 
-    def set_runtime(self, chip):
+    def set_runtime(self, chip, step=None, index=None):
         '''
         Sets the runtime information needed to properly execute a task.
         Note: unstable API
@@ -109,19 +109,22 @@ class ToolSchema(NamedSchema):
             self.__schema_full = chip.schema
             self.__logger = chip.logger
 
-        self.__step = None
-        self.__index = None
+        self.__step = step
+        self.__index = index
         self.__tool = None
         self.__task = None
 
         self.__schema_record = None
         self.__schema_metric = None
+        self.__schema_flow = None
         if self.__schema_full:
             self.__schema_record = self.__schema_full.get("record", field="schema")
             self.__schema_metric = self.__schema_full.get("metric", field="schema")
 
-            self.__step = self.__schema_full.get('arg', 'step')
-            self.__index = self.__schema_full.get('arg', 'index')
+            if not self.__step:
+                self.__step = self.__schema_full.get('arg', 'step')
+            if not self.__index:
+                self.__index = self.__schema_full.get('arg', 'index')
 
             if not self.__step or not self.__index:
                 raise RuntimeError("step or index not specified")
@@ -129,10 +132,9 @@ class ToolSchema(NamedSchema):
             flow = self.__schema_full.get('option', 'flow')
             if not flow:
                 raise RuntimeError("flow not specified")
-            self.__tool = self.__schema_full.get(
-                'flowgraph', flow, self.__step, self.__index, 'tool')
-            self.__task = self.__schema_full.get(
-                'flowgraph', flow, self.__step, self.__index, 'task')
+            self.__schema_flow = self.__schema_full.get("flowgraph", flow, field="schema")
+            self.__tool = self.__schema_flow.get(self.__step, self.__index, 'tool')
+            self.__task = self.__schema_flow.get(self.__step, self.__index, 'task')
 
     def node(self):
         '''
@@ -173,6 +175,8 @@ class ToolSchema(NamedSchema):
             return self.__schema_record
         elif type == "metric":
             return self.__schema_metric
+        elif type == "flow":
+            return self.__schema_flow
         else:
             raise ValueError(f"{type} is not a schema section")
 
@@ -625,23 +629,22 @@ class ToolSchema(NamedSchema):
                         retcode = self.run()
             except Exception as e:
                 self.__logger.error(f'Failed in run() for {self.name()}/{self.__task}: {e}')
-                retcode = 1  # default to non-zero
-                print_traceback(self.__chip, e)
+                utils.print_traceback(self.__logger, e)
                 raise e
             finally:
                 with sc_open(stdout_file) as stdout_reader, \
                         sc_open(stderr_file) as stderr_reader:
                     read_stdio(stdout_reader, stderr_reader)
 
-                try:
-                    if resource:
+                if resource:
+                    try:
                         # Since memory collection is not possible, collect the current process
                         # peak memory
                         max_mem_bytes = max(
                             max_mem_bytes,
                             1024 * resource.getrusage(resource.RUSAGE_SELF).ru_maxrss)
-                except (OSError, ValueError, PermissionError):
-                    pass
+                    except (OSError, ValueError, PermissionError):
+                        pass
         else:
             cmdlist = self.get_runtime_arguments()
 
@@ -670,7 +673,7 @@ class ToolSchema(NamedSchema):
                         data = os.read(fd, 1024)
                         log_writer.write(data)
                         return data
-                    retcode = pty.spawn(cmdlist, read)
+                    retcode = pty.spawn([exe, *cmdlist], read)
             else:
                 with open(stdout_file, 'w') as stdout_writer, \
                         open(stdout_file, 'r', errors='replace_with_warning') as stdout_reader, \
@@ -715,7 +718,7 @@ class ToolSchema(NamedSchema):
 
                                 memory_usage = psutil.virtual_memory()
                                 if memory_usage.percent > MEMORY_WARN_LIMIT:
-                                    self.__logger.warn(
+                                    self.__logger.warning(
                                         'Current system memory usage is '
                                         f'{memory_usage.percent:.1f}%')
 
@@ -774,6 +777,7 @@ class ToolSchema(NamedSchema):
         for key in list(state.keys()):
             if key.startswith("_ToolSchema__"):
                 del state[key]
+
         return state
 
     def __setstate__(self, state):
@@ -782,6 +786,9 @@ class ToolSchema(NamedSchema):
         # Reinit runtime information
         self.set_runtime(None)
 
+    def get_output_files(self):
+        return set(self.get("task", self.__task, "output", step=self.__step, index=self.__index))
+
     ###############################################################
     def parse_version(self, stdout):
         raise NotImplementedError("must be implemented by the implementation class")
@@ -792,6 +799,15 @@ class ToolSchema(NamedSchema):
     def setup(self):
         pass
 
+    def select_input_nodes(self):
+        flow = self.schema("flow")
+        runtime = RuntimeFlowgraph(
+            flow,
+            from_steps=set([step for step, _ in flow.get_entry_nodes()]),
+            prune_nodes=self.__chip.get('option', 'prune'))
+
+        return runtime.get_node_inputs(self.__step, self.__index, record=self.schema("record"))
+
     def pre_process(self):
         pass
 
@@ -805,6 +821,98 @@ class ToolSchema(NamedSchema):
         pass
 
 
+###########################################################################
+# Migration helper
+###########################################################################
+class ToolSchemaTmp(ToolSchema):
+    def __module_func(self, name, modules):
+        for module in modules:
+            method = getattr(module, name, None)
+            if method:
+                return method
+        return None
+
+    def __tool_task_modules(self):
+        step, index = self.node()
+        flow = self._ToolSchema__chip.get('option', 'flow')
+        return \
+            self._ToolSchema__chip._get_tool_module(step, index, flow=flow), \
+            self._ToolSchema__chip._get_task_module(step, index, flow=flow)
+
+    def get_output_files(self):
+        _, task = self.__tool_task_modules()
+        method = self.__module_func("_gather_outputs", [task])
+        if method:
+            return method(self._ToolSchema__chip, *self.node())
+        return ToolSchema.get_output_files(self)
+
+    def parse_version(self, stdout):
+        tool, _ = self.__tool_task_modules()
+        method = self.__module_func("parse_version", [tool])
+        if method:
+            return method(stdout)
+        return ToolSchema.parse_version(self, stdout)
+
+    def normalize_version(self, version):
+        tool, _ = self.__tool_task_modules()
+        method = self.__module_func("normalize_version", [tool])
+        if method:
+            return method(version)
+        return ToolSchema.normalize_version(self, version)
+
+    def setup(self):
+        _, task = self.__tool_task_modules()
+        method = self.__module_func("setup", [task])
+        if method:
+            return method(self._ToolSchema__chip)
+        return ToolSchema.setup(self)
+
+    def select_input_nodes(self):
+        _, task = self.__tool_task_modules()
+        method = self.__module_func("_select_inputs", [task])
+        if method:
+            return method(self._ToolSchema__chip, *self.node())
+        return ToolSchema.select_input_nodes(self)
+
+    def pre_process(self):
+        _, task = self.__tool_task_modules()
+        method = self.__module_func("pre_process", [task])
+        if method:
+            return method(self._ToolSchema__chip)
+        return ToolSchema.pre_process(self)
+
+    def runtime_options(self):
+        tool, task = self.__tool_task_modules()
+        method = self.__module_func("runtime_options", [task, tool])
+        if method:
+            return method(self._ToolSchema__chip)
+        return ToolSchema.runtime_options(self)
+
+    def run(self):
+        _, task = self.__tool_task_modules()
+        method = self.__module_func("run", [task])
+        if method:
+            # Handle logger stdout suppression if quiet
+            step, index = self.node()
+            stdout_handler_level = self._ToolSchema__chip.logger._console.level
+            if self._ToolSchema__chip.get('option', 'quiet', step=step, index=index):
+                self._ToolSchema__chip.logger._console.setLevel(logging.CRITICAL)
+
+            retcode = method(self._ToolSchema__chip)
+
+            self._ToolSchema__chip.logger._console.setLevel(stdout_handler_level)
+
+            return retcode
+        return ToolSchema.run(self)
+
+    def post_process(self):
+        _, task = self.__tool_task_modules()
+        method = self.__module_func("post_process", [task])
+        if method:
+            return method(self._ToolSchema__chip)
+        return ToolSchema.post_process(self)
+
+
 ###########################################################################
 # Tool Setup
 ###########################################################################

siliconcompiler/tools/_common/asic.py

@@ -257,10 +257,10 @@ class CellArea:
     def __init__(self):
         self.__areas = {}
 
-    def addCell(self, name=None, module=None,
-                cellarea=None, cellcount=None,
-                macroarea=None, macrocount=None,
-                stdcellarea=None, stdcellcount=None):
+    def add_cell(self, name=None, module=None,
+                 cellarea=None, cellcount=None,
+                 macroarea=None, macrocount=None,
+                 stdcellarea=None, stdcellcount=None):
         if not name and not module:
             return
 
@@ -294,6 +294,6 @@ class CellArea:
     def size(self):
         return len(self.__areas)
 
-    def writeReport(self, path):
+    def write_report(self, path):
         with open(path, 'w') as f:
             json.dump(self.__areas, f, indent=4)

siliconcompiler/tools/bluespec/convert.py

@@ -125,7 +125,8 @@ def post_process(chip):
                 if os.path.exists(mod_path):
                     extra_modules.add(mod_path)
                 else:
-                    chip.logger.warn(f"Unable to find module {module} source files at: {BSC_LIB}")
+                    chip.logger.warning(f"Unable to find module {module} source "
+                                        f"files at: {BSC_LIB}")
 
     # bsc outputs each compiled module to its own Verilog file, so we
     # concatenate them all to create a pickled output we can pass along.

siliconcompiler/tools/builtin/_common.py

@@ -3,7 +3,7 @@ from siliconcompiler import NodeStatus, SiliconCompilerError
 from siliconcompiler import utils
 import shutil
 from siliconcompiler.tools._common import get_tool_task
-from siliconcompiler.utils.flowgraph import _get_pruned_node_inputs
+from siliconcompiler.flowgraph import RuntimeFlowgraph
 
 
 ###########################################################################
@@ -152,4 +152,11 @@ def _select_inputs(chip, step, index):
     chip.logger.info(f"Running builtin task '{task}'")
 
     flow = chip.get('option', 'flow')
-    return _get_pruned_node_inputs(chip, flow, (step, index))
+
+    flow_schema = chip.schema.get("flowgraph", flow, field="schema")
+    runtime = RuntimeFlowgraph(
+        flow_schema,
+        from_steps=set([step for step, _ in flow_schema.get_entry_nodes()]),
+        prune_nodes=chip.get('option', 'prune'))
+
+    return runtime.get_node_inputs(step, index, record=chip.schema.get("record", field="schema"))

siliconcompiler/tools/builtin/concatenate.py

@@ -3,7 +3,6 @@ import os
 from siliconcompiler import sc_open, SiliconCompilerError
 from siliconcompiler import utils
 from siliconcompiler.tools._common import input_provides, input_file_node_name, get_tool_task
-from siliconcompiler.utils import flowgraph
 from siliconcompiler import scheduler
 
 
@@ -63,7 +62,12 @@ def _gather_outputs(chip, step, index):
     flow = chip.get('option', 'flow')
 
     in_nodes = chip.get('flowgraph', flow, step, index, 'input')
-    in_task_outputs = [flowgraph._gather_outputs(chip, *node) for node in in_nodes]
+    in_task_outputs = []
+    for in_step, in_index in in_nodes:
+        in_tool, _ = get_tool_task(chip, in_step, in_index, flow=flow)
+        task_class = chip.get("tool", in_tool, field="schema")
+        task_class.set_runtime(chip, step=in_step, index=in_index)
+        in_task_outputs.append(task_class.get_output_files())
 
     if len(in_task_outputs) > 0:
         return in_task_outputs[0].union(*in_task_outputs[1:])

siliconcompiler/tools/builtin/minimum.py

@@ -1,6 +1,6 @@
 from siliconcompiler.tools.builtin import _common
-from siliconcompiler.utils import flowgraph
 from siliconcompiler.tools.builtin.builtin import set_io_files
+from siliconcompiler.tools._common import get_tool_task
 
 
 def setup(chip):
@@ -41,7 +41,12 @@ def _gather_outputs(chip, step, index):
     flow = chip.get('option', 'flow')
 
     in_nodes = chip.get('flowgraph', flow, step, index, 'input')
-    in_task_outputs = [flowgraph._gather_outputs(chip, *node) for node in in_nodes]
+    in_task_outputs = []
+    for in_step, in_index in in_nodes:
+        in_tool, _ = get_tool_task(chip, in_step, in_index, flow=flow)
+        task_class = chip.get("tool", in_tool, field="schema")
+        task_class.set_runtime(chip, step=in_step, index=in_index)
+        in_task_outputs.append(task_class.get_output_files())
 
     if len(in_task_outputs) > 0:
         return in_task_outputs[0].intersection(*in_task_outputs[1:])

siliconcompiler/tools/builtin/mux.py

@@ -2,7 +2,7 @@ from siliconcompiler.tools.builtin import _common
 import re
 from siliconcompiler.tools.builtin.builtin import set_io_files
 from siliconcompiler import SiliconCompilerError
-from siliconcompiler.utils import flowgraph
+from siliconcompiler.tools._common import get_tool_task
 
 
 def setup(chip):
@@ -55,7 +55,12 @@ def _gather_outputs(chip, step, index):
     flow = chip.get('option', 'flow')
 
     in_nodes = chip.get('flowgraph', flow, step, index, 'input')
-    in_task_outputs = [flowgraph._gather_outputs(chip, *node) for node in in_nodes]
+    in_task_outputs = []
+    for in_step, in_index in in_nodes:
+        in_tool, _ = get_tool_task(chip, in_step, in_index, flow=flow)
+        task_class = chip.get("tool", in_tool, field="schema")
+        task_class.set_runtime(chip, step=in_step, index=in_index)
+        in_task_outputs.append(task_class.get_output_files())
 
     if len(in_task_outputs) > 0:
         return in_task_outputs[0].intersection(*in_task_outputs[1:])

siliconcompiler/tools/builtin/nop.py

@@ -1,6 +1,6 @@
 from siliconcompiler.tools.builtin import _common
 from siliconcompiler.tools.builtin.builtin import set_io_files
-from siliconcompiler.utils import flowgraph
+from siliconcompiler.tools._common import get_tool_task
 
 
 def setup(chip):
@@ -22,7 +22,12 @@ def _gather_outputs(chip, step, index):
     flow = chip.get('option', 'flow')
 
     in_nodes = chip.get('flowgraph', flow, step, index, 'input')
-    in_task_outputs = [flowgraph._gather_outputs(chip, *node) for node in in_nodes]
+    in_task_outputs = []
+    for in_step, in_index in in_nodes:
+        in_tool, _ = get_tool_task(chip, in_step, in_index, flow=flow)
+        task_class = chip.get("tool", in_tool, field="schema")
+        task_class.set_runtime(chip, step=in_step, index=in_index)
+        in_task_outputs.append(task_class.get_output_files())
 
     if len(in_task_outputs) > 0:
         return in_task_outputs[0].union(*in_task_outputs[1:])

siliconcompiler/tools/builtin/verify.py

@@ -3,11 +3,10 @@ from siliconcompiler.schema.parametertype import NodeType
 from siliconcompiler.scheduler import _haltstep
 from siliconcompiler.tools.builtin.builtin import set_io_files
 from siliconcompiler import utils, SiliconCompilerError
+from siliconcompiler.tools._common import get_tool_task
 
 import re
 
-from siliconcompiler.utils import flowgraph
-
 
 def setup(chip):
     '''
@@ -69,7 +68,12 @@ def _gather_outputs(chip, step, index):
     flow = chip.get('option', 'flow')
 
     in_nodes = chip.get('flowgraph', flow, step, index, 'input')
-    in_task_outputs = [flowgraph._gather_outputs(chip, *node) for node in in_nodes]
+    in_task_outputs = []
+    for in_step, in_index in in_nodes:
+        in_tool, _ = get_tool_task(chip, in_step, in_index, flow=flow)
+        task_class = chip.get("tool", in_tool, field="schema")
+        task_class.set_runtime(chip, step=in_step, index=in_index)
+        in_task_outputs.append(task_class.get_output_files())
 
     if len(in_task_outputs) > 0:
         return in_task_outputs[0].intersection(*in_task_outputs[1:])

siliconcompiler/tools/chisel/convert.py

@@ -103,7 +103,7 @@ def runtime_options(chip):
 
     design = chip.top()
 
-    runMain = ["runMain"]
+    run_main = ["runMain"]
     if chip.valid('input', 'config', 'chisel') and \
        chip.get('input', 'config', 'chisel', step=step, index=index):
         app = design
@@ -112,23 +112,23 @@ def runtime_options(chip):
             app = chip.get('tool', tool, 'task', task, 'var', 'application',
                            step=step, index=index)[0]
 
-        runMain.append(f"{app}")
+        run_main.append(f"{app}")
 
         if chip.valid('tool', tool, 'task', task, 'var', 'argument') and \
            chip.get('tool', tool, 'task', task, 'var', 'argument', step=step, index=index):
-            runMain.extend(chip.get('tool', tool, 'task', task, 'var', 'argument',
-                                    step=step, index=index))
-        runMain.append("--")
+            run_main.extend(chip.get('tool', tool, 'task', task, 'var', 'argument',
+                                     step=step, index=index))
+        run_main.append("--")
 
-        runMain.extend(["--target-dir", "chisel-output"])
+        run_main.extend(["--target-dir", "chisel-output"])
     else:
         # Use built in driver
-        runMain.append("SCDriver")
-        runMain.extend(["--module", chip.top(step=step, index=index)])
+        run_main.append("SCDriver")
+        run_main.extend(["--module", chip.top(step=step, index=index)])
 
-        runMain.extend(["--output-file", f"../outputs/{design}.v"])
+        run_main.extend(["--output-file", f"../outputs/{design}.v"])
 
-    return [" ".join(runMain)]
+    return [" ".join(run_main)]
 
 
 def post_process(chip):

siliconcompiler/tools/klayout/drc.py

@@ -6,7 +6,7 @@ from siliconcompiler.tools._common import input_provides, has_input_files, \
 from siliconcompiler.tools._common.asic import set_tool_task_var, get_tool_task_var
 
 from siliconcompiler.tools.klayout.klayout import setup as setup_tool
-import xml.etree.ElementTree as ET
+from xml.etree import ElementTree
 from siliconcompiler import utils
 
 
@@ -144,7 +144,7 @@ def post_process(chip):
     drc_report = None
     if os.path.isfile(drc_db):
         with open(drc_db, "r") as f:
-            drc_report = ET.fromstring(f.read())
+            drc_report = ElementTree.fromstring(f.read())
     if drc_report is None:
         drc_db = []
 

siliconcompiler/tools/klayout/klayout_show.py

@@ -17,18 +17,18 @@ def show(schema, tech, input_path, output_path, screenshot=False, report=None):
         sc_hide_layers = []
 
     # Load KLayout technology file
-    layoutOptions = tech.load_layout_options
+    layout_options = tech.load_layout_options
 
     # These may be disabled in our KLayout tech file for reasons relating to GDS
     # export, but for the purposes of viewing we'll hardcode them to True.
-    layoutOptions.lefdef_config.produce_blockages = True
-    layoutOptions.lefdef_config.produce_cell_outlines = True
-    layoutOptions.lefdef_config.produce_obstructions = True
+    layout_options.lefdef_config.produce_blockages = True
+    layout_options.lefdef_config.produce_cell_outlines = True
+    layout_options.lefdef_config.produce_obstructions = True
 
     # Always use LEF geometry even when LEF file contains FOREIGN statement.
-    layoutOptions.lefdef_config.macro_resolution_mode = 1
+    layout_options.lefdef_config.macro_resolution_mode = 1
 
-    tech.load_layout_options = layoutOptions
+    tech.load_layout_options = layout_options
 
     app = pya.Application.instance()
     main_window = pya.MainWindow.instance()

siliconcompiler/tools/klayout/klayout_utils.py

@@ -84,12 +84,12 @@ def technology(design, schema):
         lefs.extend(schema.get('library', lib, 'output', sc_stackup, 'lef',
                                step=sc_step, index=sc_index))
 
-    layoutOptions = tech.load_layout_options
+    layout_options = tech.load_layout_options
 
-    layoutOptions.lefdef_config.macro_resolution_mode = 1
-    layoutOptions.lefdef_config.via_cellname_prefix = "VIA_"
+    layout_options.lefdef_config.macro_resolution_mode = 1
+    layout_options.lefdef_config.via_cellname_prefix = "VIA_"
     pathed_files = set()
-    for lef_file in layoutOptions.lefdef_config.lef_files:
+    for lef_file in layout_options.lefdef_config.lef_files:
         if foundry_lef and not os.path.isabs(lef_file):
             lef_file = os.path.join(os.path.dirname(foundry_lef), lef_file)
         lef_file = os.path.abspath(lef_file)
@@ -99,13 +99,13 @@ def technology(design, schema):
     for lef in lefs:
         pathed_files.add(os.path.abspath(lef))
 
-    layoutOptions.lefdef_config.lef_files = list(pathed_files)
-    layoutOptions.lefdef_config.read_lef_with_def = False
-    layoutOptions.lefdef_config.dbu = tech.dbu
+    layout_options.lefdef_config.lef_files = list(pathed_files)
+    layout_options.lefdef_config.read_lef_with_def = False
+    layout_options.lefdef_config.dbu = tech.dbu
 
-    layoutOptions.lefdef_config.produce_fills = True
+    layout_options.lefdef_config.produce_fills = True
 
-    for lef_file in layoutOptions.lefdef_config.lef_files:
+    for lef_file in layout_options.lefdef_config.lef_files:
         print(f"[INFO] LEF file: {lef_file}")
 
     # Set layer properties
@@ -127,7 +127,7 @@ def technology(design, schema):
         print(f"[INFO] Layer properties: {layer_properties}")
 
     # Set layer map
-    map_file = layoutOptions.lefdef_config.map_file
+    map_file = layout_options.lefdef_config.map_file
     if map_file:
         map_file = map_file[0]
         if not os.path.isabs(map_file):
@@ -141,10 +141,10 @@ def technology(design, schema):
                 break
 
     if map_file and os.path.exists(map_file):
-        layoutOptions.lefdef_config.map_file = map_file
+        layout_options.lefdef_config.map_file = map_file
         print(f"[INFO] Layer map: {map_file}")
 
-    tech.load_layout_options = layoutOptions
+    tech.load_layout_options = layout_options
 
     return tech
 

siliconcompiler/tools/netgen/count_lvs.py

@@ -34,7 +34,7 @@ import argparse
 from siliconcompiler import sc_open
 
 
-def count_LVS_failures(filename):
+def count_lvs_failures(filename):
     with sc_open(filename) as cfile:
         lvsdata = json.load(cfile)
 
@@ -114,7 +114,7 @@ if __name__ == '__main__':
     parser = argparse.ArgumentParser(description='Parses netgen lvs')
     parser.add_argument('--file', '-f', required=True)
     args = parser.parse_args()
-    failures = count_LVS_failures(args.file)
+    failures = count_lvs_failures(args.file)
     total = failures[0]
     if total > 0:
         failed = True

siliconcompiler/tools/netgen/lvs.py

@@ -79,7 +79,7 @@ def post_process(chip):
         chip.logger.warning('No LVS report generated. Netgen may have encountered errors.')
         return
 
-    lvs_failures = count_lvs.count_LVS_failures(lvs_report)
+    lvs_failures = count_lvs.count_lvs_failures(lvs_report)
 
     # We don't count top-level pin mismatches as errors b/c we seem to get
     # false positives for disconnected pins. Report them as warnings

siliconcompiler/tools/openroad/_apr.py

@@ -402,7 +402,7 @@ def _generate_cell_area_report(design, ord_metrics):
         if stdcell_info_area:
             stdcellarea = sum(stdcell_info_area)
 
-        cellarea_report.addCell(
+        cellarea_report.add_cell(
             name=cell_name,
             module=cell_type,
             cellarea=cellarea,
@@ -420,7 +420,7 @@ def _generate_cell_area_report(design, ord_metrics):
         process_cell(module)
 
     if cellarea_report.size() > 0:
-        cellarea_report.writeReport("reports/hierarchical_cell_area.json")
+        cellarea_report.write_report("reports/hierarchical_cell_area.json")
 
 
 def define_tapcell_params(chip):

siliconcompiler/tools/openroad/scripts/apr/sc_init_floorplan.tcl

@@ -19,13 +19,7 @@ source "$sc_refdir/apr/preamble.tcl"
 # Setup Global Connections
 ###############################
 
-if { [sc_cfg_tool_task_exists {file} global_connect] } {
-    foreach global_connect [sc_cfg_tool_task_get {file} global_connect] {
-        puts "Sourcing global connect configuration: ${global_connect}"
-        source $global_connect
-    }
-}
-tee -file reports/global_connections.rpt {report_global_connect}
+sc_global_connections
 
 ###############################
 # Initialize floorplan

siliconcompiler/tools/openroad/scripts/common/procs.tcl

@@ -874,3 +874,21 @@ proc sc_report_args { args } {
 
     puts "$keys(-command) siliconcompiler arguments: $keys(-args)"
 }
+
+proc sc_global_connections { args } {
+    sta::check_argc_eq0 "sc_global_connections" $args
+
+    if { [sc_cfg_tool_task_exists {file} global_connect] } {
+        set global_connect_files []
+        foreach global_connect [sc_cfg_tool_task_get {file} global_connect] {
+            if { [lsearch -exact $global_connect_files $global_connect] != -1 } {
+                continue
+            }
+            puts "Loading global connect configuration: ${global_connect}"
+            source $global_connect
+
+            lappend global_connect_files $global_connect
+        }
+    }
+    tee -file reports/global_connections.rpt {report_global_connect}
+}