siliconcompiler 0.32.0__py3-none-any.whl → 0.32.1__py3-none-any.whl

siliconcompiler/_metadata.py

@@ -1,5 +1,5 @@
 # Version number following semver standard.
-version = '0.32.0'
+version = '0.32.1'
 
 # Default server address for remote runs, if unspecified.
 default_server = 'https://server.siliconcompiler.com'

siliconcompiler/apps/_common.py

@@ -98,11 +98,28 @@ def pick_manifest(chip, src_file=None):
     if chip.get('option', 'jobname') not in all_manifests[chip.design]:
         jobname = list(all_manifests[chip.design].keys())[0]
 
+    step, index = chip.get('arg', 'step'), chip.get('arg', 'index')
+    if step and not index:
+        all_nodes = list(all_manifests[chip.design][jobname].keys())
+        try:
+            all_nodes.remove((None, None))
+        except ValueError:
+            pass
+        for found_step, found_index in sorted(all_nodes):
+            if found_step == step:
+                index = found_index
+        if index is None:
+            index = '0'
+    if step and index:
+        if (step, index) in all_manifests[chip.design][jobname]:
+            return all_manifests[chip.design][jobname][(step, index)]
+        else:
+            chip.logger.error(f'{step}{index} is not a valid node.')
+            return None
+
     if (None, None) in all_manifests[chip.design][jobname]:
-        manifest = all_manifests[chip.design][jobname][None, None]
-    else:
-        # pick newest manifest
-        manifest = list(sorted(all_manifests[chip.design][jobname].values(),
-                               key=lambda file: os.stat(file).st_ctime))[-1]
+        return all_manifests[chip.design][jobname][None, None]
 
-    return manifest
+    # pick newest manifest
+    return list(sorted(all_manifests[chip.design][jobname].values(),
+                       key=lambda file: os.stat(file).st_ctime))[-1]

siliconcompiler/apps/sc_dashboard.py

@@ -63,6 +63,8 @@ To include another chip object to compare to:
         if manifest:
             chip.logger.info(f'Loading manifest: {manifest}')
             chip.read_manifest(manifest)
+    else:
+        manifest = chip.get('option', 'cfg')
 
     # Error checking
     design = chip.get('design')
@@ -70,6 +72,10 @@ To include another chip object to compare to:
         chip.logger.error('Design not loaded')
         return 1
 
+    if not manifest:
+        chip.logger.error('Unable to determine job manifest')
+        return 2
+
     graph_chips = []
     if switches['graph_cfg']:
         for i, name_and_file_path in enumerate(switches['graph_cfg']):
@@ -86,7 +92,7 @@ To include another chip object to compare to:
                 raise ValueError(('graph_cfg accepts a max of 2 values, you supplied'
                                   f' {args} in "-graph_cfg {name_and_file_path}"'))
             if not os.path.isfile(file_path):
-                raise ValueError(f'not a valid file path : {file_path}')
+                raise ValueError(f'not a valid file path: {file_path}')
             graph_chip = siliconcompiler.core.Chip(design='')
             graph_chip.read_manifest(file_path)
             graph_chips.append({

siliconcompiler/apps/sc_show.py

@@ -111,6 +111,8 @@ def main():
         if manifest:
             chip.logger.info(f'Loading manifest: {manifest}')
             chip.read_manifest(manifest)
+    else:
+        manifest = chip.get('option', 'cfg')
 
     # Error checking
     design = chip.get('design')
@@ -120,6 +122,10 @@ def main():
                           '-cfg, -design, and/or inputs.')
         return 1
 
+    if not manifest:
+        chip.logger.error('Unable to determine job manifest')
+        return 2
+
     # Read in file
     if filename:
         chip.logger.info(f"Displaying {filename}")

siliconcompiler/core.py

@@ -3239,9 +3239,10 @@ class Chip:
             if sc_step and sc_index:
                 search_nodes.append((sc_step, sc_index))
             elif sc_step:
-                for check_step, check_index in nodes_to_execute(self, flow):
-                    if sc_step == check_step:
-                        search_nodes.append((check_step, check_index))
+                if flow is not None:
+                    for check_step, check_index in nodes_to_execute(self, flow):
+                        if sc_step == check_step:
+                            search_nodes.append((check_step, check_index))
             else:
                 if flow is not None:
                     for nodes in _get_flowgraph_execution_order(self,

siliconcompiler/fpgas/lattice_ice40.py

@@ -1,5 +1,4 @@
-import siliconcompiler
-from siliconcompiler.utils import register_sc_data_source
+from siliconcompiler import Chip, FPGA
 
 
 ####################################################
@@ -13,22 +12,13 @@ def setup():
     yosys + nextpnr
     '''
 
-    vendor = 'lattice'
-
-    lut_size = '4'
-
     all_fpgas = []
 
-    all_part_names = [
-        "ice40up5k-sg48",
-    ]
-
-    for part_name in all_part_names:
-        fpga = siliconcompiler.FPGA(part_name, package='siliconcompiler_data')
-        register_sc_data_source(fpga)
+    for part_name in ("ice40up5k-sg48",):
+        fpga = FPGA(part_name)
 
-        fpga.set('fpga', part_name, 'vendor', vendor)
-        fpga.set('fpga', part_name, 'lutsize', lut_size)
+        fpga.set('fpga', part_name, 'vendor', 'lattice')
+        fpga.set('fpga', part_name, 'lutsize', 4)
 
         all_fpgas.append(fpga)
 
@@ -37,5 +27,5 @@ def setup():
 
 #########################
 if __name__ == "__main__":
-    for fpga in setup(siliconcompiler.Chip('<fpga>')):
+    for fpga in setup(Chip('<fpga>')):
         fpga.write_manifest(f'{fpga.design}.json')

siliconcompiler/package/__init__.py

@@ -10,9 +10,6 @@ import functools
 import time
 from pathlib import Path
 
-from github import Github
-import github.Auth
-
 from siliconcompiler.utils import get_plugins
 
 
@@ -219,58 +216,6 @@ def register_python_data_source(chip,
                          ref=ref)
 
 
-def register_private_github_data_source(chip,
-                                        package_name,
-                                        repository,
-                                        release,
-                                        artifact):
-    gh = Github(auth=github.Auth.Token(__get_github_auth_token(package_name)))
-    repo = gh.get_repo(repository)
-
-    if not release:
-        release = repo.get_latest_release().tag_name
-
-    url = None
-    for repo_release in repo.get_releases():
-        if repo_release.tag_name == release:
-            for asset in repo_release.assets:
-                if asset.name == artifact:
-                    url = asset.url
-
-    if not url:
-        raise ValueError(f'Unable to find release asset: {repository}/{release}/{artifact}')
-
-    chip.register_source(
-        package_name,
-        path=url,
-        ref=release)
-
-
-def __get_github_auth_token(package_name):
-    token_name = package_name.upper()
-    for tok in ('#', '$', '&', '-', '=', '!', '/'):
-        token_name = token_name.replace(tok, '')
-
-    search_env = (
-        f'GITHUB_{token_name}_TOKEN',
-        'GITHUB_TOKEN',
-        'GIT_TOKEN'
-    )
-
-    token = None
-    for env in search_env:
-        token = os.environ.get(env, None)
-
-        if token:
-            break
-
-    if not token:
-        raise ValueError('Unable to determine authorization token for GitHub, '
-                         f'please set one of the following environmental variables: {search_env}')
-
-    return token
-
-
 @functools.lru_cache(maxsize=1)
 def __get_python_module_mapping():
     mapping = {}
@@ -298,3 +243,14 @@ def __get_python_module_mapping():
                 mapping.setdefault(module, []).append(dist_name)
 
     return mapping
+
+
+def register_private_github_data_source(chip,
+                                        package_name,
+                                        repository,
+                                        release,
+                                        artifact):
+    chip.register_source(
+        package_name,
+        path=f"github+private://{repository}/{release}/{artifact}",
+        ref=release)

siliconcompiler/package/github.py

@@ -0,0 +1,124 @@
+import os
+from fasteners import InterProcessLock
+from github import Github, Auth
+from github.GithubException import UnknownObjectException
+from urllib.parse import urlparse
+from siliconcompiler.package import get_download_cache_path
+from siliconcompiler.package import aquire_data_lock, release_data_lock
+from siliconcompiler.package.https import _http_resolver
+
+
+def get_resolver(url):
+    if url.scheme in ("github",):
+        return github_any_resolver
+    if url.scheme in ("github+private",):
+        return github_private_resolver
+    return None
+
+
+def github_any_resolver(chip, package, path, ref, url, fetch):
+    data_path, data_path_lock = get_download_cache_path(chip, package, ref)
+
+    if not fetch:
+        return data_path, False
+
+    # Acquire lock
+    data_lock = InterProcessLock(data_path_lock)
+    aquire_data_lock(data_path, data_lock)
+
+    if os.path.exists(data_path):
+        release_data_lock(data_lock)
+        return data_path, False
+
+    try:
+        return _github_resolver(chip, package, path, ref, url, data_lock)
+    except UnknownObjectException:
+        return github_private_resolver(chip, package, path, ref, url, fetch, data_lock=data_lock)
+
+
+def github_private_resolver(chip, package, path, ref, url, fetch, data_lock=None):
+    data_path, data_path_lock = get_download_cache_path(chip, package, ref)
+
+    if not fetch:
+        return data_path, False
+
+    if not data_lock:
+        # Acquire lock
+        data_lock = InterProcessLock(data_path_lock)
+        aquire_data_lock(data_path, data_lock)
+
+    if os.path.exists(data_path):
+        release_data_lock(data_lock)
+        return data_path, False
+
+    gh = Github(auth=Auth.Token(__get_github_auth_token(package)))
+
+    return _github_resolver(chip, package, path, ref, url, data_lock, gh=gh)
+
+
+def _github_resolver(chip, package, path, ref, url, data_lock, gh=None):
+    if not gh:
+        gh = Github()
+
+    url_parts = (url.netloc, *url.path.split("/")[1:])
+
+    if len(url_parts) != 4:
+        raise ValueError(
+            f"{path} is not in the proper form: <owner>/<repository>/<version>/<artifact>")
+
+    repository = "/".join(url_parts[0:2])
+    release = url_parts[2]
+    artifact = url_parts[3]
+
+    release_url = __get_release_url(gh, repository, release, artifact)
+
+    return _http_resolver(chip, package, release_url, ref, urlparse(release_url), data_lock)
+
+
+def __get_release_url(gh, repository, release, artifact):
+    if artifact == f"{release}.zip":
+        return f"https://github.com/{repository}/archive/refs/tags/{release}.zip"
+    if artifact == f"{release}.tar.gz":
+        return f"https://github.com/{repository}/archive/refs/tags/{release}.tar.gz"
+
+    repo = gh.get_repo(repository)
+
+    if not release:
+        release = repo.get_latest_release().tag_name
+
+    url = None
+    for repo_release in repo.get_releases():
+        if repo_release.tag_name == release:
+            for asset in repo_release.assets:
+                if asset.name == artifact:
+                    url = asset.url
+
+    if not url:
+        raise ValueError(f'Unable to find release asset: {repository}/{release}/{artifact}')
+
+    return url
+
+
+def __get_github_auth_token(package_name):
+    token_name = package_name.upper()
+    for tok in ('#', '$', '&', '-', '=', '!', '/'):
+        token_name = token_name.replace(tok, '')
+
+    search_env = (
+        f'GITHUB_{token_name}_TOKEN',
+        'GITHUB_TOKEN',
+        'GIT_TOKEN'
+    )
+
+    token = None
+    for env in search_env:
+        token = os.environ.get(env, None)
+
+        if token:
+            break
+
+    if not token:
+        raise ValueError('Unable to determine authorization token for GitHub, '
+                         f'please set one of the following environmental variables: {search_env}')
+
+    return token

siliconcompiler/package/https.py

@@ -35,6 +35,12 @@ def http_resolver(chip, package, path, ref, url, fetch):
         release_data_lock(data_lock)
         return data_path, False
 
+    return _http_resolver(chip, package, path, ref, url, data_lock)
+
+
+def _http_resolver(chip, package, path, ref, url, data_lock):
+    data_path, _ = get_download_cache_path(chip, package, ref)
+
     extract_from_url(chip, package, path, ref, url, data_path)
 
     release_data_lock(data_lock)

siliconcompiler/report/dashboard/components/__init__.py

@@ -9,6 +9,7 @@ import streamlit_antd_components as sac
 
 from PIL import Image
 
+import siliconcompiler
 from siliconcompiler import __version__ as sc_version
 from siliconcompiler import utils
 from siliconcompiler.report import report
@@ -31,7 +32,7 @@ SC_MENU = {
     "Report a Bug":
     '''https://github.com/siliconcompiler/siliconcompiler/issues''',
     "About": "\n\n".join(SC_ABOUT)}
-SC_DATA_ROOT = os.path.abspath(os.path.join(os.path.dirname(__file__), '..', '..', '..', 'data'))
+SC_DATA_ROOT = os.path.abspath(os.path.join(os.path.dirname(siliconcompiler.__file__), 'data'))
 SC_LOGO_PATH = os.path.join(SC_DATA_ROOT, 'logo.png')
 SC_FONT_PATH = os.path.join(SC_DATA_ROOT, 'RobotoMono', 'RobotoMono-Regular.ttf')
 

siliconcompiler/report/dashboard/components/flowgraph.py

@@ -34,6 +34,9 @@ def get_nodes_and_edges(chip):
     nodes = []
     edges = []
 
+    if not chip.get('option', 'flow'):
+        return nodes, edges
+
     default_node_border_width = 1
     successful_path_node_width = 3
     default_edge_width = 3

siliconcompiler/report/dashboard/utils/__init__.py

@@ -24,8 +24,9 @@ def make_node_to_step_index_map(chip, metric_dataframe):
             nodes of the selected chip
     '''
     node_to_step_index_map = {}
-    for step, index in _get_flowgraph_nodes(chip, chip.get('option', 'flow')):
-        node_to_step_index_map[f'{step}{index}'] = (step, index)
+    if chip.get('option', 'flow'):
+        for step, index in _get_flowgraph_nodes(chip, chip.get('option', 'flow')):
+            node_to_step_index_map[f'{step}{index}'] = (step, index)
 
     # concatenate step and index
     metric_dataframe.columns = metric_dataframe.columns.map(lambda x: f'{x[0]}{x[1]}')
@@ -54,6 +55,8 @@ def make_metric_to_metric_unit_map(metric_dataframe):
 
 
 def is_running(chip):
+    if not chip.get('option', 'flow'):
+        return False
     for step, index in _get_flowgraph_nodes(chip, chip.get('option', 'flow')):
         state = chip.get('record', 'status', step=step, index=index)
         if not NodeStatus.is_done(state):

siliconcompiler/report/utils.py

@@ -40,6 +40,9 @@ def _find_summary_metrics(chip, metrics_map):
 def _collect_data(chip, flow=None, flowgraph_nodes=None, format_as_string=True):
     if not flow:
         flow = chip.get('option', 'flow')
+    if not flow:
+        return [], {}, {}, {}, [], {}
+
     if not flowgraph_nodes:
         flowgraph_nodes = nodes_to_execute(chip)
         # only report tool based steps functions

siliconcompiler/schema/schema_obj.py

@@ -39,7 +39,7 @@ except ImportError:
     _has_yaml = False
 
 from .schema_cfg import schema_cfg
-from .utils import escape_val_tcl, PACKAGE_ROOT, translate_loglevel, PerNode, Scope
+from .utils import escape_val_tcl, translate_loglevel, PerNode, Scope
 
 
 class Schema:
@@ -1122,7 +1122,8 @@ class Schema:
 
         if template:
             fout.write(template.render(manifest_dict='\n'.join(tcl_set_cmds),
-                                       scroot=os.path.abspath(PACKAGE_ROOT),
+                                       scroot=os.path.abspath(
+                                           os.path.join(os.path.dirname(__file__), '..')),
                                        record_access=self._do_record_access(),
                                        record_access_id=Schema._RECORD_ACCESS_IDENTIFIER))
         else:

siliconcompiler/schema/utils.py

@@ -4,13 +4,10 @@
 # SC dependencies outside of its directory, since it may be used by tool drivers
 # that have isolated Python environments.
 
-import os
 import re
 import sys
 from enum import Enum
 
-PACKAGE_ROOT = os.path.join(os.path.dirname(os.path.abspath(__file__)), '..')
-
 
 #############################################################################
 # ENUM DEFINITIONs

siliconcompiler/targets/fpgaflow_demo.py

@@ -1,7 +1,6 @@
 import siliconcompiler
 from siliconcompiler import SiliconCompilerError
 from siliconcompiler.fpgas import lattice_ice40
-from siliconcompiler.fpgas import vpr_example
 
 from siliconcompiler.flows import fpgaflow
 
@@ -30,7 +29,6 @@ def setup(chip, partname=None):
 
     # 2.  Load all available FPGAs
     chip.use(lattice_ice40)
-    chip.use(vpr_example)
 
     # 3. Load flow
     chip.use(fpgaflow, partname=partname)

siliconcompiler/toolscripts/_tools.json

@@ -1,7 +1,7 @@
 {
   "openroad": {
     "git-url": "https://github.com/The-OpenROAD-Project/OpenROAD.git",
-    "git-commit": "0fbd4d94c81ef070249ad9d9037a740d0c6e58fa",
+    "git-commit": "c2eb4321bdfcbf353eaf72b7d37bb57071500a59",
     "docker-cmds": [
       "# Remove OR-Tools files",
       "RUN rm -f $SC_PREFIX/Makefile $SC_PREFIX/README.md",
@@ -91,7 +91,7 @@
   },
   "yosys": {
     "git-url": "https://github.com/YosysHQ/yosys.git",
-    "git-commit": "v0.50",
+    "git-commit": "v0.51",
     "version-prefix": "",
     "auto-update": true
   },

siliconcompiler/toolscripts/ubuntu24/install-icarus.sh

@@ -5,7 +5,8 @@ set -e
 # Get directory of script
 src_path=$(cd -- "$(dirname "$0")" >/dev/null 2>&1 ; pwd -P)/..
 
-sudo apt-get install -y build-essential bison flex gperf libreadline-dev libncurses-dev
+sudo apt-get install -y build-essential bison flex gperf libreadline-dev libncurses-dev \
+    autotools-dev automake
 
 mkdir -p deps
 cd deps

siliconcompiler/toolscripts/ubuntu24/install-netgen.sh

@@ -5,7 +5,7 @@ set -e
 # Get directory of script
 src_path=$(cd -- "$(dirname "$0")" >/dev/null 2>&1 ; pwd -P)/..
 
-sudo apt-get install -y build-essential tcl-dev tk-dev
+sudo apt-get install -y build-essential tcl-dev tk-dev m4
 
 mkdir -p deps
 cd deps

siliconcompiler/utils/__init__.py

@@ -5,7 +5,6 @@ import re
 import psutil
 import shutil
 from pathlib import Path, PurePosixPath
-from siliconcompiler._metadata import version as sc_version
 from jinja2 import Environment, FileSystemLoader
 
 import sys
@@ -15,11 +14,6 @@ else:
     from importlib.metadata import entry_points
 
 
-PACKAGE_ROOT = os.path.dirname(os.path.dirname(os.path.abspath(__file__)))
-
-_siliconcompiler_data_path = 'git+https://github.com/siliconcompiler/siliconcompiler'
-
-
 def link_symlink_copy(srcfile, dstfile):
     # first try hard linking, then symbolic linking,
     # and finally just copy the file
@@ -223,12 +217,6 @@ def default_email_credentials_file():
     return cfg_file
 
 
-def register_sc_data_source(chip):
-    chip.register_source('siliconcompiler_data',
-                         _siliconcompiler_data_path,
-                         'v'+sc_version)
-
-
 @contextlib.contextmanager
 def sc_open(path, *args, **kwargs):
     kwargs['errors'] = 'ignore_with_warning'
@@ -240,7 +228,10 @@ def sc_open(path, *args, **kwargs):
         pass
 
 
-def get_file_template(path, root=os.path.join(PACKAGE_ROOT, 'templates')):
+def get_file_template(path,
+                      root=os.path.join(
+                          os.path.dirname(
+                              os.path.dirname(os.path.abspath(__file__))), 'templates')):
     if os.path.isabs(path):
         root = os.path.dirname(path)
         path = os.path.basename(path)
@@ -266,7 +257,7 @@ def safecompare(chip, value, op, goal):
     elif op == "!=":
         return bool(value != goal)
     else:
-        chip.error(f"Illegal comparison operation {op}")
+        raise ValueError(f"Illegal comparison operation {op}")
 
 
 ###########################################################################

{siliconcompiler-0.32.0.dist-info → siliconcompiler-0.32.1.dist-info}/METADATA

@@ -1,6 +1,6 @@
 Metadata-Version: 2.2
 Name: siliconcompiler
-Version: 0.32.0
+Version: 0.32.1
 Summary: A compiler framework that automates translation from source code to silicon.
 Author-email: Andreas Olofsson <andreas.d.olofsson@gmail.com>
 License: Apache License 2.0

{siliconcompiler-0.32.0.dist-info → siliconcompiler-0.32.1.dist-info}/RECORD

@@ -1,21 +1,21 @@
 siliconcompiler/__init__.py,sha256=Ke_Bcryj9N6MoUq_5z_IDW3qMrUzR-3-kJVsvUenYzY,511
 siliconcompiler/__main__.py,sha256=JwWkcvaNngqgMWprEQ1cFy2Wdq9GMvk46UGTHyh_qvM,170
 siliconcompiler/_common.py,sha256=c6r0SbI2xTpNOZayFsyCDo0riJGNJSPN-0zW8R7rDBI,1488
-siliconcompiler/_metadata.py,sha256=3djiiKr5bXhbjJlv9XuluEftoGgcRBwvLs9aEbYWD4s,1264
-siliconcompiler/core.py,sha256=yncn2IGU3qD6frmO2Fk6RXTIBMIdXU66nVW4S9NvQPQ,138892
+siliconcompiler/_metadata.py,sha256=lAUnYGIiSC2Gju4xfT-0tw5oPuAIZAJFq_4BI3zHSR0,1264
+siliconcompiler/core.py,sha256=_VQxqJns00FhDkN0Q-FOAWfz6ezo0zFdZ4bdADOSxWs,138941
 siliconcompiler/flowgraph.py,sha256=Z_c4DEh1JvHE_u0O2M2Y1_dn6aGOAECX-HzrIjn0ky4,22084
 siliconcompiler/issue.py,sha256=9ZpdEBh8QB56-bZ1YXRnjqgg9hwnFty2u1o5oI66W7M,11125
 siliconcompiler/units.py,sha256=M_ZxViSysymv8mFdCtbQwfccEwEsBeiCmc8TcnoXZbk,5845
 siliconcompiler/use.py,sha256=zu17ogJv0x2t_6J9yb_5tH1DjridVQj0MrIRxJRJVGQ,6202
 siliconcompiler/apps/__init__.py,sha256=6LuAljPtVB6g5yXl_58ODoB4Svb6UfKaDbX1e0aNZfE,668
-siliconcompiler/apps/_common.py,sha256=Ph-cD-t9lCzavak3s4YCXXmA_ouf-jJ-7WIEGkSsjOg,3770
+siliconcompiler/apps/_common.py,sha256=YK5zNHHnHeEWwcK27wXwsaApsrphUenh9uQzGf2zKvs,4425
 siliconcompiler/apps/sc.py,sha256=qHrfzgt1y748jX0nLXn9Hx1WuwXXmHFGhF4LaQTCpeE,3259
-siliconcompiler/apps/sc_dashboard.py,sha256=kGyMYbgKgZMBUrTyft6mEvRnmcrKA7JunrkWZ8VwSwM,3478
+siliconcompiler/apps/sc_dashboard.py,sha256=60ccCeC6RxPSt4uxej6bEJlpwViiEvRbZlqXtAItf98,3633
 siliconcompiler/apps/sc_install.py,sha256=qz6Dni7HcYrl9V7mDk2hqMYY4BwqRceNb-Gd2UE5zzk,8569
 siliconcompiler/apps/sc_issue.py,sha256=PUXFWne6MWY0Ntak3PnMZ84tpEZ5S1Pta5B3AkxMdoY,6404
 siliconcompiler/apps/sc_remote.py,sha256=vMdh9LdFJ-0vFzYMFttcERXCFwzNMmAQyXPIxoNCmhg,7168
 siliconcompiler/apps/sc_server.py,sha256=d3SCfKtNneIBiAk7Udc5SqXvSIoFSK40iHWcKuY7unk,894
-siliconcompiler/apps/sc_show.py,sha256=H0_evnBqr02FJVlIaFIva4RrYZ6M2otlWTaTCqFQPlg,4653
+siliconcompiler/apps/sc_show.py,sha256=q3ccwnq3eLE0kC5PlL7n1tcvTzhRqj0q7u-4k_Cxu2Y,4809
 siliconcompiler/apps/smake.py,sha256=jj69IuMLf4jblpVGeLT3GAvC-zDLHwPq16YPKtHosdA,7124
 siliconcompiler/apps/utils/replay.py,sha256=iAsYFb2mVcXw3c9SYV1pFiiQLwZKiub9uQjsO5v-hlo,5901
 siliconcompiler/apps/utils/summarize.py,sha256=CC6YwyEShiuZekU-D1Uk_m074aj8LviwotcgJMvZhuY,1250
@@ -42,14 +42,14 @@ siliconcompiler/flows/showflow.py,sha256=1pIeRo5IwPPrlm8luY4QGrFYmg66m13ImCAeoEr
 siliconcompiler/flows/signoffflow.py,sha256=y3sM5M2HesrRYidKCZ6obDvYwzxAbD3qVEuHekAAaTI,1515
 siliconcompiler/flows/synflow.py,sha256=Tydj7b_Aq610IOoo4CQ_FA4Nletvfn-l2XyZ0NHlJdc,3957
 siliconcompiler/fpgas/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
-siliconcompiler/fpgas/lattice_ice40.py,sha256=GU0NrhBZuvMv5sWBye9h_GodKOOXBRwDLVlEy3ANXlY,1034
-siliconcompiler/fpgas/vpr_example.py,sha256=xcTgCvxSadcBnYVrglAi5XM4nn_raXWFvr_oe62tCPI,4998
+siliconcompiler/fpgas/lattice_ice40.py,sha256=NsFgGvTnBVXpJeg3IiKKufsUwV7TYl-XU6mE2jNjK60,791
 siliconcompiler/libs/__init__.py,sha256=KXw1vU0KP83fg3rB8iKkpDhJZBLz_PWGZG65L3lAQ1Q,86
 siliconcompiler/optimizer/__init__.py,sha256=wdSuv3U7hoSdZn-TkaQtYehVdhS5F35Mb1McgaUw3hc,6599
 siliconcompiler/optimizer/vizier.py,sha256=-JF3E28SLhfkjluz2R5dFnjg5NjU1z7Okb-K_ZK9H3s,9035
-siliconcompiler/package/__init__.py,sha256=BpOEkHppctqwh1FL9fLA3CtpTHJsNfk5eXywBNrCNPY,9172
+siliconcompiler/package/__init__.py,sha256=4Ps97LFRmBd7-grfB8h1tQsLFF4eZYiAAuSBReX8vpo,8014
 siliconcompiler/package/git.py,sha256=c40uXesG1x-CgH7yat5Cq6iCjoUHp_jE_VXeHGtzeOk,3258
-siliconcompiler/package/https.py,sha256=f3VxIC3YdPgejuGDqp-amsHljtO43XOSS5UQv-k5ktQ,3014
+siliconcompiler/package/github.py,sha256=NCTMkV3WKNwVasciC30qGglysRMgqEWzC-0TXSSwmbU,3768
+siliconcompiler/package/https.py,sha256=_o0VpvImgBlW_egwgWXc0JC0T0ixFSV-Gu8dGGso4hM,3210
 siliconcompiler/pdks/__init__.py,sha256=bWhtNR-Kq3fEyknon-x5vQX877b88g9EJXAHBMiDyGM,81
 siliconcompiler/remote/__init__.py,sha256=MoYnC1lkgbT5hN5Qi-0gTItaTWI2U1E8OuleffdTDSQ,977
 siliconcompiler/remote/client.py,sha256=qwZaKSt-ScYjfBFpL9Np9Z0nDytYRJHgvNJnrXHGhok,32848
@@ -75,19 +75,19 @@ siliconcompiler/report/html_report.py,sha256=Wh5X7iQpfIEHcs-WrVE9dtDf-gkz3GhT_yf
 siliconcompiler/report/report.py,sha256=_V8Dpxly06wDAVUVuu7yyZ2fMGV5MHkJ_9DHoxGgt24,15158
 siliconcompiler/report/summary_image.py,sha256=tKuoLiG6Whvnc8LHeSzU4FookpBkYYCMWUGb-ux2i8k,3570
 siliconcompiler/report/summary_table.py,sha256=j7MrwGacCemAWNOtyHiYop9XRQPzIEWHyRl4dfS1yI8,3386
-siliconcompiler/report/utils.py,sha256=70klZsAKwhW55kOxBBdV9zzOU-NorMk6y6riMyKXo7c,6423
+siliconcompiler/report/utils.py,sha256=bjoVGGlVpqBWxzGj__1Qg2BJ5ok4IbHGr1fEvYg0SOg,6479
 siliconcompiler/report/dashboard/__init__.py,sha256=bvSfStUvkMa1zW1R5WtzzzKKAMm9FCNiPbIIFXOotJ0,5554
 siliconcompiler/report/dashboard/state.py,sha256=qBAmLpKb0xXqf2vRbBBgYs8P71v3MGIL6z0WHoAED-Y,5924
 siliconcompiler/report/dashboard/viewer.py,sha256=scF4MkbOdqM1pRCzGWnXeMrk4r2M4Y2cDyEIrAWCFiw,1095
-siliconcompiler/report/dashboard/components/__init__.py,sha256=4AteP9VxNisAGkv_Ib_7bV1ZyEmqH6TglY9d8Xh44KQ,18517
-siliconcompiler/report/dashboard/components/flowgraph.py,sha256=bjPuaWlEra4HbIUIbtCkYQMNTYueSGP0WO-r16MrBss,3525
+siliconcompiler/report/dashboard/components/__init__.py,sha256=jEztqYs8s7W_eggXABaqDJ3zREdMsoLcdHCfr1Uj5LY,18538
+siliconcompiler/report/dashboard/components/flowgraph.py,sha256=RkrSJJYyPBk03jCMuhkNhTV1JOlFvFILntwV8kBsN_I,3593
 siliconcompiler/report/dashboard/components/graph.py,sha256=m9y4lxKDgTJNp_eOdLohN1bn6uE3XEnE387xnb4HnUo,6776
 siliconcompiler/report/dashboard/layouts/__init__.py,sha256=aYhWEoQg4CiwGMCcLH4Yj__d_5tD4vyb164dP2RpURY,638
 siliconcompiler/report/dashboard/layouts/_common.py,sha256=_Iz5IxftnNKYvhQNA-PWpyv8R1uejvrVUMGmUIEvPf0,1276
 siliconcompiler/report/dashboard/layouts/vertical_flowgraph.py,sha256=ml8qPg2-g3n-HW9E4znwkaYBISyloUjD19_Ooy3iCn0,3425
 siliconcompiler/report/dashboard/layouts/vertical_flowgraph_node_tab.py,sha256=09n3LqXedQOX8UizlTn9BHyepizmbwz9SIN0QB2PNkA,4229
 siliconcompiler/report/dashboard/layouts/vertical_flowgraph_sac_tabs.py,sha256=g6lrnXJVEkTh7OQY1xCgl_q0So0XewItuY0sjnjaBCA,4086
-siliconcompiler/report/dashboard/utils/__init__.py,sha256=mkcBAlfPovfgoRv9nPbtgQSeFglwlxlSIXsEQmdsDz8,2540
+siliconcompiler/report/dashboard/utils/__init__.py,sha256=1ILJbIAx2QQ12enHflzaQmj0pk8UhkC5YdZO9EPAVCo,2643
 siliconcompiler/report/dashboard/utils/file_utils.py,sha256=5MKAyf7TGXQIc3yxwbP1H6xi0NGwUfzu2j3LOv1Yei0,3333
 siliconcompiler/scheduler/__init__.py,sha256=goiNHGe41JjCKoMWIh6i3fcw9kuC7lXcAziA_bFeun4,87291
 siliconcompiler/scheduler/docker_runner.py,sha256=zeAPHgthkoR8ATY6zmV2kCJWpD13fuq2DCzzG66Ubm8,8052
@@ -98,8 +98,8 @@ siliconcompiler/scheduler/validation/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeu
 siliconcompiler/scheduler/validation/email_credentials.json,sha256=hkJs0U2h2Bgm1zxeXvanIJ-prPhpn_aU6e3qwIs7qA0,1997
 siliconcompiler/schema/__init__.py,sha256=Gdny2AwDdg-X3RvghOHQYl3aG2alvMuK5CsSkFGKuYU,120
 siliconcompiler/schema/schema_cfg.py,sha256=oHE1hEgLFgU2r4sValymY_-84SCchU_6j0BGkXFwdjw,188876
-siliconcompiler/schema/schema_obj.py,sha256=BHMr00Et57iukxTI9hiJUHkhAw1LRbsWJcDCejeCBDg,76158
-siliconcompiler/schema/utils.py,sha256=qeAICnQuuzrcJSyotFGWA6gmunpu63AOaEtuhIcBi5c,4504
+siliconcompiler/schema/schema_obj.py,sha256=tb_iVnXzI6Sjos2BCNFKXFu4-Zm2lc4S3buTQVwdyoo,76221
+siliconcompiler/schema/utils.py,sha256=R4YZ4-iMBb7wQCsFO3oJMijOhDKcyAzIBNPEtS9E2Fg,4415
 siliconcompiler/sphinx_ext/__init__.py,sha256=nXMFqWewqjy8FZbExAp2wtVu8EmZ3cXKvomlpxnzKUE,1859
 siliconcompiler/sphinx_ext/dynamicgen.py,sha256=QwrigvFqj900Sud4qICNlKYAxqLQOxSvzqRKwNAz02o,34575
 siliconcompiler/sphinx_ext/schemagen.py,sha256=7m9mKhixVnNsrVcVzadNFsR_SB7BCFMNmOZWiGUtM20,7787
@@ -107,7 +107,7 @@ siliconcompiler/sphinx_ext/utils.py,sha256=JNktfS5nYZE_DnXRX_fwOBkc5kWgLkB0Urxbe
 siliconcompiler/targets/__init__.py,sha256=PVbYMlHPHGnkmmokOBDk4zP5tRHF1pPdP-NKpJowmCQ,770
 siliconcompiler/targets/asap7_demo.py,sha256=RBCjAx3laq2xUT7w--b9oIVx8r87QyKfBRX35JQICzw,2544
 siliconcompiler/targets/asic_demo.py,sha256=jRvbDhMZDGf-8AQ241vu8qLgloxPUToAn01Ybaaj_wo,1094
-siliconcompiler/targets/fpgaflow_demo.py,sha256=0fqCaXa8_gicQCiz4m_mhI8_JY1qQlBO3mH45-YzMGA,1288
+siliconcompiler/targets/fpgaflow_demo.py,sha256=U88q6CuNH6Dy9nT3WNGkd_rOkGPohUM0eUB8zCERa9s,1216
 siliconcompiler/targets/freepdk45_demo.py,sha256=O983Nwrs9h_HHlHtlUUrP0cPgdf3IlME1yWXCRgdL_A,1953
 siliconcompiler/targets/gf180_demo.py,sha256=-GiyRNVnoouILXV7_mCANSsOT6gmlmFKqn0JOJ_vS9g,3062
 siliconcompiler/targets/ihp130_demo.py,sha256=3nCxfM0-XpZWjhE1yQezZKBGJwtf6AjpeinPM4z6wv0,2688
@@ -340,10 +340,9 @@ siliconcompiler/tools/yosys/techmaps/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeu
 siliconcompiler/tools/yosys/techmaps/lcu_kogge_stone.v,sha256=M4T-ygiKmlsprl5eGGLaV5w6HVqlEepn0wlUDmOkapg,773
 siliconcompiler/tools/yosys/templates/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
 siliconcompiler/tools/yosys/templates/abc.const,sha256=TAq9ThdLMYCJGrtToEU0gWcLuEtjE4Gk8huBbTm1v-I,116
-siliconcompiler/toolscripts/_tools.json,sha256=RWgVsyLPWBwui9J7ugmYUCn2qlv_jJ1Ton2DdxaBDkE,4403
+siliconcompiler/toolscripts/_tools.json,sha256=wySmyhpCEJPhBq-q0O85A0Jnzz8ygKlXT2sTudSV88g,4403
 siliconcompiler/toolscripts/_tools.py,sha256=P30KY_xbbjl8eHGsPAxDcAzWvJJpiL07ZfGZZDQbdR8,7174
 siliconcompiler/toolscripts/rhel8/install-chisel.sh,sha256=lPORZN7vlBX6sJSv01JOIiDE9-_7GcCZGA7EP5ri3MQ,525
-siliconcompiler/toolscripts/rhel8/install-ghdl.sh,sha256=xCLeEUuJVI_6PVEvnTwBsTWoEHiQg0TY3x-tJXfg6Zk,459
 siliconcompiler/toolscripts/rhel8/install-icarus.sh,sha256=4N2Y2H01impqJy0k5aUDFrF9Z2oonGqPGeHCXey-2VM,771
 siliconcompiler/toolscripts/rhel8/install-klayout.sh,sha256=lUCSc0Yr0NBUMVragNyJsWoHfHfOceKRH9i9xsgICV0,393
 siliconcompiler/toolscripts/rhel8/install-magic.sh,sha256=ugiH7ybdxQggs0ucUHiVtCOO142XOh5OhOmmt_aZXRs,609
@@ -355,9 +354,6 @@ siliconcompiler/toolscripts/rhel8/install-sv2v.sh,sha256=AsC_FC7rzj4M570c5eS4Iyh
 siliconcompiler/toolscripts/rhel8/install-verible.sh,sha256=kg-pijYcNsU81Qegx5mhllGc4F0P_xiMXlRDUnczwlo,557
 siliconcompiler/toolscripts/rhel8/install-verilator.sh,sha256=W2vf3_r41LrFkug_J7AgUxcHGZrqJLwagbWhjadASrw,692
 siliconcompiler/toolscripts/rhel8/install-xyce.sh,sha256=rVAt5gIDJNW6gCtuyuRN0VCjEcp9n0S9vtvVJtJzZ_Y,1734
-siliconcompiler/toolscripts/rhel8/install-yosys-moosic.sh,sha256=F6S160uSA0JJUtJe46G3kV8U5ZqTkCz6NX4zEI47Leo,381
-siliconcompiler/toolscripts/rhel8/install-yosys-slang.sh,sha256=qBz2tciVxw5S7xD4ZxTuAeRUZkImKxIWJCU0Nu_RhVs,512
-siliconcompiler/toolscripts/rhel8/install-yosys.sh,sha256=glhUBRePmFRIJ6tUCtlZoRMftnErspiqTp4ad5uQt0E,658
 siliconcompiler/toolscripts/rhel9/install-chisel.sh,sha256=lPORZN7vlBX6sJSv01JOIiDE9-_7GcCZGA7EP5ri3MQ,525
 siliconcompiler/toolscripts/rhel9/install-ghdl.sh,sha256=lVBBvBOu4WInmZ4asSGObggjlDRslSN0MiQs3qPOHtU,469
 siliconcompiler/toolscripts/rhel9/install-gtkwave.sh,sha256=dQa8nY6c2okYOHCkxi5FMJciIjmO-NdjxWH8CUyqiOY,882
@@ -432,12 +428,12 @@ siliconcompiler/toolscripts/ubuntu24/install-bluespec.sh,sha256=MlylMZfFsZq74LnH
 siliconcompiler/toolscripts/ubuntu24/install-chisel.sh,sha256=lPORZN7vlBX6sJSv01JOIiDE9-_7GcCZGA7EP5ri3MQ,525
 siliconcompiler/toolscripts/ubuntu24/install-ghdl.sh,sha256=BrvE2Y3VvUIH4U4lScMb2aRKx0TMEscynHswYUslY6U,467
 siliconcompiler/toolscripts/ubuntu24/install-gtkwave.sh,sha256=F_eeWegI7RHlEnzwyGEE6jdrpNccd-z666xf2ufuuuo,615
-siliconcompiler/toolscripts/ubuntu24/install-icarus.sh,sha256=KHIjKwwA2C9s5jkYzcWWifHpiSc-ewywjyqLk-giB0U,525
+siliconcompiler/toolscripts/ubuntu24/install-icarus.sh,sha256=e5aNPOsCnSrbMjbly0SaA-j8xTdqofOKDOV_yU0bHe4,554
 siliconcompiler/toolscripts/ubuntu24/install-icepack.sh,sha256=PM7gT42Ew8mSE5G_AA_jl_9oL3M_qcvT92xDdFRJoZ0,661
 siliconcompiler/toolscripts/ubuntu24/install-klayout.sh,sha256=f4l-Z86LAkjdo5NLq89ORfkjE0Mjygyp84VYi7gEWUU,906
 siliconcompiler/toolscripts/ubuntu24/install-magic.sh,sha256=GpvT3DGk0IuJ60-dbANfdcZCsncNMe36yNk2bAMudPI,513
 siliconcompiler/toolscripts/ubuntu24/install-montage.sh,sha256=uA57mEs9lb1Fcn7bf59w0tCKuIOeEcaijo2gip2En7Y,55
-siliconcompiler/toolscripts/ubuntu24/install-netgen.sh,sha256=EEndaKckf3U7656hxPqmYPVlJz20LUMWfmpGIaGQvtw,477
+siliconcompiler/toolscripts/ubuntu24/install-netgen.sh,sha256=wPlSqnsCIE9XNsT63dir-iBgpvSoDpqj-HHh48-LwVE,480
 siliconcompiler/toolscripts/ubuntu24/install-nextpnr.sh,sha256=HDp6MFvliWywBmZYnkl3d69oxYy6ersjROfVQV2079E,770
 siliconcompiler/toolscripts/ubuntu24/install-openroad.sh,sha256=Hwe7jGhSUf6nIhkeGGPsu62ObWECkha1ktL0owE5cy0,646
 siliconcompiler/toolscripts/ubuntu24/install-slang.sh,sha256=PEjzoCr0l1C33RdF-C61yiQZOHcgtEyXED4lnFBk82Q,550
@@ -452,13 +448,13 @@ siliconcompiler/toolscripts/ubuntu24/install-xyce.sh,sha256=33Iq99sLdiVWFl4zpD2h
 siliconcompiler/toolscripts/ubuntu24/install-yosys-moosic.sh,sha256=F6S160uSA0JJUtJe46G3kV8U5ZqTkCz6NX4zEI47Leo,381
 siliconcompiler/toolscripts/ubuntu24/install-yosys-slang.sh,sha256=qBz2tciVxw5S7xD4ZxTuAeRUZkImKxIWJCU0Nu_RhVs,512
 siliconcompiler/toolscripts/ubuntu24/install-yosys.sh,sha256=s9PU3DpkDoY0OoTQcDb00g-KAr1vqDFJRr1uaM2mJNw,730
-siliconcompiler/utils/__init__.py,sha256=y4S1sRW2C3oYXN6PMZOHFO8-ytQ8yJvUoQtqKlnF5dQ,16162
+siliconcompiler/utils/__init__.py,sha256=mxZB2mAgCtwfwITfZcrLWTDZxjeEWnAjHcmO-UE7Cbc,15891
 siliconcompiler/utils/asic.py,sha256=cMLs7dneSmh5BlHS0-bZ1tLUpvghTw__gNaUCMpyBds,4986
 siliconcompiler/utils/logging.py,sha256=5tabLIVEftStGDeDulhfBdw4SFp5nHa4J3ZTJKHny8Q,2325
 siliconcompiler/utils/showtools.py,sha256=gaAvjMTFlx_0qLKOtpRJx8Bs51TEeQ-4Pjj8kHfFf3o,1871
-siliconcompiler-0.32.0.dist-info/LICENSE,sha256=lbLR6sRo_CYJOf7SVgHi-U6CZdD8esESEZE5TZazOQE,10766
-siliconcompiler-0.32.0.dist-info/METADATA,sha256=lJeiO2qnQWV9G523iaU4vKHydWLepMChWvkUskYzBDo,11331
-siliconcompiler-0.32.0.dist-info/WHEEL,sha256=52BFRY2Up02UkjOa29eZOS2VxUrpPORXg1pkohGGUS8,91
-siliconcompiler-0.32.0.dist-info/entry_points.txt,sha256=69hHdWZQBugdza9dYdxodDySxmq6TgwpRYMeH2KfD4Q,1078
-siliconcompiler-0.32.0.dist-info/top_level.txt,sha256=H8TOYhnEUZAV1RJTa8JRtjLIebwHzkQUhA2wkNU2O6M,16
-siliconcompiler-0.32.0.dist-info/RECORD,,
+siliconcompiler-0.32.1.dist-info/LICENSE,sha256=lbLR6sRo_CYJOf7SVgHi-U6CZdD8esESEZE5TZazOQE,10766
+siliconcompiler-0.32.1.dist-info/METADATA,sha256=qEtLu-MCzDVeFZrNFAQO6Y3wDOVn6tN9KRQMKRHr2FQ,11331
+siliconcompiler-0.32.1.dist-info/WHEEL,sha256=52BFRY2Up02UkjOa29eZOS2VxUrpPORXg1pkohGGUS8,91
+siliconcompiler-0.32.1.dist-info/entry_points.txt,sha256=wrM4IhEbFF8epxB8Uun6DZO51viXDqj-KWV0SjVDtN0,1131
+siliconcompiler-0.32.1.dist-info/top_level.txt,sha256=H8TOYhnEUZAV1RJTa8JRtjLIebwHzkQUhA2wkNU2O6M,16
+siliconcompiler-0.32.1.dist-info/RECORD,,

{siliconcompiler-0.32.0.dist-info → siliconcompiler-0.32.1.dist-info}/entry_points.txt

@@ -21,6 +21,7 @@ tools = siliconcompiler.sphinx_ext:tools
 
 [siliconcompiler.path_resolver]
 git = siliconcompiler.package.git:get_resolver
+github = siliconcompiler.package.github:get_resolver
 https = siliconcompiler.package.https:get_resolver
 
 [siliconcompiler.show]

siliconcompiler/fpgas/vpr_example.py

@@ -1,116 +0,0 @@
-import os
-import siliconcompiler
-from siliconcompiler.utils import register_sc_data_source
-
-
-####################################################
-# Setup for vpr_example Family FPGAs
-####################################################
-def setup():
-    '''
-    The vpr_example FPGA family is a set of
-    open source architectures used as illustrative
-    examples for academic FPGA architectures.  They
-    are based on numerous examples furnished over the
-    the years by the University of Toronto with different
-    distributions of VPR
-
-    For more information about VPR and its architecture models,
-    see Murray et. al, "VTR 8: High Performance CAD and Customizable
-    FPGA Architecture Modelling", ACM Trans. Reconfigurable Technol.
-    Syst., 2020, https://www.eecg.utoronto.ca/~kmurray/vtr/vtr8_trets.pdf
-    '''
-
-    vendor = 'N/A'
-
-    flow_root = os.path.join('examples', 'fpga_flow')
-
-    lut_size = '4'
-
-    all_fpgas = []
-
-    all_part_names = [
-        'example_arch_X005Y005',
-        'example_arch_X008Y008',
-        'example_arch_X014Y014',
-        'example_arch_X030Y030',
-    ]
-
-    # Settings common to all parts in family
-    for part_name in all_part_names:
-        fpga = siliconcompiler.FPGA(part_name, package='siliconcompiler_data')
-        register_sc_data_source(fpga)
-
-        fpga.set('fpga', part_name, 'vendor', vendor)
-
-        # Part name is specified per architecture file.  Device code specifies
-        # which <fixed_layout> name to use when running VPR.  These examples
-        # use the following names:
-        if (part_name == 'example_arch_X005Y005'):
-            fpga.set('fpga', part_name, 'var', 'vpr_device_code', 'fpga_beta')
-        else:
-            fpga.set('fpga', part_name, 'var', 'vpr_device_code', part_name)
-
-        fpga.set('fpga', part_name, 'lutsize', lut_size)
-
-        arch_root = os.path.join(flow_root, 'arch', part_name)
-        fpga.set('fpga', part_name, 'file', 'archfile', os.path.join(arch_root, f'{part_name}.xml'))
-
-        fpga.set('fpga', part_name, 'var', 'vpr_clock_model', 'ideal')
-
-        if (part_name == 'example_arch_X005Y005'):
-            arch_root = os.path.join(flow_root, 'arch', part_name)
-            fpga.set('fpga', part_name, 'file', 'graphfile',
-                     os.path.join(arch_root, 'example_arch_X005Y005_rr_graph.xml'))
-            fpga.set('fpga', part_name, 'var', 'channelwidth', '32')
-
-        if (part_name == 'example_arch_X008Y008'):
-            # No RR graph for this architecture to support testing
-            fpga.set('fpga', part_name, 'var', 'channelwidth', '32')
-
-        if ((part_name == 'example_arch_X014Y014') or (part_name == 'example_arch_X030Y030')):
-
-            techlib_root = os.path.join(flow_root, 'techlib')
-
-            if (part_name == 'example_arch_X014Y014'):
-                fpga.set('fpga', part_name, 'file', 'constraints_map',
-                         os.path.join(arch_root, f'{part_name}_constraint_map.json'))
-
-            fpga.set('fpga', part_name, 'var', 'channelwidth', '80')
-            fpga.add('fpga', part_name, 'var', 'feature_set', 'async_set')
-            fpga.add('fpga', part_name, 'var', 'feature_set', 'async_reset')
-            fpga.add('fpga', part_name, 'var', 'feature_set', 'enable')
-            fpga.add('fpga', part_name, 'file', 'yosys_flop_techmap',
-                     os.path.join(techlib_root, 'example_arch_techmap_flops.v'))
-
-            fpga.add('fpga', part_name, 'file', 'yosys_dsp_techmap',
-                     os.path.join(techlib_root, 'example_arch_techmap_dsp.v'))
-
-            fpga.add('fpga', part_name, 'file', 'yosys_extractlib',
-                     os.path.join(techlib_root, 'example_arch_techmap_dsp_extract.v'))
-
-            # The same library used for the extraction pass can also be used to
-            # define macros that can be passed through synthesis, specify that here
-            fpga.add('fpga', part_name, 'file', 'yosys_macrolib',
-                     os.path.join(techlib_root, 'example_arch_techmap_dsp_extract.v'))
-
-            fpga.add('fpga', part_name, 'var', 'yosys_dsp_options', 'DSP_A_MAXWIDTH=18')
-            fpga.add('fpga', part_name, 'var', 'yosys_dsp_options', 'DSP_B_MAXWIDTH=18')
-            fpga.add('fpga', part_name, 'var', 'yosys_dsp_options', 'DSP_A_MINWIDTH=2')
-            fpga.add('fpga', part_name, 'var', 'yosys_dsp_options', 'DSP_B_MINWIDTH=2')
-            fpga.add('fpga', part_name, 'var', 'yosys_dsp_options', 'DSP_NAME=_dsp_block_')
-
-            fpga.add('fpga', part_name, 'file', 'yosys_memory_techmap',
-                     os.path.join(techlib_root, 'example_arch_techmap_bram.v'))
-            fpga.add('fpga', part_name, 'file', 'yosys_memory_libmap',
-                     os.path.join(techlib_root, 'example_arch_bram_memory_map.txt'))
-
-        all_fpgas.append(fpga)
-
-    return all_fpgas
-
-
-#########################
-if __name__ == "__main__":
-    for fpga in setup(siliconcompiler.Chip('<fpga>')):
-        fpga.write_manifest(f'{fpga.design}.json')

siliconcompiler/toolscripts/rhel8/install-ghdl.sh

@@ -1,25 +0,0 @@
-#!/bin/sh
-
-set -e
-
-# Get directory of script
-src_path=$(cd -- "$(dirname "$0")" >/dev/null 2>&1 ; pwd -P)/..
-
-sudo yum install -y gcc-gnat zlib-devel
-
-mkdir -p deps
-cd deps
-
-git clone $(python3 ${src_path}/_tools.py --tool ghdl --field git-url) ghdl
-cd ghdl
-git checkout $(python3 ${src_path}/_tools.py --tool ghdl --field git-commit)
-
-args=
-if [ ! -z ${PREFIX} ]; then
-    args=--prefix="$PREFIX"
-fi
-
-./configure $args
-make -j$(nproc)
-sudo make install
-cd -

siliconcompiler/toolscripts/rhel8/install-yosys-moosic.sh

@@ -1,17 +0,0 @@
-#!/bin/bash
-
-set -e
-
-# Get directory of script
-src_path=$(cd -- "$(dirname "$0")" >/dev/null 2>&1 ; pwd -P)/..
-
-mkdir -p deps
-cd deps
-
-git clone $(python3 ${src_path}/_tools.py --tool yosys-moosic --field git-url) yosys-moosic
-cd yosys-moosic
-git checkout $(python3 ${src_path}/_tools.py --tool yosys-moosic --field git-commit)
-
-make -j$(nproc)
-sudo PATH="$PATH" make install
-cd -

siliconcompiler/toolscripts/rhel8/install-yosys-slang.sh

@@ -1,22 +0,0 @@
-#!/bin/bash
-
-set -e
-
-# Get directory of script
-src_path=$(cd -- "$(dirname "$0")" >/dev/null 2>&1 ; pwd -P)/..
-
-mkdir -p deps
-cd deps
-
-python3 -m venv .yosys-slang --clear
-. .yosys-slang/bin/activate
-python3 -m pip install cmake
-
-git clone $(python3 ${src_path}/_tools.py --tool yosys-slang --field git-url) yosys-slang
-cd yosys-slang
-git checkout $(python3 ${src_path}/_tools.py --tool yosys-slang --field git-commit)
-git submodule update --init --recursive
-
-make -j$(nproc)
-sudo PATH="$PATH" make install
-cd -

siliconcompiler/toolscripts/rhel8/install-yosys.sh

@@ -1,23 +0,0 @@
-#!/bin/bash
-
-set -e
-
-# Get directory of script
-src_path=$(cd -- "$(dirname "$0")" >/dev/null 2>&1 ; pwd -P)/..
-
-# From: https://github.com/YosysHQ/yosys/blob/f2c689403ace0637b7455bac8f1e8d4bc312e74f/README.md
-sudo yum group install -y "Development Tools"
-sudo yum install -y bison flex readline-devel gawk \
-	tcl-devel libffi-devel zlib-devel boost-devel
-
-mkdir -p deps
-cd deps
-
-git clone $(python3 ${src_path}/_tools.py --tool yosys --field git-url) yosys
-cd yosys
-git checkout $(python3 ${src_path}/_tools.py --tool yosys --field git-commit)
-git submodule update --init --recursive
-
-make -j$(nproc) PREFIX="$PREFIX"
-sudo make install PREFIX="$PREFIX"
-cd -