siliconcompiler 0.31.1__py3-none-any.whl → 0.32.1__py3-none-any.whl

siliconcompiler/tools/surelog/__init__.py

@@ -10,7 +10,12 @@ Sources: https://github.com/chipsalliance/Surelog
 Installation: https://github.com/chipsalliance/Surelog
 '''
 
-import surelog
+import sys
+try:
+    import surelog
+except ModuleNotFoundError:
+    surelog = None
+
 from siliconcompiler.tools._common import get_tool_task
 
 
@@ -31,9 +36,17 @@ def setup(chip):
 
     is_docker = chip.get('option', 'scheduler', 'name', step=step, index=index) == 'docker'
     if not is_docker:
-        exe = surelog.get_bin()
+        if surelog:
+            exe = surelog.get_bin()
+        else:
+            exe = 'surelog'
+            if sys.platform.startswith("win32"):
+                exe = f"{exe}.exe"
     else:
-        exe = surelog.get_bin('linux')
+        if surelog:
+            exe = surelog.get_bin('linux')
+        else:
+            exe = 'surelog'
 
     # Standard Setup
     chip.set('tool', tool, 'exe', exe)
@@ -43,7 +56,7 @@ def setup(chip):
     # We package SC wheels with a precompiled copy of Surelog installed to
     # tools/surelog/bin. If the user doesn't have Surelog installed on their
     # system path, set the path to the bundled copy in the schema.
-    if not surelog.has_system_surelog() and not is_docker:
+    if surelog and not surelog.has_system_surelog() and not is_docker:
         chip.set('tool', tool, 'path', surelog.get_path(), clobber=False)
 
     # Log file parsing

siliconcompiler/toolscripts/_tools.json

@@ -1,7 +1,7 @@
 {
   "openroad": {
     "git-url": "https://github.com/The-OpenROAD-Project/OpenROAD.git",
-    "git-commit": "1d7f91584c040b73089e415ec12fd806da1c1161",
+    "git-commit": "c2eb4321bdfcbf353eaf72b7d37bb57071500a59",
     "docker-cmds": [
       "# Remove OR-Tools files",
       "RUN rm -f $SC_PREFIX/Makefile $SC_PREFIX/README.md",
@@ -36,7 +36,7 @@
     "auto-update": false
   },
   "klayout": {
-    "version": "0.29.11",
+    "version": "0.29.12",
     "git-url": "https://github.com/KLayout/klayout.git",
     "docker-skip": true,
     "auto-update": true,
@@ -91,7 +91,7 @@
   },
   "yosys": {
     "git-url": "https://github.com/YosysHQ/yosys.git",
-    "git-commit": "v0.50",
+    "git-commit": "v0.51",
     "version-prefix": "",
     "auto-update": true
   },

siliconcompiler/toolscripts/ubuntu24/install-icarus.sh

@@ -5,7 +5,8 @@ set -e
 # Get directory of script
 src_path=$(cd -- "$(dirname "$0")" >/dev/null 2>&1 ; pwd -P)/..
 
-sudo apt-get install -y build-essential bison flex gperf libreadline-dev libncurses-dev
+sudo apt-get install -y build-essential bison flex gperf libreadline-dev libncurses-dev \
+    autotools-dev automake
 
 mkdir -p deps
 cd deps

siliconcompiler/toolscripts/ubuntu24/install-netgen.sh

@@ -5,7 +5,7 @@ set -e
 # Get directory of script
 src_path=$(cd -- "$(dirname "$0")" >/dev/null 2>&1 ; pwd -P)/..
 
-sudo apt-get install -y build-essential tcl-dev tk-dev
+sudo apt-get install -y build-essential tcl-dev tk-dev m4
 
 mkdir -p deps
 cd deps

siliconcompiler/units.py

@@ -41,7 +41,7 @@ SI_TYPES = (
     'V',
     'W',
     'ohm',
-    'C',
+    'C'
 )
 
 
@@ -107,8 +107,6 @@ def get_si_prefix(unit):
         if matches:
             return matches[0][0]
 
-    return ''
-
 
 def get_si_power(unit):
     '''
@@ -164,6 +162,11 @@ def format_si(value, unit, margin=3, digits=3):
         digits (int): number of digits to print after .
     '''
     scaled_value, prefix = scale_si(value, unit, margin=margin, digits=digits)
+
+    if digits < 0:
+        # Default to 1
+        digits = 1
+
     # need to do this in case float shortens scaled_value
     return f'{scaled_value:.{digits}f}{prefix}'
 
@@ -179,14 +182,14 @@ def scale_si(value, unit, margin=3, digits=3):
             when picking the right magnitude
         digits (int): number of digits to print after .
     '''
+    if digits < 0:
+        # Default to 1
+        digits = 1
+
     if unit and is_base_si_unit(unit):
         value = float(value)
         log_value = math.log10(value) - margin
 
-        if digits < 0:
-            # Default to 0
-            digits = 0
-
         for prefix, scale in SI_UNITS:
             if log_value <= scale:
                 value /= 10**scale

siliconcompiler/use.py

@@ -12,6 +12,7 @@ class PackageChip(Chip):
         super().__init__(name)
 
         if len(args) == 2:
+            self.logger = args[0].logger
             self.logger.warning(
                 f'passing Chip object to {name} ({type(self).__name__}) is deprecated')
 
@@ -155,7 +156,8 @@ class Flow(Chip):
     def __init__(self, *args):
         super().__init__(args[-1])
         if len(args) == 2:
-            self.logger.warning(f'passing Chip object to {type(self)} is deprecated')
+            self.logger = args[0].logger
+            self.logger.warning(f'passing Chip object to {self.design} (Flow) is deprecated')
 
 
 class Checklist(Chip):
@@ -175,4 +177,5 @@ class Checklist(Chip):
     def __init__(self, *args):
         super().__init__(args[-1])
         if len(args) == 2:
-            self.logger.warning(f'passing Chip object to {type(self)} is deprecated')
+            self.logger = args[0].logger
+            self.logger.warning(f'passing Chip object to {self.design} (Checklist) is deprecated')

siliconcompiler/utils/__init__.py

@@ -5,7 +5,6 @@ import re
 import psutil
 import shutil
 from pathlib import Path, PurePosixPath
-from siliconcompiler._metadata import version as sc_version
 from jinja2 import Environment, FileSystemLoader
 
 import sys
@@ -15,11 +14,6 @@ else:
     from importlib.metadata import entry_points
 
 
-PACKAGE_ROOT = os.path.dirname(os.path.dirname(os.path.abspath(__file__)))
-
-_siliconcompiler_data_path = 'git+https://github.com/siliconcompiler/siliconcompiler'
-
-
 def link_symlink_copy(srcfile, dstfile):
     # first try hard linking, then symbolic linking,
     # and finally just copy the file
@@ -223,12 +217,6 @@ def default_email_credentials_file():
     return cfg_file
 
 
-def register_sc_data_source(chip):
-    chip.register_source('siliconcompiler_data',
-                         _siliconcompiler_data_path,
-                         'v'+sc_version)
-
-
 @contextlib.contextmanager
 def sc_open(path, *args, **kwargs):
     kwargs['errors'] = 'ignore_with_warning'
@@ -240,7 +228,10 @@ def sc_open(path, *args, **kwargs):
         pass
 
 
-def get_file_template(path, root=os.path.join(PACKAGE_ROOT, 'templates')):
+def get_file_template(path,
+                      root=os.path.join(
+                          os.path.dirname(
+                              os.path.dirname(os.path.abspath(__file__))), 'templates')):
     if os.path.isabs(path):
         root = os.path.dirname(path)
         path = os.path.basename(path)
@@ -266,7 +257,7 @@ def safecompare(chip, value, op, goal):
     elif op == "!=":
         return bool(value != goal)
     else:
-        chip.error(f"Illegal comparison operation {op}")
+        raise ValueError(f"Illegal comparison operation {op}")
 
 
 ###########################################################################

{siliconcompiler-0.31.1.dist-info → siliconcompiler-0.32.1.dist-info}/METADATA

@@ -1,6 +1,6 @@
 Metadata-Version: 2.2
 Name: siliconcompiler
-Version: 0.31.1
+Version: 0.32.1
 Summary: A compiler framework that automates translation from source code to silicon.
 Author-email: Andreas Olofsson <andreas.d.olofsson@gmail.com>
 License: Apache License 2.0
@@ -45,10 +45,10 @@ Requires-Dist: fasteners==0.19
 Requires-Dist: fastjsonschema==2.21.1
 Requires-Dist: docker==7.1.0
 Requires-Dist: importlib_metadata; python_version < "3.10"
-Requires-Dist: sc-surelog==1.84.1
 Requires-Dist: orjson==3.10.15
+Requires-Dist: pyslang==8.0.0
 Requires-Dist: streamlit==1.40.1; python_version <= "3.8"
-Requires-Dist: streamlit==1.42.2; python_version >= "3.9" and python_full_version != "3.9.7"
+Requires-Dist: streamlit==1.43.1; python_version >= "3.9" and python_full_version != "3.9.7"
 Requires-Dist: streamlit_agraph==0.0.45; python_full_version != "3.9.7"
 Requires-Dist: streamlit-antd-components==0.3.2; python_full_version != "3.9.7"
 Requires-Dist: streamlit_javascript==0.1.5; python_full_version != "3.9.7"
@@ -74,9 +74,6 @@ Requires-Dist: pydata-sphinx-theme==0.16.1; extra == "docs"
 Requires-Dist: sc-leflib>=0.2.0; extra == "docs"
 Provides-Extra: profile
 Requires-Dist: gprof2dot==2024.6.6; extra == "profile"
-Provides-Extra: examples
-Requires-Dist: migen==0.9.2; extra == "examples"
-Requires-Dist: lambdalib==0.3.3; extra == "examples"
 Provides-Extra: optimizer
 Requires-Dist: google-vizier[jax]==0.1.21; python_version >= "3.10" and extra == "optimizer"
 

{siliconcompiler-0.31.1.dist-info → siliconcompiler-0.32.1.dist-info}/RECORD

@@ -1,24 +1,24 @@
 siliconcompiler/__init__.py,sha256=Ke_Bcryj9N6MoUq_5z_IDW3qMrUzR-3-kJVsvUenYzY,511
 siliconcompiler/__main__.py,sha256=JwWkcvaNngqgMWprEQ1cFy2Wdq9GMvk46UGTHyh_qvM,170
 siliconcompiler/_common.py,sha256=c6r0SbI2xTpNOZayFsyCDo0riJGNJSPN-0zW8R7rDBI,1488
-siliconcompiler/_metadata.py,sha256=i_Lo3T11LBCBNlSyyLdOKcVrSbKRGv-UmYl4l1ROY4w,1264
-siliconcompiler/core.py,sha256=CA7SEpDkVHucYaD8c8tctObqtep3cEcasJN1SmESMxg,139774
+siliconcompiler/_metadata.py,sha256=lAUnYGIiSC2Gju4xfT-0tw5oPuAIZAJFq_4BI3zHSR0,1264
+siliconcompiler/core.py,sha256=_VQxqJns00FhDkN0Q-FOAWfz6ezo0zFdZ4bdADOSxWs,138941
 siliconcompiler/flowgraph.py,sha256=Z_c4DEh1JvHE_u0O2M2Y1_dn6aGOAECX-HzrIjn0ky4,22084
 siliconcompiler/issue.py,sha256=9ZpdEBh8QB56-bZ1YXRnjqgg9hwnFty2u1o5oI66W7M,11125
-siliconcompiler/units.py,sha256=SHQWTKuiaYHqqTbhspsED0gw-4Lb7f5VKunWy9dhS3s,5810
-siliconcompiler/use.py,sha256=t5TodYt9tkYjNIdB6Ak-P3Gf2dgpX9Q-WXGBTLtVdQo,6058
+siliconcompiler/units.py,sha256=M_ZxViSysymv8mFdCtbQwfccEwEsBeiCmc8TcnoXZbk,5845
+siliconcompiler/use.py,sha256=zu17ogJv0x2t_6J9yb_5tH1DjridVQj0MrIRxJRJVGQ,6202
 siliconcompiler/apps/__init__.py,sha256=6LuAljPtVB6g5yXl_58ODoB4Svb6UfKaDbX1e0aNZfE,668
-siliconcompiler/apps/_common.py,sha256=Ph-cD-t9lCzavak3s4YCXXmA_ouf-jJ-7WIEGkSsjOg,3770
-siliconcompiler/apps/sc.py,sha256=DAhhyfpHEN0mDmQ3YcFWpGk7R64OEpguZ2QCEFGxyr4,3235
-siliconcompiler/apps/sc_dashboard.py,sha256=kGyMYbgKgZMBUrTyft6mEvRnmcrKA7JunrkWZ8VwSwM,3478
+siliconcompiler/apps/_common.py,sha256=YK5zNHHnHeEWwcK27wXwsaApsrphUenh9uQzGf2zKvs,4425
+siliconcompiler/apps/sc.py,sha256=qHrfzgt1y748jX0nLXn9Hx1WuwXXmHFGhF4LaQTCpeE,3259
+siliconcompiler/apps/sc_dashboard.py,sha256=60ccCeC6RxPSt4uxej6bEJlpwViiEvRbZlqXtAItf98,3633
 siliconcompiler/apps/sc_install.py,sha256=qz6Dni7HcYrl9V7mDk2hqMYY4BwqRceNb-Gd2UE5zzk,8569
 siliconcompiler/apps/sc_issue.py,sha256=PUXFWne6MWY0Ntak3PnMZ84tpEZ5S1Pta5B3AkxMdoY,6404
 siliconcompiler/apps/sc_remote.py,sha256=vMdh9LdFJ-0vFzYMFttcERXCFwzNMmAQyXPIxoNCmhg,7168
 siliconcompiler/apps/sc_server.py,sha256=d3SCfKtNneIBiAk7Udc5SqXvSIoFSK40iHWcKuY7unk,894
-siliconcompiler/apps/sc_show.py,sha256=H0_evnBqr02FJVlIaFIva4RrYZ6M2otlWTaTCqFQPlg,4653
+siliconcompiler/apps/sc_show.py,sha256=q3ccwnq3eLE0kC5PlL7n1tcvTzhRqj0q7u-4k_Cxu2Y,4809
 siliconcompiler/apps/smake.py,sha256=jj69IuMLf4jblpVGeLT3GAvC-zDLHwPq16YPKtHosdA,7124
 siliconcompiler/apps/utils/replay.py,sha256=iAsYFb2mVcXw3c9SYV1pFiiQLwZKiub9uQjsO5v-hlo,5901
-siliconcompiler/apps/utils/summarize.py,sha256=mcViWpuS8UI2JqOF-QD99YAl0tjiy6_TbVl_coRCmNI,1291
+siliconcompiler/apps/utils/summarize.py,sha256=CC6YwyEShiuZekU-D1Uk_m074aj8LviwotcgJMvZhuY,1250
 siliconcompiler/checklists/__init__.py,sha256=xnrgpMdgDLoYinDXVXRIAhX__BiBpBw16_gmg2dAwYo,247
 siliconcompiler/checklists/oh_tapeout.py,sha256=xBXAHOVNslFUlOfVTLLoPEJazczP8MTsa5EGo5GYQk0,1441
 siliconcompiler/data/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
@@ -28,7 +28,7 @@ siliconcompiler/data/RobotoMono/LICENSE.txt,sha256=Pd-b5cKP4n2tFDpdx27qJSIq0d1ok
 siliconcompiler/data/RobotoMono/RobotoMono-Regular.ttf,sha256=w8iOaiprWYm5hBNPzFHOaddn_RgCWHLoz0FsBMTaryA,86908
 siliconcompiler/data/RobotoMono/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
 siliconcompiler/flows/__init__.py,sha256=NwHSILM3yG962UqpgCYyvh07IZ1oLtIh5L-ia_BHrXg,996
-siliconcompiler/flows/_common.py,sha256=hcKVUPRK74t6JYU23UnY4qkFnu1-uauLwzsZjqzaYu0,2110
+siliconcompiler/flows/_common.py,sha256=jySYBv7xKMwQ0Uo2rUbvmaopVUMY_Xv_iIvFv_pcPqQ,2392
 siliconcompiler/flows/asicflow.py,sha256=Hj0goWMxYGSqLmX_07z_uFePJvWcDGhY0afTeJblz7E,8113
 siliconcompiler/flows/asictopflow.py,sha256=UosrdJhh_NVyjigzz2KGhqcy2UBotkwTUUnCdOVaZXg,1155
 siliconcompiler/flows/drcflow.py,sha256=CinpSA2eHtqSlOIxTeXSoyV_TstFZ7uZ1VA9qAHihh8,230
@@ -42,14 +42,14 @@ siliconcompiler/flows/showflow.py,sha256=1pIeRo5IwPPrlm8luY4QGrFYmg66m13ImCAeoEr
 siliconcompiler/flows/signoffflow.py,sha256=y3sM5M2HesrRYidKCZ6obDvYwzxAbD3qVEuHekAAaTI,1515
 siliconcompiler/flows/synflow.py,sha256=Tydj7b_Aq610IOoo4CQ_FA4Nletvfn-l2XyZ0NHlJdc,3957
 siliconcompiler/fpgas/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
-siliconcompiler/fpgas/lattice_ice40.py,sha256=GU0NrhBZuvMv5sWBye9h_GodKOOXBRwDLVlEy3ANXlY,1034
-siliconcompiler/fpgas/vpr_example.py,sha256=xcTgCvxSadcBnYVrglAi5XM4nn_raXWFvr_oe62tCPI,4998
+siliconcompiler/fpgas/lattice_ice40.py,sha256=NsFgGvTnBVXpJeg3IiKKufsUwV7TYl-XU6mE2jNjK60,791
 siliconcompiler/libs/__init__.py,sha256=KXw1vU0KP83fg3rB8iKkpDhJZBLz_PWGZG65L3lAQ1Q,86
 siliconcompiler/optimizer/__init__.py,sha256=wdSuv3U7hoSdZn-TkaQtYehVdhS5F35Mb1McgaUw3hc,6599
 siliconcompiler/optimizer/vizier.py,sha256=-JF3E28SLhfkjluz2R5dFnjg5NjU1z7Okb-K_ZK9H3s,9035
-siliconcompiler/package/__init__.py,sha256=Dg_GBWERdCGRPjBNxcUHBB8Zf2ns-PgLy2Xqo0tARVw,9054
-siliconcompiler/package/git.py,sha256=L6J7H8s8LNdhrhlhuEw0eU4nHx7o6iOIjIf91OcmX80,3200
-siliconcompiler/package/https.py,sha256=8jXjNUA21p4fMW9WVbystk_HZTc0KgUUiIwfq-ziuk0,2919
+siliconcompiler/package/__init__.py,sha256=4Ps97LFRmBd7-grfB8h1tQsLFF4eZYiAAuSBReX8vpo,8014
+siliconcompiler/package/git.py,sha256=c40uXesG1x-CgH7yat5Cq6iCjoUHp_jE_VXeHGtzeOk,3258
+siliconcompiler/package/github.py,sha256=NCTMkV3WKNwVasciC30qGglysRMgqEWzC-0TXSSwmbU,3768
+siliconcompiler/package/https.py,sha256=_o0VpvImgBlW_egwgWXc0JC0T0ixFSV-Gu8dGGso4hM,3210
 siliconcompiler/pdks/__init__.py,sha256=bWhtNR-Kq3fEyknon-x5vQX877b88g9EJXAHBMiDyGM,81
 siliconcompiler/remote/__init__.py,sha256=MoYnC1lkgbT5hN5Qi-0gTItaTWI2U1E8OuleffdTDSQ,977
 siliconcompiler/remote/client.py,sha256=qwZaKSt-ScYjfBFpL9Np9Z0nDytYRJHgvNJnrXHGhok,32848
@@ -72,34 +72,34 @@ siliconcompiler/remote/server_schema/responses/get_results.json,sha256=h4XraLW4h
 siliconcompiler/remote/server_schema/responses/remote_run.json,sha256=FWW_0m46qwIJHiTriISzChKHJF6G9RIwP0rmp1OjIuA,475
 siliconcompiler/report/__init__.py,sha256=ADa-8Jwy4fl2Wtg0ejy4Tvil805uwA4WWTdK125JKcs,388
 siliconcompiler/report/html_report.py,sha256=Wh5X7iQpfIEHcs-WrVE9dtDf-gkz3GhT_yf8kVG0O3o,2597
-siliconcompiler/report/report.py,sha256=cxnWdYKxB_7xpbMOZnWpRfqwg9SOB7G2d_XkRPlYmTA,15083
+siliconcompiler/report/report.py,sha256=_V8Dpxly06wDAVUVuu7yyZ2fMGV5MHkJ_9DHoxGgt24,15158
 siliconcompiler/report/summary_image.py,sha256=tKuoLiG6Whvnc8LHeSzU4FookpBkYYCMWUGb-ux2i8k,3570
 siliconcompiler/report/summary_table.py,sha256=j7MrwGacCemAWNOtyHiYop9XRQPzIEWHyRl4dfS1yI8,3386
-siliconcompiler/report/utils.py,sha256=70klZsAKwhW55kOxBBdV9zzOU-NorMk6y6riMyKXo7c,6423
+siliconcompiler/report/utils.py,sha256=bjoVGGlVpqBWxzGj__1Qg2BJ5ok4IbHGr1fEvYg0SOg,6479
 siliconcompiler/report/dashboard/__init__.py,sha256=bvSfStUvkMa1zW1R5WtzzzKKAMm9FCNiPbIIFXOotJ0,5554
 siliconcompiler/report/dashboard/state.py,sha256=qBAmLpKb0xXqf2vRbBBgYs8P71v3MGIL6z0WHoAED-Y,5924
 siliconcompiler/report/dashboard/viewer.py,sha256=scF4MkbOdqM1pRCzGWnXeMrk4r2M4Y2cDyEIrAWCFiw,1095
-siliconcompiler/report/dashboard/components/__init__.py,sha256=BkVt0JakAj9kC5WlewdvFESwygjDmhyj85xiV8oc00I,18097
-siliconcompiler/report/dashboard/components/flowgraph.py,sha256=bjPuaWlEra4HbIUIbtCkYQMNTYueSGP0WO-r16MrBss,3525
+siliconcompiler/report/dashboard/components/__init__.py,sha256=jEztqYs8s7W_eggXABaqDJ3zREdMsoLcdHCfr1Uj5LY,18538
+siliconcompiler/report/dashboard/components/flowgraph.py,sha256=RkrSJJYyPBk03jCMuhkNhTV1JOlFvFILntwV8kBsN_I,3593
 siliconcompiler/report/dashboard/components/graph.py,sha256=m9y4lxKDgTJNp_eOdLohN1bn6uE3XEnE387xnb4HnUo,6776
 siliconcompiler/report/dashboard/layouts/__init__.py,sha256=aYhWEoQg4CiwGMCcLH4Yj__d_5tD4vyb164dP2RpURY,638
 siliconcompiler/report/dashboard/layouts/_common.py,sha256=_Iz5IxftnNKYvhQNA-PWpyv8R1uejvrVUMGmUIEvPf0,1276
 siliconcompiler/report/dashboard/layouts/vertical_flowgraph.py,sha256=ml8qPg2-g3n-HW9E4znwkaYBISyloUjD19_Ooy3iCn0,3425
 siliconcompiler/report/dashboard/layouts/vertical_flowgraph_node_tab.py,sha256=09n3LqXedQOX8UizlTn9BHyepizmbwz9SIN0QB2PNkA,4229
 siliconcompiler/report/dashboard/layouts/vertical_flowgraph_sac_tabs.py,sha256=g6lrnXJVEkTh7OQY1xCgl_q0So0XewItuY0sjnjaBCA,4086
-siliconcompiler/report/dashboard/utils/__init__.py,sha256=mkcBAlfPovfgoRv9nPbtgQSeFglwlxlSIXsEQmdsDz8,2540
+siliconcompiler/report/dashboard/utils/__init__.py,sha256=1ILJbIAx2QQ12enHflzaQmj0pk8UhkC5YdZO9EPAVCo,2643
 siliconcompiler/report/dashboard/utils/file_utils.py,sha256=5MKAyf7TGXQIc3yxwbP1H6xi0NGwUfzu2j3LOv1Yei0,3333
 siliconcompiler/scheduler/__init__.py,sha256=goiNHGe41JjCKoMWIh6i3fcw9kuC7lXcAziA_bFeun4,87291
 siliconcompiler/scheduler/docker_runner.py,sha256=zeAPHgthkoR8ATY6zmV2kCJWpD13fuq2DCzzG66Ubm8,8052
-siliconcompiler/scheduler/run_node.py,sha256=XEY3SNIstK8SLnD7uiHmQ_9maCgdfTECQAJr5OT9rQI,5036
+siliconcompiler/scheduler/run_node.py,sha256=4bIFcPnP8pq4-lDyXPAEu1fk2Q8qQlnlLKwl7CQDQZo,5203
 siliconcompiler/scheduler/send_messages.py,sha256=mWmkfPVDEfzOawVq6At6fi0JgFkzyFNwAA29lYkN5Xw,6618
 siliconcompiler/scheduler/slurm.py,sha256=CAuN5xmiWhk_k3CW6yMe5iukex4CWxp5Ox6_qAzgV5Q,7097
 siliconcompiler/scheduler/validation/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
 siliconcompiler/scheduler/validation/email_credentials.json,sha256=hkJs0U2h2Bgm1zxeXvanIJ-prPhpn_aU6e3qwIs7qA0,1997
 siliconcompiler/schema/__init__.py,sha256=Gdny2AwDdg-X3RvghOHQYl3aG2alvMuK5CsSkFGKuYU,120
 siliconcompiler/schema/schema_cfg.py,sha256=oHE1hEgLFgU2r4sValymY_-84SCchU_6j0BGkXFwdjw,188876
-siliconcompiler/schema/schema_obj.py,sha256=BHMr00Et57iukxTI9hiJUHkhAw1LRbsWJcDCejeCBDg,76158
-siliconcompiler/schema/utils.py,sha256=qeAICnQuuzrcJSyotFGWA6gmunpu63AOaEtuhIcBi5c,4504
+siliconcompiler/schema/schema_obj.py,sha256=tb_iVnXzI6Sjos2BCNFKXFu4-Zm2lc4S3buTQVwdyoo,76221
+siliconcompiler/schema/utils.py,sha256=R4YZ4-iMBb7wQCsFO3oJMijOhDKcyAzIBNPEtS9E2Fg,4415
 siliconcompiler/sphinx_ext/__init__.py,sha256=nXMFqWewqjy8FZbExAp2wtVu8EmZ3cXKvomlpxnzKUE,1859
 siliconcompiler/sphinx_ext/dynamicgen.py,sha256=QwrigvFqj900Sud4qICNlKYAxqLQOxSvzqRKwNAz02o,34575
 siliconcompiler/sphinx_ext/schemagen.py,sha256=7m9mKhixVnNsrVcVzadNFsR_SB7BCFMNmOZWiGUtM20,7787
@@ -107,7 +107,7 @@ siliconcompiler/sphinx_ext/utils.py,sha256=JNktfS5nYZE_DnXRX_fwOBkc5kWgLkB0Urxbe
 siliconcompiler/targets/__init__.py,sha256=PVbYMlHPHGnkmmokOBDk4zP5tRHF1pPdP-NKpJowmCQ,770
 siliconcompiler/targets/asap7_demo.py,sha256=RBCjAx3laq2xUT7w--b9oIVx8r87QyKfBRX35JQICzw,2544
 siliconcompiler/targets/asic_demo.py,sha256=jRvbDhMZDGf-8AQ241vu8qLgloxPUToAn01Ybaaj_wo,1094
-siliconcompiler/targets/fpgaflow_demo.py,sha256=0fqCaXa8_gicQCiz4m_mhI8_JY1qQlBO3mH45-YzMGA,1288
+siliconcompiler/targets/fpgaflow_demo.py,sha256=U88q6CuNH6Dy9nT3WNGkd_rOkGPohUM0eUB8zCERa9s,1216
 siliconcompiler/targets/freepdk45_demo.py,sha256=O983Nwrs9h_HHlHtlUUrP0cPgdf3IlME1yWXCRgdL_A,1953
 siliconcompiler/targets/gf180_demo.py,sha256=-GiyRNVnoouILXV7_mCANSsOT6gmlmFKqn0JOJ_vS9g,3062
 siliconcompiler/targets/ihp130_demo.py,sha256=3nCxfM0-XpZWjhE1yQezZKBGJwtf6AjpeinPM4z6wv0,2688
@@ -213,7 +213,7 @@ siliconcompiler/tools/nextpnr/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5N
 siliconcompiler/tools/nextpnr/apr.py,sha256=dCMLDS4xnwqCoBtCKd3kwCxjIRqPn_zq3f7pkWPw5mw,802
 siliconcompiler/tools/nextpnr/nextpnr.py,sha256=B5kr-ZLnt2vDFtS4veIdf0_Cm6yvfS1QVqWhxYa8R24,1712
 siliconcompiler/tools/openroad/__init__.py,sha256=aJLiAfdleczGD9QXw7TYBGrWFiEJhaAWbQJcNlYCOts,3250
-siliconcompiler/tools/openroad/_apr.py,sha256=_ohixH7e3gDfcK6aIBYaEvs3729F_06vNRmujE4HiqE,50796
+siliconcompiler/tools/openroad/_apr.py,sha256=gfVDBZdG9EFr-Z9LRgriDgRIDBUHCtqzSfghW3BUfF0,51247
 siliconcompiler/tools/openroad/antenna_repair.py,sha256=UC4BjY_qJhYLdb_LFRUXomlmcu1mYnTJF9EAh7xYP_k,2248
 siliconcompiler/tools/openroad/clock_tree_synthesis.py,sha256=ouS1qu6cztiW7KGnDzCSCmPMYHaKbq2i69tAA44ZQS0,1710
 siliconcompiler/tools/openroad/detailed_placement.py,sha256=mvFw9E5x9AHx6h7dbwlUHwOqJFRAE4WFiWLDuM9Q-6I,1571
@@ -263,12 +263,12 @@ siliconcompiler/tools/openroad/scripts/common/procs.tcl,sha256=gcnX6ZBzTysO1YaK6
 siliconcompiler/tools/openroad/scripts/common/read_input_files.tcl,sha256=Jf1K9clDiC9N0LDwCguQMChWQTSfc7uY3Tht_C9wfAg,2089
 siliconcompiler/tools/openroad/scripts/common/read_liberty.tcl,sha256=GeXZ8H3a8fg8o-4KyfZj2N4Db_P9XArZl2T4apfMSZI,778
 siliconcompiler/tools/openroad/scripts/common/read_timing_constraints.tcl,sha256=fsHSSGXkrqOKXjwH7U8XMLMnEPoZpavBVkl4qzLugOU,515
-siliconcompiler/tools/openroad/scripts/common/reports.tcl,sha256=ErZTGPgd7sAq7zNgtSygCEM4Y3pQXrR-l7R-KwdDrlk,6553
+siliconcompiler/tools/openroad/scripts/common/reports.tcl,sha256=i6P282tAM9Yig2V1z1ShOrKLgYdysx96M4nrhl6kctc,6881
 siliconcompiler/tools/openroad/scripts/common/screenshot.tcl,sha256=OEE4JpafdOK1cVJw3sie_Fvo03ZkheElhPpvKsgCV0E,447
 siliconcompiler/tools/openroad/scripts/common/write_data.tcl,sha256=xFFgR6mCpQEy8ATfSz1kUFr2BBnaPsv4cSHnWh7JqC8,100
 siliconcompiler/tools/openroad/scripts/common/write_data_physical.tcl,sha256=X0ZsHwfQPRokkCuYjtnw_OL98R9PLjZEMxgLClhsbUg,130
 siliconcompiler/tools/openroad/scripts/common/write_data_timing.tcl,sha256=-clUY9N57lhN_sc0FpjfSj-75cMFdpPnMDiX7YFbp98,37
-siliconcompiler/tools/openroad/scripts/common/write_images.tcl,sha256=iQy1WXMLeSBn-ZhlQt44KNNdikHirvwjsHs8MnPhVfg,11926
+siliconcompiler/tools/openroad/scripts/common/write_images.tcl,sha256=xD8usvrk0NhvcJBKOMPsMtrLCfbT_vrOlh0Fc5SHC-M,12714
 siliconcompiler/tools/openroad/scripts/rcx/sc_rcx_bench.tcl,sha256=95p_XiRPA1PnofMTMUTesI4JniHnvB8f9_oANGRuC8M,692
 siliconcompiler/tools/openroad/scripts/rcx/sc_rcx_extract.tcl,sha256=Aj9J_8aiOR1WqcQvdx99WyUDcN8RafxXwtrexcS5UcU,489
 siliconcompiler/tools/openroad/templates/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
@@ -282,10 +282,10 @@ siliconcompiler/tools/opensta/scripts/sc_check_library.tcl,sha256=kpb1X4GPwNQqDo
 siliconcompiler/tools/opensta/scripts/sc_procs.tcl,sha256=4XAgyGRmkk_J2OqxA1glO46BixSgGZFdEYHmezxwwGE,1122
 siliconcompiler/tools/opensta/scripts/sc_report_libraries.tcl,sha256=LjVH3rwVXgGH4_1uXze8q390uIX62xeKu8WCsV5zj6I,2620
 siliconcompiler/tools/opensta/scripts/sc_timing.tcl,sha256=gbLr5jmD2o5SwJr04kzpPH0NcvJF-1j5R_Y6ydZgWFc,7982
-siliconcompiler/tools/slang/__init__.py,sha256=TwZSHUPYh2iyRExWdU8n7DEOhWe4DmYqumVg2gRtTqg,3894
-siliconcompiler/tools/slang/elaborate.py,sha256=txJeAY3aZT_-xckHOlGQfKOCHb1uRIVd9J1p3hTXFEs,1495
-siliconcompiler/tools/slang/lint.py,sha256=ByjgrpaJDFSJf7FhkICK7j3mUuCQrzQS_qXkhxJF1Ks,917
-siliconcompiler/tools/surelog/__init__.py,sha256=tOv1yRkW4QjKRyN5Q5uAs3ii5-ORgO2Sya1Es4n69cQ,5298
+siliconcompiler/tools/slang/__init__.py,sha256=ZPW82XeX6e7djO-Mbulixv3JkwAkmwwwDTWS8QKY-RU,6877
+siliconcompiler/tools/slang/elaborate.py,sha256=EZmyljTqb0LRqAGCemcLN2eOUdDmQmBNLlL-TXyC_P4,4739
+siliconcompiler/tools/slang/lint.py,sha256=_YdQHMEwNYuMr3rBr-fLhPWuuMI3gFxzya4MUcUXMdo,999
+siliconcompiler/tools/surelog/__init__.py,sha256=vngLIj7mmcpJwRwYdm-EAsNNjkCWRuC8sm2pW77FCi8,5594
 siliconcompiler/tools/surelog/parse.py,sha256=D2QOY0DN6-AMGX__QL83gTFNoz0nzc1uHMekObcml9s,6016
 siliconcompiler/tools/surelog/templates/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
 siliconcompiler/tools/surelog/templates/output.v,sha256=i2dvcHzXxb5rl7tnryQUaWYeqS2q_T70aKoRw0k1DaY,206
@@ -340,10 +340,9 @@ siliconcompiler/tools/yosys/techmaps/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeu
 siliconcompiler/tools/yosys/techmaps/lcu_kogge_stone.v,sha256=M4T-ygiKmlsprl5eGGLaV5w6HVqlEepn0wlUDmOkapg,773
 siliconcompiler/tools/yosys/templates/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
 siliconcompiler/tools/yosys/templates/abc.const,sha256=TAq9ThdLMYCJGrtToEU0gWcLuEtjE4Gk8huBbTm1v-I,116
-siliconcompiler/toolscripts/_tools.json,sha256=EKdv-EQ_xdD3AacY73aM4sr39gtDY71zOcffQOriQ44,4403
+siliconcompiler/toolscripts/_tools.json,sha256=wySmyhpCEJPhBq-q0O85A0Jnzz8ygKlXT2sTudSV88g,4403
 siliconcompiler/toolscripts/_tools.py,sha256=P30KY_xbbjl8eHGsPAxDcAzWvJJpiL07ZfGZZDQbdR8,7174
 siliconcompiler/toolscripts/rhel8/install-chisel.sh,sha256=lPORZN7vlBX6sJSv01JOIiDE9-_7GcCZGA7EP5ri3MQ,525
-siliconcompiler/toolscripts/rhel8/install-ghdl.sh,sha256=xCLeEUuJVI_6PVEvnTwBsTWoEHiQg0TY3x-tJXfg6Zk,459
 siliconcompiler/toolscripts/rhel8/install-icarus.sh,sha256=4N2Y2H01impqJy0k5aUDFrF9Z2oonGqPGeHCXey-2VM,771
 siliconcompiler/toolscripts/rhel8/install-klayout.sh,sha256=lUCSc0Yr0NBUMVragNyJsWoHfHfOceKRH9i9xsgICV0,393
 siliconcompiler/toolscripts/rhel8/install-magic.sh,sha256=ugiH7ybdxQggs0ucUHiVtCOO142XOh5OhOmmt_aZXRs,609
@@ -355,9 +354,6 @@ siliconcompiler/toolscripts/rhel8/install-sv2v.sh,sha256=AsC_FC7rzj4M570c5eS4Iyh
 siliconcompiler/toolscripts/rhel8/install-verible.sh,sha256=kg-pijYcNsU81Qegx5mhllGc4F0P_xiMXlRDUnczwlo,557
 siliconcompiler/toolscripts/rhel8/install-verilator.sh,sha256=W2vf3_r41LrFkug_J7AgUxcHGZrqJLwagbWhjadASrw,692
 siliconcompiler/toolscripts/rhel8/install-xyce.sh,sha256=rVAt5gIDJNW6gCtuyuRN0VCjEcp9n0S9vtvVJtJzZ_Y,1734
-siliconcompiler/toolscripts/rhel8/install-yosys-moosic.sh,sha256=F6S160uSA0JJUtJe46G3kV8U5ZqTkCz6NX4zEI47Leo,381
-siliconcompiler/toolscripts/rhel8/install-yosys-slang.sh,sha256=qBz2tciVxw5S7xD4ZxTuAeRUZkImKxIWJCU0Nu_RhVs,512
-siliconcompiler/toolscripts/rhel8/install-yosys.sh,sha256=glhUBRePmFRIJ6tUCtlZoRMftnErspiqTp4ad5uQt0E,658
 siliconcompiler/toolscripts/rhel9/install-chisel.sh,sha256=lPORZN7vlBX6sJSv01JOIiDE9-_7GcCZGA7EP5ri3MQ,525
 siliconcompiler/toolscripts/rhel9/install-ghdl.sh,sha256=lVBBvBOu4WInmZ4asSGObggjlDRslSN0MiQs3qPOHtU,469
 siliconcompiler/toolscripts/rhel9/install-gtkwave.sh,sha256=dQa8nY6c2okYOHCkxi5FMJciIjmO-NdjxWH8CUyqiOY,882
@@ -432,12 +428,12 @@ siliconcompiler/toolscripts/ubuntu24/install-bluespec.sh,sha256=MlylMZfFsZq74LnH
 siliconcompiler/toolscripts/ubuntu24/install-chisel.sh,sha256=lPORZN7vlBX6sJSv01JOIiDE9-_7GcCZGA7EP5ri3MQ,525
 siliconcompiler/toolscripts/ubuntu24/install-ghdl.sh,sha256=BrvE2Y3VvUIH4U4lScMb2aRKx0TMEscynHswYUslY6U,467
 siliconcompiler/toolscripts/ubuntu24/install-gtkwave.sh,sha256=F_eeWegI7RHlEnzwyGEE6jdrpNccd-z666xf2ufuuuo,615
-siliconcompiler/toolscripts/ubuntu24/install-icarus.sh,sha256=KHIjKwwA2C9s5jkYzcWWifHpiSc-ewywjyqLk-giB0U,525
+siliconcompiler/toolscripts/ubuntu24/install-icarus.sh,sha256=e5aNPOsCnSrbMjbly0SaA-j8xTdqofOKDOV_yU0bHe4,554
 siliconcompiler/toolscripts/ubuntu24/install-icepack.sh,sha256=PM7gT42Ew8mSE5G_AA_jl_9oL3M_qcvT92xDdFRJoZ0,661
 siliconcompiler/toolscripts/ubuntu24/install-klayout.sh,sha256=f4l-Z86LAkjdo5NLq89ORfkjE0Mjygyp84VYi7gEWUU,906
 siliconcompiler/toolscripts/ubuntu24/install-magic.sh,sha256=GpvT3DGk0IuJ60-dbANfdcZCsncNMe36yNk2bAMudPI,513
 siliconcompiler/toolscripts/ubuntu24/install-montage.sh,sha256=uA57mEs9lb1Fcn7bf59w0tCKuIOeEcaijo2gip2En7Y,55
-siliconcompiler/toolscripts/ubuntu24/install-netgen.sh,sha256=EEndaKckf3U7656hxPqmYPVlJz20LUMWfmpGIaGQvtw,477
+siliconcompiler/toolscripts/ubuntu24/install-netgen.sh,sha256=wPlSqnsCIE9XNsT63dir-iBgpvSoDpqj-HHh48-LwVE,480
 siliconcompiler/toolscripts/ubuntu24/install-nextpnr.sh,sha256=HDp6MFvliWywBmZYnkl3d69oxYy6ersjROfVQV2079E,770
 siliconcompiler/toolscripts/ubuntu24/install-openroad.sh,sha256=Hwe7jGhSUf6nIhkeGGPsu62ObWECkha1ktL0owE5cy0,646
 siliconcompiler/toolscripts/ubuntu24/install-slang.sh,sha256=PEjzoCr0l1C33RdF-C61yiQZOHcgtEyXED4lnFBk82Q,550
@@ -452,13 +448,13 @@ siliconcompiler/toolscripts/ubuntu24/install-xyce.sh,sha256=33Iq99sLdiVWFl4zpD2h
 siliconcompiler/toolscripts/ubuntu24/install-yosys-moosic.sh,sha256=F6S160uSA0JJUtJe46G3kV8U5ZqTkCz6NX4zEI47Leo,381
 siliconcompiler/toolscripts/ubuntu24/install-yosys-slang.sh,sha256=qBz2tciVxw5S7xD4ZxTuAeRUZkImKxIWJCU0Nu_RhVs,512
 siliconcompiler/toolscripts/ubuntu24/install-yosys.sh,sha256=s9PU3DpkDoY0OoTQcDb00g-KAr1vqDFJRr1uaM2mJNw,730
-siliconcompiler/utils/__init__.py,sha256=y4S1sRW2C3oYXN6PMZOHFO8-ytQ8yJvUoQtqKlnF5dQ,16162
+siliconcompiler/utils/__init__.py,sha256=mxZB2mAgCtwfwITfZcrLWTDZxjeEWnAjHcmO-UE7Cbc,15891
 siliconcompiler/utils/asic.py,sha256=cMLs7dneSmh5BlHS0-bZ1tLUpvghTw__gNaUCMpyBds,4986
 siliconcompiler/utils/logging.py,sha256=5tabLIVEftStGDeDulhfBdw4SFp5nHa4J3ZTJKHny8Q,2325
 siliconcompiler/utils/showtools.py,sha256=gaAvjMTFlx_0qLKOtpRJx8Bs51TEeQ-4Pjj8kHfFf3o,1871
-siliconcompiler-0.31.1.dist-info/LICENSE,sha256=lbLR6sRo_CYJOf7SVgHi-U6CZdD8esESEZE5TZazOQE,10766
-siliconcompiler-0.31.1.dist-info/METADATA,sha256=cHiZiRkjqUahZpw7pq-Sxrfr-mVrbVgiIG71F0swDjo,11462
-siliconcompiler-0.31.1.dist-info/WHEEL,sha256=jB7zZ3N9hIM9adW7qlTAyycLYW9npaWKLRzaoVcLKcM,91
-siliconcompiler-0.31.1.dist-info/entry_points.txt,sha256=69hHdWZQBugdza9dYdxodDySxmq6TgwpRYMeH2KfD4Q,1078
-siliconcompiler-0.31.1.dist-info/top_level.txt,sha256=H8TOYhnEUZAV1RJTa8JRtjLIebwHzkQUhA2wkNU2O6M,16
-siliconcompiler-0.31.1.dist-info/RECORD,,
+siliconcompiler-0.32.1.dist-info/LICENSE,sha256=lbLR6sRo_CYJOf7SVgHi-U6CZdD8esESEZE5TZazOQE,10766
+siliconcompiler-0.32.1.dist-info/METADATA,sha256=qEtLu-MCzDVeFZrNFAQO6Y3wDOVn6tN9KRQMKRHr2FQ,11331
+siliconcompiler-0.32.1.dist-info/WHEEL,sha256=52BFRY2Up02UkjOa29eZOS2VxUrpPORXg1pkohGGUS8,91
+siliconcompiler-0.32.1.dist-info/entry_points.txt,sha256=wrM4IhEbFF8epxB8Uun6DZO51viXDqj-KWV0SjVDtN0,1131
+siliconcompiler-0.32.1.dist-info/top_level.txt,sha256=H8TOYhnEUZAV1RJTa8JRtjLIebwHzkQUhA2wkNU2O6M,16
+siliconcompiler-0.32.1.dist-info/RECORD,,

{siliconcompiler-0.31.1.dist-info → siliconcompiler-0.32.1.dist-info}/WHEEL

@@ -1,5 +1,5 @@
 Wheel-Version: 1.0
-Generator: setuptools (75.8.2)
+Generator: setuptools (76.0.0)
 Root-Is-Purelib: true
 Tag: py3-none-any
 

{siliconcompiler-0.31.1.dist-info → siliconcompiler-0.32.1.dist-info}/entry_points.txt

@@ -21,6 +21,7 @@ tools = siliconcompiler.sphinx_ext:tools
 
 [siliconcompiler.path_resolver]
 git = siliconcompiler.package.git:get_resolver
+github = siliconcompiler.package.github:get_resolver
 https = siliconcompiler.package.https:get_resolver
 
 [siliconcompiler.show]

siliconcompiler/fpgas/vpr_example.py

@@ -1,116 +0,0 @@
-import os
-import siliconcompiler
-from siliconcompiler.utils import register_sc_data_source
-
-
-####################################################
-# Setup for vpr_example Family FPGAs
-####################################################
-def setup():
-    '''
-    The vpr_example FPGA family is a set of
-    open source architectures used as illustrative
-    examples for academic FPGA architectures.  They
-    are based on numerous examples furnished over the
-    the years by the University of Toronto with different
-    distributions of VPR
-
-    For more information about VPR and its architecture models,
-    see Murray et. al, "VTR 8: High Performance CAD and Customizable
-    FPGA Architecture Modelling", ACM Trans. Reconfigurable Technol.
-    Syst., 2020, https://www.eecg.utoronto.ca/~kmurray/vtr/vtr8_trets.pdf
-    '''
-
-    vendor = 'N/A'
-
-    flow_root = os.path.join('examples', 'fpga_flow')
-
-    lut_size = '4'
-
-    all_fpgas = []
-
-    all_part_names = [
-        'example_arch_X005Y005',
-        'example_arch_X008Y008',
-        'example_arch_X014Y014',
-        'example_arch_X030Y030',
-    ]
-
-    # Settings common to all parts in family
-    for part_name in all_part_names:
-        fpga = siliconcompiler.FPGA(part_name, package='siliconcompiler_data')
-        register_sc_data_source(fpga)
-
-        fpga.set('fpga', part_name, 'vendor', vendor)
-
-        # Part name is specified per architecture file.  Device code specifies
-        # which <fixed_layout> name to use when running VPR.  These examples
-        # use the following names:
-        if (part_name == 'example_arch_X005Y005'):
-            fpga.set('fpga', part_name, 'var', 'vpr_device_code', 'fpga_beta')
-        else:
-            fpga.set('fpga', part_name, 'var', 'vpr_device_code', part_name)
-
-        fpga.set('fpga', part_name, 'lutsize', lut_size)
-
-        arch_root = os.path.join(flow_root, 'arch', part_name)
-        fpga.set('fpga', part_name, 'file', 'archfile', os.path.join(arch_root, f'{part_name}.xml'))
-
-        fpga.set('fpga', part_name, 'var', 'vpr_clock_model', 'ideal')
-
-        if (part_name == 'example_arch_X005Y005'):
-            arch_root = os.path.join(flow_root, 'arch', part_name)
-            fpga.set('fpga', part_name, 'file', 'graphfile',
-                     os.path.join(arch_root, 'example_arch_X005Y005_rr_graph.xml'))
-            fpga.set('fpga', part_name, 'var', 'channelwidth', '32')
-
-        if (part_name == 'example_arch_X008Y008'):
-            # No RR graph for this architecture to support testing
-            fpga.set('fpga', part_name, 'var', 'channelwidth', '32')
-
-        if ((part_name == 'example_arch_X014Y014') or (part_name == 'example_arch_X030Y030')):
-
-            techlib_root = os.path.join(flow_root, 'techlib')
-
-            if (part_name == 'example_arch_X014Y014'):
-                fpga.set('fpga', part_name, 'file', 'constraints_map',
-                         os.path.join(arch_root, f'{part_name}_constraint_map.json'))
-
-            fpga.set('fpga', part_name, 'var', 'channelwidth', '80')
-            fpga.add('fpga', part_name, 'var', 'feature_set', 'async_set')
-            fpga.add('fpga', part_name, 'var', 'feature_set', 'async_reset')
-            fpga.add('fpga', part_name, 'var', 'feature_set', 'enable')
-            fpga.add('fpga', part_name, 'file', 'yosys_flop_techmap',
-                     os.path.join(techlib_root, 'example_arch_techmap_flops.v'))
-
-            fpga.add('fpga', part_name, 'file', 'yosys_dsp_techmap',
-                     os.path.join(techlib_root, 'example_arch_techmap_dsp.v'))
-
-            fpga.add('fpga', part_name, 'file', 'yosys_extractlib',
-                     os.path.join(techlib_root, 'example_arch_techmap_dsp_extract.v'))
-
-            # The same library used for the extraction pass can also be used to
-            # define macros that can be passed through synthesis, specify that here
-            fpga.add('fpga', part_name, 'file', 'yosys_macrolib',
-                     os.path.join(techlib_root, 'example_arch_techmap_dsp_extract.v'))
-
-            fpga.add('fpga', part_name, 'var', 'yosys_dsp_options', 'DSP_A_MAXWIDTH=18')
-            fpga.add('fpga', part_name, 'var', 'yosys_dsp_options', 'DSP_B_MAXWIDTH=18')
-            fpga.add('fpga', part_name, 'var', 'yosys_dsp_options', 'DSP_A_MINWIDTH=2')
-            fpga.add('fpga', part_name, 'var', 'yosys_dsp_options', 'DSP_B_MINWIDTH=2')
-            fpga.add('fpga', part_name, 'var', 'yosys_dsp_options', 'DSP_NAME=_dsp_block_')
-
-            fpga.add('fpga', part_name, 'file', 'yosys_memory_techmap',
-                     os.path.join(techlib_root, 'example_arch_techmap_bram.v'))
-            fpga.add('fpga', part_name, 'file', 'yosys_memory_libmap',
-                     os.path.join(techlib_root, 'example_arch_bram_memory_map.txt'))
-
-        all_fpgas.append(fpga)
-
-    return all_fpgas
-
-
-#########################
-if __name__ == "__main__":
-    for fpga in setup(siliconcompiler.Chip('<fpga>')):
-        fpga.write_manifest(f'{fpga.design}.json')

siliconcompiler/toolscripts/rhel8/install-ghdl.sh

@@ -1,25 +0,0 @@
-#!/bin/sh
-
-set -e
-
-# Get directory of script
-src_path=$(cd -- "$(dirname "$0")" >/dev/null 2>&1 ; pwd -P)/..
-
-sudo yum install -y gcc-gnat zlib-devel
-
-mkdir -p deps
-cd deps
-
-git clone $(python3 ${src_path}/_tools.py --tool ghdl --field git-url) ghdl
-cd ghdl
-git checkout $(python3 ${src_path}/_tools.py --tool ghdl --field git-commit)
-
-args=
-if [ ! -z ${PREFIX} ]; then
-    args=--prefix="$PREFIX"
-fi
-
-./configure $args
-make -j$(nproc)
-sudo make install
-cd -