siliconcompiler 0.29.1__py3-none-any.whl → 0.29.2__py3-none-any.whl

siliconcompiler/_metadata.py

@@ -1,5 +1,5 @@
 # Version number following semver standard.
-version = '0.29.1'
+version = '0.29.2'
 
 # Default server address for remote runs, if unspecified.
 default_server = 'https://server.siliconcompiler.com'

siliconcompiler/apps/sc_install.py

@@ -126,7 +126,7 @@ def _recommended_tool_groups(tools):
     groups = {
         "asic": {"surelog", "sv2v", "yosys", "openroad", "klayout"},
         "fpga": {"surelog", "sv2v", "yosys", "vpr"},
-        "digital-simulation": {"verilator", "icarus"},
+        "digital-simulation": {"verilator", "icarus", "gtkwave"},
         "analog-simulation": {"xyce"}
     }
 

siliconcompiler/core.py

@@ -500,6 +500,9 @@ class Chip:
                     'dependency-caching-rebase')
         """
 
+        if os.path.isfile(path):
+            path = os.path.dirname(os.path.abspath(path))
+
         preset_path = self.get('package', 'source', name, 'path')
         preset_ref = self.get('package', 'source', name, 'ref')
         if preset_path and preset_path != path or preset_ref and preset_ref != ref:
@@ -3200,6 +3203,7 @@ class Chip:
         sc_step = self.get('arg', 'step')
         sc_index = self.get('arg', 'index')
         sc_job = self.get('option', 'jobname')
+        flow = self.get('option', 'flow')
 
         has_filename = filename is not None
         # Finding last layout if no argument specified
@@ -3210,14 +3214,15 @@ class Chip:
             if sc_step and sc_index:
                 search_nodes.append((sc_step, sc_index))
             elif sc_step:
-                for check_step, check_index in nodes_to_execute(self, self.get('option', 'flow')):
+                for check_step, check_index in nodes_to_execute(self, flow):
                     if sc_step == check_step:
                         search_nodes.append((check_step, check_index))
             else:
-                for nodes in _get_flowgraph_execution_order(self,
-                                                            self.get('option', 'flow'),
-                                                            reverse=True):
-                    search_nodes.extend(nodes)
+                if flow is not None:
+                    for nodes in _get_flowgraph_execution_order(self,
+                                                                flow,
+                                                                reverse=True):
+                        search_nodes.extend(nodes)
 
             for ext in self._showtools.keys():
                 if extension and extension != ext:

siliconcompiler/tools/__init__.py

@@ -5,6 +5,7 @@ from siliconcompiler.tools.chisel import chisel
 from siliconcompiler.tools.execute import execute
 from siliconcompiler.tools.genfasm import genfasm
 from siliconcompiler.tools.ghdl import ghdl
+from siliconcompiler.tools import gtkwave
 from siliconcompiler.tools.icarus import icarus
 from siliconcompiler.tools.icepack import icepack
 from siliconcompiler.tools.klayout import klayout
@@ -38,6 +39,7 @@ def get_tools():
             execute,
             genfasm,
             ghdl,
+            gtkwave,
             icarus,
             icepack,
             klayout,

siliconcompiler/tools/_common/asic.py

@@ -135,6 +135,76 @@ def set_tool_task_var(chip,
     return value
 
 
+def set_tool_task_lib_var(chip,
+                          param_key,
+                          default_value=None,
+                          schelp=None,
+                          option_key=None,
+                          lib_key=None):
+    '''
+    Set parameter from libraries -> option -> default_value
+    '''
+    step = chip.get('arg', 'step')
+    index = chip.get('arg', 'index')
+    tool, task = get_tool_task(chip, step, index)
+
+    if schelp:
+        chip.set('tool', tool, 'task', task, 'var', param_key,
+                 schelp, field='help')
+
+    if not option_key:
+        option_key = f'{tool}_{param_key}'
+    require_key, value = pick_key(chip, [('option', 'var', option_key)], step=step, index=index)
+
+    def check_value(val):
+        if isinstance(val, (list, tuple, set)):
+            return len(val) > 0
+        return val is not None
+
+    if check_value(value):
+        chip.set('tool', tool, 'task', task, 'var', param_key, value,
+                 step=step, index=index, clobber=False)
+
+        if require_key:
+            chip.add('tool', tool, 'task', task, 'require',
+                     ','.join(('option', option_key)),
+                     step=step, index=index)
+
+        return value
+
+    # Add library key
+    if not lib_key:
+        lib_key = f'{tool}_{param_key}'
+    lib_keys = []
+    for lib in get_libraries(chip, 'logic'):
+        if chip.valid('library', lib, 'option', 'var', lib_key) and \
+           chip.get('library', lib, 'option', 'var', lib_key):
+            lib_keys.append(('library', lib, 'option', 'var', lib_key))
+
+    values = set()
+    for lib_key in lib_keys:
+        chip.add('tool', tool, 'task', task, 'require', ','.join(lib_key), step=step, index=index)
+
+        get_step = step
+        get_index = index
+
+        if chip.get(*lib_key, field='pernode') == 'never':
+            get_step = None
+            get_index = None
+
+        values.update(chip.get(*lib_key, step=get_step, index=get_index))
+
+    if check_value(values):
+        chip.set('tool', tool, 'task', task, 'var', param_key, values,
+                 step=step, index=index, clobber=False)
+
+        chip.add('tool', tool, 'task', task, 'require',
+                 ','.join(['tool', tool, 'task', task, 'var', param_key]),
+                 step=step, index=index)
+
+    return values
+
+
 def get_tool_task_var(chip,
                       param_key,
                       option_key=None,

siliconcompiler/tools/_common/tcl/sc_pin_constraints.tcl

@@ -49,8 +49,8 @@ proc sc_collect_pin_constraints {
         }
 
         set side_pin_order []
-        dict for {index pin} $pins {
-            lappend side_pin_order {*}$pin
+        foreach index [lsort -integer [dict keys $pins]] {
+            lappend side_pin_order {*}[dict get $pins $index]
         }
 
         set pin_layer_ordering [dict create]

siliconcompiler/tools/gtkwave/__init__.py

@@ -0,0 +1,39 @@
+'''
+GTKWave is a fully featured GTK+ based wave viewer for Unix, Win32, and
+Mac OSX which reads LXT, LXT2, VZT, FST, and GHW files as well as standard
+Verilog VCD/EVCD files and allows their viewing.
+
+Documentation: https://gtkwave.github.io/gtkwave/
+
+Sources: https://github.com/gtkwave/gtkwave
+
+Installation: https://github.com/gtkwave/gtkwave
+'''
+
+from siliconcompiler.tools._common import \
+    get_tool_task
+
+
+def setup(chip):
+    step = chip.get('arg', 'step')
+    index = chip.get('arg', 'index')
+    tool, task = get_tool_task(chip, step, index)
+
+    chip.set('tool', tool, 'exe', 'gtkwave')
+    chip.set('tool', tool, 'vswitch', '--version')
+    chip.set('tool', tool, 'version', '>=v3.3.116', clobber=False)
+    chip.set('tool', tool, 'format', 'tcl', clobber=False)
+
+
+################################
+# Version Check
+################################
+def parse_version(stdout):
+    # First line: GTKWave Analyzer v3.3.116 (w)1999-2023 BSI
+    return stdout.split()[2]
+
+
+def normalize_version(version):
+    if version[0] == 'v':
+        return version[1:]
+    return version

siliconcompiler/tools/gtkwave/scripts/sc_show.tcl

@@ -0,0 +1,34 @@
+###############################
+# Reading SC Schema
+###############################
+
+source ./sc_manifest.tcl
+
+##############################
+# Schema Adapter
+###############################
+
+set sc_step [sc_cfg_get arg step]
+set sc_index [sc_cfg_get arg index]
+set sc_flow [sc_cfg_get option flow]
+set sc_tool [sc_cfg_get flowgraph $sc_flow $sc_step $sc_index tool]
+set sc_task [sc_cfg_get flowgraph $sc_flow $sc_step $sc_index task]
+
+###############################
+# Source pre-scripts
+###############################
+
+if { [sc_cfg_tool_task_exists prescript] } {
+    foreach sc_pre_script [sc_cfg_tool_task_get prescript] {
+        puts "Sourcing pre script: ${sc_pre_script}"
+        source $sc_pre_script
+    }
+}
+
+###############################
+# Handle exit
+###############################
+
+if { [lindex [sc_cfg_tool_task_get {var} show_exit] 0] == "true" } {
+    exit
+}

siliconcompiler/tools/gtkwave/show.py

@@ -0,0 +1,70 @@
+import os
+
+from siliconcompiler.tools.gtkwave import setup as tool_setup
+from siliconcompiler.tools._common import \
+    add_require_input, get_tool_task, input_provides
+
+
+def setup(chip):
+    '''
+    Show a VCD file.
+    '''
+
+    tool_setup(chip)
+
+    step = chip.get('arg', 'step')
+    index = chip.get('arg', 'index')
+    tool, task = get_tool_task(chip, step, index)
+
+    chip.set('tool', tool, 'task', task, 'threads', os.cpu_count(),
+             step=step, index=index)
+
+    chip.set('tool', tool, 'task', task, 'refdir',
+             'tools/gtkwave/scripts',
+             step=step, index=index, package='siliconcompiler')
+
+    chip.set('tool', tool, 'task', task, 'refdir',
+             'tools/gtkwave/scripts',
+             step=step, index=index, package='siliconcompiler')
+    chip.set('tool', tool, 'task', task, 'script', 'sc_show.tcl',
+             step=step, index=index)
+
+    if f'{chip.top()}.vcd' in input_provides(chip, step, index):
+        chip.set('tool', tool, 'task', task, 'input', f'{chip.top()}.vcd', step=step, index=index)
+    elif chip.valid('tool', tool, 'task', task, 'var', 'show_filepath') and \
+            chip.get('tool', tool, 'task', task, 'var', 'show_filepath', step=step, index=index):
+        chip.add('tool', tool, 'task', task, 'require',
+                 ",".join(['tool', tool, 'task', task, 'var', 'show_filepath']),
+                 step=step, index=index)
+    else:
+        add_require_input(chip, 'input', 'waveform', 'vcd')
+
+    chip.set('tool', tool, 'task', task, 'var', 'show_exit', False,
+             step=step, index=index, clobber=False)
+
+
+def runtime_options(chip):
+    step = chip.get('arg', 'step')
+    index = chip.get('arg', 'index')
+    tool, task = get_tool_task(chip, step, index)
+
+    options = []
+
+    threads = chip.get('tool', tool, 'task', task, 'threads', step=step, index=index)
+    if threads:
+        options.append(f'--cpu={threads}')
+
+    script = chip.find_files('tool', tool, 'task', task, 'script', step=step, index=index)[0]
+    options.append(f'--script={script}')
+
+    if os.path.exists(f'inputs/{chip.top()}.vcd'):
+        dump = f'inputs/{chip.top()}.vcd'
+    elif chip.valid('tool', tool, 'task', task, 'var', 'show_filepath') and \
+            chip.get('tool', tool, 'task', task, 'var', 'show_filepath', step=step, index=index):
+        dump = chip.get('tool', tool, 'task', task, 'var', 'show_filepath',
+                        step=step, index=index)[0]
+    else:
+        dump = chip.find_files('input', 'waveform', 'vcd', step=step, index=index)[0]
+    options.append(f'--dump={dump}')
+
+    return options

siliconcompiler/tools/icarus/compile.py

@@ -75,6 +75,10 @@ def runtime_options(chip):
         cmdlist.append('-I' + value)
     for value in opts['define']:
         cmdlist.append('-D' + value)
+
+    # add siliconcompiler specific defines
+    cmdlist.append(f"-DSILICONCOMPILER_TRACE_FILE=\\\"reports/{design}.vcd\\\"")
+
     for value in get_input_files(chip, 'input', 'cmdfile', 'f'):
         cmdlist.append('-f ' + value)
     for value in get_input_files(chip, 'input', 'rtl', 'netlist'):

siliconcompiler/tools/openroad/_apr.py

@@ -5,7 +5,7 @@ from siliconcompiler import utils
 from siliconcompiler.tools._common import input_provides, add_common_file, \
     get_tool_task, record_metric
 from siliconcompiler.tools._common.asic import get_mainlib, set_tool_task_var, get_libraries, \
-    CellArea
+    CellArea, set_tool_task_lib_var
 from siliconcompiler.tools.openroad import setup as tool_setup
 
 
@@ -894,6 +894,14 @@ def define_ord_params(chip):
                       require=['key'],
                       schelp='number of Y bins to use for heatmap image generation')
 
+    set_tool_task_lib_var(chip, param_key='scan_chain_cells',
+                          default_value=None,
+                          schelp='cells to use for scan chain insertion')
+
+    set_tool_task_lib_var(chip, param_key='multibit_ff_cells',
+                          default_value=None,
+                          schelp='multibit flipflop cells')
+
 
 def define_ord_files(chip):
     step = chip.get('arg', 'step')

siliconcompiler/tools/openroad/global_placement.py

@@ -1,9 +1,11 @@
 from siliconcompiler.tools._common import get_tool_task
 from siliconcompiler.tools.openroad._apr import setup as apr_setup
-from siliconcompiler.tools.openroad._apr import set_reports, set_pnr_inputs, set_pnr_outputs
+from siliconcompiler.tools.openroad._apr import set_reports, set_pnr_inputs, set_pnr_outputs, \
+    set_tool_task_var
 from siliconcompiler.tools.openroad._apr import \
     define_ord_params, define_sta_params, define_sdc_params, \
-    define_gpl_params, define_grt_params, define_rsz_params
+    define_gpl_params, define_grt_params, define_rsz_params, \
+    define_ppl_params
 from siliconcompiler.tools.openroad._apr import build_pex_corners, define_ord_files
 from siliconcompiler.tools.openroad._apr import extract_metrics
 
@@ -35,6 +37,7 @@ def setup(chip):
     define_gpl_params(chip)
     define_grt_params(chip)
     define_rsz_params(chip)
+    define_ppl_params(chip)
 
     set_reports(chip, [
         'setup',
@@ -48,6 +51,24 @@ def setup(chip):
         'power_density'
     ])
 
+    set_tool_task_var(chip, param_key='enable_multibit_clustering',
+                      default_value=False,
+                      schelp='true/false, when true multibit clustering will be performed.')
+
+    set_tool_task_var(chip, param_key='enable_scan_chains',
+                      default_value=False,
+                      schelp='true/false, when true scan chains will be inserted.')
+
+    set_tool_task_var(chip, param_key='scan_enable_port_pattern',
+                      schelp='pattern of the scan chain enable port.',
+                      skip=['pdk', 'lib'])
+    set_tool_task_var(chip, param_key='scan_in_port_pattern',
+                      schelp='pattern of the scan chain in port.',
+                      skip=['pdk', 'lib'])
+    set_tool_task_var(chip, param_key='scan_out_port_pattern',
+                      schelp='pattern of the scan chain out port.',
+                      skip=['pdk', 'lib'])
+
 
 def pre_process(chip):
     define_ord_files(chip)

siliconcompiler/tools/openroad/scripts/apr/sc_clock_tree_synthesis.tcl

@@ -17,7 +17,7 @@ source -echo "$sc_refdir/apr/preamble.tcl"
 ###############################
 
 if { [llength [all_clocks]] > 0 } {
-    sc_set_dont_use -clock
+    sc_set_dont_use -clock -report dont_use.clock_tree_synthesis
 
     # Clone clock tree inverters next to register loads
     # so cts does not try to buffer the inverted clocks.

siliconcompiler/tools/openroad/scripts/apr/sc_global_placement.tcl

@@ -11,16 +11,79 @@ source ./sc_manifest.tcl > /dev/null
 set sc_refdir [sc_cfg_tool_task_get refdir]
 source -echo "$sc_refdir/apr/preamble.tcl"
 
+set dont_use_args []
+
+if { [lindex [sc_cfg_tool_task_get var enable_scan_chains] 0] == "true" } {
+    lappend dont_use_args -scanchain
+}
+if { [lindex [sc_cfg_tool_task_get var enable_multibit_clustering] 0] == "true" } {
+    lappend dont_use_args -multibit
+}
+
+sc_set_dont_use {*}$dont_use_args -report dont_use.global_placement
+
+###############################
+# Scan Chain Preparation
+###############################
+
+if { [lindex [sc_cfg_tool_task_get var enable_scan_chains] 0] == "true" } {
+    set dft_args []
+    if { [sc_cfg_tool_task_get var scan_in_port_pattern] != [] } {
+        lappend dft_args -scan_in_name_pattern \
+            [lindex [sc_cfg_tool_task_get var scan_in_port_pattern] 0]
+    }
+    if { [sc_cfg_tool_task_get var scan_out_port_pattern] != [] } {
+        lappend dft_args -scan_out_name_pattern \
+            [lindex [sc_cfg_tool_task_get var scan_out_port_pattern] 0]
+    }
+    if { [sc_cfg_tool_task_get var scan_enable_port_pattern] != [] } {
+        lappend dft_args -scan_enable_name_pattern \
+            [lindex [sc_cfg_tool_task_get var scan_enable_port_pattern] 0]
+    }
+
+    set_dft_config -clock_mixing clock_mix {*}$dft_args
+    tee -file reports/scan_chain_config.rpt {report_dft_config}
+    scan_replace
+}
+
+###############################
+# Perform multi-bit clustering
+###############################
+
+if { [lindex [sc_cfg_tool_task_get var enable_multibit_clustering] 0] == "true" } {
+    cluster_flops
+}
+
 ###############################
 # Global Placement
 ###############################
 
 sc_global_placement
 
-estimate_parasitics -placement
+###############################
+# Scan Chain Finalize
+###############################
+
+if { [lindex [sc_cfg_tool_task_get var enable_scan_chains] 0] == "true" } {
+    tee -file reports/scan_chain.rpt {preview_dft -verbose}
+    insert_dft
+
+    set new_ios [sc_get_unplaced_io_nets]
+    if { [llength $new_ios] > 0 } {
+        foreach net $new_ios {
+            utl::report "New IO net [$net getName]"
+        }
+        utl::warn FLW 1 "Scan chain generated new ports, rerunning pin placement"
+        sc_pin_placement
+    }
+}
 
 ###############################
 # Task Postamble
 ###############################
 
+sc_set_dont_use
+
+estimate_parasitics -placement
+
 source -echo "$sc_refdir/apr/postamble.tcl"

siliconcompiler/tools/openroad/scripts/apr/sc_repair_design.tcl

@@ -28,6 +28,8 @@ estimate_parasitics -placement
 # Repair DRVs
 ###############################
 
+sc_set_dont_use -scanchain -multibit -report dont_use.repair_drv
+
 set repair_design_args []
 
 set rsz_cap_margin [lindex [sc_cfg_tool_task_get {var} rsz_cap_margin] 0]
@@ -43,6 +45,8 @@ repair_design \
     -verbose \
     {*}$repair_design_args
 
+sc_set_dont_use
+
 ###############################
 # Tie-off cell insertion
 ###############################

siliconcompiler/tools/openroad/scripts/apr/sc_repair_timing.tcl

@@ -34,6 +34,9 @@ if { [lindex [sc_cfg_tool_task_get var rsz_skip_setup_repair] 0] != "true" } {
     # Setup Repair
     ###############################
 
+    # Enable ffs for resizing
+    sc_set_dont_use -scanchain -multibit -report dont_use.repair_timing.setup
+
     estimate_parasitics -placement
 
     repair_timing \
@@ -45,6 +48,9 @@ if { [lindex [sc_cfg_tool_task_get var rsz_skip_setup_repair] 0] != "true" } {
         {*}$repair_timing_args
 
     sc_detailed_placement
+
+    # Restore dont use
+    sc_set_dont_use
 }
 
 if { [lindex [sc_cfg_tool_task_get var rsz_skip_hold_repair] 0] != "true" } {
@@ -55,7 +61,7 @@ if { [lindex [sc_cfg_tool_task_get var rsz_skip_hold_repair] 0] != "true" } {
     estimate_parasitics -placement
 
     # Enable hold cells
-    sc_set_dont_use -hold
+    sc_set_dont_use -hold -scanchain -multibit -report dont_use.repair_timing.hold
 
     repair_timing \
         -hold \

siliconcompiler/tools/openroad/scripts/common/procs.tcl

@@ -300,6 +300,23 @@ proc sc_bterm_has_placed_io { net } {
     return false
 }
 
+###########################
+# Get nets with unplaced bterms
+###########################
+
+proc sc_get_unplaced_io_nets { } {
+    set nets []
+    foreach bterm [[ord::get_db_block] getBTerms] {
+        if {
+            [$bterm getFirstPinPlacementStatus] == "UNPLACED" ||
+            [$bterm getFirstPinPlacementStatus] == "NONE"
+        } {
+            lappend nets [$bterm getNet]
+        }
+    }
+    return $nets
+}
+
 ###########################
 # Find nets regex
 ###########################
@@ -701,13 +718,17 @@ proc sc_set_gui_title { } {
 
 proc sc_set_dont_use { args } {
     sta::parse_key_args "sc_set_dont_use" args \
-        keys {} \
-        flags {-hold -clock}
+        keys {-report} \
+        flags {-hold -clock -multibit -scanchain}
 
     sta::check_argc_eq0 "sc_set_dont_use" $args
 
     global sc_mainlib
 
+    if { [sc_check_version 18171] } {
+        reset_dont_use
+    }
+
     set_dont_use [sc_cfg_get library $sc_mainlib asic cells dontuse]
 
     set clk_groups "clkbuf clkgate clklogic"
@@ -724,4 +745,19 @@ proc sc_set_dont_use { args } {
             unset_dont_use [sc_cfg_get library $sc_mainlib asic cells $group]
         }
     }
+    if { [info exists flags(-clock)] } {
+        foreach group $clk_groups {
+            unset_dont_use [sc_cfg_get library $sc_mainlib asic cells $group]
+        }
+    }
+    if { [info exists flags(-multibit)] } {
+        unset_dont_use [sc_cfg_tool_task_get var multibit_ff_cells]
+    }
+    if { [info exists flags(-scanchain)] } {
+        unset_dont_use [sc_cfg_tool_task_get var scan_chain_cells]
+    }
+
+    if { [info exists keys(-report)] } {
+        tee -file reports/$keys(-report).rpt {report_dont_use}
+    }
 }

siliconcompiler/tools/openroad/scripts/common/write_images.tcl

@@ -93,6 +93,10 @@ proc sc_image_everything { } {
 }
 
 proc sc_image_irdrop { net corner } {
+    if { ![sc_cfg_tool_task_check_in_list power var reports] } {
+        return
+    }
+
     if { ![sc_has_placed_instances] || [sc_has_unplaced_instances] } {
         return
     }
@@ -107,7 +111,12 @@ proc sc_image_irdrop { net corner } {
     foreach msg $msgs {
         suppress_message PSM $msg
     }
-    set failed [catch { analyze_power_grid -net $net -corner $corner -source_type STRAPS } err]
+    set analyze_args []
+    lappend analyze_args -source_type STRAPS
+    if { [sc_check_version 18074] } {
+        lappend analyze_args -allow_reuse
+    }
+    set failed [catch { analyze_power_grid -net $net -corner $corner {*}$analyze_args } err]
     foreach msg $msgs {
         unsuppress_message PSM $msg
     }

siliconcompiler/tools/verilator/compile.py

@@ -97,6 +97,12 @@ def setup(chip):
              "'vcd' or 'fst'. Defaults to 'vcd'.",
              field='help')
 
+    chip.set('tool', tool, 'task', task, 'var', 'initialize_random',
+             'true/false, when true registers will reset with a random value.',
+             field='help')
+    chip.set('tool', tool, 'task', task, 'var', 'initialize_random', False,
+             step=step, index=index, clobber=False)
+
 
 def runtime_options(chip):
     tool = 'verilator'
@@ -107,6 +113,11 @@ def runtime_options(chip):
 
     cmdlist = runtime_options_tool(chip)
 
+    random_init = chip.get('tool', tool, 'task', task, 'var',
+                           'initialize_random', step=step, index=index)
+    if random_init == ['true']:
+        cmdlist.extend(['--x-assign', 'unique'])
+
     cmdlist.extend(['--exe', '--build'])
 
     threads = chip.get('tool', tool, 'task', task, 'threads', step=step, index=index)

siliconcompiler/tools/verilator/verilator.py

@@ -77,7 +77,7 @@ def setup(chip):
     chip.set('tool', tool, 'task', task, 'var', 'enable_assert',
              'true/false, when true assertions are enabled in Verilator.',
              field='help')
-    chip.set('tool', tool, 'task', task, 'var', 'enable_assert', 'false',
+    chip.set('tool', tool, 'task', task, 'var', 'enable_assert', False,
              step=step, index=index, clobber=False)
 
     if chip.get('tool', tool, 'task', task, 'var', 'enable_assert', step=step, index=index):

siliconcompiler/toolscripts/_tools.json

@@ -1,7 +1,7 @@
 {
   "openroad": {
     "git-url": "https://github.com/The-OpenROAD-Project/OpenROAD.git",
-    "git-commit": "1ed6a7edfda56bef82938573bf0fadc48bd8ff34",
+    "git-commit": "beba944a7c9eaface2ae88040ac721272b22e9d3",
     "docker-cmds": [
       "# Remove OR-Tools files",
       "RUN rm -f $SC_PREFIX/Makefile $SC_PREFIX/README.md",
@@ -131,5 +131,10 @@
     "git-commit": "v7.0",
     "git-url": "https://github.com/MikePopoloski/slang.git",
     "auto-update": true
+  },
+  "gtkwave": {
+    "git-commit": "v3.3.116",
+    "git-url": "https://github.com/gtkwave/gtkwave.git",
+    "auto-update": false
   }
 }

siliconcompiler/toolscripts/rhel9/install-gtkwave.sh

@@ -0,0 +1,40 @@
+#!/bin/sh
+
+set -e
+
+# Get directory of script
+src_path=$(cd -- "$(dirname "$0")" >/dev/null 2>&1 ; pwd -P)/..
+
+sudo yum group install -y "Development Tools"
+sudo yum install -y gtk3-devel \
+    bzip2-devel xz-devel tcl-devel tk-devel
+sudo dnf config-manager --set-enabled devel || true
+sudo yum install -y Judy-devel
+sudo dnf config-manager --set-disabled devel || true
+
+mkdir -p deps
+cd deps
+
+args=
+if [ ! -z ${PREFIX} ]; then
+    args=--prefix="$PREFIX"
+fi
+
+wget http://ftp.gnu.org/pub/gnu/gperf/gperf-3.1.tar.gz
+tar xvf gperf-3.1.tar.gz
+cd gperf-3.1
+./configure $args
+make -j$(nproc)
+sudo make install
+cd ..
+
+git clone $(python3 ${src_path}/_tools.py --tool gtkwave --field git-url) gtkwave
+cd gtkwave
+git checkout $(python3 ${src_path}/_tools.py --tool gtkwave --field git-commit)
+
+cd gtkwave3-gtk3
+
+./autogen.sh
+./configure --enable-gtk3 $args
+make -j$(nproc)
+sudo make install

siliconcompiler/toolscripts/ubuntu20/install-gtkwave.sh

@@ -0,0 +1,28 @@
+#!/bin/sh
+
+set -e
+
+# Get directory of script
+src_path=$(cd -- "$(dirname "$0")" >/dev/null 2>&1 ; pwd -P)/..
+
+sudo apt-get install -y build-essential gperf libgtk-3-dev \
+    libbz2-dev libjudy-dev liblzma-dev tcl-dev tk-dev
+
+mkdir -p deps
+cd deps
+
+git clone $(python3 ${src_path}/_tools.py --tool gtkwave --field git-url) gtkwave
+cd gtkwave
+git checkout $(python3 ${src_path}/_tools.py --tool gtkwave --field git-commit)
+
+args=
+if [ ! -z ${PREFIX} ]; then
+    args=--prefix="$PREFIX"
+fi
+
+cd gtkwave3-gtk3
+
+./autogen.sh
+./configure --enable-gtk3 $args
+make -j$(nproc)
+sudo make install

siliconcompiler/toolscripts/ubuntu22/install-gtkwave.sh

@@ -0,0 +1,28 @@
+#!/bin/sh
+
+set -e
+
+# Get directory of script
+src_path=$(cd -- "$(dirname "$0")" >/dev/null 2>&1 ; pwd -P)/..
+
+sudo apt-get install -y build-essential gperf libgtk-3-dev \
+    libbz2-dev libjudy-dev liblzma-dev tcl-dev tk-dev
+
+mkdir -p deps
+cd deps
+
+git clone $(python3 ${src_path}/_tools.py --tool gtkwave --field git-url) gtkwave
+cd gtkwave
+git checkout $(python3 ${src_path}/_tools.py --tool gtkwave --field git-commit)
+
+args=
+if [ ! -z ${PREFIX} ]; then
+    args=--prefix="$PREFIX"
+fi
+
+cd gtkwave3-gtk3
+
+./autogen.sh
+./configure --enable-gtk3 $args
+make -j$(nproc)
+sudo make install

siliconcompiler/toolscripts/ubuntu24/install-gtkwave.sh

@@ -0,0 +1,29 @@
+#!/bin/sh
+
+set -e
+
+# Get directory of script
+src_path=$(cd -- "$(dirname "$0")" >/dev/null 2>&1 ; pwd -P)/..
+
+sudo apt-get install -y build-essential gperf libgtk-3-dev \
+    libbz2-dev libjudy-dev liblzma-dev tcl-dev tk-dev autotools-dev \
+    automake
+
+mkdir -p deps
+cd deps
+
+git clone $(python3 ${src_path}/_tools.py --tool gtkwave --field git-url) gtkwave
+cd gtkwave
+git checkout $(python3 ${src_path}/_tools.py --tool gtkwave --field git-commit)
+
+args=
+if [ ! -z ${PREFIX} ]; then
+    args=--prefix="$PREFIX"
+fi
+
+cd gtkwave3-gtk3
+
+./autogen.sh
+./configure --enable-gtk3 $args
+make -j$(nproc)
+sudo make install

siliconcompiler/utils/showtools.py

@@ -5,6 +5,7 @@ from siliconcompiler.tools.openroad import screenshot as openroad_screenshot
 from siliconcompiler.tools.vpr import show as vpr_show
 from siliconcompiler.tools.vpr import screenshot as vpr_screenshot
 from siliconcompiler.tools.yosys import screenshot as yosys_screenshot
+from siliconcompiler.tools.gtkwave import show as gtkwave_show
 
 
 def setup(chip):
@@ -29,3 +30,5 @@ def setup(chip):
 
     chip.register_showtool('v', yosys_screenshot)
     chip.register_showtool('vg', yosys_screenshot)
+
+    chip.register_showtool('vcd', gtkwave_show)

{siliconcompiler-0.29.1.dist-info → siliconcompiler-0.29.2.dist-info}/METADATA

@@ -1,6 +1,6 @@
 Metadata-Version: 2.2
 Name: siliconcompiler
-Version: 0.29.1
+Version: 0.29.2
 Summary: A compiler framework that automates translation from source code to silicon.
 Author-email: Andreas Olofsson <andreas.d.olofsson@gmail.com>
 License: Apache License 2.0
@@ -46,7 +46,7 @@ Requires-Dist: fastjsonschema==2.21.1
 Requires-Dist: docker==7.1.0
 Requires-Dist: importlib_metadata; python_version < "3.10"
 Requires-Dist: sc-surelog==1.84.1
-Requires-Dist: orjson==3.10.13
+Requires-Dist: orjson==3.10.14
 Requires-Dist: streamlit==1.40.1; python_version <= "3.8"
 Requires-Dist: streamlit==1.41.1; python_version >= "3.9" and python_full_version != "3.9.7"
 Requires-Dist: streamlit_agraph==0.0.45; python_full_version != "3.9.7"
@@ -58,10 +58,10 @@ Requires-Dist: pytest==8.3.4; extra == "test"
 Requires-Dist: pytest-xdist==3.6.1; extra == "test"
 Requires-Dist: pytest-timeout==2.3.1; extra == "test"
 Requires-Dist: pytest-asyncio==0.24.0; python_version <= "3.8" and extra == "test"
-Requires-Dist: pytest-asyncio==0.25.1; python_version >= "3.9" and extra == "test"
+Requires-Dist: pytest-asyncio==0.25.2; python_version >= "3.9" and extra == "test"
 Requires-Dist: pytest-cov==5.0.0; python_version <= "3.8" and extra == "test"
 Requires-Dist: pytest-cov==6.0.0; python_version >= "3.9" and extra == "test"
-Requires-Dist: responses==0.25.3; extra == "test"
+Requires-Dist: responses==0.25.5; extra == "test"
 Requires-Dist: PyVirtualDisplay==3.0; extra == "test"
 Provides-Extra: lint
 Requires-Dist: flake8==7.1.1; extra == "lint"
@@ -78,7 +78,7 @@ Provides-Extra: examples
 Requires-Dist: migen==0.9.2; extra == "examples"
 Requires-Dist: lambdalib==0.3.2; extra == "examples"
 Provides-Extra: optimizer
-Requires-Dist: google-vizier[jax]==0.1.20; python_version >= "3.10" and extra == "optimizer"
+Requires-Dist: google-vizier[jax]==0.1.21; python_version >= "3.10" and extra == "optimizer"
 
 ![SiliconCompiler](https://raw.githubusercontent.com/siliconcompiler/siliconcompiler/main/docs/_static/sc_logo_with_text.png)
 

{siliconcompiler-0.29.1.dist-info → siliconcompiler-0.29.2.dist-info}/RECORD

@@ -1,8 +1,8 @@
 siliconcompiler/__init__.py,sha256=Ke_Bcryj9N6MoUq_5z_IDW3qMrUzR-3-kJVsvUenYzY,511
 siliconcompiler/__main__.py,sha256=JwWkcvaNngqgMWprEQ1cFy2Wdq9GMvk46UGTHyh_qvM,170
 siliconcompiler/_common.py,sha256=c6r0SbI2xTpNOZayFsyCDo0riJGNJSPN-0zW8R7rDBI,1488
-siliconcompiler/_metadata.py,sha256=kPvJIFXnUPizIvOkvbIg_mwRbUdpikCUi183Peg-EOA,1264
-siliconcompiler/core.py,sha256=u9-O6y_mzftKTrJmOa1VRr45bWlACo-bxotPdpLNZBQ,138165
+siliconcompiler/_metadata.py,sha256=MoETJ1685hRQ-2QGN29A0X6yb699qRcwYlCl7JkjRwQ,1264
+siliconcompiler/core.py,sha256=Paw0dfQjkhu_4piY-Ajcl7MQGekbV0gG20pRdQazIwQ,138308
 siliconcompiler/flowgraph.py,sha256=WLcbBWFj5DdYRRIxNy_Djm2v4yN9WELQM_ypNPB5QVM,21963
 siliconcompiler/issue.py,sha256=9ZpdEBh8QB56-bZ1YXRnjqgg9hwnFty2u1o5oI66W7M,11125
 siliconcompiler/package.py,sha256=nGFzYI63dwO6ULEyEGHu_Pd-8QYMWu8BtpzgwEmppag,14111
@@ -12,7 +12,7 @@ siliconcompiler/apps/__init__.py,sha256=6LuAljPtVB6g5yXl_58ODoB4Svb6UfKaDbX1e0aN
 siliconcompiler/apps/_common.py,sha256=Ph-cD-t9lCzavak3s4YCXXmA_ouf-jJ-7WIEGkSsjOg,3770
 siliconcompiler/apps/sc.py,sha256=7wKQ89DZLVXMNbjAgIu9F8Erb_NmrBkV4lJNjBUt8_c,3215
 siliconcompiler/apps/sc_dashboard.py,sha256=kGyMYbgKgZMBUrTyft6mEvRnmcrKA7JunrkWZ8VwSwM,3478
-siliconcompiler/apps/sc_install.py,sha256=aFCFXaXarREvt_rTAcOZoqDwj-Df620dLBxO2Fda9so,6273
+siliconcompiler/apps/sc_install.py,sha256=Az2gOq-7MbCnPCLyvtiLo1sslNa_ZiNwyUVvfev-5Xo,6284
 siliconcompiler/apps/sc_issue.py,sha256=PUXFWne6MWY0Ntak3PnMZ84tpEZ5S1Pta5B3AkxMdoY,6404
 siliconcompiler/apps/sc_remote.py,sha256=jsQWEqZnoKrJI9FcA2ILZYJ8F7uvLuwYI4N23dRwVRs,7241
 siliconcompiler/apps/sc_server.py,sha256=d3SCfKtNneIBiAk7Udc5SqXvSIoFSK40iHWcKuY7unk,894
@@ -130,13 +130,13 @@ siliconcompiler/templates/slurm/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm
 siliconcompiler/templates/slurm/run.sh,sha256=uXs91H0vjLB8G8vaezxXSr3XNR2EUiXH1dyfOSHYYnk,214
 siliconcompiler/templates/tcl/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
 siliconcompiler/templates/tcl/manifest.tcl.j2,sha256=XT2pKuPSaa2GPJj1IpEl3Al5N70yqQS8jZecmpyeV4o,3547
-siliconcompiler/tools/__init__.py,sha256=0cgbHWC0cLI9e01x3X6w_bAm0vMZGdsqTkPWj3C3R9s,1816
+siliconcompiler/tools/__init__.py,sha256=MZrsqpW_OonmSq1LjGNbB0OQkqNOEtyjmgsOEtk1qJc,1879
 siliconcompiler/tools/_common/__init__.py,sha256=NP1YLZn6wyOXRWZwzDnJUKzrJ-eD88X94nXzXcj-ALg,15012
-siliconcompiler/tools/_common/asic.py,sha256=6dcjW3tAlu99YmBDbCDb5E1bh7vbleXS8NWdpeKXKkE,6693
+siliconcompiler/tools/_common/asic.py,sha256=fFbu2lzvovqAyG8Z-9cINJJCNkiroTgQEhx--ZAqEUk,9002
 siliconcompiler/tools/_common/sdc/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
 siliconcompiler/tools/_common/sdc/sc_constraints.sdc,sha256=Hz6OLebi14UTcfGXgJoNJeFo0BH_4N5XwjFe2mrey8g,2827
 siliconcompiler/tools/_common/tcl/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
-siliconcompiler/tools/_common/tcl/sc_pin_constraints.tcl,sha256=33tB8P-x-XcKM-2hwIiNvo1TzRaeSDlYGObOLVjZzD8,2061
+siliconcompiler/tools/_common/tcl/sc_pin_constraints.tcl,sha256=Q6L9hd3rP2h71dGoxWDAYyHSfgeja2JqNJpQhfvJGYw,2102
 siliconcompiler/tools/bambu/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
 siliconcompiler/tools/bambu/bambu.py,sha256=hodIBmILSE7xvfIc74r0Qc0dZI42TwHhrKmWLom-hc0,1159
 siliconcompiler/tools/bambu/convert.py,sha256=5yez6N-y5Aia8ygvD9O8sfx5GcMsRg9nN5KzXcR-Tio,2316
@@ -167,8 +167,11 @@ siliconcompiler/tools/genfasm/genfasm.py,sha256=ysiFWhfoZ6F551dnE4BTgdbG7VHdCxwI
 siliconcompiler/tools/ghdl/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
 siliconcompiler/tools/ghdl/convert.py,sha256=uzNu4AHI7whpa0WaE8nDGSAZY5t1Shmv4DhwREpamn4,2977
 siliconcompiler/tools/ghdl/ghdl.py,sha256=E0YJtb6ounqnW34hpz_bpLCIeNFxF429DJMHswMs4xE,1186
+siliconcompiler/tools/gtkwave/__init__.py,sha256=knumeAY5DeW60NwxcMYFnSsMVQjqgjaernR3O3dF9Ic,1084
+siliconcompiler/tools/gtkwave/show.py,sha256=IIZrID6wOxstdsYkkjqQo5TwFdpCuBcpCkDr9DqW1Ak,2599
+siliconcompiler/tools/gtkwave/scripts/sc_show.tcl,sha256=fKQLNyPCvPOXmgRRtzpsZfXUTqBsehgKCEwT2m3z7C4,879
 siliconcompiler/tools/icarus/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
-siliconcompiler/tools/icarus/compile.py,sha256=WH3qJ751bS9RfMl0M63xMA_zKzcSITqf5_3RvIBUI90,3056
+siliconcompiler/tools/icarus/compile.py,sha256=MFS15jDYVp56MMWvinSNTWApCBX7pa1lS2iXprFXBFc,3182
 siliconcompiler/tools/icarus/icarus.py,sha256=d1-5s-Z_HaCw6lTCSWRD5oTcPdPrT3rTiSoCpV7y0tU,911
 siliconcompiler/tools/icepack/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
 siliconcompiler/tools/icepack/bitstream.py,sha256=GSpBcabGfFJmRuo1770EosWMDVJHVjUsxluxZQorsTc,641
@@ -205,7 +208,7 @@ siliconcompiler/tools/nextpnr/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5N
 siliconcompiler/tools/nextpnr/apr.py,sha256=dCMLDS4xnwqCoBtCKd3kwCxjIRqPn_zq3f7pkWPw5mw,802
 siliconcompiler/tools/nextpnr/nextpnr.py,sha256=B5kr-ZLnt2vDFtS4veIdf0_Cm6yvfS1QVqWhxYa8R24,1712
 siliconcompiler/tools/openroad/__init__.py,sha256=aJLiAfdleczGD9QXw7TYBGrWFiEJhaAWbQJcNlYCOts,3250
-siliconcompiler/tools/openroad/_apr.py,sha256=keAQlByWzCaMdhIRI-uR51fkmj8gfs2DNSzuNW_XGvs,48936
+siliconcompiler/tools/openroad/_apr.py,sha256=Jvx37yBqYYc2dZrQjn6F2eUNt5gtXEPyhMYMDaeIkiM,49312
 siliconcompiler/tools/openroad/antenna_repair.py,sha256=VwHwiNOuaF8vQj2D_Rcfk2cRV45lA8h0JHdItk4y2dE,2225
 siliconcompiler/tools/openroad/clock_tree_synthesis.py,sha256=slqlMBJnVauTqzOdw4pNOhgN9bJCpwtTj2FV0YmpGgE,1687
 siliconcompiler/tools/openroad/detailed_placement.py,sha256=IsTuZH7780qXQYB7ZEpima2KbK8VWYTD3lBUehcMBX8,1548
@@ -213,7 +216,7 @@ siliconcompiler/tools/openroad/detailed_route.py,sha256=JVm3E8BVEABRG29lyyRNiW5V
 siliconcompiler/tools/openroad/endcap_tapcell_insertion.py,sha256=Clus1qkvUwlyfD4W4rZ_TvbK8vxHt9c6luN4wTSJcz4,1449
 siliconcompiler/tools/openroad/fillercell_insertion.py,sha256=ac3HDUMbd065jn82s6km3ZSRtJbpp-yMHJIcvHBDO-0,1488
 siliconcompiler/tools/openroad/fillmetal_insertion.py,sha256=CPYQ2LFtHlZ5yPUc3xefjDisk62woXgnx_ac6wNNk4Y,2511
-siliconcompiler/tools/openroad/global_placement.py,sha256=hCJLkydal6UqK3A3UBdnM8JCsn6cloM37wfgnzjuoRo,1531
+siliconcompiler/tools/openroad/global_placement.py,sha256=19r19S1BlzlmfMu93B-QYvLRzl26iLo9WS-i85Oznp0,2529
 siliconcompiler/tools/openroad/global_route.py,sha256=JQwZDheM26E29hDaqkJ3eHWo-1BBYYts0kd8yQfbJfQ,1641
 siliconcompiler/tools/openroad/init_floorplan.py,sha256=BxsRvmPUfsp0HGIueLPLWh6f8_CXLxhX1_mOQSVjSuI,4015
 siliconcompiler/tools/openroad/macro_placement.py,sha256=jXrdTQLt-OtV66UWYyZ35jOQdDfkqN-rjWLiGnjjNYI,1941
@@ -234,31 +237,31 @@ siliconcompiler/tools/openroad/scripts/sc_show.tcl,sha256=JYgw9nRMqP-LzvS9ZAM-Jz
 siliconcompiler/tools/openroad/scripts/apr/postamble.tcl,sha256=9CLpG_DLvRKMgFRQMR5xWSzGIF9QERIBMkKTxcDYaWA,1130
 siliconcompiler/tools/openroad/scripts/apr/preamble.tcl,sha256=0SHdMGDFSWYa92igsU5hVEit1fVnXVYZId7zVBOYo0k,2348
 siliconcompiler/tools/openroad/scripts/apr/sc_antenna_repair.tcl,sha256=Zyd9w7Md6iyCIBmDl-mTYPWkXIx5T0NE9qid339KqLA,1489
-siliconcompiler/tools/openroad/scripts/apr/sc_clock_tree_synthesis.tcl,sha256=bX3B_GTRJ7eIDupcoXZa9JtL9ms8TY2oSe2qfbadtbo,1910
+siliconcompiler/tools/openroad/scripts/apr/sc_clock_tree_synthesis.tcl,sha256=e-siDFpyJksLl-pwKMJGTXIue72MuZFVkilLeOrfvg4,1948
 siliconcompiler/tools/openroad/scripts/apr/sc_detailed_placement.tcl,sha256=Xcvz-kilJTsrcvNmVZZSzYtCWkC2I1EWYLMVy6DjSxw,924
 siliconcompiler/tools/openroad/scripts/apr/sc_detailed_route.tcl,sha256=GlFud8C-89kktBVck4YdSpr_QBDZw62vkEERLyKNzAI,2314
 siliconcompiler/tools/openroad/scripts/apr/sc_endcap_tapcell_insertion.tcl,sha256=A_eiApMbYlT0WOvreVtqkS-Ou1rdRu-m0Vtj7yKCGFg,1288
 siliconcompiler/tools/openroad/scripts/apr/sc_fillercell_insertion.tcl,sha256=uc7MdGV64PWeH_MAkxx2jrzXVXeoOAVYyYIGgMilPDk,571
 siliconcompiler/tools/openroad/scripts/apr/sc_fillmetal_insertion.tcl,sha256=Qk16mhbcVo1g4wBKjYwV4aNr2zAEFXsF8XnehA9xbWY,896
-siliconcompiler/tools/openroad/scripts/apr/sc_global_placement.tcl,sha256=wADPZeYFGVsmfNN11U6JCdGjqonsNcWhpuRO9TchE7A,555
+siliconcompiler/tools/openroad/scripts/apr/sc_global_placement.tcl,sha256=obZTbXhfzipP1RSs0LMVYb99w574qRnANgELjdrpnmw,2549
 siliconcompiler/tools/openroad/scripts/apr/sc_global_route.tcl,sha256=v8149E4GbJrdDAc7i_WFhh2dQomuzSlf149DNqm1DVI,1853
 siliconcompiler/tools/openroad/scripts/apr/sc_init_floorplan.tcl,sha256=j3sY5GMGtriQks2yaAEzxrcWhvFIsOrH8cfh5wj_aRQ,10431
 siliconcompiler/tools/openroad/scripts/apr/sc_macro_placement.tcl,sha256=RWQRQaFEtrlmaYah4FBwTMldL55FowefsPoq_rgurAw,5087
 siliconcompiler/tools/openroad/scripts/apr/sc_metrics.tcl,sha256=Y3EtUBTT1XJIM6CgnXqGAoRg46GNYuMG3dJ6tw-2ShE,500
 siliconcompiler/tools/openroad/scripts/apr/sc_pin_placement.tcl,sha256=FpHZ7b88rH-sxlg0w9PpWrmAZIj3Q6yLNiEFFm9wzkw,1114
 siliconcompiler/tools/openroad/scripts/apr/sc_power_grid.tcl,sha256=1yV9CZjE7iT99nInjc_cdYe5z2iCmtIJCAqlOkBy7k0,1503
-siliconcompiler/tools/openroad/scripts/apr/sc_repair_design.tcl,sha256=MGX50YV22tulRiCaSLGcU_m6fB5h8lbasQQZdBm7M5E,1687
-siliconcompiler/tools/openroad/scripts/apr/sc_repair_timing.tcl,sha256=Q-BpX6Q-W4YePmTcxc2tiSWgjz8NQrmZtF6nkSK9Lfg,2266
+siliconcompiler/tools/openroad/scripts/apr/sc_repair_design.tcl,sha256=2ihiPk3FBK9milXitFr2giN-mrSbeNZgk9Pd3UGVwdg,1770
+siliconcompiler/tools/openroad/scripts/apr/sc_repair_timing.tcl,sha256=D2wIj3qL4qmCgvKvzViimFbLkK5K0b7HYeFMw0H9JGo,2476
 siliconcompiler/tools/openroad/scripts/apr/sc_write_data.tcl,sha256=q0I3s-hBZtoiFkZHCfeEHBQGNbbgUmiMJ7U7Gsr1pQI,3696
 siliconcompiler/tools/openroad/scripts/common/debugging.tcl,sha256=i4oNtC0rQq3JaFf1-oKyr_jZQyu5ZF_--zskvG0hdKg,943
-siliconcompiler/tools/openroad/scripts/common/procs.tcl,sha256=ENSWIz6fkwGlILbOQe6C0-lRy-HGKRcY2QqujSRvGOc,21770
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 siliconcompiler/tools/openroad/scripts/common/read_input_files.tcl,sha256=sEL4hvDS30E5oHdkyDC2wqdYCKUY3bja4tobzSzWsDw,2020
 siliconcompiler/tools/openroad/scripts/common/read_liberty.tcl,sha256=GeXZ8H3a8fg8o-4KyfZj2N4Db_P9XArZl2T4apfMSZI,778
 siliconcompiler/tools/openroad/scripts/common/read_timing_constraints.tcl,sha256=fsHSSGXkrqOKXjwH7U8XMLMnEPoZpavBVkl4qzLugOU,515
 siliconcompiler/tools/openroad/scripts/common/reports.tcl,sha256=AY9k4oiBKacgsFW8EoOIbWp1lNOZ1b0ohD_o1xC1b1k,6101
 siliconcompiler/tools/openroad/scripts/common/screenshot.tcl,sha256=OEE4JpafdOK1cVJw3sie_Fvo03ZkheElhPpvKsgCV0E,447
 siliconcompiler/tools/openroad/scripts/common/write_data.tcl,sha256=5N7ZKWU_8NdEYO-n6tuTXCmWCYtClDjHykOidKyFWdk,168
-siliconcompiler/tools/openroad/scripts/common/write_images.tcl,sha256=lP9ycPyQ4p-etIuir-fGWr4vq1UqT6LZiy5cRhLZQh8,11031
+siliconcompiler/tools/openroad/scripts/common/write_images.tcl,sha256=4SOSYfakxKk_UNPUDR5C89JSj0VDVb5dRu6sPjBPLqo,11270
 siliconcompiler/tools/openroad/scripts/rcx/sc_rcx_bench.tcl,sha256=95p_XiRPA1PnofMTMUTesI4JniHnvB8f9_oANGRuC8M,692
 siliconcompiler/tools/openroad/scripts/rcx/sc_rcx_extract.tcl,sha256=Aj9J_8aiOR1WqcQvdx99WyUDcN8RafxXwtrexcS5UcU,489
 siliconcompiler/tools/openroad/templates/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
@@ -284,10 +287,10 @@ siliconcompiler/tools/sv2v/sv2v.py,sha256=23lP1FRk0Yc0nuQSdbURB0eXHz4BrCyeB-NpxS
 siliconcompiler/tools/template/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
 siliconcompiler/tools/template/template.py,sha256=amTwsGC2rAqM0S0n34ThFaLCMgmiiCl50GSjpoZOaUo,3406
 siliconcompiler/tools/verilator/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
-siliconcompiler/tools/verilator/compile.py,sha256=g6CXzJgyMglq8IGJ7Im9CyDHGPQw3t9jVbqp4Hpsbw0,6958
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 siliconcompiler/tools/verilator/lint.py,sha256=Lp-PXk6kYtnemN2cMuvCyZxodDIDzLEmKE3__nGKD1s,520
 siliconcompiler/tools/verilator/parse.py,sha256=ZAYNgcK7wxRabW1mcgdGfmrcn6cLusPgK1X9vJkWUok,806
-siliconcompiler/tools/verilator/verilator.py,sha256=H3IPi04f8UdLXoEC-rNYeFcU_hSuBxGKJ9NslkOSlTY,6376
+siliconcompiler/tools/verilator/verilator.py,sha256=h1spXwxJuRzavW_uRT6ZDEMGB9SaBZQwl2ZiURImy0M,6374
 siliconcompiler/tools/vivado/__init__.py,sha256=f3DdiwAnqqXZZMWp8AAzljLE2pp0Gqarhv9LxzP1ruE,115
 siliconcompiler/tools/vivado/bitstream.py,sha256=361b51W7S_0umzGx_Q7VaXFRHpmanrJiNZCXTS5sXkg,972
 siliconcompiler/tools/vivado/place.py,sha256=tvD4-pPeJ-pjptaytY7jTrbllYyYgsDv59NWPvH-eSU,844
@@ -329,7 +332,7 @@ siliconcompiler/tools/yosys/techmaps/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeu
 siliconcompiler/tools/yosys/techmaps/lcu_kogge_stone.v,sha256=M4T-ygiKmlsprl5eGGLaV5w6HVqlEepn0wlUDmOkapg,773
 siliconcompiler/tools/yosys/templates/__init__.py,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
 siliconcompiler/tools/yosys/templates/abc.const,sha256=TAq9ThdLMYCJGrtToEU0gWcLuEtjE4Gk8huBbTm1v-I,116
-siliconcompiler/toolscripts/_tools.json,sha256=uF8eqlEFhHAdKrKaRJJDNm9_eGVihGP-qu4GvoIzE6I,3927
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 siliconcompiler/toolscripts/_tools.py,sha256=P30KY_xbbjl8eHGsPAxDcAzWvJJpiL07ZfGZZDQbdR8,7174
 siliconcompiler/toolscripts/rhel8/install-chisel.sh,sha256=lPORZN7vlBX6sJSv01JOIiDE9-_7GcCZGA7EP5ri3MQ,525
 siliconcompiler/toolscripts/rhel8/install-ghdl.sh,sha256=xCLeEUuJVI_6PVEvnTwBsTWoEHiQg0TY3x-tJXfg6Zk,459
@@ -347,6 +350,7 @@ siliconcompiler/toolscripts/rhel8/install-xyce.sh,sha256=rVAt5gIDJNW6gCtuyuRN0VC
 siliconcompiler/toolscripts/rhel8/install-yosys.sh,sha256=zNqotSJPNRQUzj16GRhxujpRHPnc-7BOub1rJuSMy2c,641
 siliconcompiler/toolscripts/rhel9/install-chisel.sh,sha256=lPORZN7vlBX6sJSv01JOIiDE9-_7GcCZGA7EP5ri3MQ,525
 siliconcompiler/toolscripts/rhel9/install-ghdl.sh,sha256=lVBBvBOu4WInmZ4asSGObggjlDRslSN0MiQs3qPOHtU,469
+siliconcompiler/toolscripts/rhel9/install-gtkwave.sh,sha256=dQa8nY6c2okYOHCkxi5FMJciIjmO-NdjxWH8CUyqiOY,882
 siliconcompiler/toolscripts/rhel9/install-icarus.sh,sha256=4N2Y2H01impqJy0k5aUDFrF9Z2oonGqPGeHCXey-2VM,771
 siliconcompiler/toolscripts/rhel9/install-klayout.sh,sha256=WRIUDQo62q8X_Ps6oxJ6_5ntHTAo-QC3P5f675qSTzA,397
 siliconcompiler/toolscripts/rhel9/install-magic.sh,sha256=ugiH7ybdxQggs0ucUHiVtCOO142XOh5OhOmmt_aZXRs,609
@@ -364,6 +368,7 @@ siliconcompiler/toolscripts/ubuntu20/install-bambu.sh,sha256=GfDqGuOJt_kUwgtVyiB
 siliconcompiler/toolscripts/ubuntu20/install-bluespec.sh,sha256=MlylMZfFsZq74LnHWgWOiRQKxumm2wK5bZ1Z2A4jwn4,962
 siliconcompiler/toolscripts/ubuntu20/install-chisel.sh,sha256=lPORZN7vlBX6sJSv01JOIiDE9-_7GcCZGA7EP5ri3MQ,525
 siliconcompiler/toolscripts/ubuntu20/install-ghdl.sh,sha256=BrvE2Y3VvUIH4U4lScMb2aRKx0TMEscynHswYUslY6U,467
+siliconcompiler/toolscripts/ubuntu20/install-gtkwave.sh,sha256=HWMBTiLzWd9G4x8HnZwnID3qTO7TWRjKtdoO81cxSig,586
 siliconcompiler/toolscripts/ubuntu20/install-icarus.sh,sha256=KHIjKwwA2C9s5jkYzcWWifHpiSc-ewywjyqLk-giB0U,525
 siliconcompiler/toolscripts/ubuntu20/install-icepack.sh,sha256=Qb4_M7Pe8ho3XLlXziRyH0YC_fyiGGbdT1x14s-dZC0,668
 siliconcompiler/toolscripts/ubuntu20/install-klayout.sh,sha256=_g_yETpqGJchbWtV-Sne4ZrvGL3Km7UcR7OYfkZDaz4,781
@@ -386,6 +391,7 @@ siliconcompiler/toolscripts/ubuntu22/install-bambu.sh,sha256=ZQhExOWbLNghy_wmoFx
 siliconcompiler/toolscripts/ubuntu22/install-bluespec.sh,sha256=MlylMZfFsZq74LnHWgWOiRQKxumm2wK5bZ1Z2A4jwn4,962
 siliconcompiler/toolscripts/ubuntu22/install-chisel.sh,sha256=lPORZN7vlBX6sJSv01JOIiDE9-_7GcCZGA7EP5ri3MQ,525
 siliconcompiler/toolscripts/ubuntu22/install-ghdl.sh,sha256=BrvE2Y3VvUIH4U4lScMb2aRKx0TMEscynHswYUslY6U,467
+siliconcompiler/toolscripts/ubuntu22/install-gtkwave.sh,sha256=HWMBTiLzWd9G4x8HnZwnID3qTO7TWRjKtdoO81cxSig,586
 siliconcompiler/toolscripts/ubuntu22/install-icarus.sh,sha256=KHIjKwwA2C9s5jkYzcWWifHpiSc-ewywjyqLk-giB0U,525
 siliconcompiler/toolscripts/ubuntu22/install-icepack.sh,sha256=PM7gT42Ew8mSE5G_AA_jl_9oL3M_qcvT92xDdFRJoZ0,661
 siliconcompiler/toolscripts/ubuntu22/install-klayout.sh,sha256=_g_yETpqGJchbWtV-Sne4ZrvGL3Km7UcR7OYfkZDaz4,781
@@ -408,6 +414,7 @@ siliconcompiler/toolscripts/ubuntu24/install-bambu.sh,sha256=ZQhExOWbLNghy_wmoFx
 siliconcompiler/toolscripts/ubuntu24/install-bluespec.sh,sha256=MlylMZfFsZq74LnHWgWOiRQKxumm2wK5bZ1Z2A4jwn4,962
 siliconcompiler/toolscripts/ubuntu24/install-chisel.sh,sha256=lPORZN7vlBX6sJSv01JOIiDE9-_7GcCZGA7EP5ri3MQ,525
 siliconcompiler/toolscripts/ubuntu24/install-ghdl.sh,sha256=BrvE2Y3VvUIH4U4lScMb2aRKx0TMEscynHswYUslY6U,467
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 siliconcompiler/toolscripts/ubuntu24/install-icarus.sh,sha256=KHIjKwwA2C9s5jkYzcWWifHpiSc-ewywjyqLk-giB0U,525
 siliconcompiler/toolscripts/ubuntu24/install-icepack.sh,sha256=PM7gT42Ew8mSE5G_AA_jl_9oL3M_qcvT92xDdFRJoZ0,661
 siliconcompiler/toolscripts/ubuntu24/install-klayout.sh,sha256=f4l-Z86LAkjdo5NLq89ORfkjE0Mjygyp84VYi7gEWUU,906
@@ -428,10 +435,10 @@ siliconcompiler/toolscripts/ubuntu24/install-xyce.sh,sha256=33Iq99sLdiVWFl4zpD2h
 siliconcompiler/toolscripts/ubuntu24/install-yosys.sh,sha256=zpyt0MVI7tY8kGY2GIIZvWlXOXm0T7N9IMIZ18Oe26E,713
 siliconcompiler/utils/__init__.py,sha256=9tcYLpWLSbArmlF6qU0KPiFcziaWkzqlQTl6cOl5qpI,14260
 siliconcompiler/utils/asic.py,sha256=cMLs7dneSmh5BlHS0-bZ1tLUpvghTw__gNaUCMpyBds,4986
-siliconcompiler/utils/showtools.py,sha256=qc5HLqCQxUITdhp9rESf0w_blAkKVYL6JpkXQdrew00,1406
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