siliconcompiler 0.29.0__py3-none-any.whl → 0.29.1__py3-none-any.whl

siliconcompiler/sphinx_ext/dynamicgen.py

@@ -9,7 +9,7 @@ from sphinx.util.docutils import SphinxDirective
 from sphinx.domains.std import StandardDomain
 from sphinx.addnodes import pending_xref
 import docutils
-from siliconcompiler import __version__ as sc_version
+from siliconcompiler.utils import get_plugins
 
 import importlib
 import pkgutil
@@ -17,6 +17,7 @@ import os
 import subprocess
 
 import siliconcompiler
+from siliconcompiler.sphinx_ext import sc_root as SC_ROOT
 from siliconcompiler.schema import Schema, utils
 from siliconcompiler.sphinx_ext.utils import (
     strong,
@@ -37,9 +38,6 @@ from siliconcompiler.sphinx_ext.utils import (
 # Helpers
 #############
 
-# We need this in a few places, so just make it global
-SC_ROOT = os.path.abspath(f'{__file__}/../../../')
-
 
 def build_schema_value_table(cfg, refdoc, keypath_prefix=None, skip_zero_weight=False):
     '''Helper function for displaying values set in schema as a docutils table.'''
@@ -194,6 +192,7 @@ class DynamicGen(SphinxDirective):
             # Then use setup doc string
             self.generate_documentation_from_object(setup, path, s)
 
+        chips = None
         try:
             chips = self.configure_chip_for_docs(module)
         except Exception as e:
@@ -251,22 +250,14 @@ class DynamicGen(SphinxDirective):
 
         This function explicitly searches builtins.
         '''
-        builtins_dir = f'{SC_ROOT}/siliconcompiler/{self.PATH}'
-        if 'nobuiltins' not in self.options:
-            modules = self.get_modules_in_dir(builtins_dir)
-        else:
-            modules = []
 
-        external_paths = os.getenv(self.SEARCH_ENV, "").split(':')
-        for scpath in external_paths:
-            if not scpath:
-                continue
-            if not os.path.isdir(scpath):
-                print(f'{scpath} not found')
-                raise FileNotFoundError(scpath)
-            if builtins_dir == scpath:
-                continue
-            modules.extend(self.get_modules_in_dir(scpath))
+        modules = []
+        for plugin in get_plugins("docs", name=self.PATH):
+            for mod in plugin():
+                if isinstance(mod, str):
+                    modules.extend(self.get_modules_in_dir(mod))
+                else:
+                    modules.append(mod)
 
         return modules
 
@@ -321,15 +312,15 @@ class DynamicGen(SphinxDirective):
         else:
             return False
 
-        builtin = os.path.abspath(path).startswith(SC_ROOT)
+        src_link = None
+        for docs_link in get_plugins("docs", name="linkcode"):
+            src_link = docs_link(file=path)
+            if src_link:
+                break
 
-        if builtin:
-            relpath = path[len(SC_ROOT) + 1:]
-            gh_root = f'https://github.com/siliconcompiler/siliconcompiler/blob/v{sc_version}'
-            gh_link = f'{gh_root}/{relpath}'
-            filename = os.path.basename(relpath)
+        if src_link:
             p = para('Setup file: ')
-            p += link(gh_link, text=filename)
+            p += link(src_link, text=os.path.basename(path))
             s += p
 
         return True
@@ -478,7 +469,6 @@ class DynamicGen(SphinxDirective):
 class FlowGen(DynamicGen):
     PATH = 'flows'
     REF_PREFIX = 'flows'
-    SEARCH_ENV = "SC_DOCS_FLOWS"
 
     def extra_content(self, chip, modname):
         flow_path = os.path.join(self.env.app.outdir, f'_images/gen/{modname}.svg')
@@ -525,7 +515,6 @@ class FlowGen(DynamicGen):
 class PDKGen(DynamicGen):
     PATH = 'pdks'
     REF_PREFIX = 'pdks'
-    SEARCH_ENV = "SC_DOCS_PDKS"
 
     def display_config(self, chip, modname):
         '''Display parameters under `pdk`, `asic`, and `library` in nested form.'''
@@ -550,7 +539,6 @@ class PDKGen(DynamicGen):
 class LibGen(DynamicGen):
     PATH = 'libs'
     REF_PREFIX = 'libs'
-    SEARCH_ENV = "SC_DOCS_LIBS"
 
     def extra_content(self, chip, modname):
         # assume same pdk for all libraries configured by this module
@@ -593,7 +581,6 @@ class LibGen(DynamicGen):
 class ToolGen(DynamicGen):
     PATH = 'tools'
     REF_PREFIX = 'tools'
-    SEARCH_ENV = "SC_DOCS_TOOLS"
 
     def make_chip(self):
         chip = super().make_chip()
@@ -810,7 +797,6 @@ class ToolGen(DynamicGen):
 class TargetGen(DynamicGen):
     PATH = 'targets'
     REF_PREFIX = 'targets'
-    SEARCH_ENV = "SC_DOCS_TARGETS"
 
     def build_module_list(self, chip, header, modtype, targetname, *refprefix):
         modules = chip._loaded_modules[modtype]
@@ -878,7 +864,6 @@ class TargetGen(DynamicGen):
 class AppGen(DynamicGen):
     PATH = 'apps'
     REF_PREFIX = 'apps'
-    SEARCH_ENV = "SC_DOCS_APPS"
 
     def document_module(self, module, modname, path):
         if modname[0] == "_":
@@ -898,7 +883,6 @@ class AppGen(DynamicGen):
 class ChecklistGen(DynamicGen):
     PATH = 'checklists'
     REF_PREFIX = 'checklists'
-    SEARCH_ENV = "SC_DOCS_CHECKLISTS"
 
     def display_config(self, chip, modname):
         '''Display parameters under in nested form.'''

siliconcompiler/sphinx_ext/schemagen.py

@@ -16,14 +16,15 @@ from siliconcompiler.sphinx_ext.utils import (
     build_list
 )
 from siliconcompiler.schema import utils
+from siliconcompiler.sphinx_ext import sc_root as SC_ROOT
 
 
 # Main Sphinx plugin
 class SchemaGen(SphinxDirective):
 
     def run(self):
-        cfg_path = os.path.dirname(siliconcompiler.__file__)
-        self.env.note_dependency(os.path.join(cfg_path, 'schema', 'schema_cfg.py'))
+        self.env.note_dependency(
+            os.path.join(SC_ROOT, 'siliconcompiler', 'schema', 'schema_cfg.py'))
         self.env.note_dependency(__file__)
         self.env.note_dependency(utils.__file__)
 

siliconcompiler/targets/__init__.py

@@ -0,0 +1,26 @@
+from siliconcompiler.targets import asap7_demo
+from siliconcompiler.targets import asic_demo
+from siliconcompiler.targets import fpgaflow_demo
+from siliconcompiler.targets import freepdk45_demo
+from siliconcompiler.targets import gf180_demo
+from siliconcompiler.targets import ihp130_demo
+from siliconcompiler.targets import interposer_demo
+from siliconcompiler.targets import skywater130_demo
+
+
+def get_targets():
+    '''
+    Returns a dict of builtin targets
+    '''
+    return {
+        module.__name__.split(".")[-1]: module for module in (
+            asap7_demo,
+            asic_demo,
+            fpgaflow_demo,
+            freepdk45_demo,
+            gf180_demo,
+            ihp130_demo,
+            interposer_demo,
+            skywater130_demo
+        )
+    }

siliconcompiler/templates/replay/replay.py.j2

@@ -0,0 +1,62 @@
+#!/usr/bin/env python3
+# SiliconCompiler Replay
+# Design: {{ design }}
+# Jobname: {{ jobname }}
+# Date: {{ date }}
+
+import base64
+import os.path
+import tarfile
+import sys
+
+from io import BytesIO
+
+from siliconcompiler import Chip
+
+# Input files as a tarball encoded as base64
+INPUT_FILES = \{% for line in src_file %}
+    "{{ line }}"{% if not loop.last %} \{% endif %}{% endfor %}
+
+
+if __name__ == "__main__":
+    chip = Chip("{{ design }}")
+    chip.read_manifest(os.path.join(os.path.dirname(__file__), "sc_manifest.json"))
+
+    args = chip.create_cmdline(
+        progname="{{ design }}",
+        description="Replay script for {{ design }} / {{ jobname }}",
+        switchlist=[
+            "-builddir",
+            "-cachedir",
+            "-jobname",
+            "-to",
+            "-from",
+            "-novercheck",
+            "-continue"
+        ],
+        additional_args={
+            "-check_files": {
+                "action": "store_true",
+                "help": "Do not run, just check files"
+            }
+        })
+
+    # Extract input files
+    with BytesIO(base64.b64decode(INPUT_FILES.encode())) as fd:
+        with tarfile.open(fileobj=fd, mode='r:gz') as tar:
+            tar.extractall(path=chip._getcollectdir())
+
+    # Set tool versions{% for node, tool, version in tool_versions %}
+    chip.set("tool", "{{ tool }}", "version", "=={{ version }}", step="{{ node[0] }}", index="{{ node[1] }}"){% endfor %}
+
+    if args["check_files"]:
+        if chip.check_filepaths():
+            sys.exit(0)
+        else:
+            sys.exit(1)
+
+    # Run
+    chip.run()
+
+    # Report summary
+    chip.summary()

siliconcompiler/templates/replay/requirements.txt

@@ -1,6 +1,7 @@
 # SiliconCompiler Replay Environment
-# From {{ source }}
+# Design: {{ design }}
 # Jobname: {{ jobname }}
+# Date: {{ date }}
 
 {% for pkg in pkgs %}{{ pkg }}
 {% endfor %}

siliconcompiler/templates/replay/setup.sh

@@ -1,17 +1,130 @@
 #!/usr/bin/env bash
 # SiliconCompiler Replay Setup
-# From {{ source }}
+# Design: {{ design }}
 # Jobname: {{ jobname }}
+# Date: {{ date }}
+
+if ! [ "${BASH_SOURCE[0]}" -ef "$0" ];
+then
+    echo "${BASH_SOURCE[0]} must be executed"
+    return 1
+fi
+
+_help() {
+cat <<EOF
+{{ description }}
+Usage: $0 -dir=DIR
+                    # Directory to use for extraction, defaults to "./replay"
+       $0 -venv=DIR
+                    # Name of virtual environment, defaults to "venv"
+       $0 -print_tools
+                    # Print tool version and exit
+       $0 -extract_only
+                    # Only extract the files
+       $0 -setup_only
+                    # Only setup the runtime environment
+       $0 -assert_python
+                    # Require python versions match
+       $0 -help
+                    # Print this help information
+EOF
+}
+
+_print_tools() {
+cat <<EOF{% for line in tools %}
+{{ line }}{% endfor %}
+EOF
+}
+
+path=$(realpath replay)
+venv="venv"
+extract_only="no"
+setup_only="no"
+assert_python="no"
+
+while [ "$#" -gt 0 ]; do
+    case "${1}" in
+        -h|-help)
+            _help
+            exit 0
+            ;;
+        -extract_only)
+            extract_only="yes"
+            ;;
+        -setup_only)
+            setup_only="yes"
+            ;;
+        -assert_python)
+            assert_python="yes"
+            ;;
+        -print_tools)
+            _print_tools
+            exit 0
+            ;;
+        -dir=*)
+            path=$(realpath ${1#-dir=})
+            ;;
+        -venv=*)
+            venv=${1#-venv=}
+            ;;
+        *)
+            echo "Unknown option: ${1}" >&2
+            _help
+            exit 1
+            ;;
+    esac
+    shift 1
+done
+
+# Create output path
+mkdir -p "$path"
+
+# Change to output path directory
+cd "$path"
+
+# Add gitignore
+echo "*" > .gitignore
+
+# Extract files
+read -r -d '' SCRIPT << PythonScript{% for line in script %}
+{{ line }}{% endfor %}
+PythonScript
+
+echo "$SCRIPT" | base64 --decode | gunzip > replay.py
+chmod +x replay.py
+
+read -r -d '' MANIFEST << Manifest{% for line in manifest %}
+{{ line }}{% endfor %}
+Manifest
+
+echo "$MANIFEST" | base64 --decode | gunzip > sc_manifest.json
+
+cat > requirements.txt << PythonRequirements{% for line in requirements %}
+{{ line }}{% endfor %}
+PythonRequirements
+
+if [ "$extract_only" == "yes" ]; then
+    exit 0
+fi
 
 if [ "$(python3 -V)" != "Python {{ pythonversion }}" ]; then
     echo "Python version mismatch: $(python3 -V) != {{ pythonversion }}"
+
+    if [ "$assert_python" == "yes" ]; then
+        exit 1
+    fi
 fi
 
-python3 -m venv {{ design }}_venv --clear
-echo "*" > gcd_venv/.gitignore
+python3 -m venv $venv --clear
 
-. {{ design }}_venv/bin/activate
+. $venv/bin/activate
 pip3 install -r requirements.txt
 
-echo "To enable run environment: . {{ design }}_venv/bin/activate"
-echo "To replay: ./run.py"
+echo "To enable run environment: . $path/$venv/bin/activate"
+echo "To replay: $path/replay.py"
+
+if [ "$setup_only" == "yes" ]; then
+    exit 0
+fi
+
+./replay.py

siliconcompiler/tools/__init__.py

@@ -0,0 +1,60 @@
+from siliconcompiler.tools.bambu import bambu
+from siliconcompiler.tools.bluespec import bluespec
+from siliconcompiler.tools.builtin import builtin
+from siliconcompiler.tools.chisel import chisel
+from siliconcompiler.tools.execute import execute
+from siliconcompiler.tools.genfasm import genfasm
+from siliconcompiler.tools.ghdl import ghdl
+from siliconcompiler.tools.icarus import icarus
+from siliconcompiler.tools.icepack import icepack
+from siliconcompiler.tools.klayout import klayout
+from siliconcompiler.tools.magic import magic
+from siliconcompiler.tools.montage import montage
+from siliconcompiler.tools.netgen import netgen
+from siliconcompiler.tools.nextpnr import nextpnr
+from siliconcompiler.tools import openroad
+from siliconcompiler.tools import opensta
+from siliconcompiler.tools import slang
+from siliconcompiler.tools import surelog
+from siliconcompiler.tools.sv2v import sv2v
+from siliconcompiler.tools.verilator import verilator
+from siliconcompiler.tools.vivado import vivado
+from siliconcompiler.tools.vpr import vpr
+from siliconcompiler.tools import xdm
+from siliconcompiler.tools import xyce
+from siliconcompiler.tools import yosys
+
+
+def get_tools():
+    '''
+    Returns a dict of builtin tools
+    '''
+    return {
+        module.__name__.split(".")[-1]: module for module in (
+            bambu,
+            bluespec,
+            builtin,
+            chisel,
+            execute,
+            genfasm,
+            ghdl,
+            icarus,
+            icepack,
+            klayout,
+            magic,
+            montage,
+            netgen,
+            nextpnr,
+            openroad,
+            opensta,
+            slang,
+            surelog,
+            sv2v,
+            verilator,
+            vivado,
+            vpr,
+            xdm,
+            xyce,
+            yosys
+        )
+    }

siliconcompiler/tools/_common/asic.py

@@ -1,4 +1,5 @@
-from .. import _common
+from . import get_libraries as common_get_libraries
+from . import get_tool_task, pick_key
 import json
 
 
@@ -19,7 +20,7 @@ def get_libraries(chip, type):
             continue
         libs.append(lib)
 
-    for lib in _common.get_libraries(chip, include_asic=False):
+    for lib in common_get_libraries(chip, include_asic=False):
         if not chip.valid('library', lib, 'asic', f'{type}lib'):
             continue
         for sublib in chip.get('library', lib, 'asic', f'{type}lib', step=step, index=index):
@@ -55,7 +56,7 @@ def set_tool_task_var(chip,
     '''
     step = chip.get('arg', 'step')
     index = chip.get('arg', 'index')
-    tool, task = _common.get_tool_task(chip, step, index)
+    tool, task = get_tool_task(chip, step, index)
     pdkname = chip.get('option', 'pdk')
     stackup = chip.get('option', 'stackup')
 
@@ -107,7 +108,7 @@ def set_tool_task_var(chip,
             return len(val) > 0
         return val is not None
 
-    require_key, value = _common.pick_key(chip, reversed(check_keys), step=step, index=index)
+    require_key, value = pick_key(chip, reversed(check_keys), step=step, index=index)
     if not check_value(value):
         value = default_value
 
@@ -145,7 +146,7 @@ def get_tool_task_var(chip,
     '''
     step = chip.get('arg', 'step')
     index = chip.get('arg', 'index')
-    tool, _ = _common.get_tool_task(chip, step, index)
+    tool, _ = get_tool_task(chip, step, index)
     pdkname = chip.get('option', 'pdk')
     stackup = chip.get('option', 'stackup')
 
@@ -174,7 +175,7 @@ def get_tool_task_var(chip,
             option_key = f'{tool}_{param_key}'
         check_keys.append(['option', 'var', option_key])
 
-    _, value = _common.pick_key(chip, reversed(check_keys), step=step, index=index)
+    _, value = pick_key(chip, reversed(check_keys), step=step, index=index)
 
     return value
 

siliconcompiler/tools/ghdl/ghdl.py

@@ -12,13 +12,12 @@ Sources: https://github.com/ghdl/ghdl
 Installation: https://github.com/ghdl/ghdl
 '''
 
-from siliconcompiler.tools.ghdl import convert
-
 
 #####################################################################
 # Make Docs
 #####################################################################
 def make_docs(chip):
+    from siliconcompiler.tools.ghdl import convert
     convert.setup(chip)
     return chip
 

siliconcompiler/tools/klayout/convert_drc_db.py

@@ -1,10 +1,10 @@
 from siliconcompiler.tools._common import input_provides, input_file_node_name, get_tool_task
 
-from siliconcompiler.tools.klayout import klayout
 from siliconcompiler.tools.klayout.klayout import setup as setup_tool
 
 
 def make_docs(chip):
+    from siliconcompiler.tools.klayout import klayout
     klayout.make_docs(chip)
 
 

siliconcompiler/tools/klayout/drc.py

@@ -5,12 +5,12 @@ from siliconcompiler.tools._common import input_provides, has_input_files, \
     get_input_files, get_tool_task, record_metric
 from siliconcompiler.tools._common.asic import set_tool_task_var, get_tool_task_var
 
-from siliconcompiler.tools.klayout import klayout
 from siliconcompiler.tools.klayout.klayout import setup as setup_tool
 import xml.etree.ElementTree as ET
 
 
 def make_docs(chip):
+    from siliconcompiler.tools.klayout import klayout
     klayout.make_docs(chip)
     chip.set('tool', 'klayout', 'task', 'drc', 'var', 'drc_name', '<drc_name>',
              step='<step>', index='<index>')

siliconcompiler/tools/klayout/export.py

@@ -1,5 +1,6 @@
-
+import os
 from siliconcompiler.tools.klayout.klayout import setup as setup_tool
+from siliconcompiler.tools.klayout.klayout import runtime_options as runtime_options_tool
 from siliconcompiler.tools.klayout.screenshot import setup_gui_screenshot
 from siliconcompiler.tools._common import input_provides, get_tool_task
 from siliconcompiler.tools._common.asic import get_libraries
@@ -120,3 +121,9 @@ def setup(chip):
     if chip.get('tool', tool, 'task', task, 'var', 'screenshot',
                 step=step, index=index) == ['true']:
         setup_gui_screenshot(chip, require_input=False)
+
+
+def runtime_options(chip):
+    return runtime_options_tool(chip) + [
+        '-rd', f'SC_TOOLS_ROOT={os.path.dirname(os.path.dirname(__file__))}'
+    ]

siliconcompiler/tools/klayout/klayout.py

@@ -15,13 +15,13 @@ from pathlib import Path
 import platform
 import shutil
 from siliconcompiler.tools._common import get_tool_task
-from siliconcompiler.targets import freepdk45_demo
 
 
 ####################################################################
 # Make Docs
 ####################################################################
 def make_docs(chip):
+    from siliconcompiler.targets import freepdk45_demo
     chip.use(freepdk45_demo)
 
 
@@ -102,7 +102,7 @@ def runtime_options(chip):
     # that has no 3rd-party dependencies.
     # This must be done at runtime to work in a remote context.
 
-    return ['-rd', f'SC_ROOT={chip.scroot}']
+    return ['-rd', f'SC_KLAYOUT_ROOT={os.path.dirname(__file__)}']
 
 
 ################################

siliconcompiler/tools/klayout/klayout_convert_drc_db.py

@@ -150,9 +150,9 @@ def convert_drc(view, path):
 
 def main():
     # SC_ROOT provided by CLI
-    sys.path.append(SC_ROOT)  # noqa: F821
+    sys.path.append(SC_KLAYOUT_ROOT)  # noqa: F821
 
-    from tools.klayout.klayout_utils import get_schema
+    from klayout_utils import get_schema
 
     schema = get_schema(manifest='sc_manifest.json')
 

siliconcompiler/tools/klayout/klayout_export.py

@@ -42,7 +42,7 @@ import fnmatch
 def gds_export(design_name, in_def, in_files, out_file, tech, allow_missing, config_file='',
                seal_file='',
                timestamps=True):
-    from tools.klayout.klayout_utils import get_write_options  # noqa E402
+    from klayout_utils import get_write_options  # noqa E402
 
     # Load def file
     main_layout = pya.Layout()
@@ -119,16 +119,18 @@ def gds_export(design_name, in_def, in_files, out_file, tech, allow_missing, con
 
 def main():
     # SC_ROOT provided by CLI
-    sys.path.append(SC_ROOT)  # noqa: F821
+    sys.path.append(SC_KLAYOUT_ROOT)  # noqa: F821
+    sys.path.append(SC_TOOLS_ROOT)  # noqa: F821
+    print(sys.path)
 
-    from tools.klayout.klayout_utils import (
+    from klayout_utils import (
         technology,
         get_streams,
         save_technology,
         get_schema
     )
-    from tools.klayout.klayout_show import show
-    from tools._common.asic import get_libraries
+    from klayout_show import show
+    from _common.asic import get_libraries
 
     schema = get_schema(manifest='sc_manifest.json')
 

siliconcompiler/tools/klayout/klayout_operations.py

@@ -148,7 +148,7 @@ def rename_cell(base_layout, old_name, new_name):
 
 
 def write_stream(layout, outfile, timestamps):
-    from tools.klayout.klayout_utils import get_write_options
+    from klayout_utils import get_write_options
 
     print(f"[INFO] Writing layout: '{outfile}'")
 
@@ -324,9 +324,10 @@ def parse_operations(schema, base_layout, steps):
 
 if __name__ == "__main__":
     # SC_ROOT provided by CLI
-    sys.path.append(SC_ROOT)  # noqa: F821
+    sys.path.append(SC_KLAYOUT_ROOT)  # noqa: F821
+    sys.path.append(SC_TOOLS_ROOT)  # noqa: F821
 
-    from tools.klayout.klayout_utils import (
+    from klayout_utils import (
         technology,
         get_streams,
         get_schema

siliconcompiler/tools/klayout/klayout_show.py

@@ -205,9 +205,10 @@ def __screenshot_montage(schema, view, xbins, ybins):
 
 def main():
     # SC_ROOT provided by CLI, and is only accessible when this is main module
-    sys.path.append(SC_ROOT)  # noqa: F821
+    sys.path.append(SC_KLAYOUT_ROOT)  # noqa: F821
+    sys.path.append(SC_TOOLS_ROOT)  # noqa: F821
 
-    from tools.klayout.klayout_utils import (
+    from klayout_utils import (
         technology,
         get_schema
     )

siliconcompiler/tools/klayout/klayout_utils.py

@@ -21,7 +21,7 @@ def get_streams(schema):
 
 
 def technology(design, schema):
-    from tools._common.asic import get_libraries
+    from _common.asic import get_libraries
 
     sc_step = schema.get('arg', 'step')
     sc_index = schema.get('arg', 'index')