siliconcompiler 0.28.0__py3-none-any.whl → 0.28.2__py3-none-any.whl

siliconcompiler/_metadata.py

@@ -1,5 +1,5 @@
 # Version number following semver standard.
-version = '0.28.0'
+version = '0.28.2'
 
 # Default server address for remote runs, if unspecified.
 default_server = 'https://server.siliconcompiler.com'

siliconcompiler/apps/sc_install.py

@@ -0,0 +1,192 @@
+# Copyright 2024 Silicon Compiler Authors. All Rights Reserved.
+
+import argparse
+import glob
+import subprocess
+import sys
+import shutil
+import re
+import os.path
+from collections.abc import Container
+from pathlib import Path
+import siliconcompiler
+from siliconcompiler.scheduler import _get_machine_info
+
+
+class ChoiceOptional(Container):
+    def __init__(self, choices):
+        super().__init__()
+
+        self.__choices = set(choices)
+
+    def __contains__(self, item):
+        if not item:
+            # allow empty value
+            return True
+        return item in self.__choices
+
+    def __iter__(self):
+        return self.__choices.__iter__()
+
+    def get_items(self, choices):
+        items = set(choices)
+        return sorted(list(items))
+
+
+def install_tool(tool, script, build_dir, prefix):
+    # Ensure build dir is available
+    build_dir = Path(build_dir) / tool
+    shutil.rmtree(str(build_dir), ignore_errors=True)
+    build_dir.mkdir(parents=True, exist_ok=True)
+
+    # setup environment
+    env = os.environ.copy()
+    env["PREFIX"] = prefix
+
+    # run
+    ret = subprocess.call(script, env=env, cwd=build_dir)
+    if ret != 0:
+        print(f"Error occurred while building/installing {tool}")
+        return False
+    return True
+
+
+def show_tool(tool, script):
+    def print_header(head):
+        border_len = max(80, len(script) + 2)
+        border = border_len*"#"
+        print(border)
+        print(f"# {tool} script / {head}")
+        if head == "start":
+            print(f"# {script}")
+        print(border)
+
+    print_header("start")
+
+    with open(script) as f:
+        for line in f:
+            print(line.rstrip())
+
+    print_header("end")
+
+
+def _get_tools_list():
+    tools_root = Path(siliconcompiler.__file__).parent / "toolscripts"
+
+    machine_info = _get_machine_info()
+    script_dir = None
+    if machine_info['system'].lower() == 'linux':
+        if machine_info['distro'].lower() == 'ubuntu':
+            version, _ = machine_info['osversion'].split('.')
+            script_dir = f"{machine_info['distro'].lower()}{version}"
+    if script_dir:
+        script_dir = tools_root / script_dir
+        if not script_dir.exists():
+            script_dir = None
+
+    tools = {}
+    if script_dir:
+        for script in glob.glob(str(script_dir / "install-*.sh")):
+            tool = re.match(r"install-(.*)\.sh", os.path.basename(script).lower())
+            tools[tool.group(1)] = script
+
+    return tools
+
+
+def _recommended_tool_groups():
+    return {
+        "asic": {"surelog", "sv2v", "yosys", "openroad", "klayout"},
+        "fpga": {"surelog", "sv2v", "yosys", "vpr"},
+        "digital-simulation": {"verilator", "icarus"},
+        "analog-simulation": {"xyce"}
+    }
+
+
+def main():
+    progname = "sc-install"
+    description = """
+-----------------------------------------------------------
+SC app install supported tools.
+
+To install a single tool:
+    sc-install openroad
+
+To install multiple tools:
+    sc-install openroad yosys klayout
+
+To install a group of tools:
+    sc-install -group asic
+
+To install tools in a different location:
+    sc-install -prefix /usr/local yosys
+
+To build tools in a different location:
+    sc-install -build_dir /tmp yosys
+
+To show the install script:
+    sc-install -show openroad
+-----------------------------------------------------------
+"""
+    parser = argparse.ArgumentParser(
+        prog=progname,
+        description=description,
+        formatter_class=argparse.RawDescriptionHelpFormatter)
+
+    tools = _get_tools_list()
+
+    tool_choices = ChoiceOptional(tools.keys())
+    parser.add_argument(
+        "tool",
+        nargs="*",
+        choices=tool_choices,
+        help="tool to install")
+
+    parser.add_argument(
+        "-group",
+        nargs="+",
+        choices=_recommended_tool_groups().keys(),
+        help="tool group to install")
+
+    parser.add_argument(
+        "-prefix",
+        default=Path.home() / ".local",
+        help="Prefix to use when installing tool",
+        metavar="<path>")
+
+    parser.add_argument(
+        "-build_dir",
+        default=Path.home() / ".sc" / "tool_build",
+        help="Directory to build the tool in",
+        metavar="<path>")
+
+    parser.add_argument(
+        "-show",
+        action="store_true",
+        help="Show the install script and exit")
+
+    args = parser.parse_args()
+
+    if not args.tool:
+        args.tool = []
+
+    args.tool = list(args.tool)
+    if args.group:
+        for group in args.group:
+            args.tool.extend(_recommended_tool_groups()[group])
+
+    tools_handled = set()
+    for tool in args.tool:
+        if tool in tools_handled:
+            continue
+        tools_handled.add(tool)
+        if args.show:
+            show_tool(tool, tools[tool])
+        else:
+            if not install_tool(tool, tools[tool], args.build_dir, args.prefix):
+                return 1
+
+    return 0
+
+
+if __name__ == "__main__":
+    sys.exit(main())

siliconcompiler/core.py

@@ -1108,6 +1108,21 @@ class Chip:
         Performs a lookup in the io map for the fileset and filetype
         and will use those if they are not provided in the arguments
         '''
+        # Handle list inputs
+        if isinstance(filename, (list, tuple)):
+            for file in filename:
+                self._add_input_output(
+                    category,
+                    file,
+                    fileset=fileset,
+                    filetype=filetype,
+                    iomap=iomap,
+                    step=step,
+                    index=index,
+                    package=package,
+                    quiet=quiet)
+            return
+
         # Normalize value to string in case we receive a pathlib.Path
         filename = str(filename)
 

siliconcompiler/flows/dvflow.py

@@ -3,6 +3,8 @@ import siliconcompiler
 from siliconcompiler.tools.icarus import compile as icarus_compile
 from siliconcompiler.tools.verilator import compile as verilator_compile
 from siliconcompiler.tools.execute import exec_input
+from siliconcompiler.tools.xyce import simulate as xyce_simulate
+from siliconcompiler.tools.xdm import convert as xdm_convert
 
 
 ############################################################################
@@ -31,33 +33,68 @@ def setup(flowname='dvflow',
     Setting 'np' > 1 results in multiple independent verification
     pipelines to be launched.
 
+    Supported tools are:
+
+    * icarus
+    * verilator
+    * xyce
+    * xdm-xyce
+
     This flow is a WIP
     '''
 
     flow = siliconcompiler.Flow(flowname)
 
-    tasks = {
-        'compile': None,
-        'sim': None
-    }
+    tasks = {}
+    flow_np = {}
 
     if tool == 'icarus':
         tasks['compile'] = icarus_compile
         tasks['sim'] = exec_input
+
+        flowpipe = [
+            'compile',
+            'sim'
+        ]
+        flow_np = {
+            'compile': 1,
+            'sim': np
+        }
     elif tool == 'verilator':
         tasks['compile'] = verilator_compile
         tasks['sim'] = exec_input
+
+        flowpipe = [
+            'compile',
+            'sim'
+        ]
+        flow_np = {
+            'compile': 1,
+            'sim': np
+        }
+    elif tool == 'xyce':
+        tasks['sim'] = xyce_simulate
+
+        flowpipe = [
+            'sim'
+        ]
+        flow_np = {
+            'sim': np
+        }
+    elif tool == 'xdm-xyce':
+        tasks['compile'] = xdm_convert
+        tasks['sim'] = xyce_simulate
+
+        flowpipe = [
+            'compile',
+            'sim'
+        ]
+        flow_np = {
+            'compile': 1,
+            'sim': np
+        }
     else:
-        raise ValueError(f'{tool} is not a supported tool for {flowname}: icarus')
-
-    flowpipe = [
-        'compile',
-        'sim'
-    ]
-    flow_np = {
-        'compile': 1,
-        'sim': np
-    }
+        raise ValueError(f'{tool} is not a supported tool for {flowname}')
 
     prevstep = None
     # Flow setup

siliconcompiler/libs/sg13g2_stdcell.py

@@ -0,0 +1,8 @@
+import siliconcompiler
+from lambdapdk.ihp130.libs.sg13g2_stdcell import setup
+
+
+#########################
+if __name__ == "__main__":
+    lib = setup(siliconcompiler.Chip('<lib>'))
+    lib.write_manifest(f'{lib.top()}.json')

siliconcompiler/pdks/ihp130.py

@@ -0,0 +1,8 @@
+import siliconcompiler
+from lambdapdk.ihp130 import setup
+
+
+#########################
+if __name__ == "__main__":
+    pdk = setup(siliconcompiler.Chip('<pdk>'))
+    pdk.write_manifest(f'{pdk.top()}.json')

siliconcompiler/schema/schema_cfg.py

@@ -10,7 +10,7 @@ try:
 except ImportError:
     from siliconcompiler.schema.utils import trim
 
-SCHEMA_VERSION = '0.48.1'
+SCHEMA_VERSION = '0.48.2'
 
 #############################################################################
 # PARAM DEFINITION
@@ -3767,7 +3767,7 @@ def schema_constraint(cfg):
             defvalue='R0',
             enum=['R0', 'R90', 'R180', 'R270',
                   'MX', 'MX_R90', 'MX_R180', 'MX_R270',
-                  'MY_R90', 'MY_R180', 'MY_R270',
+                  'MY', 'MY_R90', 'MY_R180', 'MY_R270',
                   'MZ', 'MZ_R90', 'MZ_R180', 'MZ_R270',
                   'MZ_MX', 'MZ_MX_R90', 'MZ_MX_R180', 'MZ_MX_R270',
                   'MZ_MY', 'MZ_MY_R90', 'MZ_MY_R180', 'MZ_MY_R270'],

siliconcompiler/targets/ihp130_demo.py

@@ -0,0 +1,68 @@
+import siliconcompiler
+from siliconcompiler.flows import asicflow, asictopflow, signoffflow, synflow
+from siliconcompiler.checklists import oh_tapeout
+from lambdapdk import ihp130
+from lambdapdk.ihp130.libs import sg13g2_stdcell
+
+
+####################################################
+# Target Setup
+####################################################
+def setup(chip, syn_np=1, floorplan_np=1, physyn_np=1, place_np=1, cts_np=1, route_np=1,
+          timing_np=1):
+    '''
+    IHP130 Demo Target
+    '''
+
+    asic_flow_args = {
+        "syn_np": syn_np,
+        "floorplan_np": floorplan_np,
+        "physyn_np": physyn_np,
+        "place_np": place_np,
+        "cts_np": cts_np,
+        "route_np": route_np
+    }
+    # 1. Load PDK, flow, libs
+    chip.use(ihp130)
+    chip.use(sg13g2_stdcell)
+    chip.use(asicflow, **asic_flow_args)
+    chip.use(synflow, syn_np=syn_np, timing_np=timing_np)
+    chip.use(asictopflow)
+    chip.use(signoffflow)
+    chip.use(oh_tapeout)
+
+    # 2. Set default targets
+    chip.set('option', 'flow', 'asicflow', clobber=False)
+    chip.set('option', 'pdk', 'ihp130', clobber=False)
+    chip.set('option', 'stackup', '5M2TL', clobber=False)
+
+    # 3. Set project specific design choices
+    chip.set('asic', 'logiclib', 'sg13g2_stdcell', clobber=False)
+
+    # 4. get project specific design choices
+    chip.set('asic', 'delaymodel', 'nldm', clobber=False)
+    chip.set('constraint', 'density', 40, clobber=False)
+    chip.set('constraint', 'coremargin', 4.8, clobber=False)
+
+    # 5. Timing corners
+    chip.set('constraint', 'timing', 'slow', 'libcorner', 'slow', clobber=False)
+    chip.set('constraint', 'timing', 'slow', 'pexcorner', 'typical', clobber=False)
+    chip.set('constraint', 'timing', 'slow', 'mode', 'func', clobber=False)
+    chip.set('constraint', 'timing', 'slow', 'check', ['setup', 'hold'], clobber=False)
+
+    chip.set('constraint', 'timing', 'fast', 'libcorner', 'fast', clobber=False)
+    chip.set('constraint', 'timing', 'fast', 'pexcorner', 'typical', clobber=False)
+    chip.set('constraint', 'timing', 'fast', 'mode', 'func', clobber=False)
+    chip.set('constraint', 'timing', 'fast', 'check', ['setup', 'hold'], clobber=False)
+
+    chip.set('constraint', 'timing', 'typical', 'libcorner', 'typ', clobber=False)
+    chip.set('constraint', 'timing', 'typical', 'pexcorner', 'typical', clobber=False)
+    chip.set('constraint', 'timing', 'typical', 'mode', 'func', clobber=False)
+    chip.set('constraint', 'timing', 'typical', 'check', ['power'], clobber=False)
+
+
+#########################
+if __name__ == "__main__":
+    target = siliconcompiler.Chip('<target>')
+    setup(target)
+    target.write_manifest('ihp130_demo.json')

siliconcompiler/tools/_common/tcl/sc_pin_constraints.tcl

@@ -1,8 +1,9 @@
-proc sc_collect_pin_constraints { \
-    placement_pins_arg \
-    ordered_pins_arg \
-    sc_side_layer_func \
-    { print_func puts } } {
+proc sc_collect_pin_constraints {
+    placement_pins_arg
+    ordered_pins_arg
+    sc_side_layer_func
+    { print_func puts }
+} {
     upvar 1 $placement_pins_arg placement_pins
     upvar 1 $ordered_pins_arg ordered_pins
 

siliconcompiler/tools/openroad/scripts/sc_floorplan.tcl

@@ -240,11 +240,7 @@ if { [sc_cfg_exists constraint component] } {
 
   dict for {name params} [sc_cfg_get constraint component] {
     set location [dict get $params placement]
-    set rotation [dict get $params rotation]
-    if { [string match "*MZ*" $rotation] } {
-      utl::error FLW 1 "Z mirroring is not supported in OpenROAD"
-    }
-    set rotation [string map {"_" ""} $rotation]
+    set rotation [sc_convert_rotation [dict get $params rotation]]
 
     if { [dict exists $params partname] } {
       set cell [dict get $params partname]

siliconcompiler/tools/openroad/scripts/sc_metrics.tcl

@@ -2,7 +2,7 @@
 # Report Metrics
 ###############################
 
-proc sc_display_report {report} {
+proc sc_display_report { report } {
   if { ![file exists $report] } {
     return
   }

siliconcompiler/tools/openroad/scripts/sc_procs.tcl

@@ -2,7 +2,7 @@
 # Global Placement
 #######################
 
-proc sc_global_placement_density {} {
+proc sc_global_placement_density { } {
   global openroad_gpl_padding
   global openroad_gpl_place_density
   global openroad_gpl_uniform_placement_adjustment
@@ -82,7 +82,7 @@ proc sc_global_placement { args } {
 # Detailed Placement
 ###########################
 
-proc sc_detailed_placement {} {
+proc sc_detailed_placement { } {
   global openroad_dpl_padding
   global openroad_dpl_padding
   global openroad_dpl_disallow_one_site
@@ -149,7 +149,7 @@ proc sc_pin_placement { args } {
 # Check if OR has a GUI
 ###########################
 
-proc sc_has_gui {} {
+proc sc_has_gui { } {
   return [gui::supported]
 }
 
@@ -157,7 +157,7 @@ proc sc_has_gui {} {
 # Check if design has placed instances
 ###########################
 
-proc sc_has_placed_instances {} {
+proc sc_has_placed_instances { } {
   foreach inst [[ord::get_db_block] getInsts] {
     if { [$inst isPlaced] } {
       return true
@@ -170,7 +170,7 @@ proc sc_has_placed_instances {} {
 # Check if design has unplaced instances
 ###########################
 
-proc sc_has_unplaced_instances {} {
+proc sc_has_unplaced_instances { } {
   foreach inst [[ord::get_db_block] getInsts] {
     if { ![$inst isPlaced] } {
       return true
@@ -183,7 +183,7 @@ proc sc_has_unplaced_instances {} {
 # Check if design has routing
 ###########################
 
-proc sc_has_routing {} {
+proc sc_has_routing { } {
   foreach net [[ord::get_db_block] getNets] {
     if { [$net getWire] != "NULL" } {
       return true
@@ -196,7 +196,7 @@ proc sc_has_routing {} {
 # Check if design has global routing
 ###########################
 
-proc sc_has_global_routing {} {
+proc sc_has_global_routing { } {
   foreach net [[ord::get_db_block] getNets] {
     if { [llength [$net getGuides]] != 0 } {
       return true
@@ -211,7 +211,7 @@ proc sc_has_global_routing {} {
 
 # Function adapted from OpenROAD:
 # https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/ca3004b85e0d4fbee3470115e63b83c498cfed85/flow/scripts/macro_place.tcl#L26
-proc sc_design_has_unplaced_macros {} {
+proc sc_design_has_unplaced_macros { } {
   foreach inst [[ord::get_db_block] getInsts] {
     if { [$inst isBlock] && ![$inst isFixed] } {
       return true
@@ -224,7 +224,7 @@ proc sc_design_has_unplaced_macros {} {
 # Design has unplaced pads
 ###########################
 
-proc sc_design_has_unplaced_pads {} {
+proc sc_design_has_unplaced_pads { } {
   foreach inst [[ord::get_db_block] getInsts] {
     if { [$inst isPad] && ![$inst isFixed] } {
       return true
@@ -237,7 +237,7 @@ proc sc_design_has_unplaced_pads {} {
 # Design has placable IOs
 ###########################
 
-proc sc_design_has_placeable_ios {} {
+proc sc_design_has_placeable_ios { } {
   foreach bterm [[ord::get_db_block] getBTerms] {
     if {
       [$bterm getFirstPinPlacementStatus] != "FIXED" &&
@@ -284,7 +284,7 @@ proc sc_find_net_regex { net_name } {
 # Get supply nets in design
 ###########################
 
-proc sc_supply_nets {} {
+proc sc_supply_nets { } {
   set nets []
 
   foreach net [[ord::get_db_block] getNets] {
@@ -301,7 +301,7 @@ proc sc_supply_nets {} {
 # Get nets for PSM to check
 ###########################
 
-proc sc_psm_check_nets {} {
+proc sc_psm_check_nets { } {
   global openroad_psm_enable
   global openroad_psm_skip_nets
 
@@ -343,7 +343,7 @@ proc sc_save_image { title path { pixels 1000 } } {
 # Get the image bounding box
 ###########################
 
-proc sc_image_area {} {
+proc sc_image_area { } {
   set box [[ord::get_db_block] getDieArea]
   set width [$box dx]
   set height [$box dy]
@@ -373,7 +373,7 @@ proc sc_image_resolution { pixels } {
 # Clear gui selections
 ###########################
 
-proc sc_image_clear_selection {} {
+proc sc_image_clear_selection { } {
   gui::clear_highlights -1
   gui::clear_selections
 }
@@ -382,7 +382,7 @@ proc sc_image_clear_selection {} {
 # Setup default GUI setting for images
 ###########################
 
-proc sc_image_setup_default {} {
+proc sc_image_setup_default { } {
   gui::restore_display_controls
 
   sc_image_clear_selection
@@ -406,7 +406,7 @@ proc sc_image_setup_default {} {
 # Count the logic depth of the critical path
 ###########################
 
-proc count_logic_depth {} {
+proc count_logic_depth { } {
   set count 0
   set paths [find_timing_paths -sort_by_slack]
   if { [llength $paths] == 0 } {
@@ -427,3 +427,29 @@ proc count_logic_depth {} {
   # Subtract 1 to account for initial launch
   return [expr { $count - 1 }]
 }
+
+###########################
+# Translate schema rotation
+###########################
+
+proc sc_convert_rotation { rot } {
+  if { [string match "MZ*" $rot] } {
+    utl::error FLW 1 "Z mirroring is not supported in OpenROAD"
+  }
+
+  switch $rot {
+    "R0" { return "R0" }
+    "R90" { return "R90" }
+    "R180" { return "R180" }
+    "R270" { return "R270" }
+    "MX" { return "MX" }
+    "MX_R90" { return "MXR90" }
+    "MX_R180" { return "MY" }
+    "MX_R270" { return "MYR90" }
+    "MY" { return "MY" }
+    "MY_R90" { return "MYR90" }
+    "MY_R180" { return "MX" }
+    "MY_R270" { return "MXR90" }
+    default { utl::error FLW 1 "$rot not recognized" }
+  }
+}

siliconcompiler/tools/openroad/scripts/sc_route.tcl

@@ -6,7 +6,7 @@
 # Helper functions
 #######################
 
-proc insert_fillers {} {
+proc insert_fillers { } {
   upvar sc_filler sc_filler
   if { $sc_filler != "" } {
     filler_placement $sc_filler