sglang 0.4.2__py3-none-any.whl → 0.4.2.post2__py3-none-any.whl

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Files changed (85) hide show
  1. sglang/srt/constrained/outlines_backend.py +9 -1
  2. sglang/srt/custom_op.py +40 -0
  3. sglang/srt/entrypoints/engine.py +2 -2
  4. sglang/srt/layers/activation.py +10 -5
  5. sglang/srt/layers/attention/flashinfer_backend.py +284 -39
  6. sglang/srt/layers/attention/triton_backend.py +71 -7
  7. sglang/srt/layers/attention/triton_ops/decode_attention.py +53 -59
  8. sglang/srt/layers/attention/triton_ops/prefill_attention.py +6 -0
  9. sglang/srt/layers/attention/vision.py +243 -40
  10. sglang/srt/layers/layernorm.py +1 -5
  11. sglang/srt/layers/moe/ep_moe/layer.py +1 -3
  12. sglang/srt/layers/moe/fused_moe_triton/configs/E=256,N=256,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  13. sglang/srt/layers/moe/fused_moe_triton/configs/E=256,N=256,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  14. sglang/srt/layers/moe/fused_moe_triton/configs/E=8,N=14336,device_name=AMD_Radeon_Graphics.json +200 -0
  15. sglang/srt/layers/moe/fused_moe_triton/configs/E=8,N=1792,device_name=AMD_Radeon_Graphics.json +200 -0
  16. sglang/srt/layers/moe/fused_moe_triton/configs/E=8,N=3584,device_name=AMD_Radeon_Graphics.json +200 -0
  17. sglang/srt/layers/moe/fused_moe_triton/configs/E=8,N=4096,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8.json +178 -0
  18. sglang/srt/layers/moe/fused_moe_triton/configs/E=8,N=7168,device_name=AMD_Radeon_Graphics.json +200 -0
  19. sglang/srt/layers/moe/fused_moe_triton/configs/E=8,N=8192,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8.json +175 -0
  20. sglang/srt/layers/moe/fused_moe_triton/fused_moe.py +3 -11
  21. sglang/srt/layers/moe/fused_moe_triton/layer.py +1 -3
  22. sglang/srt/layers/moe/topk.py +4 -0
  23. sglang/srt/layers/quantization/configs/N=1536,K=7168,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  24. sglang/srt/layers/quantization/configs/N=24576,K=7168,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  25. sglang/srt/layers/quantization/configs/N=3072,K=1536,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  26. sglang/srt/layers/quantization/configs/N=3072,K=1536,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  27. sglang/srt/layers/quantization/configs/N=3072,K=7168,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  28. sglang/srt/layers/quantization/configs/N=32768,K=512,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  29. sglang/srt/layers/quantization/configs/N=4096,K=512,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  30. sglang/srt/layers/quantization/configs/N=4096,K=512,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  31. sglang/srt/layers/quantization/configs/N=4608,K=7168,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  32. sglang/srt/layers/quantization/configs/N=4608,K=7168,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  33. sglang/srt/layers/quantization/configs/N=512,K=7168,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  34. sglang/srt/layers/quantization/configs/N=512,K=7168,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  35. sglang/srt/layers/quantization/configs/N=576,K=7168,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  36. sglang/srt/layers/quantization/configs/N=576,K=7168,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  37. sglang/srt/layers/quantization/configs/N=7168,K=16384,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  38. sglang/srt/layers/quantization/configs/N=7168,K=18432,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  39. sglang/srt/layers/quantization/configs/N=7168,K=2048,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  40. sglang/srt/layers/quantization/configs/N=7168,K=2048,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  41. sglang/srt/layers/quantization/configs/N=7168,K=2304,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  42. sglang/srt/layers/quantization/configs/N=7168,K=2304,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  43. sglang/srt/layers/quantization/configs/N=7168,K=256,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  44. sglang/srt/layers/quantization/configs/N=7168,K=256,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  45. sglang/srt/layers/quantization/fp8.py +7 -0
  46. sglang/srt/layers/quantization/fp8_kernel.py +140 -2
  47. sglang/srt/layers/rotary_embedding.py +29 -15
  48. sglang/srt/layers/sampler.py +9 -6
  49. sglang/srt/lora/backend/__init__.py +8 -0
  50. sglang/srt/lora/backend/base_backend.py +95 -0
  51. sglang/srt/lora/backend/flashinfer_backend.py +91 -0
  52. sglang/srt/lora/backend/triton_backend.py +61 -0
  53. sglang/srt/lora/lora.py +127 -112
  54. sglang/srt/lora/lora_manager.py +50 -18
  55. sglang/srt/lora/triton_ops/__init__.py +5 -0
  56. sglang/srt/lora/triton_ops/qkv_lora_b.py +182 -0
  57. sglang/srt/lora/triton_ops/sgemm_lora_a.py +143 -0
  58. sglang/srt/lora/triton_ops/sgemm_lora_b.py +159 -0
  59. sglang/srt/managers/image_processor.py +77 -38
  60. sglang/srt/managers/scheduler.py +17 -3
  61. sglang/srt/mem_cache/base_prefix_cache.py +4 -0
  62. sglang/srt/mem_cache/chunk_cache.py +3 -0
  63. sglang/srt/mem_cache/radix_cache.py +30 -1
  64. sglang/srt/model_executor/cuda_graph_runner.py +77 -80
  65. sglang/srt/model_executor/forward_batch_info.py +58 -59
  66. sglang/srt/model_executor/model_runner.py +2 -2
  67. sglang/srt/models/minicpmv.py +129 -76
  68. sglang/srt/models/mllama.py +16 -56
  69. sglang/srt/models/qwen2.py +4 -1
  70. sglang/srt/models/qwen2_vl.py +19 -9
  71. sglang/srt/server_args.py +19 -2
  72. sglang/srt/speculative/build_eagle_tree.py +4 -2
  73. sglang/srt/speculative/eagle_draft_cuda_graph_runner.py +213 -0
  74. sglang/srt/speculative/eagle_utils.py +361 -372
  75. sglang/srt/speculative/eagle_worker.py +177 -45
  76. sglang/srt/utils.py +7 -2
  77. sglang/test/runners.py +2 -0
  78. sglang/utils.py +42 -0
  79. sglang/version.py +1 -1
  80. {sglang-0.4.2.dist-info → sglang-0.4.2.post2.dist-info}/METADATA +16 -7
  81. {sglang-0.4.2.dist-info → sglang-0.4.2.post2.dist-info}/RECORD +84 -45
  82. sglang/srt/layers/custom_op_util.py +0 -25
  83. {sglang-0.4.2.dist-info → sglang-0.4.2.post2.dist-info}/LICENSE +0 -0
  84. {sglang-0.4.2.dist-info → sglang-0.4.2.post2.dist-info}/WHEEL +0 -0
  85. {sglang-0.4.2.dist-info → sglang-0.4.2.post2.dist-info}/top_level.txt +0 -0
sglang/srt/layers/moe/ep_moe/layer.py CHANGED
@@ -4,13 +4,12 @@ from typing import Callable, List, Optional, Tuple
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  import torch
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  from torch.nn import Module
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  from vllm import _custom_ops as ops
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- from vllm.model_executor.custom_op import CustomOp
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7
 
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+ from sglang.srt.custom_op import CustomOp
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  from sglang.srt.distributed import (
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  get_tensor_model_parallel_rank,
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  get_tensor_model_parallel_world_size,
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  )
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- from sglang.srt.layers.custom_op_util import register_custom_op
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  from sglang.srt.layers.moe.ep_moe.kernels import (
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14
  grouped_gemm_triton,
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  post_reorder_triton_kernel,
@@ -407,7 +406,6 @@ class EPMoE(torch.nn.Module):
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  param_data[expert_id] = loaded_weight
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407
 
409
408
 
410
- @register_custom_op("sglang_unquantized_ep_moe")
411
409
  class UnquantizedEPMoEMethod(FusedMoEMethodBase, CustomOp):
412
410
  def create_weights(
413
411
  self,
sglang/srt/layers/moe/fused_moe_triton/configs/E=256,N=256,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json ADDED
@@ -0,0 +1,164 @@
1
+ {
2
+ "1": {
3
+ "BLOCK_SIZE_M": 32,
4
+ "BLOCK_SIZE_N": 32,
5
+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 16,
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+ "num_warps": 4,
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+ "num_stages": 2,
9
+ "waves_per_eu": 0
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+ },
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+ "2": {
12
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "4": {
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+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 16,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "8": {
30
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 32,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "16": {
39
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
43
+ "num_warps": 4,
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+ "num_stages": 2,
45
+ "waves_per_eu": 0
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+ },
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+ "24": {
48
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 4,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "32": {
57
+ "BLOCK_SIZE_M": 32,
58
+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
60
+ "GROUP_SIZE_M": 8,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "48": {
66
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 128,
68
+ "BLOCK_SIZE_K": 128,
69
+ "GROUP_SIZE_M": 4,
70
+ "num_warps": 4,
71
+ "num_stages": 2,
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+ "waves_per_eu": 0
73
+ },
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+ "64": {
75
+ "BLOCK_SIZE_M": 256,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
78
+ "GROUP_SIZE_M": 1,
79
+ "num_warps": 4,
80
+ "num_stages": 2,
81
+ "waves_per_eu": 0
82
+ },
83
+ "96": {
84
+ "BLOCK_SIZE_M": 32,
85
+ "BLOCK_SIZE_N": 128,
86
+ "BLOCK_SIZE_K": 128,
87
+ "GROUP_SIZE_M": 8,
88
+ "num_warps": 4,
89
+ "num_stages": 2,
90
+ "waves_per_eu": 0
91
+ },
92
+ "128": {
93
+ "BLOCK_SIZE_M": 32,
94
+ "BLOCK_SIZE_N": 16,
95
+ "BLOCK_SIZE_K": 128,
96
+ "GROUP_SIZE_M": 4,
97
+ "num_warps": 4,
98
+ "num_stages": 2,
99
+ "waves_per_eu": 0
100
+ },
101
+ "256": {
102
+ "BLOCK_SIZE_M": 64,
103
+ "BLOCK_SIZE_N": 16,
104
+ "BLOCK_SIZE_K": 128,
105
+ "GROUP_SIZE_M": 1,
106
+ "num_warps": 4,
107
+ "num_stages": 2,
108
+ "waves_per_eu": 0
109
+ },
110
+ "512": {
111
+ "BLOCK_SIZE_M": 64,
112
+ "BLOCK_SIZE_N": 64,
113
+ "BLOCK_SIZE_K": 128,
114
+ "GROUP_SIZE_M": 32,
115
+ "num_warps": 4,
116
+ "num_stages": 2,
117
+ "waves_per_eu": 0
118
+ },
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+ "1024": {
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+ "BLOCK_SIZE_M": 64,
121
+ "BLOCK_SIZE_N": 64,
122
+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 4,
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+ "num_warps": 8,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "1536": {
129
+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 8,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "2048": {
138
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 64,
140
+ "BLOCK_SIZE_K": 128,
141
+ "GROUP_SIZE_M": 1,
142
+ "num_warps": 4,
143
+ "num_stages": 2,
144
+ "waves_per_eu": 0
145
+ },
146
+ "3072": {
147
+ "BLOCK_SIZE_M": 32,
148
+ "BLOCK_SIZE_N": 128,
149
+ "BLOCK_SIZE_K": 128,
150
+ "GROUP_SIZE_M": 1,
151
+ "num_warps": 4,
152
+ "num_stages": 2,
153
+ "waves_per_eu": 0
154
+ },
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+ "4096": {
156
+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 64,
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+ "GROUP_SIZE_M": 4,
160
+ "num_warps": 4,
161
+ "num_stages": 2,
162
+ "waves_per_eu": 0
163
+ }
164
+ }
sglang/srt/layers/moe/fused_moe_triton/configs/E=256,N=256,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128, 128].json ADDED
@@ -0,0 +1,146 @@
1
+ {
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+ "1": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 32,
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+ "num_warps": 4,
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+ "num_stages": 4
9
+ },
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+ "2": {
11
+ "BLOCK_SIZE_M": 16,
12
+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 16,
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+ "num_warps": 4,
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+ "num_stages": 4
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+ },
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+ "4": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 256,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 64,
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+ "num_warps": 8,
24
+ "num_stages": 4
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+ },
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+ "8": {
27
+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 256,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 32,
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+ "num_warps": 8,
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+ "num_stages": 4
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+ },
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+ "16": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 64,
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+ "num_warps": 4,
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+ "num_stages": 5
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+ },
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+ "24": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 64,
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+ "num_warps": 4,
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+ "num_stages": 3
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+ },
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+ "32": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 256,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 3
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+ },
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+ "48": {
59
+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 256,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 3
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+ },
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+ "64": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 256,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 32,
71
+ "num_warps": 4,
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+ "num_stages": 3
73
+ },
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+ "96": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 64,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 4
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+ },
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+ "128": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 64,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 4
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+ },
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+ "256": {
91
+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 64,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 4
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+ },
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+ "512": {
99
+ "BLOCK_SIZE_M": 16,
100
+ "BLOCK_SIZE_N": 256,
101
+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 32,
103
+ "num_warps": 4,
104
+ "num_stages": 3
105
+ },
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+ "1024": {
107
+ "BLOCK_SIZE_M": 16,
108
+ "BLOCK_SIZE_N": 256,
109
+ "BLOCK_SIZE_K": 128,
110
+ "GROUP_SIZE_M": 1,
111
+ "num_warps": 4,
112
+ "num_stages": 3
113
+ },
114
+ "1536": {
115
+ "BLOCK_SIZE_M": 16,
116
+ "BLOCK_SIZE_N": 256,
117
+ "BLOCK_SIZE_K": 128,
118
+ "GROUP_SIZE_M": 1,
119
+ "num_warps": 4,
120
+ "num_stages": 3
121
+ },
122
+ "2048": {
123
+ "BLOCK_SIZE_M": 16,
124
+ "BLOCK_SIZE_N": 256,
125
+ "BLOCK_SIZE_K": 128,
126
+ "GROUP_SIZE_M": 1,
127
+ "num_warps": 4,
128
+ "num_stages": 3
129
+ },
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+ "3072": {
131
+ "BLOCK_SIZE_M": 32,
132
+ "BLOCK_SIZE_N": 256,
133
+ "BLOCK_SIZE_K": 128,
134
+ "GROUP_SIZE_M": 16,
135
+ "num_warps": 4,
136
+ "num_stages": 3
137
+ },
138
+ "4096": {
139
+ "BLOCK_SIZE_M": 32,
140
+ "BLOCK_SIZE_N": 256,
141
+ "BLOCK_SIZE_K": 128,
142
+ "GROUP_SIZE_M": 16,
143
+ "num_warps": 4,
144
+ "num_stages": 3
145
+ }
146
+ }
sglang/srt/layers/moe/fused_moe_triton/configs/E=8,N=14336,device_name=AMD_Radeon_Graphics.json ADDED
@@ -0,0 +1,200 @@
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+ }