qiskit 1.1.2__cp38-abi3-win32.whl → 1.2.0rc1__cp38-abi3-win32.whl

qiskit/transpiler/passes/synthesis/unitary_synthesis.py

@@ -28,21 +28,9 @@ from itertools import product
 from functools import partial
 import numpy as np
 
-from qiskit.converters import circuit_to_dag, dag_to_circuit
-from qiskit.transpiler import CouplingMap, Target
-from qiskit.transpiler.basepasses import TransformationPass
-from qiskit.transpiler.exceptions import TranspilerError
-from qiskit.dagcircuit.dagcircuit import DAGCircuit
-from qiskit.synthesis.one_qubit import one_qubit_decompose
-from qiskit.transpiler.passes.optimization.optimize_1q_decomposition import _possible_decomposers
-from qiskit.synthesis.two_qubit.xx_decompose import XXDecomposer, XXEmbodiments
-from qiskit.synthesis.two_qubit.two_qubit_decompose import (
-    TwoQubitBasisDecomposer,
-    TwoQubitWeylDecomposition,
-    GATE_NAME_MAP,
-)
-from qiskit.quantum_info import Operator
-from qiskit.circuit import ControlFlowOp, Gate, Parameter
+from qiskit.circuit.controlflow import CONTROL_FLOW_OP_NAMES
+from qiskit.circuit import Gate, Parameter, CircuitInstruction
+from qiskit.circuit.library.standard_gates import get_standard_gate_name_mapping
 from qiskit.circuit.library.standard_gates import (
     iSwapGate,
     CXGate,
@@ -51,14 +39,54 @@ from qiskit.circuit.library.standard_gates import (
     RZXGate,
     RZZGate,
     ECRGate,
+    RXGate,
+    SXGate,
+    XGate,
+    RZGate,
+    UGate,
+    PhaseGate,
+    U1Gate,
+    U2Gate,
+    U3Gate,
+    RYGate,
+    RGate,
 )
-from qiskit.transpiler.passes.synthesis import plugin
+from qiskit.converters import circuit_to_dag, dag_to_circuit
+from qiskit.dagcircuit.dagcircuit import DAGCircuit, DAGOpNode
+from qiskit.exceptions import QiskitError
+from qiskit.providers.models import BackendProperties
+from qiskit.quantum_info import Operator
+from qiskit.synthesis.one_qubit import one_qubit_decompose
+from qiskit.synthesis.two_qubit.xx_decompose import XXDecomposer, XXEmbodiments
+from qiskit.synthesis.two_qubit.two_qubit_decompose import (
+    TwoQubitBasisDecomposer,
+    TwoQubitWeylDecomposition,
+)
+from qiskit.transpiler.basepasses import TransformationPass
+from qiskit.transpiler.coupling import CouplingMap
+from qiskit.transpiler.exceptions import TranspilerError
 from qiskit.transpiler.passes.optimization.optimize_1q_decomposition import (
     Optimize1qGatesDecomposition,
+    _possible_decomposers,
 )
-from qiskit.providers.models import BackendProperties
-from qiskit.circuit.library.standard_gates import get_standard_gate_name_mapping
-from qiskit.exceptions import QiskitError
+from qiskit.transpiler.passes.synthesis import plugin
+from qiskit.transpiler.target import Target
+
+
+GATE_NAME_MAP = {
+    "cx": CXGate._standard_gate,
+    "rx": RXGate._standard_gate,
+    "sx": SXGate._standard_gate,
+    "x": XGate._standard_gate,
+    "rz": RZGate._standard_gate,
+    "u": UGate._standard_gate,
+    "p": PhaseGate._standard_gate,
+    "u1": U1Gate._standard_gate,
+    "u2": U2Gate._standard_gate,
+    "u3": U3Gate._standard_gate,
+    "ry": RYGate._standard_gate,
+    "r": RGate._standard_gate,
+}
 
 
 KAK_GATE_NAMES = {
@@ -415,7 +443,7 @@ class UnitarySynthesis(TransformationPass):
         if self.method == "default":
             # If the method is the default, we only need to evaluate one set of keyword arguments.
             # To simplify later logic, and avoid cases where static analysis might complain that we
-            # haven't initialised the "default" handler, we rebind the names so they point to the
+            # haven't initialized the "default" handler, we rebind the names so they point to the
             # same object as the chosen method.
             default_method = plugin_method
             default_kwargs = plugin_kwargs
@@ -480,7 +508,9 @@ class UnitarySynthesis(TransformationPass):
         self, dag, qubit_indices, plugin_method, plugin_kwargs, default_method, default_kwargs
     ):
         """Inner loop for the optimizer, after all DAG-independent set-up has been completed."""
-        for node in dag.op_nodes(ControlFlowOp):
+        for node in dag.op_nodes():
+            if node.name not in CONTROL_FLOW_OP_NAMES:
+                continue
             node.op = node.op.replace_blocks(
                 [
                     dag_to_circuit(
@@ -503,9 +533,9 @@ class UnitarySynthesis(TransformationPass):
 
         out_dag = dag.copy_empty_like()
         for node in dag.topological_op_nodes():
-            if node.op.name == "unitary" and len(node.qargs) >= self._min_qubits:
+            if node.name == "unitary" and len(node.qargs) >= self._min_qubits:
                 synth_dag = None
-                unitary = node.op.to_matrix()
+                unitary = node.matrix
                 n_qubits = len(node.qargs)
                 if (
                     plugin_method.max_qubits is not None and n_qubits > plugin_method.max_qubits
@@ -520,35 +550,42 @@ class UnitarySynthesis(TransformationPass):
                     )
                 synth_dag = method.run(unitary, **kwargs)
                 if synth_dag is None:
-                    out_dag.apply_operation_back(node.op, node.qargs, node.cargs, check=False)
+                    out_dag._apply_op_node_back(node)
                     continue
                 if isinstance(synth_dag, DAGCircuit):
                     qubit_map = dict(zip(synth_dag.qubits, node.qargs))
                     for node in synth_dag.topological_op_nodes():
-                        out_dag.apply_operation_back(
-                            node.op, (qubit_map[x] for x in node.qargs), check=False
-                        )
+                        node.qargs = tuple(qubit_map[x] for x in node.qargs)
+                        out_dag._apply_op_node_back(node)
                     out_dag.global_phase += synth_dag.global_phase
                 else:
                     node_list, global_phase, gate = synth_dag
                     qubits = node.qargs
+                    user_gate_node = DAGOpNode(gate)
                     for (
-                        op_name,
+                        gate,
                         params,
                         qargs,
                     ) in node_list:
-                        if op_name == "USER_GATE":
-                            op = gate
+                        if gate is None:
+                            node = DAGOpNode.from_instruction(
+                                user_gate_node._to_circuit_instruction().replace(
+                                    params=user_gate_node.params,
+                                    qubits=tuple(qubits[x] for x in qargs),
+                                ),
+                                dag=out_dag,
+                            )
                         else:
-                            op = GATE_NAME_MAP[op_name](*params)
-                        out_dag.apply_operation_back(
-                            op,
-                            (qubits[x] for x in qargs),
-                            check=False,
-                        )
+                            node = DAGOpNode.from_instruction(
+                                CircuitInstruction.from_standard(
+                                    gate, tuple(qubits[x] for x in qargs), params
+                                ),
+                                dag=out_dag,
+                            )
+                        out_dag._apply_op_node_back(node)
                     out_dag.global_phase += global_phase
             else:
-                out_dag.apply_operation_back(node.op, node.qargs, node.cargs, check=False)
+                out_dag._apply_op_node_back(node)
         return out_dag
 
 
@@ -975,8 +1012,8 @@ class DefaultUnitarySynthesis(plugin.UnitarySynthesisPlugin):
         # if the gates in synthesis are in the opposite direction of the preferred direction
         # resynthesize a new operator which is the original conjugated by swaps.
         # this new operator is doubly mirrored from the original and is locally equivalent.
-        for op_name, _params, qubits in synth_circ:
-            if op_name in {"USER_GATE", "cx"}:
+        for gate, _params, qubits in synth_circ:
+            if gate is None or gate == CXGate._standard_gate:
                 synth_direction = qubits
         if synth_direction is not None and synth_direction != preferred_direction:
             # TODO: Avoid using a dag to correct the synthesis direction
@@ -1011,5 +1048,8 @@ class DefaultUnitarySynthesis(plugin.UnitarySynthesisPlugin):
         flip_bits = out_dag.qubits[::-1]
         for node in synth_circ.topological_op_nodes():
             qubits = tuple(flip_bits[synth_circ.find_bit(x).index] for x in node.qargs)
-            out_dag.apply_operation_back(node.op, qubits, check=False)
+            node = DAGOpNode.from_instruction(
+                node._to_circuit_instruction().replace(qubits=qubits, params=node.params)
+            )
+            out_dag._apply_op_node_back(node)
         return out_dag

qiskit/transpiler/passes/utils/__init__.py

@@ -31,4 +31,3 @@ from .filter_op_nodes import FilterOpNodes
 
 # Utility functions
 from . import control_flow
-from .block_to_matrix import _block_to_matrix

qiskit/transpiler/passes/utils/check_gate_direction.py

@@ -12,7 +12,7 @@
 
 """Check if the gates follow the right direction with respect to the coupling map."""
 
-from qiskit.circuit import ControlFlowOp
+from qiskit.circuit.controlflow import CONTROL_FLOW_OP_NAMES
 from qiskit.converters import circuit_to_dag
 from qiskit.transpiler.basepasses import AnalysisPass
 
@@ -39,7 +39,7 @@ class CheckGateDirection(AnalysisPass):
             edges = self.coupling_map.get_edges()
         # Don't include directives to avoid things like barrier, which are assumed always supported.
         for node in dag.op_nodes(include_directives=False):
-            if isinstance(node.op, ControlFlowOp):
+            if node.name in CONTROL_FLOW_OP_NAMES:
                 for block in node.op.blocks:
                     inner_wire_map = {
                         inner: wire_map[outer] for outer, inner in zip(node.qargs, block.qubits)
@@ -57,7 +57,7 @@ class CheckGateDirection(AnalysisPass):
     def _target_visit(self, dag, wire_map):
         # Don't include directives to avoid things like barrier, which are assumed always supported.
         for node in dag.op_nodes(include_directives=False):
-            if isinstance(node.op, ControlFlowOp):
+            if node.name in CONTROL_FLOW_OP_NAMES:
                 for block in node.op.blocks:
                     inner_wire_map = {
                         inner: wire_map[outer] for outer, inner in zip(node.qargs, block.qubits)
@@ -65,7 +65,7 @@ class CheckGateDirection(AnalysisPass):
                     if not self._target_visit(circuit_to_dag(block), inner_wire_map):
                         return False
             elif len(node.qargs) == 2 and not self.target.instruction_supported(
-                node.op.name, (wire_map[node.qargs[0]], wire_map[node.qargs[1]])
+                node.name, (wire_map[node.qargs[0]], wire_map[node.qargs[1]])
             ):
                 return False
         return True

qiskit/transpiler/passes/utils/check_map.py

@@ -14,7 +14,6 @@
 
 from qiskit.transpiler.basepasses import AnalysisPass
 from qiskit.transpiler.target import Target
-from qiskit.circuit.controlflow import ControlFlowOp
 from qiskit.converters import circuit_to_dag
 
 
@@ -73,7 +72,7 @@ class CheckMap(AnalysisPass):
 
     def _recurse(self, dag, wire_map) -> bool:
         for node in dag.op_nodes(include_directives=False):
-            if isinstance(node.op, ControlFlowOp):
+            if node.is_control_flow():
                 for block in node.op.blocks:
                     inner_wire_map = {
                         inner: wire_map[outer] for inner, outer in zip(block.qubits, node.qargs)
@@ -85,10 +84,8 @@ class CheckMap(AnalysisPass):
                 and not dag.has_calibration_for(node)
                 and (wire_map[node.qargs[0]], wire_map[node.qargs[1]]) not in self.qargs
             ):
-                self.property_set["check_map_msg"] = "{}({}, {}) failed".format(
-                    node.name,
-                    wire_map[node.qargs[0]],
-                    wire_map[node.qargs[1]],
+                self.property_set["check_map_msg"] = (
+                    f"{node.name}({wire_map[node.qargs[0]]}, {wire_map[node.qargs[1]]}) failed"
                 )
                 return False
         return True

qiskit/transpiler/passes/utils/convert_conditions_to_if_ops.py

@@ -17,12 +17,11 @@ from qiskit.circuit import (
     CircuitInstruction,
     ClassicalRegister,
     Clbit,
-    ControlFlowOp,
     IfElseOp,
     QuantumCircuit,
 )
 from qiskit.dagcircuit import DAGCircuit
-from qiskit.transpiler import TransformationPass
+from qiskit.transpiler.basepasses import TransformationPass
 
 
 class ConvertConditionsToIfOps(TransformationPass):
@@ -37,7 +36,7 @@ class ConvertConditionsToIfOps(TransformationPass):
         was modified and ``False`` if not."""
         modified = False
         for node in dag.op_nodes():
-            if isinstance(node.op, ControlFlowOp):
+            if node.is_control_flow():
                 modified_blocks = False
                 new_dags = []
                 for block in node.op.blocks:
@@ -51,7 +50,7 @@ class ConvertConditionsToIfOps(TransformationPass):
                     node.op.replace_blocks(dag_to_circuit(block) for block in new_dags),
                     inplace=True,
                 )
-            elif getattr(node.op, "condition", None) is None:
+            elif node.condition is None:
                 continue
             else:
                 target, value = node.op.condition

qiskit/transpiler/passes/utils/error.py

@@ -43,7 +43,7 @@ class Error(AnalysisPass):
         if action in ["raise", "warn", "log"]:
             self.action = action
         else:
-            raise TranspilerError("Unknown action: %s" % action)
+            raise TranspilerError(f"Unknown action: {action}")
 
     def run(self, _):
         """Run the Error pass on `dag`."""
@@ -66,4 +66,4 @@ class Error(AnalysisPass):
             logger = logging.getLogger(__name__)
             logger.info(msg)
         else:
-            raise TranspilerError("Unknown action: %s" % self.action)
+            raise TranspilerError(f"Unknown action: {self.action}")

qiskit/transpiler/passes/utils/fixed_point.py

@@ -37,12 +37,12 @@ class FixedPoint(AnalysisPass):
     def run(self, dag):
         """Run the FixedPoint pass on `dag`."""
         current_value = self.property_set[self._property]
-        fixed_point_previous_property = "_fixed_point_previous_%s" % self._property
+        fixed_point_previous_property = f"_fixed_point_previous_{self._property}"
 
         if self.property_set[fixed_point_previous_property] is None:
-            self.property_set["%s_fixed_point" % self._property] = False
+            self.property_set[f"{self._property}_fixed_point"] = False
         else:
             fixed_point_reached = self.property_set[fixed_point_previous_property] == current_value
-            self.property_set["%s_fixed_point" % self._property] = fixed_point_reached
+            self.property_set[f"{self._property}_fixed_point"] = fixed_point_reached
 
         self.property_set[fixed_point_previous_property] = deepcopy(current_value)

qiskit/transpiler/passes/utils/gate_direction.py

@@ -67,7 +67,7 @@ class GateDirection(TransformationPass):
              └──────┘          └───┘└──────┘└───┘
 
     This pass assumes that the positions of the qubits in the :attr:`.DAGCircuit.qubits` attribute
-    are the physical qubit indicies. For example if ``dag.qubits[0]`` is qubit 0 in the
+    are the physical qubit indices. For example if ``dag.qubits[0]`` is qubit 0 in the
     :class:`.CouplingMap` or :class:`.Target`.
     """
 

qiskit/transpiler/passes/utils/gates_basis.py

@@ -12,7 +12,6 @@
 
 """Check if all gates in the DAGCircuit are in the specified basis gates."""
 
-from qiskit.circuit import ControlFlowOp
 from qiskit.converters import circuit_to_dag
 from qiskit.transpiler.basepasses import AnalysisPass
 
@@ -55,7 +54,7 @@ class GatesInBasis(AnalysisPass):
                         return True
                     # Control-flow ops still need to be supported, so don't skip them in the
                     # previous checks.
-                    if isinstance(gate.op, ControlFlowOp):
+                    if gate.is_control_flow():
                         for block in gate.op.blocks:
                             inner_wire_map = {
                                 inner: wire_map[outer]

qiskit/transpiler/passmanager.py

@@ -18,7 +18,7 @@ import io
 import re
 from collections.abc import Iterator, Iterable, Callable
 from functools import wraps
-from typing import Union, List, Any
+from typing import Union, List, Any, TypeVar
 
 from qiskit.circuit import QuantumCircuit
 from qiskit.converters import circuit_to_dag, dag_to_circuit
@@ -31,7 +31,7 @@ from .basepasses import BasePass
 from .exceptions import TranspilerError
 from .layout import TranspileLayout, Layout
 
-_CircuitsT = Union[List[QuantumCircuit], QuantumCircuit]
+_CircuitsT = TypeVar("_CircuitsT", bound=Union[List[QuantumCircuit], QuantumCircuit])
 
 
 class PassManager(BasePassManager):
@@ -121,6 +121,7 @@ class PassManager(BasePassManager):
         # Ordered list of original qubits
         original_qubits_reverse = {v: k for k, v in original_qubit_indices.items()}
         original_qubits = []
+        # pylint: disable-next=consider-using-enumerate
         for i in range(len(original_qubits_reverse)):
             original_qubits.append(original_qubits_reverse[i])
 
@@ -139,7 +140,7 @@ class PassManager(BasePassManager):
         self.property_set["layout"] = t_initial_layout
         self.property_set["final_layout"] = new_final_layout
 
-    def append(
+    def append(  # pylint:disable=arguments-renamed
         self,
         passes: Task | list[Task],
     ) -> None:
@@ -153,7 +154,7 @@ class PassManager(BasePassManager):
         """
         super().append(tasks=passes)
 
-    def replace(
+    def replace(  # pylint:disable=arguments-renamed
         self,
         index: int,
         passes: Task | list[Task],
@@ -167,7 +168,7 @@ class PassManager(BasePassManager):
         super().replace(index, tasks=passes)
 
     # pylint: disable=arguments-differ
-    def run(
+    def run(  # pylint:disable=arguments-renamed
         self,
         circuits: _CircuitsT,
         output_name: str | None = None,
@@ -337,7 +338,7 @@ class StagedPassManager(PassManager):
             "scheduling",
         ]
         self._validate_stages(stages)
-        # Set through parent class since `__setattr__` requieres `expanded_stages` to be defined
+        # Set through parent class since `__setattr__` requires `expanded_stages` to be defined
         super().__setattr__("_stages", tuple(stages))
         super().__setattr__("_expanded_stages", tuple(self._generate_expanded_stages()))
         super().__init__()