qiskit 1.1.2__cp38-abi3-win32.whl → 1.2.0__cp38-abi3-win32.whl

qiskit/transpiler/passes/routing/sabre_swap.py

@@ -18,7 +18,7 @@ import time
 
 import rustworkx
 
-from qiskit.circuit import SwitchCaseOp, ControlFlowOp, Clbit, ClassicalRegister
+from qiskit.circuit import SwitchCaseOp, Clbit, ClassicalRegister
 from qiskit.circuit.library.standard_gates import SwapGate
 from qiskit.circuit.controlflow import condition_resources, node_resources
 from qiskit.converters import dag_to_circuit
@@ -28,15 +28,10 @@ from qiskit.transpiler.exceptions import TranspilerError
 from qiskit.transpiler.layout import Layout
 from qiskit.transpiler.target import Target
 from qiskit.transpiler.passes.layout import disjoint_utils
-from qiskit.dagcircuit import DAGCircuit
+from qiskit.dagcircuit import DAGCircuit, DAGOpNode
 from qiskit.utils.parallel import CPU_COUNT
 
-from qiskit._accelerate.sabre import (
-    sabre_routing,
-    Heuristic,
-    NeighborTable,
-    SabreDAG,
-)
+from qiskit._accelerate.sabre import sabre_routing, Heuristic, SetScaling, NeighborTable, SabreDAG
 from qiskit._accelerate.nlayout import NLayout
 
 logger = logging.getLogger(__name__)
@@ -211,14 +206,27 @@ class SabreSwap(TransformationPass):
                 " This circuit cannot be routed to this device."
             )
 
-        if self.heuristic == "basic":
-            heuristic = Heuristic.Basic
+        if isinstance(self.heuristic, Heuristic):
+            heuristic = self.heuristic
+        elif self.heuristic == "basic":
+            heuristic = Heuristic(attempt_limit=10 * num_dag_qubits).with_basic(
+                1.0, SetScaling.Size
+            )
         elif self.heuristic == "lookahead":
-            heuristic = Heuristic.Lookahead
+            heuristic = (
+                Heuristic(attempt_limit=10 * num_dag_qubits)
+                .with_basic(1.0, SetScaling.Size)
+                .with_lookahead(0.5, 20, SetScaling.Size)
+            )
         elif self.heuristic == "decay":
-            heuristic = Heuristic.Decay
+            heuristic = (
+                Heuristic(attempt_limit=10 * num_dag_qubits)
+                .with_basic(1.0, SetScaling.Size)
+                .with_lookahead(0.5, 20, SetScaling.Size)
+                .with_decay(0.001, 5)
+            )
         else:
-            raise TranspilerError("Heuristic %s not recognized." % self.heuristic)
+            raise TranspilerError(f"Heuristic {self.heuristic} not recognized.")
         disjoint_utils.require_layout_isolated_to_component(
             dag, self.coupling_map if self.target is None else self.target
         )
@@ -289,9 +297,9 @@ def _build_sabre_dag(dag, num_physical_qubits, qubit_indices):
         node_blocks = {}
         for node in block_dag.topological_op_nodes():
             cargs_bits = set(node.cargs)
-            if node.op.condition is not None:
-                cargs_bits.update(condition_resources(node.op.condition).clbits)
-            if isinstance(node.op, SwitchCaseOp):
+            if node.condition is not None:
+                cargs_bits.update(condition_resources(node.condition).clbits)
+            if node.is_control_flow() and isinstance(node.op, SwitchCaseOp):
                 target = node.op.target
                 if isinstance(target, Clbit):
                     cargs_bits.add(target)
@@ -300,7 +308,7 @@ def _build_sabre_dag(dag, num_physical_qubits, qubit_indices):
                 else:  # Expr
                     cargs_bits.update(node_resources(target).clbits)
             cargs = {block_dag.find_bit(x).index for x in cargs_bits}
-            if isinstance(node.op, ControlFlowOp):
+            if node.is_control_flow():
                 node_blocks[node._node_id] = [
                     recurse(
                         block,
@@ -313,7 +321,7 @@ def _build_sabre_dag(dag, num_physical_qubits, qubit_indices):
                     node._node_id,
                     [wire_map[x] for x in node.qargs],
                     cargs,
-                    getattr(node.op, "_directive", False),
+                    node.is_directive(),
                 )
             )
         return SabreDAG(num_physical_qubits, block_dag.num_clbits(), dag_list, node_blocks)
@@ -383,14 +391,15 @@ def _apply_sabre_result(
             node = source_dag._multi_graph[node_id]
             if node_id in swap_map:
                 apply_swaps(dest_dag, swap_map[node_id], layout)
-            if not isinstance(node.op, ControlFlowOp):
-                dest_dag.apply_operation_back(
-                    node.op,
-                    [
-                        physical_qubits[layout.virtual_to_physical(root_logical_map[q])]
-                        for q in node.qargs
-                    ],
-                    node.cargs,
+            if not node.is_control_flow():
+                qubits = [
+                    physical_qubits[layout.virtual_to_physical(root_logical_map[q])]
+                    for q in node.qargs
+                ]
+                dest_dag._apply_op_node_back(
+                    DAGOpNode.from_instruction(
+                        node._to_circuit_instruction().replace(qubits=qubits)
+                    ),
                     check=False,
                 )
                 continue

qiskit/transpiler/passes/routing/star_prerouting.py

@@ -14,11 +14,15 @@
 from typing import Iterable, Union, Optional, List, Tuple
 from math import floor, log10
 
-from qiskit.circuit import Barrier
+from qiskit.circuit import SwitchCaseOp, Clbit, ClassicalRegister, Barrier
+from qiskit.circuit.controlflow import condition_resources, node_resources
 from qiskit.dagcircuit import DAGOpNode, DAGDepNode, DAGDependency, DAGCircuit
-from qiskit.transpiler import Layout
 from qiskit.transpiler.basepasses import TransformationPass
-from qiskit.circuit.library import SwapGate
+from qiskit.transpiler.layout import Layout
+from qiskit.transpiler.passes.routing.sabre_swap import _build_sabre_dag, _apply_sabre_result
+
+from qiskit._accelerate import star_prerouting
+from qiskit._accelerate.nlayout import NLayout
 
 
 class StarBlock:
@@ -260,7 +264,7 @@ class StarPreRouting(TransformationPass):
         # star block by a linear sequence of gates
         new_dag, qubit_mapping = self.star_preroute(dag, star_blocks, processing_order)
 
-        # Fix output permuation -- copied from ElidePermutations
+        # Fix output permutation -- copied from ElidePermutations
         input_qubit_mapping = {qubit: index for index, qubit in enumerate(dag.qubits)}
         self.property_set["original_layout"] = Layout(input_qubit_mapping)
         if self.property_set["original_qubit_indices"] is None:
@@ -305,113 +309,84 @@ class StarPreRouting(TransformationPass):
             new_dag: a dag specifying the pre-routed circuit
             qubit_mapping: the final qubit mapping after pre-routing
         """
-        node_to_block_id = {}
-        for i, block in enumerate(blocks):
-            for node in block.get_nodes():
-                node_to_block_id[node] = i
-
-        new_dag = dag.copy_empty_like()
-        processed_block_ids = set()
-        qubit_mapping = list(range(len(dag.qubits)))
-
-        def _apply_mapping(qargs, qubit_mapping, qubits):
-            return tuple(qubits[qubit_mapping[dag.find_bit(qubit).index]] for qubit in qargs)
-
-        is_first_star = True
-        last_2q_gate = [
-            op
-            for op in reversed(processing_order)
-            if ((len(op.qargs) > 1) and (op.name != "barrier"))
+        # Convert the DAG to a SabreDAG
+        num_qubits = len(dag.qubits)
+        canonical_register = dag.qregs["q"]
+        current_layout = Layout.generate_trivial_layout(canonical_register)
+        qubit_indices = {bit: idx for idx, bit in enumerate(canonical_register)}
+        layout_mapping = {qubit_indices[k]: v for k, v in current_layout.get_virtual_bits().items()}
+        initial_layout = NLayout(layout_mapping, num_qubits, num_qubits)
+        sabre_dag, circuit_to_dag_dict = _build_sabre_dag(dag, num_qubits, qubit_indices)
+
+        # Extract the nodes from the blocks for the Rust representation
+        rust_blocks = [
+            (block.center is not None, _extract_nodes(block.get_nodes(), dag)) for block in blocks
         ]
-        if len(last_2q_gate) > 0:
-            last_2q_gate = last_2q_gate[0]
-        else:
-            last_2q_gate = None
 
+        # Determine the processing order of the nodes in the DAG for the Rust representation
         int_digits = floor(log10(len(processing_order))) + 1
         processing_order_index_map = {
-            node: f"a{str(index).zfill(int(int_digits))}"
-            for index, node in enumerate(processing_order)
+            node: f"a{index:0{int_digits}}" for index, node in enumerate(processing_order)
         }
 
         def tie_breaker_key(node):
             return processing_order_index_map.get(node, node.sort_key)
 
-        for node in dag.topological_op_nodes(key=tie_breaker_key):
-            block_id = node_to_block_id.get(node, None)
-            if block_id is not None:
-                if block_id in processed_block_ids:
-                    continue
-
-                processed_block_ids.add(block_id)
-
-                # process the whole block
-                block = blocks[block_id]
-                sequence = block.nodes
-                center_node = block.center
-
-                if len(sequence) == 2:
-                    for inner_node in sequence:
-                        new_dag.apply_operation_back(
-                            inner_node.op,
-                            _apply_mapping(inner_node.qargs, qubit_mapping, dag.qubits),
-                            inner_node.cargs,
-                            check=False,
-                        )
-                    continue
-                swap_source = None
-                prev = None
-                for inner_node in sequence:
-                    if (len(inner_node.qargs) == 1) or (inner_node.qargs == prev):
-                        new_dag.apply_operation_back(
-                            inner_node.op,
-                            _apply_mapping(inner_node.qargs, qubit_mapping, dag.qubits),
-                            inner_node.cargs,
-                            check=False,
-                        )
-                        continue
-                    if is_first_star and swap_source is None:
-                        swap_source = center_node
-                        new_dag.apply_operation_back(
-                            inner_node.op,
-                            _apply_mapping(inner_node.qargs, qubit_mapping, dag.qubits),
-                            inner_node.cargs,
-                            check=False,
-                        )
-
-                        prev = inner_node.qargs
-                        continue
-                    # place 2q-gate and subsequent swap gate
-                    new_dag.apply_operation_back(
-                        inner_node.op,
-                        _apply_mapping(inner_node.qargs, qubit_mapping, dag.qubits),
-                        inner_node.cargs,
-                        check=False,
-                    )
-
-                    if not inner_node is last_2q_gate and not isinstance(inner_node.op, Barrier):
-                        new_dag.apply_operation_back(
-                            SwapGate(),
-                            _apply_mapping(inner_node.qargs, qubit_mapping, dag.qubits),
-                            inner_node.cargs,
-                            check=False,
-                        )
-                        # Swap mapping
-                        index_0 = dag.find_bit(inner_node.qargs[0]).index
-                        index_1 = dag.find_bit(inner_node.qargs[1]).index
-                        qubit_mapping[index_1], qubit_mapping[index_0] = (
-                            qubit_mapping[index_0],
-                            qubit_mapping[index_1],
-                        )
-
-                    prev = inner_node.qargs
-                is_first_star = False
-            else:
-                # the node is not part of a block
-                new_dag.apply_operation_back(
-                    node.op,
-                    _apply_mapping(node.qargs, qubit_mapping, dag.qubits),
-                    node.cargs,
-                    check=False,
-                )
-        return new_dag, qubit_mapping
+        rust_processing_order = _extract_nodes(dag.topological_op_nodes(key=tie_breaker_key), dag)
+
+        # Run the star prerouting algorithm to obtain the new DAG and qubit mapping
+        *sabre_result, qubit_mapping = star_prerouting.star_preroute(
+            sabre_dag, rust_blocks, rust_processing_order
+        )
+
+        res_dag = _apply_sabre_result(
+            dag.copy_empty_like(),
+            dag,
+            sabre_result,
+            initial_layout,
+            dag.qubits,
+            circuit_to_dag_dict,
+        )
+
+        return res_dag, qubit_mapping
+
+
+def _extract_nodes(nodes, dag):
+    """Extract and format node information for Rust representation used in SabreDAG.
+
+    Each node is represented as a tuple containing:
+    - Node ID (int): The unique identifier of the node in the DAG.
+    - Qubit indices (list of int): Indices of qubits involved in the node's operation.
+    - Classical bit indices (set of int): Indices of classical bits involved in the node's operation.
+    - Directive flag (bool): Indicates whether the operation is a directive (True) or not (False).
+
+    Args:
+        nodes (list[DAGOpNode]): List of DAGOpNode objects to extract information from.
+        dag (DAGCircuit): DAGCircuit object containing the circuit structure.
+
+    Returns:
+        list of tuples: Each tuple contains information about a node in the format described above.
+    """
+    extracted_node_info = []
+    for node in nodes:
+        qubit_indices = [dag.find_bit(qubit).index for qubit in node.qargs]
+        classical_bit_indices = set()
+
+        if node.op.condition is not None:
+            classical_bit_indices.update(condition_resources(node.op.condition).clbits)
+
+        if isinstance(node.op, SwitchCaseOp):
+            switch_case_target = node.op.target
+            if isinstance(switch_case_target, Clbit):
+                classical_bit_indices.add(switch_case_target)
+            elif isinstance(switch_case_target, ClassicalRegister):
+                classical_bit_indices.update(switch_case_target)
+            else:  # Assume target is an expression involving classical bits
+                classical_bit_indices.update(node_resources(switch_case_target).clbits)
+
+        is_directive = getattr(node.op, "_directive", False)
+        extracted_node_info.append(
+            (node._node_id, qubit_indices, classical_bit_indices, is_directive)
+        )
+
+    return extracted_node_info

qiskit/transpiler/passes/routing/stochastic_swap.py

@@ -357,9 +357,7 @@ class StochasticSwap(TransformationPass):
 
                     # Give up if we fail again
                     if not success_flag:
-                        raise TranspilerError(
-                            "swap mapper failed: " + "layer %d, sublayer %d" % (i, j)
-                        )
+                        raise TranspilerError(f"swap mapper failed: layer {i}, sublayer {j}")
 
                     # Update the record of qubit positions
                     # for each inner iteration

qiskit/transpiler/passes/scheduling/alap.py

@@ -15,10 +15,9 @@
 from qiskit.circuit import Delay, Qubit, Measure
 from qiskit.dagcircuit import DAGCircuit
 from qiskit.transpiler.exceptions import TranspilerError
+from qiskit.transpiler.passes.scheduling.base_scheduler import BaseSchedulerTransform
 from qiskit.utils.deprecation import deprecate_func
 
-from .base_scheduler import BaseSchedulerTransform
-
 
 class ALAPSchedule(BaseSchedulerTransform):
     """ALAP Scheduling pass, which schedules the **stop** time of instructions as late as possible.

qiskit/transpiler/passes/scheduling/alignments/__init__.py

@@ -44,7 +44,7 @@ Pulse alignment constraint
     multiple of this value. Violation of this constraint may result in the
     backend execution failure.
 
-    In most of the senarios, the scheduled start time of ``DAGOpNode`` corresponds to the
+    In most of the scenarios, the scheduled start time of ``DAGOpNode`` corresponds to the
     start time of the underlying pulse instruction composing the node operation.
     However, this assumption can be intentionally broken by defining a pulse gate,
     i.e. calibration, with the schedule involving pre-buffer, i.e. some random pulse delay
@@ -62,7 +62,7 @@ Granularity constraint
     This value is reported by ``timing_constraints["granularity"]`` in the backend
     configuration in units of dt. This is the constraint for a single pulse :class:`Play`
     instruction that may constitute your pulse gate.
-    The length of waveform samples should be multipel of this constraint value.
+    The length of waveform samples should be multiple of this constraint value.
     Violation of this constraint may result in failue in backend execution.
 
 Minimum pulse length constraint

qiskit/transpiler/passes/scheduling/alignments/check_durations.py

@@ -14,7 +14,7 @@
 from qiskit.circuit.delay import Delay
 from qiskit.dagcircuit import DAGCircuit
 from qiskit.transpiler.basepasses import AnalysisPass
-from qiskit.transpiler import Target
+from qiskit.transpiler.target import Target
 
 
 class InstructionDurationCheck(AnalysisPass):

qiskit/transpiler/passes/scheduling/alignments/pulse_gate_validation.py

@@ -16,7 +16,7 @@ from qiskit.dagcircuit import DAGCircuit
 from qiskit.pulse import Play
 from qiskit.transpiler.basepasses import AnalysisPass
 from qiskit.transpiler.exceptions import TranspilerError
-from qiskit.transpiler import Target
+from qiskit.transpiler.target import Target
 
 
 class ValidatePulseGates(AnalysisPass):
@@ -31,7 +31,7 @@ class ValidatePulseGates(AnalysisPass):
 
     In Qiskit SDK, we can define the pulse-level implementation of custom quantum gate
     instructions, as a `pulse gate
-    <https://docs.quantum.ibm.com/build/pulse>`__,
+    <https://docs.quantum.ibm.com/guides/pulse>`__,
     thus user gates should satisfy all waveform memory constraints imposed by the backend.
 
     This pass validates all attached calibration entries and raises ``TranspilerError`` to

qiskit/transpiler/passes/scheduling/alignments/reschedule.py

@@ -21,7 +21,7 @@ from qiskit.circuit.reset import Reset
 from qiskit.dagcircuit import DAGCircuit, DAGOpNode, DAGOutNode
 from qiskit.transpiler.basepasses import AnalysisPass
 from qiskit.transpiler.exceptions import TranspilerError
-from qiskit.transpiler import Target
+from qiskit.transpiler.target import Target
 
 
 class ConstrainedReschedule(AnalysisPass):

qiskit/transpiler/passes/scheduling/asap.py

@@ -15,10 +15,9 @@
 from qiskit.circuit import Delay, Qubit, Measure
 from qiskit.dagcircuit import DAGCircuit
 from qiskit.transpiler.exceptions import TranspilerError
+from qiskit.transpiler.passes.scheduling.base_scheduler import BaseSchedulerTransform
 from qiskit.utils.deprecation import deprecate_func
 
-from .base_scheduler import BaseSchedulerTransform
-
 
 class ASAPSchedule(BaseSchedulerTransform):
     """ASAP Scheduling pass, which schedules the start time of instructions as early as possible..

qiskit/transpiler/passes/scheduling/base_scheduler.py

@@ -13,13 +13,13 @@
 """Base circuit scheduling pass."""
 import warnings
 
-from qiskit.transpiler import InstructionDurations
-from qiskit.transpiler.basepasses import TransformationPass
-from qiskit.transpiler.passes.scheduling.time_unit_conversion import TimeUnitConversion
-from qiskit.dagcircuit import DAGOpNode, DAGCircuit, DAGOutNode
 from qiskit.circuit import Delay, Gate, Measure, Reset
 from qiskit.circuit.parameterexpression import ParameterExpression
+from qiskit.dagcircuit import DAGOpNode, DAGCircuit, DAGOutNode
+from qiskit.transpiler.basepasses import TransformationPass
 from qiskit.transpiler.exceptions import TranspilerError
+from qiskit.transpiler.instruction_durations import InstructionDurations
+from qiskit.transpiler.passes.scheduling.time_unit_conversion import TimeUnitConversion
 from qiskit.transpiler.target import Target
 
 
@@ -68,7 +68,7 @@ class BaseSchedulerTransform(TransformationPass):
         However, such optimization should be done by another pass,
         otherwise scheduling may break topological ordering of the original circuit.
 
-    Realistic control flow scheduling respecting for microarcitecture
+    Realistic control flow scheduling respecting for microarchitecture
 
         In the dispersive QND readout scheme, qubit is measured with microwave stimulus to qubit (Q)
         followed by resonator ring-down (depopulation). This microwave signal is recorded

qiskit/transpiler/passes/scheduling/dynamical_decoupling.py

@@ -20,10 +20,10 @@ from qiskit.circuit.library.standard_gates import IGate, UGate, U3Gate
 from qiskit.dagcircuit import DAGOpNode, DAGInNode
 from qiskit.quantum_info.operators.predicates import matrix_equal
 from qiskit.synthesis.one_qubit import OneQubitEulerDecomposer
-from qiskit.transpiler import InstructionDurations
-from qiskit.transpiler.passes.optimization import Optimize1qGates
 from qiskit.transpiler.basepasses import TransformationPass
 from qiskit.transpiler.exceptions import TranspilerError
+from qiskit.transpiler.instruction_durations import InstructionDurations
+from qiskit.transpiler.passes.optimization import Optimize1qGates
 from qiskit.utils.deprecation import deprecate_func
 
 
@@ -130,7 +130,7 @@ class DynamicalDecoupling(TransformationPass):
                 will be used [d/2, d, d, ..., d, d, d/2].
             skip_reset_qubits (bool): if True, does not insert DD on idle
                 periods that immediately follow initialized/reset qubits (as
-                qubits in the ground state are less susceptile to decoherence).
+                qubits in the ground state are less susceptible to decoherence).
             target (Target): The :class:`~.Target` representing the target backend, if both
                   ``durations`` and this are specified then this argument will take
                   precedence and ``durations`` will be ignored.

qiskit/transpiler/passes/scheduling/padding/base_padding.py

@@ -202,7 +202,7 @@ class BasePadding(TransformationPass):
     ):
         """Add new operation to DAG with scheduled information.
 
-        This is identical to apply_operation_back + updating the node_start_time propety.
+        This is identical to apply_operation_back + updating the node_start_time property.
 
         Args:
             dag: DAG circuit on which the sequence is applied.

qiskit/transpiler/passes/scheduling/padding/dynamical_decoupling.py

@@ -20,15 +20,15 @@ from qiskit.circuit import Gate, ParameterExpression, Qubit
 from qiskit.circuit.delay import Delay
 from qiskit.circuit.library.standard_gates import IGate, UGate, U3Gate
 from qiskit.circuit.reset import Reset
-from qiskit.dagcircuit import DAGCircuit, DAGNode, DAGInNode, DAGOpNode
+from qiskit.dagcircuit import DAGCircuit, DAGNode, DAGInNode, DAGOpNode, DAGOutNode
 from qiskit.quantum_info.operators.predicates import matrix_equal
 from qiskit.synthesis.one_qubit import OneQubitEulerDecomposer
 from qiskit.transpiler.exceptions import TranspilerError
 from qiskit.transpiler.instruction_durations import InstructionDurations
 from qiskit.transpiler.passes.optimization import Optimize1qGates
+from qiskit.transpiler.passes.scheduling.padding.base_padding import BasePadding
 from qiskit.transpiler.target import Target
 
-from .base_padding import BasePadding
 
 logger = logging.getLogger(__name__)
 
@@ -128,7 +128,7 @@ class PadDynamicalDecoupling(BasePadding):
                 will be used [d/2, d, d, ..., d, d, d/2].
             skip_reset_qubits: If True, does not insert DD on idle periods that
                 immediately follow initialized/reset qubits
-                (as qubits in the ground state are less susceptile to decoherence).
+                (as qubits in the ground state are less susceptible to decoherence).
             pulse_alignment: The hardware constraints for gate timing allocation.
                 This is usually provided from ``backend.configuration().timing_constraints``.
                 If provided, the delay length, i.e. ``spacing``, is implicitly adjusted to
@@ -311,7 +311,7 @@ class PadDynamicalDecoupling(BasePadding):
         # slack = 992 dt - 4 x 160 dt = 352 dt
         #
         # unconstraind sequence: 44dt-X1-88dt-Y2-88dt-X3-88dt-Y4-44dt
-        # constraind sequence  : 32dt-X1-80dt-Y2-80dt-X3-80dt-Y4-32dt + extra slack 48 dt
+        # constrained sequence  : 32dt-X1-80dt-Y2-80dt-X3-80dt-Y4-32dt + extra slack 48 dt
         #
         # Now we evenly split extra slack into start and end of the sequence.
         # The distributed slack should be multiple of 16.
@@ -331,8 +331,7 @@ class PadDynamicalDecoupling(BasePadding):
         if time_interval % self._alignment != 0:
             raise TranspilerError(
                 f"Time interval {time_interval} is not divisible by alignment {self._alignment} "
-                f"between DAGNode {prev_node.name} on qargs {prev_node.qargs} and {next_node.name} "
-                f"on qargs {next_node.qargs}."
+                f"between {_format_node(prev_node)} and {_format_node(next_node)}."
             )
 
         if not self.__is_dd_qubit(dag.qubits.index(qubit)):
@@ -361,17 +360,17 @@ class PadDynamicalDecoupling(BasePadding):
             theta, phi, lam, phase = OneQubitEulerDecomposer().angles_and_phase(u_inv)
             if isinstance(next_node, DAGOpNode) and isinstance(next_node.op, (UGate, U3Gate)):
                 # Absorb the inverse into the successor (from left in circuit)
-                theta_r, phi_r, lam_r = next_node.op.params
-                next_node.op.params = Optimize1qGates.compose_u3(
-                    theta_r, phi_r, lam_r, theta, phi, lam
-                )
+                op = next_node.op
+                theta_r, phi_r, lam_r = op.params
+                op.params = Optimize1qGates.compose_u3(theta_r, phi_r, lam_r, theta, phi, lam)
+                next_node.op = op
                 sequence_gphase += phase
             elif isinstance(prev_node, DAGOpNode) and isinstance(prev_node.op, (UGate, U3Gate)):
                 # Absorb the inverse into the predecessor (from right in circuit)
-                theta_l, phi_l, lam_l = prev_node.op.params
-                prev_node.op.params = Optimize1qGates.compose_u3(
-                    theta, phi, lam, theta_l, phi_l, lam_l
-                )
+                op = prev_node.op
+                theta_l, phi_l, lam_l = op.params
+                op.params = Optimize1qGates.compose_u3(theta, phi, lam, theta_l, phi_l, lam_l)
+                prev_node.op = op
                 sequence_gphase += phase
             else:
                 # Don't do anything if there's no single-qubit gate to absorb the inverse
@@ -430,3 +429,10 @@ class PadDynamicalDecoupling(BasePadding):
             else:
                 params.append(p)
         return tuple(params)
+
+
+def _format_node(node: DAGNode) -> str:
+    """Util to format the DAGNode, DAGInNode, and DAGOutNode."""
+    if isinstance(node, (DAGInNode, DAGOutNode)):
+        return f"{node.__class__.__name__} on qarg {node.wire}"
+    return f"DAGNode {node.name} on qargs {node.qargs}"

qiskit/transpiler/passes/scheduling/scheduling/base_scheduler.py

@@ -14,13 +14,13 @@
 
 import warnings
 
-from qiskit.transpiler import InstructionDurations
-from qiskit.transpiler.basepasses import AnalysisPass
-from qiskit.transpiler.passes.scheduling.time_unit_conversion import TimeUnitConversion
-from qiskit.dagcircuit import DAGOpNode, DAGCircuit
 from qiskit.circuit import Delay, Gate
 from qiskit.circuit.parameterexpression import ParameterExpression
+from qiskit.dagcircuit import DAGOpNode, DAGCircuit
+from qiskit.transpiler.basepasses import AnalysisPass
 from qiskit.transpiler.exceptions import TranspilerError
+from qiskit.transpiler.instruction_durations import InstructionDurations
+from qiskit.transpiler.passes.scheduling.time_unit_conversion import TimeUnitConversion
 from qiskit.transpiler.target import Target
 
 
@@ -70,8 +70,9 @@ class BaseScheduler(AnalysisPass):
             duration = dag.calibrations[node.op.name][cal_key].duration
 
             # Note that node duration is updated (but this is analysis pass)
-            node.op = node.op.to_mutable()
-            node.op.duration = duration
+            op = node.op.to_mutable()
+            op.duration = duration
+            node.op = op
         else:
             duration = node.op.duration
 

qiskit/transpiler/passes/scheduling/time_unit_conversion.py

@@ -105,9 +105,10 @@ class TimeUnitConversion(TransformationPass):
                 )
             except TranspilerError:
                 continue
-            node.op = node.op.to_mutable()
-            node.op.duration = duration
-            node.op.unit = time_unit
+            op = node.op.to_mutable()
+            op.duration = duration
+            op.unit = time_unit
+            node.op = op
 
         self.property_set["time_unit"] = time_unit
         return dag