pyxdaq 0.1.1__py3-none-any.whl

pyxdaq/__init__.py

@@ -0,0 +1,9 @@
+import logging
+
+import colorlog
+
+handler = colorlog.StreamHandler()
+handler.setFormatter(
+    colorlog.ColoredFormatter('%(log_color)s%(asctime)s [%(levelname)s] %(name)s %(message)s')
+)
+logging.basicConfig(handlers=[handler], level=logging.INFO)

pyxdaq/board.py

@@ -0,0 +1,98 @@
+import json
+import logging
+from copy import deepcopy
+from dataclasses import dataclass
+from pathlib import Path
+from typing import Callable, List
+
+from pylibxdaq import pyxdaq_device
+from pylibxdaq.managers import manager_paths
+
+from .constants import EndPoints
+
+logger = logging.getLogger(__name__)
+
+
+@dataclass
+class DeviceSetup:
+    manager_path: Path
+    manager_info: dict
+    options: dict
+
+    def with_mode(self, mode: str):
+        info = deepcopy(self)
+        info.options['mode'] = mode
+        return info
+
+
+class Board:
+
+    @classmethod
+    def list_devices(cls) -> List[DeviceSetup]:
+        devices = []
+        for manager_path in manager_paths:
+            manager = pyxdaq_device.get_device_manager(str(manager_path))
+            info = manager.info()
+            for device_options in json.loads(manager.list_devices()):
+                devices.append(DeviceSetup(manager_path, info, device_options))
+        return sorted(devices, key=lambda x: str(x.options))
+
+    def __init__(self, device_info: DeviceSetup):
+        manager: pyxdaq_device.DeviceManager = pyxdaq_device.get_device_manager(
+            str(device_info.manager_path)
+        )
+        self.dev = manager.create_device(json.dumps(device_info.options))
+        status = json.loads(self.dev.get_status())
+        if status['Mode'] == 'rhd':
+            self.rhs = False
+        elif status['Mode'] == 'rhs':
+            self.rhs = True
+
+    def __enter__(self):
+        return self
+
+    def __exit__(self, exc_type, exc_val, exc_tb):
+        del self.dev
+
+    def __getattr__(self, name: str):
+        return getattr(self.dev, name)
+
+    def GetWireOutValue(self, addr: EndPoints, update: bool = True) -> int:
+        if update:
+            return self.dev.get_register_sync(addr.value)
+        else:
+            return self.dev.get_register(addr.value)
+
+    def SetWireInValue(
+        self, addr: EndPoints, value: int, mask: int = 0xFFFFFFFF, update: bool = True
+    ):
+        if update:
+            self.dev.set_register_sync(addr.value, value, mask)
+        else:
+            self.dev.set_register(addr.value, value, mask)
+
+    def ActivateTriggerIn(self, addr: EndPoints, value: int):
+        self.dev.trigger(addr.value, value)
+
+    def WriteToBlockPipeIn(self, epAddr: EndPoints, data: bytearray):
+        return self.dev.write(epAddr.value, data)
+
+    def ReadFromBlockPipeOut(self, epAddr: EndPoints, data: bytearray):
+        return self.dev.read(epAddr.value, data)
+
+    def start_receiving_aligned_buffer(
+        self,
+        epAddr: EndPoints,
+        alignment: int,
+        callback: Callable[[pyxdaq_device.ManagedBuffer], None],
+        chunk_size: int = 0
+    ):
+        return self.dev.start_aligned_read_stream(
+            epAddr.value, alignment, callback, chunk_size=chunk_size
+        )
+
+    def SendTrig(
+        self, trig: EndPoints, bit: int, epAddr: EndPoints, value: int, mask: int = 0xFFFFFFFF
+    ):
+        self.dev.set_register_sync(epAddr.value, value, mask)
+        self.dev.trigger(trig.value, bit)

pyxdaq/constants.py

@@ -0,0 +1,309 @@
+from enum import Enum
+
+
+class EndPoints(Enum):
+    pass
+
+
+class XDAQWireOut(EndPoints):
+    Serial = 0x32
+    Hdmi = 0x31
+    Fpga = 0x3f
+    Daio = 0x30
+    Oled = 0x33
+    Vido = 0x34
+    Expr = 0x35
+    Xprt = 0x36
+
+
+class RHD(EndPoints):
+    TTL_override = 0x1400
+    WireInResetRun = 0x00
+    WireInMaxTimeStep = 0x01
+    WireInSerialDigitalInCntl = 0x02
+    WireInDataFreqPll = 0x03
+    WireInMisoDelay = 0x04
+    WireInCmdRamAddr = 0x05
+    WireInCmdRamBank = 0x06
+    WireInCmdRamData = 0x07
+    WireInAuxCmdBank1 = 0x08
+    WireInAuxCmdBank2 = 0x09
+    WireInAuxCmdBank3 = 0x0a
+    WireInAuxCmdLength = 0x0b
+    WireInAuxCmdLoop = 0x0c
+    WireInLedDisplay = 0x0d
+    WireInDacReref = 0x0e
+    WireInDataStreamEn = 0x14
+    WireInTtlOut = 0x15
+    WireInTtlOut32 = 0x10
+    WireInDacSource1 = 0x16
+    WireInDacSource2 = 0x17
+    WireInDacSource3 = 0x18
+    WireInDacSource4 = 0x19
+    WireInDacSource5 = 0x1a
+    WireInDacSource6 = 0x1b
+    WireInDacSource7 = 0x1c
+    WireInDacSource8 = 0x1d
+    WireInDacSource9 = 0x48
+    WireInDacSource10 = 0x49
+    WireInDacSource11 = 0x4A
+    WireInDacSource12 = 0x4B
+    WireInDacManual = 0x1e
+    WireInMultiUse = 0x1f
+    TrigInConfig = 0x40
+    TrigInSpiStart = 0x41
+    TrigInDacConfig = 0x42
+    WireOutNumWords = 0x20
+    WireOutSerialDigitalIn = 0x21
+    WireOutSpiRunning = 0x22
+    WireOutTtlIn = 0x23
+    WireOutDataClkLocked = 0x24
+    WireOutBoardMode = 0x25
+    WireOutBoardId = 0x3e
+    WireOutBoardVersion = 0x3f
+    PipeOutData = 0xa0
+    TrigVStim = 0x40
+    TrigMCU = 0x48
+    WireOutXDAQStatus = 0x22
+    WireInMCUControl = 0x02
+    PipeInFirmware = 0x88
+    PipeOutFirmware = 0xb0
+    WireInSetMode = 0x00
+    Enable32bitDIO = 0x12
+    PipeInDAC1 = 0x90
+    PipeInDAC2 = 0x91
+    PipeInDAC3 = 0x92
+    PipeInDAC4 = 0x93
+    PipeInDAC5 = 0x94
+    PipeInDAC6 = 0x95
+    PipeInDAC7 = 0x96
+    PipeInDAC8 = 0x97
+    PipeInDAC9 = 0x98
+    PipeInDAC10 = 0x99
+    PipeInDAC11 = 0x9A
+    PipeInDAC12 = 0x9B
+    ExpanderInfo = 0x35
+
+
+class RHS(EndPoints):
+    TTL_override = 0x1400
+    WireInResetRun = 0x00
+    WireInMaxTimeStep = 0x01
+    WireInMaxTimeStepLsb = 0x01
+    WireInMaxTimeStepMsb = 0x02
+    WireInDataFreqPll = 0x03
+    WireInMisoDelay = 0x04
+    WireInStimCmdMode = 0x05
+    WireInStimRegAddr = 0x06
+    WireInStimRegWord = 0x07
+    WireInDcAmpConvert = 0x08
+    WireInExtraStates = 0x09
+    WireInDacReref = 0x0a
+    WireInAuxEnable = 0x0c
+    WireInGlobalSettleSelect = 0x0d
+    WireInAdcThreshold = 0x0f
+    WireInSerialDigitalInCntl = 0x10
+    WireInTtlOut32 = 0x10
+    WireInLedDisplay = 0x11
+    WireInManualTriggers = 0x12
+    WireInTtlOutMode = 0x13
+    WireInDataStreamEn = 0x14
+    WireInTtlOut = 0x15
+    WireInDacSource1 = 0x16
+    WireInDacSource2 = 0x17
+    WireInDacSource3 = 0x18
+    WireInDacSource4 = 0x19
+    WireInDacSource5 = 0x1a
+    WireInDacSource6 = 0x1b
+    WireInDacSource7 = 0x1c
+    WireInDacSource8 = 0x1d
+    WireInDacSource9 = 0x48
+    WireInDacSource10 = 0x49
+    WireInDacSource11 = 0x4A
+    WireInDacSource12 = 0x4B
+    WireInDacManual = 0x1e
+    WireInMultiUse = 0x1f
+    TrigInConfig = 0x40
+    TrigInDcmProg = 0x40
+    TrigInSpiStart = 0x41
+    TrigInRamAddrReset = 0x42
+    TrigInDacThresh = 0x43
+    TrigInDacHpf = 0x44
+    TrigInAuxCmdLength = 0x45
+    WireOutNumWords = 0x20
+    WireOutNumWordsLsb = 0x20
+    WireOutNumWordsMsb = 0x21
+    WireOutSpiRunning = 0x22
+    WireOutTtlIn = 0x23
+    WireOutDataClkLocked = 0x24
+    WireOutBoardMode = 0x25
+    WireOutSerialDigitalIn = 0x26
+    WireOutBoardId = 0x3e
+    WireOutBoardVersion = 0x3f
+    PipeInAuxCmd1Msw = 0x80
+    PipeInAuxCmd1 = 0x81
+    PipeInAuxCmd1Lsw = 0x81
+    PipeInAuxCmd2Msw = 0x82
+    PipeInAuxCmd2 = 0x83
+    PipeInAuxCmd2Lsw = 0x83
+    PipeInAuxCmd3Msw = 0x84
+    PipeInAuxCmd3 = 0x85
+    PipeInAuxCmd3Lsw = 0x85
+    PipeInAuxCmd4Msw = 0x86
+    PipeInAuxCmd4 = 0x87
+    PipeInAuxCmd4Lsw = 0x87
+    PipeOutData = 0xa0
+    TrigVStim = 0x40
+    TrigMCU = 0x48
+    WireOutXDAQStatus = 0x22
+    WireInMCUControl = 0x02
+    PipeInFirmware = 0x88
+    PipeOutFirmware = 0xb0
+    WireInSetMode = 0x00
+    Enable32bitDIO = 0x0B
+    PipeInDAC1 = 0x90
+    PipeInDAC2 = 0x91
+    PipeInDAC3 = 0x92
+    PipeInDAC4 = 0x93
+    PipeInDAC5 = 0x94
+    PipeInDAC6 = 0x95
+    PipeInDAC7 = 0x96
+    PipeInDAC8 = 0x97
+    PipeInDAC9 = 0x98
+    PipeInDAC10 = 0x99
+    PipeInDAC11 = 0x9A
+    PipeInDAC12 = 0x9B
+    ExpanderInfo = 0x35
+
+
+class SampleRate(Enum):
+    SampleRate1000Hz = (7, 125, 1000)
+    SampleRate1250Hz = (7, 100, 1250)
+    SampleRate1500Hz = (21, 250, 1500)
+    SampleRate2000Hz = (14, 125, 2000)
+    SampleRate2500Hz = (35, 250, 2500)
+    SampleRate3000Hz = (21, 125, 3000)
+    SampleRate3333Hz = (14, 75, 3333)
+    SampleRate4000Hz = (28, 125, 4000)
+    SampleRate5000Hz = (7, 25, 5000)
+    SampleRate6250Hz = (7, 20, 6250)
+    SampleRate8000Hz = (112, 250, 8000)
+    SampleRate10000Hz = (14, 25, 10000)
+    SampleRate12500Hz = (7, 10, 12500)
+    SampleRate15000Hz = (21, 25, 15000)
+    SampleRate20000Hz = (28, 25, 20000)
+    SampleRate25000Hz = (35, 25, 25000)
+    SampleRate30000Hz = (42, 25, 30000)
+
+    @classmethod
+    def fromRate(cls, rate: int):
+        for sr in SampleRate:
+            if sr.value[2] == rate:
+                return sr
+        raise ValueError('Invalid sample rate')
+
+    @property
+    def rate(self):
+        return self.value[2]
+
+
+class HeadstageChipID(Enum):
+    NA = 0
+    RHD2132 = 1
+    RHD2216 = 2
+    RHD2164 = 4
+    RHS2116 = 32
+
+    def num_channels(self):
+        if self == HeadstageChipID.RHD2164:
+            return 64
+        elif self == HeadstageChipID.RHD2132:
+            return 32
+        elif self == HeadstageChipID.RHD2216:
+            return 16
+        elif self == HeadstageChipID.RHS2116:
+            return 16
+        else:
+            return 0
+
+    def num_channels_per_stream(self):
+        if self == HeadstageChipID.RHD2164:
+            return self.num_channels() // 2
+        return self.num_channels()
+
+
+class HeadstageChipMISOID(Enum):
+    NA = 0
+    MISO_A = 53
+    MISO_B = 58
+
+
+class TriggerEvent(Enum):
+    Level = 0
+    Edge = 1
+
+
+class TriggerPolarity(Enum):
+    Low = 0
+    High = 1
+
+
+class StimShape(Enum):
+    Biphasic = 0
+    BiphasicWithInterphaseDelay = 1
+    Triphasic = 2
+    Monophasic = 3
+
+
+class StartPolarity(Enum):
+    anodic = 0
+    cathodic = 1
+
+
+class StimRegister(Enum):
+    Trigger = 0
+    Param = 1
+    EventAmpSettleOn = 2
+    EventAmpSettleOff = 3
+    EventStartStim = 4
+    EventStimPhase2 = 5
+    EventStimPhase3 = 6
+    EventEndStim = 7
+    EventRepeatStim = 8
+    EventChargeRecovOn = 9
+    EventChargeRecovOff = 10
+    EventAmpSettleOnRepeat = 11
+    EventAmpSettleOffRepeat = 12
+    EventEnd = 13
+
+
+class StimStepSize(Enum):
+    StimStepSizeMin = 0
+    StimStepSize10nA = 1
+    StimStepSize20nA = 2
+    StimStepSize50nA = 3
+    StimStepSize100nA = 4
+    StimStepSize200nA = 5
+    StimStepSize500nA = 6
+    StimStepSize1uA = 7
+    StimStepSize2uA = 8
+    StimStepSize5uA = 9
+    StimStepSize10uA = 10
+    StimStepSizeMax = 11
+
+    @property
+    def nA(self):
+        return {
+            StimStepSize.StimStepSizeMin: float('nan'),
+            StimStepSize.StimStepSize10nA: 10,
+            StimStepSize.StimStepSize20nA: 20,
+            StimStepSize.StimStepSize50nA: 50,
+            StimStepSize.StimStepSize100nA: 100,
+            StimStepSize.StimStepSize200nA: 200,
+            StimStepSize.StimStepSize500nA: 500,
+            StimStepSize.StimStepSize1uA: 1000,
+            StimStepSize.StimStepSize2uA: 2000,
+            StimStepSize.StimStepSize5uA: 5000,
+            StimStepSize.StimStepSize10uA: 10000,
+            StimStepSize.StimStepSizeMax: float('nan')
+        }[self]

pyxdaq/datablock.py

@@ -0,0 +1,155 @@
+import struct
+from dataclasses import dataclass
+from typing import List, Union
+
+import numpy as np
+
+_uint16le = np.dtype('u2').newbyteorder('<')
+_uint32le = np.dtype('u4').newbyteorder('<')
+_RHD_HEADER_MAGIC = 0xD7A22AAA38132A53
+_RHS_HEADER_MAGIC = 0x8D542C8A49712F0B
+
+
+@dataclass
+class Sample:
+    """
+    Represents a single sample at time `ts` from the XDAQ data stream.
+    """
+    ts: int
+    aux: np.ndarray
+    amp: np.ndarray
+    adc: np.ndarray
+    ttlin: np.ndarray
+    ttlout: np.ndarray
+    dac: Union[None, np.ndarray]
+    stim: Union[None, np.ndarray]
+
+    @classmethod
+    def from_buffer(
+        cls, rhs: bool, buffer: Union[bytearray, memoryview], datastreams: int
+    ) -> 'Sample':
+        """
+        Deserialize a single sample from a buffer.
+        Keeps the same memory layout as the original data for further optimization.
+        """
+        idx = 0
+        magic, ts = struct.unpack("<QI", buffer[idx:12])
+        if magic != (_RHS_HEADER_MAGIC if rhs else _RHD_HEADER_MAGIC):
+            raise ValueError(f"Invalid magic: {magic:016X}")
+        idx += 12
+
+        aux = np.frombuffer(
+            buffer[idx:], dtype=_uint16le, count=3 * datastreams * (2 if rhs else 1)
+        ).reshape([3, datastreams] + ([2] if rhs else []))
+        idx += 3 * datastreams * 2 * (2 if rhs else 1)
+
+        amp = np.frombuffer(
+            buffer[idx:],
+            dtype=_uint16le,
+            count=(16 if rhs else 32) * datastreams * (2 if rhs else 1)
+        ).reshape([16 if rhs else 32, datastreams] + ([2] if rhs else []))
+        idx += (16 if rhs else 32) * datastreams * 2 * (2 if rhs else 1)
+
+        if rhs:
+            aux0 = np.frombuffer(
+                buffer[idx:], dtype=_uint16le, count=1 * datastreams * 2
+            ).reshape((1, datastreams, 2))
+            aux = np.concatenate((aux0, aux), axis=0)
+            idx += 1 * datastreams * 2 * 2
+
+            stim = np.frombuffer(
+                buffer[idx:], dtype=_uint16le, count=4 * datastreams
+            ).reshape(4, datastreams)
+            idx += 4 * datastreams * 2
+            idx += 4
+
+            dac = np.frombuffer(buffer[idx:], dtype=_uint16le, count=8)
+            idx += 16
+        else:
+            stim = None
+            dac = None
+            idx += 2 * ((datastreams + 2) % 4)  # padding
+
+        adc = np.frombuffer(buffer[idx:], dtype=_uint16le, count=8)
+        idx += 16
+
+        ttlin = np.frombuffer(buffer[idx:], dtype=_uint32le, count=1)
+        idx += 4
+
+        ttlout = np.frombuffer(buffer[idx:], dtype=_uint32le, count=1)
+        idx += 4
+        return cls(ts, aux, amp, adc, ttlin, ttlout, dac, stim)
+
+
+@dataclass
+class Samples(Sample):
+    """
+    A collection of samples, the first dimension represents the sample index.
+    """
+    n: int
+
+    def device_name(self):
+        if self.n != 128:
+            raise ValueError("Unable to determine device name for non-128 sample data block")
+        if self.stim is None:
+            return self.aux[[32, 33, 34, 35, 36, 24, 25, 26], 2, :]
+        else:
+            rom = self.aux[:, 0, :, :][58:61, :, 0]
+            aux = np.array(rom).view(np.uint8).reshape(
+                (rom.shape[0], rom.shape[1], 2)
+            ).transpose(1, 0, 2).reshape((rom.shape[1], -1))
+            return aux[:, :0:-1].T
+
+    def device_id(self):
+        if self.n != 128:
+            raise ValueError("Unable to determine device ID for non-128 sample data block")
+        if self.stim is None:
+            return self.aux[19, 2, :], self.aux[23, 2, :]
+        else:
+            rom = self.aux[:, 0, :, :][56:58, :, 0]
+            aux = np.array(rom).view(np.uint8).reshape(
+                (rom.shape[0], rom.shape[1], 2)
+            ).transpose(1, 0, 2).reshape((rom.shape[1], -1))
+            return aux[:, 0].T, np.zeros_like(aux[:, 0].T)
+
+
+@dataclass
+class DataBlock:
+    """
+    Raw data block which keeps the original memory layout.
+    """
+    samples: List[Sample]
+    # Samples x C x Datastreams : [C x Datastreams] [C x Datastreams] ... [C x Datastreams]
+
+    @classmethod
+    def from_buffer(
+        cls, rhs, sample_size, buffer: Union[bytearray, memoryview], datastreams: int
+    ) -> 'DataBlock':
+        return cls(
+            [
+                Sample.from_buffer(rhs, buffer[i:i + sample_size], datastreams)
+                for i in range(0, len(buffer), sample_size)
+            ]
+        )
+
+    def to_samples(self) -> Samples:
+        """
+        Concatenate all samples into a single Samples object.
+        This method breaks the original memory layout.
+        """
+        return Samples(
+            np.array([s.ts for s in self.samples]), np.stack([s.aux for s in self.samples]),
+            np.stack([s.amp for s in self.samples]), np.stack([s.adc for s in self.samples]),
+            np.stack([s.ttlin for s in self.samples]), np.stack([s.ttlout for s in self.samples]),
+            None if self.samples[0].dac is None else np.stack([s.dac for s in self.samples]),
+            None if self.samples[0].dac is None else np.stack([s.stim for s in self.samples]),
+            len(self.samples)
+        )
+
+
+def amplifier2mv(amp: np.array):
+    return (amp.astype(np.float32) - 32768) * 0.195
+
+
+def adc2v(adc: np.array):
+    return (adc.astype(np.float32) - 32768) * 0.0003125

pyxdaq/gen2.py

@@ -0,0 +1,61 @@
+import math
+from typing import Union
+
+import numpy as np
+
+from .xdaq import XDAQ
+
+
+def upload_waveform(xdaq: XDAQ, waveform: np.ndarray, idx: int, divisor: int):
+    if waveform.dtype != np.uint16:
+        raise TypeError(f'Only 16 bits resolution for waveform, get {waveform.dtype}')
+    for i, val in enumerate(waveform.astype(np.uint32)):
+        xdaq.dev.set_register(0x2008 + idx * 8, int(val) | (i << 16) | (1 << 31), 0xFFFFFFFF)
+    xdaq.dev.set_register(0x200C + idx * 8, divisor | (len(waveform) - 1) << 16, 0xFFFFFFFF)
+
+
+def config_waveform(xdaq: XDAQ, enable: int):
+    xdaq.dev.set_register(0x2004, enable, 15)  # enable
+    xdaq.dev.set_register(0x2000, enable, 15)  # reset enabled
+
+
+def config_channel(xdaq: XDAQ, channel: int, waveform: Union[int, None]):
+    if waveform is None:
+        xdaq.dev.set_register(0x2028 + 4 * channel, 0 | (0 << 31), 0xFFFFFFFF)
+    else:
+        xdaq.dev.set_register(0x2028 + 4 * channel, waveform | (1 << 31), 0xFFFFFFFF)
+
+
+def get_sine(period, amp=32768):
+    return np.clip(
+        (32768 + amp * np.sin(np.linspace(0, np.pi * 2, period, endpoint=False))).astype(np.int32),
+        0,
+        65535,
+    ).astype(np.uint16)
+
+
+def approximate_waveform_param(
+    target_freq: float,
+    tolerance: float = 0,
+    clock: int = int(125e6),
+    min_div: int = 1024,
+    max_div: int = 65535,
+    min_period: int = 32,
+    max_period: int = 1024,
+):
+    d = clock / target_freq
+    best = float('inf')
+    best_param = None
+    for period in range(max_period, min_period, -1):
+        a = max(int(math.floor(d / period)), min_div)
+        b = min(int(math.ceil(d / period)), max_div)
+        for div in range(a, b + 1):
+            if d / period == div:
+                return (period, div)
+            resudial = abs(clock / period / div - target_freq)
+            if resudial < tolerance:
+                return (period, div)
+            if resudial < best:
+                best = resudial
+                best_param = (period, div)
+    return best_param