peakrdl-busdecoder 0.6.3__py3-none-any.whl → 0.6.5__py3-none-any.whl

peakrdl_busdecoder/__peakrdl__.py

@@ -1,3 +1,5 @@
+from __future__ import annotations
+
 import functools
 from typing import TYPE_CHECKING, Any
 
@@ -69,7 +71,7 @@ class Exporter(ExporterSubcommandPlugin):
     def get_cpuifs(self) -> dict[str, type[BaseCpuif]]:
         return get_cpuifs(map(tuple, self.cfg["cpuifs"].items()))
 
-    def add_exporter_arguments(self, arg_group: "argparse.ArgumentParser") -> None:  # type: ignore
+    def add_exporter_arguments(self, arg_group: argparse._ActionsContainer) -> None:
         cpuifs = self.get_cpuifs()
 
         arg_group.add_argument(
@@ -122,7 +124,7 @@ class Exporter(ExporterSubcommandPlugin):
             """,
         )
 
-    def do_export(self, top_node: "AddrmapNode", options: "argparse.Namespace") -> None:
+    def do_export(self, top_node: AddrmapNode, options: argparse.Namespace) -> None:
         cpuifs = self.get_cpuifs()
 
         x = BusDecoderExporter()

peakrdl_busdecoder/cpuif/apb3/apb3_cpuif.py

@@ -45,7 +45,7 @@ class APB3Cpuif(BaseCpuif):
         fanout[self.signal("PADDR", node, "gi")] = self.signal("PADDR")
         fanout[self.signal("PWDATA", node, "gi")] = "cpuif_wr_data"
 
-        return "\n".join(map(lambda kv: f"assign {kv[0]} = {kv[1]};", fanout.items()))
+        return "\n".join(f"assign {kv[0]} = {kv[1]};" for kv in fanout.items())
 
     def fanin(self, node: AddressableNode | None = None) -> str:
         fanin: dict[str, str] = {}
@@ -64,7 +64,7 @@ class APB3Cpuif(BaseCpuif):
                 fanin["cpuif_rd_ack"] = self.signal("PREADY", node, "i")
                 fanin["cpuif_rd_err"] = self.signal("PSLVERR", node, "i")
 
-        return "\n".join(map(lambda kv: f"{kv[0]} = {kv[1]};", fanin.items()))
+        return "\n".join(f"{kv[0]} = {kv[1]};" for kv in fanin.items())
 
     def readback(self, node: AddressableNode | None = None) -> str:
         fanin: dict[str, str] = {}
@@ -80,7 +80,7 @@ class APB3Cpuif(BaseCpuif):
             else:
                 fanin["cpuif_rd_data"] = self.signal("PRDATA", node, "i")
 
-        return "\n".join(map(lambda kv: f"{kv[0]} = {kv[1]};", fanin.items()))
+        return "\n".join(f"{kv[0]} = {kv[1]};" for kv in fanin.items())
 
     def fanin_intermediate_assignments(
         self, node: AddressableNode, inst_name: str, array_idx: str, master_prefix: str, indexed_path: str

peakrdl_busdecoder/cpuif/apb3/apb3_cpuif_flat.py

@@ -51,7 +51,7 @@ class APB3CpuifFlat(BaseCpuif):
         fanout[self.signal("PADDR", node, "gi")] = f"{{{'-'.join(addr_comp)}}}[{clog2(node.size) - 1}:0]"
         fanout[self.signal("PWDATA", node, "gi")] = "cpuif_wr_data"
 
-        return "\n".join(map(lambda kv: f"assign {kv[0]} = {kv[1]};", fanout.items()))
+        return "\n".join(f"assign {kv[0]} = {kv[1]};" for kv in fanout.items())
 
     def fanin(self, node: AddressableNode | None = None) -> str:
         fanin: dict[str, str] = {}
@@ -62,7 +62,7 @@ class APB3CpuifFlat(BaseCpuif):
             fanin["cpuif_rd_ack"] = self.signal("PREADY", node, "i")
             fanin["cpuif_rd_err"] = self.signal("PSLVERR", node, "i")
 
-        return "\n".join(map(lambda kv: f"{kv[0]} = {kv[1]};", fanin.items()))
+        return "\n".join(f"{kv[0]} = {kv[1]};" for kv in fanin.items())
 
     def readback(self, node: AddressableNode | None = None) -> str:
         fanin: dict[str, str] = {}
@@ -71,4 +71,4 @@ class APB3CpuifFlat(BaseCpuif):
         else:
             fanin["cpuif_rd_data"] = self.signal("PRDATA", node, "i")
 
-        return "\n".join(map(lambda kv: f"{kv[0]} = {kv[1]};", fanin.items()))
+        return "\n".join(f"{kv[0]} = {kv[1]};" for kv in fanin.items())

peakrdl_busdecoder/cpuif/apb4/apb4_cpuif.py

@@ -48,7 +48,7 @@ class APB4Cpuif(BaseCpuif):
         fanout[self.signal("PWDATA", node, "gi")] = "cpuif_wr_data"
         fanout[self.signal("PSTRB", node, "gi")] = "cpuif_wr_byte_en"
 
-        return "\n".join(map(lambda kv: f"assign {kv[0]} = {kv[1]};", fanout.items()))
+        return "\n".join(f"assign {kv[0]} = {kv[1]};" for kv in fanout.items())
 
     def fanin(self, node: AddressableNode | None = None) -> str:
         fanin: dict[str, str] = {}
@@ -67,7 +67,7 @@ class APB4Cpuif(BaseCpuif):
                 fanin["cpuif_rd_ack"] = self.signal("PREADY", node, "i")
                 fanin["cpuif_rd_err"] = self.signal("PSLVERR", node, "i")
 
-        return "\n".join(map(lambda kv: f"{kv[0]} = {kv[1]};", fanin.items()))
+        return "\n".join(f"{kv[0]} = {kv[1]};" for kv in fanin.items())
 
     def readback(self, node: AddressableNode | None = None) -> str:
         fanin: dict[str, str] = {}
@@ -83,7 +83,7 @@ class APB4Cpuif(BaseCpuif):
             else:
                 fanin["cpuif_rd_data"] = self.signal("PRDATA", node, "i")
 
-        return "\n".join(map(lambda kv: f"{kv[0]} = {kv[1]};", fanin.items()))
+        return "\n".join(f"{kv[0]} = {kv[1]};" for kv in fanin.items())
 
     def fanin_intermediate_assignments(
         self, node: AddressableNode, inst_name: str, array_idx: str, master_prefix: str, indexed_path: str

peakrdl_busdecoder/cpuif/apb4/apb4_cpuif_flat.py

@@ -53,7 +53,7 @@ class APB4CpuifFlat(BaseCpuif):
         fanout[self.signal("PWDATA", node, "gi")] = "cpuif_wr_data"
         fanout[self.signal("PSTRB", node, "gi")] = "cpuif_wr_byte_en"
 
-        return "\n".join(map(lambda kv: f"assign {kv[0]} = {kv[1]};", fanout.items()))
+        return "\n".join(f"assign {kv[0]} = {kv[1]};" for kv in fanout.items())
 
     def fanin(self, node: AddressableNode | None = None) -> str:
         fanin: dict[str, str] = {}
@@ -64,7 +64,7 @@ class APB4CpuifFlat(BaseCpuif):
             fanin["cpuif_rd_ack"] = self.signal("PREADY", node, "i")
             fanin["cpuif_rd_err"] = self.signal("PSLVERR", node, "i")
 
-        return "\n".join(map(lambda kv: f"{kv[0]} = {kv[1]};", fanin.items()))
+        return "\n".join(f"{kv[0]} = {kv[1]};" for kv in fanin.items())
 
     def readback(self, node: AddressableNode | None = None) -> str:
         fanin: dict[str, str] = {}
@@ -73,4 +73,4 @@ class APB4CpuifFlat(BaseCpuif):
         else:
             fanin["cpuif_rd_data"] = self.signal("PRDATA", node, "i")
 
-        return "\n".join(map(lambda kv: f"{kv[0]} = {kv[1]};", fanin.items()))
+        return "\n".join(f"{kv[0]} = {kv[1]};" for kv in fanin.items())

peakrdl_busdecoder/cpuif/base_cpuif.py

@@ -82,15 +82,15 @@ class BaseCpuif:
             loader=loader,
             undefined=jj.StrictUndefined,
         )
-        jj_env.tests["array"] = self.check_is_array  # type: ignore
-        jj_env.filters["clog2"] = clog2  # type: ignore
-        jj_env.filters["is_pow2"] = is_pow2  # type: ignore
-        jj_env.filters["roundup_pow2"] = roundup_pow2  # type: ignore
-        jj_env.filters["address_slice"] = self.get_address_slice  # type: ignore
-        jj_env.filters["get_path"] = lambda x: get_indexed_path(self.exp.ds.top_node, x, "i")  # type: ignore
-        jj_env.filters["walk"] = self.exp.walk  # type: ignore
-
-        context = {  # type: ignore
+        jj_env.tests["array"] = self.check_is_array
+        jj_env.filters["clog2"] = clog2
+        jj_env.filters["is_pow2"] = is_pow2
+        jj_env.filters["roundup_pow2"] = roundup_pow2
+        jj_env.filters["address_slice"] = self.get_address_slice
+        jj_env.filters["get_path"] = lambda x: get_indexed_path(self.exp.ds.top_node, x, "i")
+        jj_env.filters["walk"] = self.exp.walk
+
+        context = {
             "cpuif": self,
             "ds": self.exp.ds,
             "fanout": FanoutGenerator,

peakrdl_busdecoder/cpuif/interface.py

@@ -78,7 +78,7 @@ class SVInterface(Interface):
 
             # When unrolled, current_idx is set - append it to the name
             if child.current_idx is not None:
-                base = f"{base}_{'_'.join(map(str, child.current_idx))}"
+                base = f"{base}_{'_'.join(map(str, child.current_idx))}"  # ty: ignore
 
             # Only add array dimensions if this should be treated as an array
             if self.cpuif.check_is_array(child):

peakrdl_busdecoder/exporter.py

@@ -1,5 +1,4 @@
 import os
-from datetime import datetime
 from importlib.metadata import version
 from pathlib import Path
 from typing import TYPE_CHECKING, Any, TypedDict
@@ -59,9 +58,9 @@ class BusDecoderExporter:
             loader=c_loader,
             undefined=jj.StrictUndefined,
         )
-        self.jj_env.filters["kwf"] = kwf  # type: ignore
-        self.jj_env.filters["walk"] = self.walk  # type: ignore
-        self.jj_env.filters["clog2"] = clog2  # type: ignore
+        self.jj_env.filters["kwf"] = kwf
+        self.jj_env.filters["walk"] = self.walk
+        self.jj_env.filters["clog2"] = clog2
 
     def export(self, node: RootNode | AddrmapNode, output_dir: str, **kwargs: Unpack[ExporterKwargs]) -> None:
         """
@@ -99,7 +98,7 @@ class BusDecoderExporter:
         else:
             top_node = node
 
-        self.ds = DesignState(top_node, kwargs)
+        self.ds = DesignState(top_node, kwargs)  # ty: ignore
 
         cpuif_cls: type[BaseCpuif] = kwargs.pop("cpuif_cls", None) or APB4Cpuif
 
@@ -114,8 +113,7 @@ class BusDecoderExporter:
         DesignValidator(self).do_validate()
 
         # Build Jinja template context
-        context = {  # type: ignore
-            "current_date": datetime.now().strftime("%Y-%m-%d"),
+        context = {
             "version": version("peakrdl-busdecoder"),
             "cpuif": self.cpuif,
             "cpuif_decode": DecodeLogicGenerator,

peakrdl_busdecoder/module_tmpl.sv

@@ -3,7 +3,6 @@
 //  Description: CPU Interface Bus Decoder
 //  Author: PeakRDL-BusDecoder
 //  License: LGPL-3.0
-//  Date: {{current_date}}
 //  Version: {{version}}
 //  Links:
 //    - https://github.com/arnavsacheti/PeakRDL-BusDecoder

peakrdl_busdecoder/package_tmpl.sv

@@ -3,7 +3,6 @@
 //  Description: CPU Interface Bus Decoder Package
 //  Author: PeakRDL-BusDecoder
 //  License: LGPL-3.0
-//  Date: {{current_date}}
 //  Version: {{version}}
 //  Links:
 //    - https://github.com/arnavsacheti/PeakRDL-BusDecoder

peakrdl_busdecoder/utils.py

@@ -62,7 +62,6 @@ def ref_is_internal(top_node: AddrmapNode, ref: Node | PropertyReference) -> boo
     else:
         current_node = ref
 
-    # pyrefly: ignore[bad-assignment] - false positive due to circular type checking
     while current_node is not None:
         if current_node == top_node:
             # reached top node without finding any external components

peakrdl_busdecoder/validate_design.py

@@ -74,7 +74,9 @@ class DesignValidator(RDLListener):
                 f"instance '{node.inst_name}' must be a multiple of {alignment}",
                 node.inst.inst_src_ref,
             )
-        if node.is_array and (node.array_stride % alignment) != 0:  # type: ignore # is_array implies stride is not none
+        if node.is_array and (
+            node.array_stride is not None and (node.array_stride % alignment) != 0
+        ):  # is_array implies stride is not none
             self.msg.error(
                 "Unaligned registers are not supported. Address stride of "
                 f"instance array '{node.inst_name}' must be a multiple of {alignment}",

{peakrdl_busdecoder-0.6.3.dist-info → peakrdl_busdecoder-0.6.5.dist-info}/METADATA

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: peakrdl-busdecoder
-Version: 0.6.3
+Version: 0.6.5
 Summary: Generate a SystemVerilog bus decoder from SystemRDL for splitting CPU interfaces to multiple sub-address spaces
 Author: Arnav Sacheti
 License: LGPLv3

{peakrdl_busdecoder-0.6.3.dist-info → peakrdl_busdecoder-0.6.5.dist-info}/RECORD

@@ -1,18 +1,18 @@
 peakrdl_busdecoder/__init__.py,sha256=zKSEa8EqCrZUtGoHCuZ0uNQVQMV2isVn47CgsDj5K48,75
-peakrdl_busdecoder/__peakrdl__.py,sha256=76kLBbSWVlKkCI5ESiID1aWVcQHr4sK32ujP5kna8xU,4601
+peakrdl_busdecoder/__peakrdl__.py,sha256=TtP7daoKSy-x53x6b62xlZu6lQJ6Vp3-v_OqnpsGcig,4618
 peakrdl_busdecoder/decode_logic_gen.py,sha256=q4qSmufJI28eX75A532BOoNfIufljq3gHNLdqKbRqio,6060
 peakrdl_busdecoder/design_scanner.py,sha256=syD6IXAJWYdpq2PQPvUGflPjhR_pO35R46Ld5K5XZHQ,1562
 peakrdl_busdecoder/design_state.py,sha256=_zqgn2dQH2ozK63NwqRvPV7Bty7G-BAESu3yux2cJmI,4926
-peakrdl_busdecoder/exporter.py,sha256=ZkGBeK-c733a3Xyc2ZeiGbWgBnDDW_s9nc64QiEf6no,5356
+peakrdl_busdecoder/exporter.py,sha256=MbIcKK9ttXNhxJ2J8x8EvNO4QBzo60OnbqXH4KtjuPc,5211
 peakrdl_busdecoder/identifier_filter.py,sha256=poSIS1BMscORxOuDX_nXqvdNzClhKASdAVv9aDM_aqA,3972
 peakrdl_busdecoder/listener.py,sha256=WZ2fma6oSpGGZwuP7Zcv1futWBalaeZeVZD7DX1KQz4,2509
-peakrdl_busdecoder/module_tmpl.sv,sha256=Sjo05-g_oP48x0jCdEyOvpBjwYV3wiACESgaC7viN00,2877
-peakrdl_busdecoder/package_tmpl.sv,sha256=E0_jYmXx1nEMb78WApbCvMWYlrAuNfSWB7Jw23UkBYU,852
+peakrdl_busdecoder/module_tmpl.sv,sha256=g0g7Xij4ol2H_g8sw9o1_lZdMf78eVyt95AROzc__nU,2850
+peakrdl_busdecoder/package_tmpl.sv,sha256=VWPkW7LpZTKuK7BMtpCqLxgyi9u5Fh6fwCRq7ag7BVk,825
 peakrdl_busdecoder/py.typed,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
 peakrdl_busdecoder/struct_gen.py,sha256=UGNdGg-S6u2JRoDExP6Mt5h3bu01fP-gQ15FcwD9gNw,2334
 peakrdl_busdecoder/sv_int.py,sha256=D57h4sgqnQWQtPw80OeDZk_i2_t2aOTsihmASB4NkGo,1788
-peakrdl_busdecoder/utils.py,sha256=Kdcee6bhubI5XVX20JQ3wo0qYJTknqrv4l8kxhSd7wI,2219
-peakrdl_busdecoder/validate_design.py,sha256=74MM3MC1kII0s2HqfEBvhWvD2rummn429X7qmtPjsSI,7523
+peakrdl_busdecoder/utils.py,sha256=MeLWATeumUKlfobuoI6yL3nx9Mk8BNZeKD9xq0e8I6U,2134
+peakrdl_busdecoder/validate_design.py,sha256=DyGhOR61kd-Lrd34q9hQZWMk7_D0LrMWHoLbzk9tRAM,7566
 peakrdl_busdecoder/body/__init__.py,sha256=ZFTs8xIxeLyasyabLtGp7kClmmLlJpqdKJ854pmvTJg,311
 peakrdl_busdecoder/body/body.py,sha256=X4T3iCr94cgoz76tt2WtvhGGCweUFpUr9ogD6ol0LIg,466
 peakrdl_busdecoder/body/combinational_body.py,sha256=2FqbGHi405oEMAKlBfXz4hnLSn8Sr60kkFIUcL9oXf4,195
@@ -20,19 +20,19 @@ peakrdl_busdecoder/body/for_loop_body.py,sha256=lJYfDiB7MF9_mfbGEApoVHRViBCqpGRs
 peakrdl_busdecoder/body/if_body.py,sha256=S4oVS7yz04R1i-23W-aWpVcVZa5dW-H0FL_KnMy-Wsc,3261
 peakrdl_busdecoder/body/struct_body.py,sha256=74ItYoYD-GqEidxc-ncV5y8fzGoM47NI4GnnweclmS8,624
 peakrdl_busdecoder/cpuif/__init__.py,sha256=T8YrELGuOBIPgj1e86tNJ5tSCf7fXpPadqa71v5MEx8,59
-peakrdl_busdecoder/cpuif/base_cpuif.py,sha256=PBRPLAkg_QYVnHXsd0O7gQhRGqJzJQlZh_HGSk6vRGg,5113
+peakrdl_busdecoder/cpuif/base_cpuif.py,sha256=-5bI43pbcPVYhvS0AEYgMkCBxkhnqmx9jLMazzT0z5k,4985
 peakrdl_busdecoder/cpuif/fanin_gen.py,sha256=ioCxjj3V3X8rHssqwuI4p_U-LKpBalATW_Qshtt8j9U,2425
 peakrdl_busdecoder/cpuif/fanin_intermediate_gen.py,sha256=hfvMyyx5ajEzvop3dzV37dT6Jn9yjORFnUkMAT1034A,5271
 peakrdl_busdecoder/cpuif/fanout_gen.py,sha256=-kopGBHC07D9VreygfN0VubHGVVO51og4lAFq6B1oV8,1876
-peakrdl_busdecoder/cpuif/interface.py,sha256=4NYJHv2rr50YLm_eB9I89Y4XUckMD42ZtHskU0_Nm8o,6448
+peakrdl_busdecoder/cpuif/interface.py,sha256=0xp_4K6DZMGOePbFgLEOIaVemjMS5pnQp7izKmzgu4s,6462
 peakrdl_busdecoder/cpuif/apb3/__init__.py,sha256=Uq82IJHzlITUvjTuETvPpSzvLEYoairzzPKfPz7kuC4,119
-peakrdl_busdecoder/cpuif/apb3/apb3_cpuif.py,sha256=Gst5RM2Qwpk-OxBjLE6mK2SAuN7xqV1nMi79AvD4q5Y,4303
-peakrdl_busdecoder/cpuif/apb3/apb3_cpuif_flat.py,sha256=Hv-JNx3LBbxOWYnud97XS26G3OvNCrbMis_T6zkYhmw,2718
+peakrdl_busdecoder/cpuif/apb3/apb3_cpuif.py,sha256=71hIN2RtoyaR6ehqH9vTPh_e_XnO1azBknmTvC3hAeE,4282
+peakrdl_busdecoder/cpuif/apb3/apb3_cpuif_flat.py,sha256=kdq6My7fjq233DUmwn_7VVFgqqnbZ-QMS4HEoI702MQ,2697
 peakrdl_busdecoder/cpuif/apb3/apb3_interface.py,sha256=PQwMtjETR9-c9S1BzjdWieCis2qoOfUyRQAWcD3ScyE,2170
 peakrdl_busdecoder/cpuif/apb3/apb3_tmpl.sv,sha256=6et25KbiNkZBD1hxjSx0XZFUP9NnvVpixMSGtwJuwdA,1967
 peakrdl_busdecoder/cpuif/apb4/__init__.py,sha256=k4JCbIrKGT8hiRvWJDcqc5xx7j9i_xYgpXU70sNaLsc,119
-peakrdl_busdecoder/cpuif/apb4/apb4_cpuif.py,sha256=HarcUUxJcWLraijVaqHVWQOW_9TERD-fyfo3m_uzVhw,4512
-peakrdl_busdecoder/cpuif/apb4/apb4_cpuif_flat.py,sha256=4uNfunrRR8uu0WcgUZFilFlj-Og1eJDKBDT4aMps4wI,2860
+peakrdl_busdecoder/cpuif/apb4/apb4_cpuif.py,sha256=Fg1CL4tfu0IyQLf1pDRPNP__5ZwZKEZN9es7VecAc5k,4491
+peakrdl_busdecoder/cpuif/apb4/apb4_cpuif_flat.py,sha256=4nXU_Fgw2Bro9yxJhXjf5OEHf4kQjLzL05SrCbEVM1g,2839
 peakrdl_busdecoder/cpuif/apb4/apb4_interface.py,sha256=dnVWHi1NZScIR7sLYVfxbJDrU-Fm221O1XvHMdpSyi4,2472
 peakrdl_busdecoder/cpuif/apb4/apb4_tmpl.sv,sha256=woX7UBWvg_mtnrBKSel60p269d1sFgGelzgA5kISxew,2020
 peakrdl_busdecoder/cpuif/axi4lite/__init__.py,sha256=5XuWfPK2jDzr6egKUDJFr8l3k3lW-feLIh-lN7Mo8Ks,145
@@ -41,9 +41,9 @@ peakrdl_busdecoder/cpuif/axi4lite/axi4_lite_cpuif_flat.py,sha256=47yz1o6yoGFyoIs
 peakrdl_busdecoder/cpuif/axi4lite/axi4_lite_interface.py,sha256=EXW-nPJwMF_oCPdJ4XmreiLwhnpqSca9iViosh2rEXM,3721
 peakrdl_busdecoder/cpuif/axi4lite/axi4_lite_tmpl.sv,sha256=ketPrq715LSEs8Ar9ecXgnSe2AUAdQ70oNVmDbXc2Tc,3351
 peakrdl_busdecoder/udps/__init__.py,sha256=gPc74OMVWTIr5vgtFArzbhEyi1OYjllR3ZFwHJ8APaY,106
-peakrdl_busdecoder-0.6.3.dist-info/licenses/LICENSE,sha256=eAMIGRcnsTDZVr4qelHkJ49Rd_IiDY4_MVHU7N0UWSw,7646
-peakrdl_busdecoder-0.6.3.dist-info/METADATA,sha256=rQjXAQ5lEhiT7PIKdvIW8ecDc9El5aeEbGr2y5P5bAY,2797
-peakrdl_busdecoder-0.6.3.dist-info/WHEEL,sha256=_zCd3N1l69ArxyTb8rzEoP9TpbYXkqRFSNOD5OuxnTs,91
-peakrdl_busdecoder-0.6.3.dist-info/entry_points.txt,sha256=7Xzgt-C2F4cQu1kRLpZa0MbXSFFMC1SWEDnZkY0GH7s,73
-peakrdl_busdecoder-0.6.3.dist-info/top_level.txt,sha256=ZIYuTsl8cYby4g8tNR_JGzbYYTrG9mqYLSBqnY1Gpmk,19
-peakrdl_busdecoder-0.6.3.dist-info/RECORD,,
+peakrdl_busdecoder-0.6.5.dist-info/licenses/LICENSE,sha256=eAMIGRcnsTDZVr4qelHkJ49Rd_IiDY4_MVHU7N0UWSw,7646
+peakrdl_busdecoder-0.6.5.dist-info/METADATA,sha256=OVIXfBAAbfNLR-3lgk6QSMWaV-KecglM3m7KPPMUq7c,2797
+peakrdl_busdecoder-0.6.5.dist-info/WHEEL,sha256=_zCd3N1l69ArxyTb8rzEoP9TpbYXkqRFSNOD5OuxnTs,91
+peakrdl_busdecoder-0.6.5.dist-info/entry_points.txt,sha256=7Xzgt-C2F4cQu1kRLpZa0MbXSFFMC1SWEDnZkY0GH7s,73
+peakrdl_busdecoder-0.6.5.dist-info/top_level.txt,sha256=ZIYuTsl8cYby4g8tNR_JGzbYYTrG9mqYLSBqnY1Gpmk,19
+peakrdl_busdecoder-0.6.5.dist-info/RECORD,,