peakrdl-busdecoder 0.6.1__py3-none-any.whl → 0.6.4__py3-none-any.whl

peakrdl_busdecoder/cpuif/apb4/apb4_tmpl.sv

@@ -6,8 +6,6 @@
         assert_bad_data_width: assert($bits({{cpuif.signal("PWDATA")}}) == {{ds.package_name}}::{{ds.module_name|upper}}_DATA_WIDTH)
             else $error("Interface data width of %0d is incorrect. Shall be %0d bits", $bits({{cpuif.signal("PWDATA")}}), {{ds.package_name}}::{{ds.module_name|upper}}_DATA_WIDTH);
     end
-    assert_wr_sel: assert property (@(posedge {{cpuif.signal("PCLK")}}) {{cpuif.signal("PSEL")}} && {{cpuif.signal("PWRITE")}} |-> ##1 ({{cpuif.signal("PREADY")}} || {{cpuif.signal("PSLVERR")}}))
-        else $error("APB4 Slave port SEL implies that cpuif_wr_sel must be one-hot encoded");
 `endif
 {%- endif %}
 

peakrdl_busdecoder/exporter.py

@@ -1,5 +1,4 @@
 import os
-from datetime import datetime
 from importlib.metadata import version
 from pathlib import Path
 from typing import TYPE_CHECKING, Any, TypedDict
@@ -115,7 +114,6 @@ class BusDecoderExporter:
 
         # Build Jinja template context
         context = {  # type: ignore
-            "current_date": datetime.now().strftime("%Y-%m-%d"),
             "version": version("peakrdl-busdecoder"),
             "cpuif": self.cpuif,
             "cpuif_decode": DecodeLogicGenerator,

peakrdl_busdecoder/module_tmpl.sv

@@ -3,7 +3,6 @@
 //  Description: CPU Interface Bus Decoder
 //  Author: PeakRDL-BusDecoder
 //  License: LGPL-3.0
-//  Date: {{current_date}}
 //  Version: {{version}}
 //  Links:
 //    - https://github.com/arnavsacheti/PeakRDL-BusDecoder

peakrdl_busdecoder/package_tmpl.sv

@@ -3,7 +3,6 @@
 //  Description: CPU Interface Bus Decoder Package
 //  Author: PeakRDL-BusDecoder
 //  License: LGPL-3.0
-//  Date: {{current_date}}
 //  Version: {{version}}
 //  Links:
 //    - https://github.com/arnavsacheti/PeakRDL-BusDecoder

peakrdl_busdecoder/validate_design.py

@@ -4,7 +4,7 @@ from systemrdl.node import AddressableNode, AddrmapNode, FieldNode, Node, Regfil
 from systemrdl.rdltypes.references import PropertyReference
 from systemrdl.walker import RDLListener, RDLWalker, WalkerAction
 
-from .utils import is_pow2, ref_is_internal, roundup_pow2
+from .utils import ref_is_internal
 
 if TYPE_CHECKING:
     from .exporter import BusDecoderExporter
@@ -159,27 +159,3 @@ class DesignValidator(RDLListener):
             else:
                 # Exiting top addrmap. Resolve final answer
                 self.contains_external_block = contains_external_block
-
-            if contains_external_block:
-                # Check that addressing follows strict alignment rules to allow
-                # for simplified address bit-pruning
-                if node.external:
-                    err_suffix = "is external"
-                else:
-                    err_suffix = "contains an external addrmap/regfile/mem"
-
-                req_align = roundup_pow2(node.size)
-                if (node.raw_address_offset % req_align) != 0:
-                    self.msg.error(
-                        f"Address offset +0x{node.raw_address_offset:x} of instance '{node.inst_name}' is not a power of 2 multiple of its size 0x{node.size:x}. "
-                        f"This is required by the busdecoder exporter if a component {err_suffix}.",
-                        node.inst.inst_src_ref,
-                    )
-                if node.is_array:
-                    assert node.array_stride is not None
-                    if not is_pow2(node.array_stride):
-                        self.msg.error(
-                            f"Address stride of instance array '{node.inst_name}' is not a power of 2"
-                            f"This is required by the busdecoder exporter if a component {err_suffix}.",
-                            node.inst.inst_src_ref,
-                        )

{peakrdl_busdecoder-0.6.1.dist-info → peakrdl_busdecoder-0.6.4.dist-info}/METADATA

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: peakrdl-busdecoder
-Version: 0.6.1
+Version: 0.6.4
 Summary: Generate a SystemVerilog bus decoder from SystemRDL for splitting CPU interfaces to multiple sub-address spaces
 Author: Arnav Sacheti
 License: LGPLv3
@@ -26,9 +26,10 @@ Provides-Extra: cli
 Requires-Dist: peakrdl-cli>=1.2.3; extra == "cli"
 Dynamic: license-file
 
-[![Documentation Status](https://readthedocs.org/projects/peakrdl-busdecoder/badge/?version=latest)](http://peakrdl-busdecoder.readthedocs.io)
-[![build](https://github.com/arnavsacheti/PeakRDL-BusDecoder/workflows/build/badge.svg)](https://github.com/arnavsacheti/PeakRDL-BusDecoder/actions?query=workflow%3Abuild+branch%3Amain)
-[![Coverage Status](https://coveralls.io/repos/github/arnavsacheti/PeakRDL-BusDecoder/badge.svg?branch=main)](https://coveralls.io/github/arnavsacheti/PeakRDL-BusDecoder?branch=main)
+[![Build](https://github.com/arnavsacheti/PeakRDL-BusDecoder/actions/workflows/build.yml/badge.svg)](https://github.com/arnavsacheti/PeakRDL-BusDecoder/actions/workflows/build.yml)
+[![Test](https://github.com/arnavsacheti/PeakRDL-BusDecoder/actions/workflows/test.yml/badge.svg)](https://github.com/arnavsacheti/PeakRDL-BusDecoder/actions/workflows/test.yml)
+[![Documentation](https://github.com/arnavsacheti/PeakRDL-BusDecoder/actions/workflows/docs.yml/badge.svg)](https://github.com/arnavsacheti/PeakRDL-BusDecoder/actions/workflows/docs.yml)
+[![Coverage Status](https://coveralls.io/repos/github/arnavsacheti/PeakRDL-BusDecoder/badge.svg?branch=tests/coveralls)](https://coveralls.io/github/arnavsacheti/PeakRDL-BusDecoder?branch=tests/coveralls)
 [![PyPI - Python Version](https://img.shields.io/pypi/pyversions/peakrdl-busdecoder.svg)](https://pypi.org/project/peakrdl-busdecoder)
 
 # PeakRDL-BusDecoder

{peakrdl_busdecoder-0.6.1.dist-info → peakrdl_busdecoder-0.6.4.dist-info}/RECORD

@@ -3,16 +3,16 @@ peakrdl_busdecoder/__peakrdl__.py,sha256=76kLBbSWVlKkCI5ESiID1aWVcQHr4sK32ujP5kn
 peakrdl_busdecoder/decode_logic_gen.py,sha256=q4qSmufJI28eX75A532BOoNfIufljq3gHNLdqKbRqio,6060
 peakrdl_busdecoder/design_scanner.py,sha256=syD6IXAJWYdpq2PQPvUGflPjhR_pO35R46Ld5K5XZHQ,1562
 peakrdl_busdecoder/design_state.py,sha256=_zqgn2dQH2ozK63NwqRvPV7Bty7G-BAESu3yux2cJmI,4926
-peakrdl_busdecoder/exporter.py,sha256=ZkGBeK-c733a3Xyc2ZeiGbWgBnDDW_s9nc64QiEf6no,5356
+peakrdl_busdecoder/exporter.py,sha256=Ozxu73-CCKDBkWYGACHOTX9qsqHhV7vup1wHq1HBKaY,5261
 peakrdl_busdecoder/identifier_filter.py,sha256=poSIS1BMscORxOuDX_nXqvdNzClhKASdAVv9aDM_aqA,3972
 peakrdl_busdecoder/listener.py,sha256=WZ2fma6oSpGGZwuP7Zcv1futWBalaeZeVZD7DX1KQz4,2509
-peakrdl_busdecoder/module_tmpl.sv,sha256=Sjo05-g_oP48x0jCdEyOvpBjwYV3wiACESgaC7viN00,2877
-peakrdl_busdecoder/package_tmpl.sv,sha256=E0_jYmXx1nEMb78WApbCvMWYlrAuNfSWB7Jw23UkBYU,852
+peakrdl_busdecoder/module_tmpl.sv,sha256=g0g7Xij4ol2H_g8sw9o1_lZdMf78eVyt95AROzc__nU,2850
+peakrdl_busdecoder/package_tmpl.sv,sha256=VWPkW7LpZTKuK7BMtpCqLxgyi9u5Fh6fwCRq7ag7BVk,825
 peakrdl_busdecoder/py.typed,sha256=47DEQpj8HBSa-_TImW-5JCeuQeRkm5NMpJWZG3hSuFU,0
 peakrdl_busdecoder/struct_gen.py,sha256=UGNdGg-S6u2JRoDExP6Mt5h3bu01fP-gQ15FcwD9gNw,2334
 peakrdl_busdecoder/sv_int.py,sha256=D57h4sgqnQWQtPw80OeDZk_i2_t2aOTsihmASB4NkGo,1788
 peakrdl_busdecoder/utils.py,sha256=Kdcee6bhubI5XVX20JQ3wo0qYJTknqrv4l8kxhSd7wI,2219
-peakrdl_busdecoder/validate_design.py,sha256=91yuWEzj0aAZ0eqzF1TF4N17yqG-D5oK5yYxDINlPms,8857
+peakrdl_busdecoder/validate_design.py,sha256=74MM3MC1kII0s2HqfEBvhWvD2rummn429X7qmtPjsSI,7523
 peakrdl_busdecoder/body/__init__.py,sha256=ZFTs8xIxeLyasyabLtGp7kClmmLlJpqdKJ854pmvTJg,311
 peakrdl_busdecoder/body/body.py,sha256=X4T3iCr94cgoz76tt2WtvhGGCweUFpUr9ogD6ol0LIg,466
 peakrdl_busdecoder/body/combinational_body.py,sha256=2FqbGHi405oEMAKlBfXz4hnLSn8Sr60kkFIUcL9oXf4,195
@@ -34,16 +34,16 @@ peakrdl_busdecoder/cpuif/apb4/__init__.py,sha256=k4JCbIrKGT8hiRvWJDcqc5xx7j9i_xY
 peakrdl_busdecoder/cpuif/apb4/apb4_cpuif.py,sha256=HarcUUxJcWLraijVaqHVWQOW_9TERD-fyfo3m_uzVhw,4512
 peakrdl_busdecoder/cpuif/apb4/apb4_cpuif_flat.py,sha256=4uNfunrRR8uu0WcgUZFilFlj-Og1eJDKBDT4aMps4wI,2860
 peakrdl_busdecoder/cpuif/apb4/apb4_interface.py,sha256=dnVWHi1NZScIR7sLYVfxbJDrU-Fm221O1XvHMdpSyi4,2472
-peakrdl_busdecoder/cpuif/apb4/apb4_tmpl.sv,sha256=jjzIbiNvsDeMQWOIo08TpeKbSP3NILQkP3gWdlcX9Ak,2310
+peakrdl_busdecoder/cpuif/apb4/apb4_tmpl.sv,sha256=woX7UBWvg_mtnrBKSel60p269d1sFgGelzgA5kISxew,2020
 peakrdl_busdecoder/cpuif/axi4lite/__init__.py,sha256=5XuWfPK2jDzr6egKUDJFr8l3k3lW-feLIh-lN7Mo8Ks,145
 peakrdl_busdecoder/cpuif/axi4lite/axi4_lite_cpuif.py,sha256=bSHP_xYczv30-F62wZYe3rqma458qi6sqSzLAKApiGE,5056
 peakrdl_busdecoder/cpuif/axi4lite/axi4_lite_cpuif_flat.py,sha256=47yz1o6yoGFyoIswdka946n_kkwsApUhqYO_xNKekR4,3868
 peakrdl_busdecoder/cpuif/axi4lite/axi4_lite_interface.py,sha256=EXW-nPJwMF_oCPdJ4XmreiLwhnpqSca9iViosh2rEXM,3721
 peakrdl_busdecoder/cpuif/axi4lite/axi4_lite_tmpl.sv,sha256=ketPrq715LSEs8Ar9ecXgnSe2AUAdQ70oNVmDbXc2Tc,3351
 peakrdl_busdecoder/udps/__init__.py,sha256=gPc74OMVWTIr5vgtFArzbhEyi1OYjllR3ZFwHJ8APaY,106
-peakrdl_busdecoder-0.6.1.dist-info/licenses/LICENSE,sha256=eAMIGRcnsTDZVr4qelHkJ49Rd_IiDY4_MVHU7N0UWSw,7646
-peakrdl_busdecoder-0.6.1.dist-info/METADATA,sha256=1WG_1zMkr_oDcbxzwyAvkNj7_fhZ_kkwGqrFZABBSBw,2558
-peakrdl_busdecoder-0.6.1.dist-info/WHEEL,sha256=_zCd3N1l69ArxyTb8rzEoP9TpbYXkqRFSNOD5OuxnTs,91
-peakrdl_busdecoder-0.6.1.dist-info/entry_points.txt,sha256=7Xzgt-C2F4cQu1kRLpZa0MbXSFFMC1SWEDnZkY0GH7s,73
-peakrdl_busdecoder-0.6.1.dist-info/top_level.txt,sha256=ZIYuTsl8cYby4g8tNR_JGzbYYTrG9mqYLSBqnY1Gpmk,19
-peakrdl_busdecoder-0.6.1.dist-info/RECORD,,
+peakrdl_busdecoder-0.6.4.dist-info/licenses/LICENSE,sha256=eAMIGRcnsTDZVr4qelHkJ49Rd_IiDY4_MVHU7N0UWSw,7646
+peakrdl_busdecoder-0.6.4.dist-info/METADATA,sha256=O_6RiPtNmfNn-_Fs9vihEuVFEVkSd2AuPG2J6SiHya4,2797
+peakrdl_busdecoder-0.6.4.dist-info/WHEEL,sha256=_zCd3N1l69ArxyTb8rzEoP9TpbYXkqRFSNOD5OuxnTs,91
+peakrdl_busdecoder-0.6.4.dist-info/entry_points.txt,sha256=7Xzgt-C2F4cQu1kRLpZa0MbXSFFMC1SWEDnZkY0GH7s,73
+peakrdl_busdecoder-0.6.4.dist-info/top_level.txt,sha256=ZIYuTsl8cYby4g8tNR_JGzbYYTrG9mqYLSBqnY1Gpmk,19
+peakrdl_busdecoder-0.6.4.dist-info/RECORD,,