nvmath-python 1.0.0__cp314-cp314t-win_amd64.whl
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- nvmath/__init__.pxd +0 -0
- nvmath/__init__.py +45 -0
- nvmath/_internal/__init__.py +0 -0
- nvmath/_internal/attribute_ifc_factory.py +330 -0
- nvmath/_internal/layout.py +70 -0
- nvmath/_internal/templates.py +130 -0
- nvmath/_internal/threadsafe.py +106 -0
- nvmath/_internal/utils.py +43 -0
- nvmath/_internal/workspace.py +490 -0
- nvmath/_utils.py +147 -0
- nvmath/bindings/__init__.py +60 -0
- nvmath/bindings/_internal/__init__.pxd +0 -0
- nvmath/bindings/_internal/__init__.py +0 -0
- nvmath/bindings/_internal/common_types.pxd +31 -0
- nvmath/bindings/_internal/cublas.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/_internal/cublas.pxd +530 -0
- nvmath/bindings/_internal/cublasLt.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/_internal/cublasLt.pxd +59 -0
- nvmath/bindings/_internal/cublasMp.pxd +52 -0
- nvmath/bindings/_internal/cudss.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/_internal/cudss.pxd +54 -0
- nvmath/bindings/_internal/cufft.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/_internal/cufft.pxd +70 -0
- nvmath/bindings/_internal/cufftMp.pxd +77 -0
- nvmath/bindings/_internal/curand.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/_internal/curand.pxd +42 -0
- nvmath/bindings/_internal/cusolver.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/_internal/cusolver.pxd +15 -0
- nvmath/bindings/_internal/cusolverDn.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/_internal/cusolverDn.pxd +406 -0
- nvmath/bindings/_internal/cusolverMp.pxd +71 -0
- nvmath/bindings/_internal/cusolverSp.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/_internal/cusolverSp.pxd +75 -0
- nvmath/bindings/_internal/cusparse.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/_internal/cusparse.pxd +471 -0
- nvmath/bindings/_internal/cusparseLt.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/_internal/cusparseLt.pxd +48 -0
- nvmath/bindings/_internal/cutensor.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/_internal/cutensor.pxd +58 -0
- nvmath/bindings/_internal/mathdx.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/_internal/mathdx.pxd +116 -0
- nvmath/bindings/_internal/nvshmem.pxd +29 -0
- nvmath/bindings/_internal/utils.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/_internal/utils.pxd +174 -0
- nvmath/bindings/_internal/utils.pyi +10 -0
- nvmath/bindings/cublas.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cublas.pxd +558 -0
- nvmath/bindings/cublas.pyi +812 -0
- nvmath/bindings/cublasLt.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cublasLt.pxd +109 -0
- nvmath/bindings/cublasLt.pyi +1461 -0
- nvmath/bindings/cublasMp.pxd +85 -0
- nvmath/bindings/cublasMp.pyi +267 -0
- nvmath/bindings/cudss.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cudss.pxd +98 -0
- nvmath/bindings/cudss.pyi +443 -0
- nvmath/bindings/cufft.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cufft.pxd +118 -0
- nvmath/bindings/cufft.pyi +301 -0
- nvmath/bindings/cufftMp.pxd +124 -0
- nvmath/bindings/cufftMp.pyi +326 -0
- nvmath/bindings/curand.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/curand.pxd +71 -0
- nvmath/bindings/curand.pyi +189 -0
- nvmath/bindings/cusolver.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cusolver.pxd +62 -0
- nvmath/bindings/cusolver.pyi +320 -0
- nvmath/bindings/cusolverDn.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cusolverDn.pxd +430 -0
- nvmath/bindings/cusolverDn.pyi +422 -0
- nvmath/bindings/cusolverMp.pxd +98 -0
- nvmath/bindings/cusolverMp.pyi +114 -0
- nvmath/bindings/cusolverSp.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cusolverSp.pxd +95 -0
- nvmath/bindings/cusolverSp.pyi +70 -0
- nvmath/bindings/cusparse.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cusparse.pxd +546 -0
- nvmath/bindings/cusparse.pyi +1017 -0
- nvmath/bindings/cusparseLt.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cusparseLt.pxd +99 -0
- nvmath/bindings/cusparseLt.pyi +252 -0
- nvmath/bindings/cutensor.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cutensor.pxd +98 -0
- nvmath/bindings/cutensor.pyi +324 -0
- nvmath/bindings/cycublas.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cycublas.pxd +664 -0
- nvmath/bindings/cycublasLt.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cycublasLt.pxd +1045 -0
- nvmath/bindings/cycublasMp.pxd +171 -0
- nvmath/bindings/cycudss.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cycudss.pxd +277 -0
- nvmath/bindings/cycufft.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cycufft.pxd +333 -0
- nvmath/bindings/cycufftMp.pxd +342 -0
- nvmath/bindings/cycurand.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cycurand.pxd +141 -0
- nvmath/bindings/cycusolver.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cycusolver.pxd +137 -0
- nvmath/bindings/cycusolverDn.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cycusolverDn.pxd +443 -0
- nvmath/bindings/cycusolverMp.pxd +107 -0
- nvmath/bindings/cycusolverSp.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cycusolverSp.pxd +93 -0
- nvmath/bindings/cycusparse.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cycusparse.pxd +679 -0
- nvmath/bindings/cycusparseLt.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cycusparseLt.pxd +135 -0
- nvmath/bindings/cycutensor.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cycutensor.pxd +189 -0
- nvmath/bindings/cymathdx.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/cymathdx.pxd +552 -0
- nvmath/bindings/cynvshmem.pxd +118 -0
- nvmath/bindings/mathdx.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/mathdx.pxd +182 -0
- nvmath/bindings/mathdx.pyi +1562 -0
- nvmath/bindings/nvpl/__init__.pxd +0 -0
- nvmath/bindings/nvpl/__init__.py +13 -0
- nvmath/bindings/nvpl/_internal/__init__.pxd +0 -0
- nvmath/bindings/nvpl/_internal/__init__.py +0 -0
- nvmath/bindings/nvpl/_internal/blas.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/nvpl/_internal/blas.pxd +237 -0
- nvmath/bindings/nvpl/_internal/fft.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/nvpl/_internal/fft.pxd +36 -0
- nvmath/bindings/nvpl/blas.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/nvpl/blas.pxd +131 -0
- nvmath/bindings/nvpl/blas.pyi +168 -0
- nvmath/bindings/nvpl/cyblas.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/nvpl/cyblas.pxd +280 -0
- nvmath/bindings/nvpl/cyfft.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/nvpl/cyfft.pxd +93 -0
- nvmath/bindings/nvpl/fft.cp314t-win_amd64.pyd +0 -0
- nvmath/bindings/nvpl/fft.pxd +100 -0
- nvmath/bindings/nvpl/fft.pyi +168 -0
- nvmath/bindings/nvshmem.pxd +54 -0
- nvmath/bindings/nvshmem.pyi +191 -0
- nvmath/device/__init__.py +38 -0
- nvmath/device/_deprecated.py +33 -0
- nvmath/device/common.py +315 -0
- nvmath/device/common_backend.py +131 -0
- nvmath/device/common_cuda.py +201 -0
- nvmath/device/common_numba.py +300 -0
- nvmath/device/common_numba_cuda_mlir.py +202 -0
- nvmath/device/common_opaque_tensor.py +201 -0
- nvmath/device/cublasdx.py +1606 -0
- nvmath/device/cublasdx_backend.py +860 -0
- nvmath/device/cublasdx_numba.py +1534 -0
- nvmath/device/cublasdx_numba_cuda_mlir.py +208 -0
- nvmath/device/cufftdx.py +373 -0
- nvmath/device/cufftdx_backend.py +220 -0
- nvmath/device/cufftdx_numba.py +140 -0
- nvmath/device/cufftdx_numba_cuda_mlir.py +79 -0
- nvmath/device/curand_kernel.py +9147 -0
- nvmath/device/cusolverdx.py +2708 -0
- nvmath/device/cusolverdx_backend.py +440 -0
- nvmath/device/cusolverdx_numba.py +567 -0
- nvmath/device/cusolverdx_numba_cuda_mlir.py +604 -0
- nvmath/device/cusolverdx_overload_backend.py +1029 -0
- nvmath/device/llvm_array.py +29 -0
- nvmath/device/random.py +441 -0
- nvmath/device/random_helpers.py +23 -0
- nvmath/device/random_states.py +187 -0
- nvmath/device/types.py +138 -0
- nvmath/device/vector_types_numba.py +259 -0
- nvmath/distributed/__init__.py +200 -0
- nvmath/distributed/_internal/__init__.py +0 -0
- nvmath/distributed/_internal/nccl.py +86 -0
- nvmath/distributed/_internal/nvshmem.py +307 -0
- nvmath/distributed/_internal/symmetric_memory.py +35 -0
- nvmath/distributed/_internal/tensor_ifc.py +70 -0
- nvmath/distributed/_internal/tensor_ifc_cupy.py +68 -0
- nvmath/distributed/_internal/tensor_ifc_host_device.py +172 -0
- nvmath/distributed/_internal/tensor_ifc_numpy.py +46 -0
- nvmath/distributed/_internal/tensor_ifc_torch.py +162 -0
- nvmath/distributed/_internal/tensor_wrapper.py +81 -0
- nvmath/distributed/_utils.py +167 -0
- nvmath/distributed/distribution/__init__.py +30 -0
- nvmath/distributed/distribution/_configuration.py +39 -0
- nvmath/distributed/distribution/distributions.py +1024 -0
- nvmath/distributed/distribution/redistribute.py +1284 -0
- nvmath/distributed/fft/__init__.py +7 -0
- nvmath/distributed/fft/_configuration.py +82 -0
- nvmath/distributed/fft/fft.py +2742 -0
- nvmath/distributed/linalg/__init__.py +22 -0
- nvmath/distributed/linalg/_internal/__init__.py +3 -0
- nvmath/distributed/linalg/_internal/epilog_protocol.py +586 -0
- nvmath/distributed/linalg/_internal/matmul_desc_ifc.py +28 -0
- nvmath/distributed/linalg/advanced/__init__.py +8 -0
- nvmath/distributed/linalg/advanced/_configuration.py +171 -0
- nvmath/distributed/linalg/advanced/matmulmod.py +3573 -0
- nvmath/distributed/linalg/generic/__init__.py +8 -0
- nvmath/distributed/linalg/generic/_caching.py +66 -0
- nvmath/distributed/linalg/generic/_configuration.py +61 -0
- nvmath/distributed/linalg/generic/_factorization.py +172 -0
- nvmath/distributed/linalg/generic/_initialization.py +966 -0
- nvmath/distributed/linalg/generic/_problem_spec.py +511 -0
- nvmath/distributed/linalg/generic/solvermod.py +1368 -0
- nvmath/distributed/process_group.py +408 -0
- nvmath/fft/__init__.py +7 -0
- nvmath/fft/_configuration.py +189 -0
- nvmath/fft/_exec_utils.py +82 -0
- nvmath/fft/_helpers.py +237 -0
- nvmath/fft/fft.py +3122 -0
- nvmath/internal/__init__.pxd +3 -0
- nvmath/internal/__init__.py +10 -0
- nvmath/internal/_bindings.cp314t-win_amd64.pyd +0 -0
- nvmath/internal/_bindings.pxd +18 -0
- nvmath/internal/_device_utils.py +45 -0
- nvmath/internal/_layout/__init__.pxd +3 -0
- nvmath/internal/_layout/__init__.py +7 -0
- nvmath/internal/_layout/_layout.cp314t-win_amd64.pyd +0 -0
- nvmath/internal/_layout/_layout.pxd +1303 -0
- nvmath/internal/_layout/_layout.pyi +1145 -0
- nvmath/internal/enum_utils.py +142 -0
- nvmath/internal/formatters.py +87 -0
- nvmath/internal/mem_limit.py +51 -0
- nvmath/internal/memory.cp314t-win_amd64.pyd +0 -0
- nvmath/internal/memory.pxd +13 -0
- nvmath/internal/memory.pyi +50 -0
- nvmath/internal/ndbuffer/__init__.pxd +3 -0
- nvmath/internal/ndbuffer/__init__.py +9 -0
- nvmath/internal/ndbuffer/_copy_kernel.cp314t-win_amd64.pyd +0 -0
- nvmath/internal/ndbuffer/_copy_kernel.pxd +10 -0
- nvmath/internal/ndbuffer/_jit.cp314t-win_amd64.pyd +0 -0
- nvmath/internal/ndbuffer/_jit.pxd +7 -0
- nvmath/internal/ndbuffer/_ndbuffer.cp314t-win_amd64.pyd +0 -0
- nvmath/internal/ndbuffer/_ndbuffer.pxd +40 -0
- nvmath/internal/ndbuffer/_ndbuffer.pyi +463 -0
- nvmath/internal/ndbuffer/copy_kernel/args.h +34 -0
- nvmath/internal/ndbuffer/copy_kernel/copy_kernel_impl/array_view.h +52 -0
- nvmath/internal/ndbuffer/copy_kernel/copy_kernel_impl/elementwise.h +68 -0
- nvmath/internal/ndbuffer/copy_kernel/copy_kernel_impl/grid_indexer.h +69 -0
- nvmath/internal/ndbuffer/copy_kernel/copy_kernel_impl/transposed.h +242 -0
- nvmath/internal/ndbuffer/copy_kernel/copy_kernel_impl/type_utils.h +39 -0
- nvmath/internal/ndbuffer/copy_kernel/copy_kernel_impl/utils.h +132 -0
- nvmath/internal/ndbuffer/copy_kernel/copy_kernel_impl/vec.h +159 -0
- nvmath/internal/ndbuffer/copy_kernel/elementwise.h +53 -0
- nvmath/internal/ndbuffer/copy_kernel/transposed.h +58 -0
- nvmath/internal/package_ifc.py +168 -0
- nvmath/internal/package_ifc_cuda.py +57 -0
- nvmath/internal/package_ifc_cupy.py +67 -0
- nvmath/internal/package_ifc_torch.py +69 -0
- nvmath/internal/package_wrapper.py +14 -0
- nvmath/internal/tensor_ifc.py +179 -0
- nvmath/internal/tensor_ifc_cupy.py +234 -0
- nvmath/internal/tensor_ifc_ndbuffer.py +147 -0
- nvmath/internal/tensor_ifc_numpy.py +184 -0
- nvmath/internal/tensor_ifc_torch.py +178 -0
- nvmath/internal/tensor_wrapper.py +160 -0
- nvmath/internal/typemaps.py +113 -0
- nvmath/internal/utils.py +805 -0
- nvmath/linalg/__init__.py +56 -0
- nvmath/linalg/_internal/__init__.py +3 -0
- nvmath/linalg/_internal/algo_cap_ifc.py +82 -0
- nvmath/linalg/_internal/algo_config_ifc.py +43 -0
- nvmath/linalg/_internal/batch.py +234 -0
- nvmath/linalg/_internal/enum_to_tuples.py +64 -0
- nvmath/linalg/_internal/epilog_protocol.py +766 -0
- nvmath/linalg/_internal/layout.py +624 -0
- nvmath/linalg/_internal/matmul_desc_ifc.py +28 -0
- nvmath/linalg/_internal/matmul_pref_ifc.py +27 -0
- nvmath/linalg/_internal/matrix_layout_ifc.py +26 -0
- nvmath/linalg/_internal/solver_utils.py +432 -0
- nvmath/linalg/_internal/typemaps.py +144 -0
- nvmath/linalg/_internal/utils.py +157 -0
- nvmath/linalg/advanced/__init__.py +8 -0
- nvmath/linalg/advanced/_algorithmmod.py +170 -0
- nvmath/linalg/advanced/_configuration.py +351 -0
- nvmath/linalg/advanced/helpers/__init__.py +5 -0
- nvmath/linalg/advanced/helpers/matmul.py +1316 -0
- nvmath/linalg/advanced/matmulmod.py +3734 -0
- nvmath/linalg/generic/__init__.py +53 -0
- nvmath/linalg/generic/_configuration/__init__.py +39 -0
- nvmath/linalg/generic/_configuration/layout.py +263 -0
- nvmath/linalg/generic/_configuration/match.py +734 -0
- nvmath/linalg/generic/_configuration/qualifiers.py +493 -0
- nvmath/linalg/generic/_configuration/solver_configuration.py +59 -0
- nvmath/linalg/generic/_configuration/wrap.py +217 -0
- nvmath/linalg/generic/_dtype.py +15 -0
- nvmath/linalg/generic/matmulmod.py +2094 -0
- nvmath/linalg/generic/solvermod.py +1301 -0
- nvmath/memory.py +279 -0
- nvmath/sparse/__init__.py +38 -0
- nvmath/sparse/_internal/__init__.py +21 -0
- nvmath/sparse/_internal/common_utils.py +147 -0
- nvmath/sparse/_internal/cudss_config_ifc.py +702 -0
- nvmath/sparse/_internal/cudss_data_ifc.py +399 -0
- nvmath/sparse/_internal/cudss_utils.py +506 -0
- nvmath/sparse/_internal/cusparse_utils.py +382 -0
- nvmath/sparse/_internal/sparse_bsc_ifc.py +303 -0
- nvmath/sparse/_internal/sparse_bsr_ifc.py +305 -0
- nvmath/sparse/_internal/sparse_coo_ifc.py +256 -0
- nvmath/sparse/_internal/sparse_csc_ifc.py +268 -0
- nvmath/sparse/_internal/sparse_csr_ifc.py +288 -0
- nvmath/sparse/_internal/sparse_dia_ifc.py +242 -0
- nvmath/sparse/_internal/sparse_format_helpers.py +601 -0
- nvmath/sparse/_internal/sparse_tensor_ifc.py +133 -0
- nvmath/sparse/_internal/sparse_ust_ifc.py +141 -0
- nvmath/sparse/_internal/utils.py +56 -0
- nvmath/sparse/advanced/__init__.py +7 -0
- nvmath/sparse/advanced/_configuration.py +227 -0
- nvmath/sparse/advanced/direct_solver.py +2069 -0
- nvmath/sparse/generic/__init__.py +7 -0
- nvmath/sparse/generic/_configuration.py +129 -0
- nvmath/sparse/generic/_helpers.py +137 -0
- nvmath/sparse/generic/_thunks.py +21 -0
- nvmath/sparse/generic/matmulmod.py +2353 -0
- nvmath/sparse/ust/__init__.py +7 -0
- nvmath/sparse/ust/_converters.py +422 -0
- nvmath/sparse/ust/_cpp.py +28 -0
- nvmath/sparse/ust/_drawer.py +565 -0
- nvmath/sparse/ust/_emitter.py +1033 -0
- nvmath/sparse/ust/_jit.py +188 -0
- nvmath/sparse/ust/_kernel.py +282 -0
- nvmath/sparse/ust/_utils.py +149 -0
- nvmath/sparse/ust/interfaces/__init__.py +0 -0
- nvmath/sparse/ust/interfaces/torch_interface.py +476 -0
- nvmath/sparse/ust/tensor.py +1016 -0
- nvmath/sparse/ust/tensor_format.py +957 -0
- nvmath/tensor/__init__.py +6 -0
- nvmath/tensor/_configuration.py +120 -0
- nvmath/tensor/_internal/__init__.py +3 -0
- nvmath/tensor/_internal/cutensor_config_ifc.py +279 -0
- nvmath/tensor/_internal/cutensor_utils.py +230 -0
- nvmath/tensor/_internal/data.py +43 -0
- nvmath/tensor/_internal/einsum_parser.py +444 -0
- nvmath/tensor/_internal/typemaps.py +96 -0
- nvmath/tensor/contract.py +1900 -0
- nvmath_python-1.0.0.dist-info/METADATA +134 -0
- nvmath_python-1.0.0.dist-info/RECORD +332 -0
- nvmath_python-1.0.0.dist-info/WHEEL +5 -0
- nvmath_python-1.0.0.dist-info/licenses/LICENSE +177 -0
- nvmath_python-1.0.0.dist-info/top_level.txt +2 -0
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# Copyright (c) 2025-2026, NVIDIA CORPORATION & AFFILIATES. ALL RIGHTS RESERVED.
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"""
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host_tensor_class: type[NumpyDistributedTensor] # set at the end of the file
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device_tensor_class: type[CudaDistributedTensor] # set at the end of the file
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NumpyDistributedTensor.host_tensor_class = NumpyDistributedTensor
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CudaDistributedTensor.host_tensor_class = NumpyDistributedTensor
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NumpyDistributedTensor.device_tensor_class = CudaDistributedTensor
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CudaDistributedTensor.device_tensor_class = CudaDistributedTensor
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# Copyright (c) 2025-2026, NVIDIA CORPORATION & AFFILIATES. ALL RIGHTS RESERVED.
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#
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# SPDX-License-Identifier: Apache-2.0
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"""
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Interface to seamlessly use distributed Torch tensor objects.
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"""
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+
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from __future__ import annotations # allows typehint of class methods to return the self class
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__all__ = ["TorchDistributedTensor"]
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import math
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try:
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import torch
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except ImportError:
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torch = None # type: ignore
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from collections.abc import Sequence
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from typing import Literal
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import nvmath.distributed
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from nvmath.distributed._internal.nccl import nccl_empty_dlpack
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from nvmath.distributed._internal.nvshmem import nvshmem_empty_dlpack
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from nvmath.internal.package_ifc import StreamHolder
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from nvmath.internal.tensor_ifc_torch import TorchTensor
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from nvmath.internal.utils import device_ctx
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from .tensor_ifc import DistributedTensor
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def _get_symmetric_memory_allocator(backend: Literal["nvshmem", "nccl"]):
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if backend == "nvshmem":
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return nvshmem_empty_dlpack
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elif backend == "nccl":
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return nccl_empty_dlpack
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raise AssertionError(f"Internal error: unsupported backend {backend}.")
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# Most methods aren't redefined, because they simply act on the local array
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class TorchDistributedTensor(TorchTensor, DistributedTensor):
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"""
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TensorHolder for distributed torch tensors.
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"""
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host_tensor_class: type[TorchDistributedTensor] # set at the end of the file
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device_tensor_class: type[TorchDistributedTensor] # set at the end of the file
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def __init__(self, tensor):
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super().__init__(tensor)
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@classmethod
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def empty(
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cls, shape, device_id="cpu", *, dtype="float32", strides=None, stream_holder: StreamHolder | None = None, **context
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) -> TorchDistributedTensor:
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"""
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Create an empty tensor of the specified shape and data type on the specified device
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(None, 'cpu', or device id).
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Note, that the strides, if specified, should correspond to a dense
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(possibly permuted) tensor and MUST NOT overlap.
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Otherwise, the behaviour is not defined.
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"""
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symmetric_memory = context.pop("symmetric_memory", None)
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make_symmetric = context.pop("make_symmetric", False)
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skip_symmetric_check = context.pop("skip_symmetric_check", False)
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if device_id == "cpu":
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if symmetric_memory or make_symmetric or skip_symmetric_check:
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raise ValueError("symmetric memory options cannot be used when allocating tensor on CPU")
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return super().empty(shape, device_id, dtype=dtype, strides=strides, **context)
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+
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ctx = nvmath.distributed.get_context()
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assert ctx is not None, "nvmath.distributed has not been initialized"
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logger = context.get("logger")
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if not symmetric_memory:
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if make_symmetric or skip_symmetric_check:
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raise ValueError("Use of symmetric memory option with symmetric_memory=None")
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return super().empty(
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shape, device_id=device_id, dtype=dtype, strides=strides, stream_holder=stream_holder, **context
|
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+
)
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+
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dtype = TorchTensor.name_to_dtype[dtype]
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+
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symmetric_memory_allocator = _get_symmetric_memory_allocator(symmetric_memory)
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+
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with device_ctx(device_id):
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size = math.prod(shape, start=dtype.itemsize)
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# TODO: ideally strides should be set in DLPack, but cuda.core doesn't support
|
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# ndarray yet and instead returns a flat buffer.
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dlpack_buf = symmetric_memory_allocator(
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size,
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96
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device_id,
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ctx.process_group,
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make_symmetric=make_symmetric,
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skip_symmetric_check=skip_symmetric_check,
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logger=logger,
|
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+
)
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tensor = torch.from_dlpack(dlpack_buf)
|
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+
# Buffer may be padded if make_symmetric=True.
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tensor = tensor[:size]
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if strides is None:
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tensor = tensor.view(dtype).view(shape)
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else:
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tensor = torch.as_strided(tensor.view(dtype), shape, strides)
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+
|
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return cls(tensor)
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+
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def to(
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self, device_id, stream_holder, symmetric_memory: None | Literal["nvshmem", "nccl"] = None
|
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) -> TorchDistributedTensor:
|
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"""
|
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116
|
+
In addition to the base class semantics:
|
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|
+
- Source or target device must be the one used to initialize NVSHMEM on this
|
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process. This implies that copy from one CUDA device to another is not allowed.
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- Memory layout is preserved.
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- Strides must be non-overlapping.
|
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+
"""
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if not (device_id == "cpu" or isinstance(device_id, int)):
|
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|
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raise ValueError(f"The device must be specified as an integer or 'cpu', not '{device_id}'.")
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|
+
|
|
125
|
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blocking = (device_id == "cpu") or (self.device_id == "cpu")
|
|
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|
+
|
|
127
|
+
# To CPU or same device
|
|
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|
+
if device_id == "cpu" or self.device_id == device_id:
|
|
129
|
+
with stream_holder.ctx:
|
|
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|
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tensor = self.tensor.to(device=device_id, non_blocking=not blocking)
|
|
131
|
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result = TorchDistributedTensor(tensor)
|
|
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|
+
assert result.is_symmetric_memory == (symmetric_memory == "nvshmem")
|
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|
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return result
|
|
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+
|
|
135
|
+
# Currently we don't allow copy from one device to another for distributed
|
|
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|
+
# tensors (see comment in CupyDistributedTensor.to()).
|
|
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|
+
if self.device_id != "cpu" and self.device_id != device_id:
|
|
138
|
+
raise ValueError("Cannot copy distributed tensor to a different CUDA device")
|
|
139
|
+
|
|
140
|
+
# CPU to GPU
|
|
141
|
+
with stream_holder.ctx:
|
|
142
|
+
tensor_device = TorchDistributedTensor.empty(
|
|
143
|
+
self.shape,
|
|
144
|
+
device_id=device_id,
|
|
145
|
+
dtype=self.dtype,
|
|
146
|
+
strides=self.strides,
|
|
147
|
+
stream_holder=stream_holder,
|
|
148
|
+
make_symmetric=symmetric_memory is not None,
|
|
149
|
+
symmetric_memory=symmetric_memory,
|
|
150
|
+
)
|
|
151
|
+
tensor_device.tensor.copy_(self.tensor, non_blocking=not blocking)
|
|
152
|
+
assert tensor_device.is_symmetric_memory == (symmetric_memory == "nvshmem")
|
|
153
|
+
return tensor_device
|
|
154
|
+
|
|
155
|
+
def reshape(self, shape: Sequence[int], *, copy: bool | None = None) -> TorchDistributedTensor:
|
|
156
|
+
if copy and self.device_id != "cpu":
|
|
157
|
+
raise NotImplementedError("reshape with copy=True is not supported for TorchDistributedTensor on GPU")
|
|
158
|
+
return super().reshape(shape, copy=copy)
|
|
159
|
+
|
|
160
|
+
|
|
161
|
+
TorchDistributedTensor.host_tensor_class = TorchDistributedTensor
|
|
162
|
+
TorchDistributedTensor.device_tensor_class = TorchDistributedTensor
|
|
@@ -0,0 +1,81 @@
|
|
|
1
|
+
# Copyright (c) 2025-2026, NVIDIA CORPORATION & AFFILIATES. ALL RIGHTS RESERVED.
|
|
2
|
+
#
|
|
3
|
+
# SPDX-License-Identifier: Apache-2.0
|
|
4
|
+
|
|
5
|
+
"""
|
|
6
|
+
Entry point to using tensors from different libraries seamlessly.
|
|
7
|
+
"""
|
|
8
|
+
|
|
9
|
+
__all__ = ["wrap_operand", "copy_"]
|
|
10
|
+
|
|
11
|
+
import warnings
|
|
12
|
+
from collections.abc import Sequence
|
|
13
|
+
|
|
14
|
+
from nvmath.internal.tensor_ifc import Tensor, TensorHolder
|
|
15
|
+
from nvmath.internal.tensor_wrapper import (
|
|
16
|
+
infer_tensor_package as base_infer_tensor_package,
|
|
17
|
+
)
|
|
18
|
+
from nvmath.internal.tensor_wrapper import (
|
|
19
|
+
maybe_register_package as base_maybe_register_package,
|
|
20
|
+
)
|
|
21
|
+
|
|
22
|
+
from .tensor_ifc import DistributedTensor
|
|
23
|
+
from .tensor_ifc_numpy import CudaDistributedTensor, NumpyDistributedTensor
|
|
24
|
+
|
|
25
|
+
_TENSOR_TYPES: dict[str, type[DistributedTensor]] = {"numpy": NumpyDistributedTensor, "cuda": CudaDistributedTensor}
|
|
26
|
+
|
|
27
|
+
|
|
28
|
+
def infer_tensor_package(tensor):
|
|
29
|
+
"""
|
|
30
|
+
Infer the package that defines this tensor.
|
|
31
|
+
"""
|
|
32
|
+
package = base_infer_tensor_package(tensor)
|
|
33
|
+
# Use call_base=False because base_infer_tensor_package already
|
|
34
|
+
# called base_maybe_register_package
|
|
35
|
+
maybe_register_package(package, call_base=False)
|
|
36
|
+
return package
|
|
37
|
+
|
|
38
|
+
|
|
39
|
+
def maybe_register_package(package, call_base=True):
|
|
40
|
+
if call_base:
|
|
41
|
+
base_maybe_register_package(package)
|
|
42
|
+
|
|
43
|
+
if package in _TENSOR_TYPES:
|
|
44
|
+
return
|
|
45
|
+
elif package == "torch":
|
|
46
|
+
from .tensor_ifc_torch import TorchDistributedTensor
|
|
47
|
+
|
|
48
|
+
_TENSOR_TYPES[package] = TorchDistributedTensor
|
|
49
|
+
elif package == "cupy":
|
|
50
|
+
from .tensor_ifc_cupy import CupyDistributedTensor, HostDistributedTensor
|
|
51
|
+
|
|
52
|
+
_TENSOR_TYPES["cupy"] = CupyDistributedTensor
|
|
53
|
+
_TENSOR_TYPES["cupy_host"] = HostDistributedTensor
|
|
54
|
+
else:
|
|
55
|
+
raise AssertionError(f"Internal error: unrecognized package {package}")
|
|
56
|
+
|
|
57
|
+
|
|
58
|
+
def wrap_operand(native_operand: Tensor) -> DistributedTensor[Tensor]:
|
|
59
|
+
"""
|
|
60
|
+
Wrap one "native" operand so that package-agnostic API can be used.
|
|
61
|
+
"""
|
|
62
|
+
if isinstance(native_operand, TensorHolder):
|
|
63
|
+
msg = (
|
|
64
|
+
"wrap_operand() is being called unnecessarily because the input is already a TensorHolder. "
|
|
65
|
+
"Only public facing APIs should call wrap_operand(). "
|
|
66
|
+
"Internal APIs should assume the operands are TensorHolder already."
|
|
67
|
+
"Trying to wrap a TensorHolder will become an error in the future."
|
|
68
|
+
)
|
|
69
|
+
warnings.warn(msg, DeprecationWarning)
|
|
70
|
+
assert isinstance(native_operand, DistributedTensor)
|
|
71
|
+
return native_operand
|
|
72
|
+
wrapped_operand = _TENSOR_TYPES[infer_tensor_package(native_operand)](native_operand)
|
|
73
|
+
return wrapped_operand
|
|
74
|
+
|
|
75
|
+
|
|
76
|
+
def copy_(src: Sequence[TensorHolder], dest: Sequence[TensorHolder], stream_holder):
|
|
77
|
+
"""
|
|
78
|
+
Copy the wrapped operands in dest to the corresponding wrapped operands in src.
|
|
79
|
+
"""
|
|
80
|
+
for s, d in zip(src, dest, strict=True):
|
|
81
|
+
d.copy_(s, stream_holder=stream_holder)
|
|
@@ -0,0 +1,167 @@
|
|
|
1
|
+
# Copyright (c) 2025-2026, NVIDIA CORPORATION & AFFILIATES. ALL RIGHTS RESERVED.
|
|
2
|
+
#
|
|
3
|
+
# SPDX-License-Identifier: Apache-2.0
|
|
4
|
+
|
|
5
|
+
from __future__ import annotations
|
|
6
|
+
|
|
7
|
+
__all__ = ["allocate_symmetric_memory", "free_symmetric_memory"]
|
|
8
|
+
|
|
9
|
+
from collections.abc import Iterable, Sequence
|
|
10
|
+
from logging import Logger
|
|
11
|
+
from types import ModuleType
|
|
12
|
+
from typing import TYPE_CHECKING, Literal
|
|
13
|
+
|
|
14
|
+
if TYPE_CHECKING:
|
|
15
|
+
import torch
|
|
16
|
+
|
|
17
|
+
import numpy as np
|
|
18
|
+
from numpy.typing import DTypeLike
|
|
19
|
+
|
|
20
|
+
import nvmath.distributed
|
|
21
|
+
from nvmath.distributed._internal import tensor_wrapper
|
|
22
|
+
from nvmath.internal.utils import device_ctx
|
|
23
|
+
|
|
24
|
+
# Supported packages for tensors backed by symmetric memory.
|
|
25
|
+
_SUPPORTED_PACKAGES = ("cupy", "torch")
|
|
26
|
+
|
|
27
|
+
|
|
28
|
+
# TODO: do a general refactor of this function in nvmath
|
|
29
|
+
def calculate_strides(shape: Sequence[int], axis_order: Iterable[int]):
|
|
30
|
+
"""
|
|
31
|
+
Calculate the strides for the provided shape and axis order.
|
|
32
|
+
"""
|
|
33
|
+
strides = [0] * len(shape)
|
|
34
|
+
|
|
35
|
+
stride = 1
|
|
36
|
+
for axis in axis_order:
|
|
37
|
+
strides[axis] = stride
|
|
38
|
+
stride *= shape[axis]
|
|
39
|
+
|
|
40
|
+
return strides
|
|
41
|
+
|
|
42
|
+
|
|
43
|
+
def allocate_symmetric_memory(
|
|
44
|
+
shape: int | Sequence[int],
|
|
45
|
+
package: ModuleType,
|
|
46
|
+
*,
|
|
47
|
+
dtype: DTypeLike | torch.dtype | None = None,
|
|
48
|
+
axis_order: Literal["C", "F"] | Sequence[int] = "C",
|
|
49
|
+
make_symmetric: bool = False,
|
|
50
|
+
skip_symmetric_check: bool = False,
|
|
51
|
+
logger: Logger | None = None,
|
|
52
|
+
):
|
|
53
|
+
"""Return uninitialized tensor of given shape and type, allocated from the NVSHMEM
|
|
54
|
+
symmetric heap, on the device on which nvmath.distributed was initialized. The
|
|
55
|
+
tensor type is determined by the provided package (e.g. cupy, torch).
|
|
56
|
+
**This is a collective operation and must be called by all processes**.
|
|
57
|
+
Note that the buffer size must be the same on all processes, or you can
|
|
58
|
+
use ``make_symmetric=True`` to pad all buffers to the same max size.
|
|
59
|
+
|
|
60
|
+
Args:
|
|
61
|
+
shape: Shape of the tensor to allocate.
|
|
62
|
+
|
|
63
|
+
package: Python package determining the tensor type (e.g. cupy, torch).
|
|
64
|
+
|
|
65
|
+
dtype: Tensor dtype in a form recognized by the package. If None, will use the
|
|
66
|
+
package's default dtype.
|
|
67
|
+
|
|
68
|
+
axis_order: Axis order. The default is 'C' (row-major ordering).
|
|
69
|
+
|
|
70
|
+
make_symmetric: If buffer sizes do not match across processes, will allocate
|
|
71
|
+
the maximum size on every process to ensure the allocation is symmetric.
|
|
72
|
+
The default is False.
|
|
73
|
+
|
|
74
|
+
skip_symmetric_check: Skip checking that the allocation is symmetric (which
|
|
75
|
+
requires inter-process communication). The default is False.
|
|
76
|
+
|
|
77
|
+
logger (logging.Logger): Python Logger object. The root logger will be used if a
|
|
78
|
+
logger object is not provided.
|
|
79
|
+
"""
|
|
80
|
+
|
|
81
|
+
if package.__name__ not in _SUPPORTED_PACKAGES:
|
|
82
|
+
raise ValueError(f"The package must be one of {_SUPPORTED_PACKAGES}. Got {package}.")
|
|
83
|
+
|
|
84
|
+
distributed_ctx = nvmath.distributed.get_context()
|
|
85
|
+
if distributed_ctx is None:
|
|
86
|
+
raise RuntimeError(
|
|
87
|
+
"nvmath.distributed has not been initialized. Refer to "
|
|
88
|
+
"https://docs.nvidia.com/cuda/nvmath-python/latest/distributed-apis/runtime.html"
|
|
89
|
+
" for more information."
|
|
90
|
+
)
|
|
91
|
+
if not distributed_ctx.nvshmem_available:
|
|
92
|
+
raise RuntimeError("nvmath.distributed wasn't initialized with NVSHMEM backend")
|
|
93
|
+
|
|
94
|
+
device_id = distributed_ctx.device_id
|
|
95
|
+
|
|
96
|
+
if isinstance(shape, int):
|
|
97
|
+
shape = (shape,)
|
|
98
|
+
|
|
99
|
+
strides = None
|
|
100
|
+
if axis_order is not None:
|
|
101
|
+
if axis_order == "C":
|
|
102
|
+
strides = calculate_strides(shape, reversed(range(len(shape))))
|
|
103
|
+
elif axis_order == "F":
|
|
104
|
+
strides = calculate_strides(shape, range(len(shape)))
|
|
105
|
+
else:
|
|
106
|
+
strides = calculate_strides(shape, axis_order)
|
|
107
|
+
|
|
108
|
+
if package.__name__ == "cupy":
|
|
109
|
+
from ._internal.tensor_ifc_cupy import CupyDistributedTensor
|
|
110
|
+
|
|
111
|
+
if dtype is None:
|
|
112
|
+
# This mimics numpy and cupy
|
|
113
|
+
dtype = np.float64
|
|
114
|
+
|
|
115
|
+
dtype = np.dtype(dtype).name # type: ignore
|
|
116
|
+
return CupyDistributedTensor.empty(
|
|
117
|
+
shape,
|
|
118
|
+
dtype=dtype,
|
|
119
|
+
device_id=device_id,
|
|
120
|
+
strides=strides,
|
|
121
|
+
symmetric_memory="nvshmem",
|
|
122
|
+
make_symmetric=make_symmetric,
|
|
123
|
+
skip_symmetric_check=skip_symmetric_check,
|
|
124
|
+
logger=logger,
|
|
125
|
+
).tensor
|
|
126
|
+
elif package.__name__ == "torch":
|
|
127
|
+
from ._internal.tensor_ifc_torch import TorchDistributedTensor
|
|
128
|
+
|
|
129
|
+
if dtype is None:
|
|
130
|
+
import torch
|
|
131
|
+
|
|
132
|
+
dtype = torch.get_default_dtype()
|
|
133
|
+
|
|
134
|
+
dtype = str(dtype).split(".")[1]
|
|
135
|
+
return TorchDistributedTensor.empty(
|
|
136
|
+
shape,
|
|
137
|
+
dtype=dtype,
|
|
138
|
+
device_id=device_id,
|
|
139
|
+
strides=strides,
|
|
140
|
+
symmetric_memory="nvshmem",
|
|
141
|
+
make_symmetric=make_symmetric,
|
|
142
|
+
skip_symmetric_check=skip_symmetric_check,
|
|
143
|
+
logger=logger,
|
|
144
|
+
).tensor
|
|
145
|
+
|
|
146
|
+
|
|
147
|
+
def free_symmetric_memory(*tensors) -> None:
|
|
148
|
+
"""Frees tensors' data buffer where the buffer was allocated on the NVSHMEM
|
|
149
|
+
symmetric heap. Note that this is only meant to be called on tensors returned
|
|
150
|
+
by ``allocate_symmetric_memory()``.
|
|
151
|
+
|
|
152
|
+
**This is a collective operation and must be called by all processes, with tensors
|
|
153
|
+
in the same order**."""
|
|
154
|
+
|
|
155
|
+
device_id = tensor_wrapper.wrap_operand(tensors[0]).device_id
|
|
156
|
+
if device_id == "cpu":
|
|
157
|
+
raise TypeError("free_symmetric_memory called on CPU array/tensor")
|
|
158
|
+
|
|
159
|
+
with device_ctx(device_id):
|
|
160
|
+
for tensor in tensors:
|
|
161
|
+
wrapped_tensor = tensor_wrapper.wrap_operand(tensor)
|
|
162
|
+
if wrapped_tensor.device_id == "cpu":
|
|
163
|
+
raise TypeError("free_symmetric_memory called on CPU array/tensor")
|
|
164
|
+
|
|
165
|
+
assert wrapped_tensor.device_id == device_id, "Internal error: symmetric memory tensors are not on the same device"
|
|
166
|
+
|
|
167
|
+
wrapped_tensor.free_symmetric()
|
|
@@ -0,0 +1,30 @@
|
|
|
1
|
+
# Copyright (c) 2026, NVIDIA CORPORATION & AFFILIATES. ALL RIGHTS RESERVED.
|
|
2
|
+
#
|
|
3
|
+
# SPDX-License-Identifier: Apache-2.0
|
|
4
|
+
|
|
5
|
+
from ._configuration import RedistributeOptions
|
|
6
|
+
from .distributions import (
|
|
7
|
+
BindDistributionError,
|
|
8
|
+
BlockCyclic,
|
|
9
|
+
BlockNonCyclic,
|
|
10
|
+
Box,
|
|
11
|
+
ConvertDistributionError,
|
|
12
|
+
Distribution,
|
|
13
|
+
ProcessGrid,
|
|
14
|
+
Slab,
|
|
15
|
+
)
|
|
16
|
+
from .redistribute import Redistribute, redistribute
|
|
17
|
+
|
|
18
|
+
__all__ = [
|
|
19
|
+
"ProcessGrid",
|
|
20
|
+
"Distribution",
|
|
21
|
+
"Slab",
|
|
22
|
+
"Box",
|
|
23
|
+
"BlockCyclic",
|
|
24
|
+
"BlockNonCyclic",
|
|
25
|
+
"BindDistributionError",
|
|
26
|
+
"ConvertDistributionError",
|
|
27
|
+
"RedistributeOptions",
|
|
28
|
+
"Redistribute",
|
|
29
|
+
"redistribute",
|
|
30
|
+
]
|
|
@@ -0,0 +1,39 @@
|
|
|
1
|
+
# Copyright (c) 2025-2026, NVIDIA CORPORATION & AFFILIATES. ALL RIGHTS RESERVED.
|
|
2
|
+
#
|
|
3
|
+
# SPDX-License-Identifier: Apache-2.0
|
|
4
|
+
|
|
5
|
+
__all__ = ["RedistributeOptions"]
|
|
6
|
+
|
|
7
|
+
from dataclasses import dataclass
|
|
8
|
+
from logging import Logger
|
|
9
|
+
from typing import Literal
|
|
10
|
+
|
|
11
|
+
|
|
12
|
+
@dataclass
|
|
13
|
+
class RedistributeOptions:
|
|
14
|
+
"""
|
|
15
|
+
A data class for providing options to the :class:`Redistribute` object and the wrapper
|
|
16
|
+
function :func:`redistribute`.
|
|
17
|
+
|
|
18
|
+
Attributes:
|
|
19
|
+
logger (logging.Logger): Python Logger object. The root logger will be used if a
|
|
20
|
+
logger object is not provided.
|
|
21
|
+
|
|
22
|
+
blocking: A flag specifying the behavior of the execution functions and methods,
|
|
23
|
+
such as :func:`redistribute` and :meth:`Redistribute.execute`. When ``blocking``
|
|
24
|
+
is `True`, the execution methods do not return until the operation is complete.
|
|
25
|
+
When ``blocking`` is ``"auto"``, the methods return immediately when the input
|
|
26
|
+
tensor is on the GPU. The execution methods always block when the input tensor
|
|
27
|
+
is on the CPU to ensure that the user doesn't inadvertently use the result
|
|
28
|
+
before it becomes available. The default is ``"auto"``.
|
|
29
|
+
|
|
30
|
+
.. seealso::
|
|
31
|
+
:class:`Redistribute` and :func:`redistribute`.
|
|
32
|
+
"""
|
|
33
|
+
|
|
34
|
+
logger: Logger | None = None
|
|
35
|
+
blocking: Literal[True, "auto"] = "auto"
|
|
36
|
+
|
|
37
|
+
def __post_init__(self):
|
|
38
|
+
if self.blocking not in (True, "auto"):
|
|
39
|
+
raise ValueError("The value specified for 'blocking' must be either True or 'auto'.")
|